201142958 、發明說明： 【發明所屬之技術領域】 特別是一種四邊扁平無接 本發明係有關於-種半導體封裝技術， 腳（quad flat no-lead)封裝方法。 【先前技術】201142958, invention description: [Technical field to which the invention pertains] In particular, a four-sided flat connection is not disclosed. The present invention relates to a semiconductor flat package technology, a quad flat no-lead packaging method. [Prior Art]
半彳 ==巾，由_產品_小_勢加上功能不 4之不斷提高，亦不_小難尺寸與改良封 α獨發喊度與蝴距_裝製程與降低製造成本-直為 為此技術領域之重要绿題。 马 【發明内容】 為了解決上述問題，本發明目的之一係提供一種四邊扁平 封裝方法’可獲得高密度與細間距的封裝製程且提高製程良率。、 為:^1上述目的，本發明一實施例之一細邊扁平無 二it括下列步驟:提供-封裝載板，其_板至少-表Ϊ r成-離金屬層械—第—圖案化金屬層於可剝離金屬層上. j-苐-次圖案化金屬層，堆疊設置於第一圖案化金屬層上: :::制離金屬層上與覆蓋第一圖案化金屬層，並 1 且絕緣層將每—堆叠設置的第一圖案化金屬層與第 ‘荦化2屬層分隔成彼此電性隔絕的複數個對外接塾；形成」第 層與對外接塾上，其中第二圖案化金屬層係包 — 導電接塾與複數線路，且對外接塾愈第- =塾電性連接;進行—晶_步驟；™除封裝載板並暴玆 本發明-實施例之-種四邊扁平無接腳封裳方法，係包括下列步 201142958 声.·开ΓΓί 其中封魏板至少-表面設置—可剝離金屬 裝翁杯,==金屬層於可剝離金屬層上；形成一絕緣層於封 i第—歸彳H讎金麟，其中絕緣層具有複數侧σ以露出部 圖金顧；形成—侧接合層覆蓋絕騎絲露出的第-I位於2層上；形成-第—次圖案化金屬層於該絕緣層的開口内， 一圖幸彳卜=無金屬層上’其巾第-次圖案化金屬層轉設置於第 盘第二_層上，且絕緣層該將每-*堆疊設置的第―®案化金屬層 一:人®案化金屬層分隔成彼此電性隔絕的複數個對外接塾； 化：邑緣層與對外接塾上，其中第二圖案化金屬層 第-μ二 料電接麟概祕，輯外接墊與 性連接；進行^封裝麵-及絲難載板並暴 發明ΓΓί由具體實施例配合__式詳加賴，當更容純解本 發明之目的、技_容、伽及其輯成之功效。 【實施方式】 a月。^詳日韻如下’所述較佳實施例僅做_說明非用以限定本發 膏方^ U圖1D、圖1E、圖1F、圖1G與圖1H為本發明-泰四邊扁平無接腳封裝方法的流程示意圖。於本實施例中，四 邊扁平無接腳封裝方法包括下列步驟。 之至^ ’如圖1A所示，提供—封裝載板1Q。其中，此封裝載板10 赤表面設置一可剝離金屬層20。接著，請繼續參照圖1D，形 I案化金屬層如於可剝離金屬層Μ上。其中，圖案化金屬層4〇 '、匕3至少—晶片承座42與複數個導電接墊44。 ，著，设置-晶片5〇於晶片承座42上，如圖圧所示。晶片5〇 黏著材料（圖上未標）固定於晶片承座42上。之後，利用 複數條引線60電性連接晶片5〇與導電接塾44。 201142958 請繼續參照圓1F，利用一封裝材料7〇覆蓋晶片5〇、引線6〇、導 . 電接墊44與可剝離金屬層20。 之後，如圖1G所示，移除封裝載板10並暴露出可剝離金屬芦 20之下表面。 如圖m所示，對可剝離金屬層20 (如圖1G所示）進行一圖案 化程序用以形成複數個外部接點22。其中，外部接點22係與導電接 墊44電性連接。 叫繼續參照圖1H，於本實施例中，每一外部接點22之尺寸係大 • 於每—導電接墊44，可提供後續導電材料，如銲球，較大的接觸面積。 然，本發職不限於此’外部接點22之尺寸大小與形狀取決於使用 者與設計者的需求。於-實施例中，如圖2B，每一外部接點22，例 如導電柱（conductive pillar) ’其尺寸係小於每一導電接塾44，如此 其後使用之導電材料〇_球），可增加與導雜及導電触44的 合強度。 於本發明中’整體封裝體的外部接點是利用移除封裝載板後對可 剝離金屬層進行圖案化製程所得。因此，如圖2A所示，複數個外部 接點22可設計成具有重新佈線(re_lay〇ut)導電接塾Μ的對外接點，如 此可因應客戶需求增加封裝·體的可變化性。 接續上述說明’於不同實施例中，封裝載板1〇的表面可設置一 金屬易剝離表面12用以輔助可剝離金屬層2〇之剝離。此金屬易剝離 表面I2可為金屬材質或其他光滑材質所構成表面。 此外’圖案化金屬層4G可糊不同製程所製作，如影像轉移製 程或黃光微影蝕刻製程所製作。 如-實施例中’請參照圖1B、圖1C與圖m，圖案化金屬層4〇 可利用影像轉移製程所料。首先，設置—影像轉麟3〇於可剝離 金屬層20上並暴露出部分可剝離金屬層2〇之上表面，如圖ib所示。 201142958 圖1 電戶成圖案化金屬層4〇於暴露於外的可剝離金屬層20上’如 實於3 /rti像，移層30完成圖案化金屬層4(3之製作。於另一 1：：^ 屣層。 後進仃—微衫蝕刻程序以形成此圖案化金 睛同時參照圖1A、圖m 1·η η 實施例中，四邊扁平益接腳Γ 圖1G與圖2C，於本 ㈣恭4 ,#.，，、接卿封裝方法係包括下列步驟。首先，提供- 2:=A 裝裁板10之至少-表面設置-可剝離金屬層 20上，：φ二斤：接if，形成一圖案化金屬層40於可剝離金屬層 電接塾:t ISI、化金層40係包含至少一晶片承座42與複數個導 電接墊44，如圖1D所示。 ㈣後U 1E ’ a置—晶片5〇於晶片承座42並利用複數條 一、本電性連接晶片50與導電接塾44。其後，如圖ιρ與圖ig所 不，利用一封裝材料70霜苔曰y ΡΙ Μ 復盍日日片50、引線60、導電接墊44與可剝 、屬層20 ’以及_-_程序移除可_金屬層2〇。 =本實施例中，本發明所使用之封裝載板具有可剝離金屬層2〇， =可選擇性對此可剝離金屬層2〇進行圖案化製程或是依需求完全 移除此可剝離金屬層20，如圖1G與圖2C所示。於―實酬中 =可娜金制20之_更可進—步移除部份厚度之圖案化 層40，如圖，如圖1G、圖2D所示。 30 請參照圖3A、圖犯、圖％與圖犯，本發明之導電接墊與外 ，點之結構係具有多種變化外，更可選擇性的形成一金屬表面處理岸 0於外部接點22或導電接塾44上。其中，導電接塾糾之上下表 都可選擇性的設置金屬表面處理層8〇於其上。 於本發明中’作&晶片承座與導電接塾之圖案化金屬層可選 鍍的方式製作’因此只要顯影曝光技術可配合做到的間距，此方法可 201142958 製作出品質優良之小尺寸與細間距的導電接塾。相較於蝴方式，由 於叉限於藥水置換速度影響闕細及厚度的關，其對於細間距的 控制難度提高。因此，使用電财式可具有較高的可靠度與達成率， 故可製作較複雜的導電接塾結構，如圖5所示，麻為階梯狀的導電 接塾44,的結構。此方法亦可製作導電接塾可具有一正梯形或倒梯形 結構’如圖4A與圖4B所示。 接續上述說明，製成此結構的方法如後所述，參照圖lc，於影 像轉移層30間與可剝離金屬層2〇上電鑛製作一第一圖案化金屬^ 後’例如圖案化金屬層40，可設置一次影像轉移層3〇,於圖案化金屬 層40上並暴露出部分圖案化金屬層4〇之上表面，如圖6a所示。接 著，電鍍形成一第二圖案化金屬層43於暴露於外的圖案化金屬層4〇 上’如圖6B所示。然後，參照圖6C，移除影像轉移層3〇盥次^像 轉移層30,即可獲得導電接墊44，之側邊具有一階梯狀結構，如圖牝 所不。然本發明之四邊扁平無接腳封裝結構並不限於此，利用上述方 法製作如圖4D所示側邊具有—階梯狀結構之導電接墊44 ^ 本發明方法可藉由控制影像轉移層（3G，圖1B)形狀，如梯形 (圓上未示）’即可製作導電接塾可具有—正梯形或倒梯形結構，^ 圖4A與圖4B所示。 於一實施例中，請參照圖7A與圖7B，圖案化金屬層4〇除包括 至少一晶片承座42與複數個導電接墊44外，更包括一線路46用以 電性連接兩兩導電接墊44。其中，兩兩導電接墊44之一用以與晶片 5〇利用引線60電性連接，而導電接墊44之另一則可與外部接點r (如圖1H所示）之一電性連接。其中，如前所述，更可選擇性的設 置金屬表面處理層80於用於打線的導電接墊44上。 接續上述，圖8A至圖81為本發明又一實施例之四邊扁平無接腳 封裝方法的流程示意圖，用以製造如圖7A與圖7B所示之結構。於 本實施例中，四邊扁平無接腳封裝方法包括下列步驟。 201142958 首先，請參考圖8A，提供一封裝載板1〇,其中封裝載板1〇至少 一表面設置一可剝離金屬層20。接著，如圖8D所示，形成一第一圖 案化金屬層41於可剝離金屬層20上。以及形成一第一次圖案化金屬 層411 ’堆疊設置於第一圖案化金屬層41上。再來，請參考圖8E， 形成一絕緣層93於可剝離金屬層20與第一圖案化金屬層41上，並 暴露出第一次圖案化金屬層411，且絕緣層93將每一堆疊設置的第一 圖案化金屬層41與第一次圖案化金屬層411分隔成彼此電性隔絕的 複數個對外接塾48，其中絕緣層93可利用塗佈（printing)的方式設 置於封裝載板10上。於一實施例中，可在圖案化絕緣層93上進行一 φ 表面處理步驟形成粗糙表面以加強與後續設置於其上的物質接合，其 中可利用乾式或濕式電黎處理（plasmatreatment)的方法來完成。更 者，可如圖8F所示，選擇性利用濺鍍方法形成一金屬接合層94覆蓋 絕緣層93上並暴露出的第一次圖案化金屬411，以加強後續線路與圖 案化絕緣層93的接合功能，其中金屬接合層94的材質包含但不限於 欽或銅。 接續上述，於此實施例中，形成對外接墊48的步驟如圖8B及圖 8C所不，包括：設置一第一影像轉移層33於可剝離金屬層2〇上， 亚暴露出部分可剝離金屬層2〇 ;接著，電鍍形成第一圖案化金屬層 _ 4丨於暴賂於外的可剝離金屬層2G上。再來，如圖8C所示，設置- 第一次影像轉移層34於第一影像轉移層33上並露出部分第一圖案化 金屬層41。電鑛形成第一次圖案化金屬I 411堆疊於第-圖案化金屬 層41上，以及移除第一影像轉移層Μ與第一次影像轉移層34，以形 成如圖8D之結構。 再來，如圖8G所示，形成一第二圖案化金屬層，如圖案化金屬 層4〇 ’於絕緣層93絲露於外的對外接塾Μ上方，其中圖案化金屬 層40係包含至少—晶片承座42、複數個導電接墊44與複數線路46， 且圖案化金屬層40與對外接塾48電性連接。其中可選擇性的設置金 屬表面處理層82於用於打_導電接塾44上。於此實施例中，形成 201142958 圖案化金屬層4〇的步驟如圖所示，包括：設置一第二影像轉 35於絕緣層93上並暴露出部分絕緣層％與對外接塾招， 成第二_化金麟，如_化麵層⑽，於絕緣層 ^ 的對外接墊48上；以及移除第二影像轉移層35。在移除第； ^層35之後更包含以侧方式移除位於第二影像轉移層％下 屬接合層94 ’如圖，11Η所示，使金屬接合層％與第 屬 層具有相同的圖案化配置。 卡化生屬 片？ 進行一晶片封裝步驟。如圖81所示，設置一晶片5〇於晶 及Ζ靜,^數條引線6〇電性連接晶片5〇與導電接點44 ;以 3 6電性連接_導電接墊44，且兩兩導電接墊44之_^片中= 連接’ _料雜44之另—與料轉Μ紐連接 塾所Γ移除封裝載板10再侧掉可剥離金屬層以暴露出 所干圖:Γ_8Κ、圖8L分別繪示移除載板後的不同應用，如圖8J / /成-金屬表面處理層8〇於暴露出的對外接塾仙上 ^覆:緣層93形成-層封裝材料73，其中封裝材料73可與 除載=宙 料70之材質相同或不同。如圖8K所示，在移 置金屬第—瞧金屬層41後，再選擇性的設 絕緣層93盘導電日祕路的對外接塾48上。更者，如圖8L所示， 似之間係概連接。的結構設計，可為多層堆#各層導電接墊 封裝圖iA·91為本發明又-實施例之四韻平無接腳 本實施例卜1四IT圖，用以製造如圖7A與圖7B所示之結構。於 差異在於，二ί無接腳封裝方法包括下列步驟。與上述實施例 屬表面處理層可於不同階段製作形成。 I先’如圖9Α所示，提供一封裝載板1〇，其帽裝載板1〇至 201142958 少-表面設置-可剝離金屬層2〇。接著，如圖9B所示，形成一第一 圖案化金屬層4Γ於可剝離金屬層2〇上。其中形成第一圖案化金屬層 41的步驟包括.設置-第-影像轉移層a,於可剝離金屬層上， 並暴露出部分可剝離金屬層20 ;接著，電㈣成第—圖案化金屬層 41於暴路於外的可剝離金屬層2〇上；以及移除第一影像轉移層^，。 者，知參考圖〜·，先形成-絕緣層93,於可剝離金屬 廣20,上’其中絕緣層93,具有複數個開口以露出部分第—圖案化金屬Half 彳 == towel, by _ product _ small _ potential plus function is not continuously improved, nor _ small difficult size and improved seal α single shouting and butterfly distance _ loading process and reducing manufacturing costs - straight for An important green topic in this technical field. SUMMARY OF THE INVENTION In order to solve the above problems, it is an object of the present invention to provide a four-sided flat packaging method to obtain a high-density and fine-pitch packaging process and to improve process yield. For the above purpose, one of the embodiments of the present invention has a fine side flatness and includes the following steps: providing a package carrier board, wherein the board is at least - the surface is formed into a metal layer - the first pattern a metal layer on the strippable metal layer. The j-苐-sub-patterned metal layer is stacked on the first patterned metal layer: ::: on the metal layer and overlying the first patterned metal layer, and The insulating layer separates the first patterned metal layer and the 'deuterated 2 genus layer, which are arranged in a stack, into a plurality of external lands which are electrically isolated from each other; forming a first layer and an external ridge, wherein the second patterning The metal layer is packaged - the conductive interface and the plurality of lines, and the external connection is - - - electrically connected; the - crystal - step; TM in addition to the package carrier and the invention - the embodiment - the four sides flat The method of the foot sealing method includes the following steps 201142958 sound. · Opening ΓΓ 其中 where the sealing plate is at least - surface setting - peelable metal enamel cup, = = metal layer on the peelable metal layer; forming an insulating layer in the sealing i The first - 彳H彳金麟, in which the insulating layer has a complex side σ to expose the part of the map; The side-bonding layer covers the first-first layer of the bare-wire exposed on the second layer; the -first-patterned metal layer is formed in the opening of the insulating layer, and a picture is forged on the metal-free layer The patterned metal layer is disposed on the second layer of the first plate, and the insulating layer is divided into a plurality of layers of the first layer of the metal layer: the humanized metal layer is electrically isolated from each other. External connection; Chemicalization: the edge layer and the external connection, wherein the second patterned metal layer is the first -μ two-material electric connection, the external pad and the sexual connection; the ^ package surface - and the wire carrier The invention is combined with the specific embodiment to make the effect of the invention, the technology, the capacity, the gamma and its effects. [Embodiment] a month. ^ The details of the rhyme are as follows. The preferred embodiment is only used to define the hair cream. Figure 1D, Figure 1E, Figure 1F, Figure 1G and Figure 1H are the present invention - Thai four sides flat without pin Schematic diagram of the encapsulation method. In this embodiment, the four-sided flat pinless package method includes the following steps. As shown in FIG. 1A, a package carrier 1Q is provided. Wherein, the package carrier 10 is provided with a strippable metal layer 20 on the red surface. Next, referring to FIG. 1D, the metal layer is formed on the peelable metal layer. Wherein, the patterned metal layer 4 〇 ', 匕 3 at least - the wafer holder 42 and the plurality of conductive pads 44. And, the set-wafer 5 is placed on the wafer holder 42, as shown in FIG. The wafer 5 黏 adhesive material (not shown) is fixed to the wafer holder 42. Thereafter, the plurality of leads 60 are electrically connected to the wafer 5 and the conductive pads 44. 201142958 Please continue to refer to the circle 1F, covering the wafer 5〇, the lead 6〇, the conductive pad 44 and the strippable metal layer 20 with a package material 7〇. Thereafter, as shown in FIG. 1G, the package carrier 10 is removed and the lower surface of the peelable metal reed 20 is exposed. As shown in Figure m, a patterning process is performed on the strippable metal layer 20 (shown in Figure 1G) to form a plurality of external contacts 22. The external contacts 22 are electrically connected to the conductive pads 44. Referring to FIG. 1H, in the present embodiment, each of the external contacts 22 is sized to each of the conductive pads 44 to provide a subsequent conductive material, such as a solder ball, and a large contact area. However, this is not limited to the size and shape of the external contacts 22 depending on the needs of the user and the designer. In the embodiment, as shown in FIG. 2B, each of the external contacts 22, such as a conductive pillar, whose size is smaller than each of the conductive pads 44, and thus the conductive material 〇_ball, can be increased. The combined strength with the conductive and conductive contacts 44. In the present invention, the external contact of the integral package is obtained by patterning the peelable metal layer after removing the package carrier. Therefore, as shown in FIG. 2A, a plurality of external contacts 22 can be designed as external contacts having re-wiring conductive contacts, thereby increasing the variability of the package body in response to customer requirements. Following the above description, in various embodiments, a surface of the package carrier 1 can be provided with a metal easily peelable surface 12 for assisting the peeling of the peelable metal layer. The metal easily peelable surface I2 can be a surface made of a metal material or other smooth material. In addition, the patterned metal layer 4G can be fabricated by a different process, such as an image transfer process or a yellow photolithography process. As in the embodiment, referring to FIG. 1B, FIG. 1C and FIG. m, the patterned metal layer 4 can be processed by an image transfer process. First, the image is placed on the peelable metal layer 20 and the surface of the partially peelable metal layer 2 is exposed, as shown in Fig. ib. 201142958 Fig. 1 The electric household is patterned into a metal layer 4 on the strippable metal layer 20 exposed to the outside. 'As a 3/rti image, the layer 30 completes the patterning of the metal layer 4 (3). : ^ 屣 layer. After the 仃 - micro-shirt etching process to form this patterned gold eye while referring to Figure 1A, m 1 · η η embodiment, four sides flat benefit pin pedal Figure 1G and Figure 2C, in this (four) Christine 4, #.,,, and the method of packaging the package includes the following steps. First, provide - 2: = A at least - surface setting of the panel 10 - peelable metal layer 20, : φ jin: connect if, form A patterned metal layer 40 is electrically connected to the strippable metal layer: t ISI, and the gold layer 40 comprises at least one wafer holder 42 and a plurality of conductive pads 44, as shown in FIG. 1D. (4) Post U 1E ' a The wafer 5 is placed on the wafer holder 42 and the plurality of strips are electrically connected to the wafer 50 and the conductive interface 44. Thereafter, as shown in Fig. 1 and Fig. ig, an encapsulating material 70 is used. Μ Μ 盍 50 50, lead 60, conductive pad 44 and strippable, genus layer 20 ′ and _-_ program removal _ metal layer 2 〇. In this embodiment, this The package carrier used in the present invention has a strippable metal layer 2, optionally patterning the strippable metal layer 2 or completely removing the strippable metal layer 20 as required, as shown in FIG. 1G and FIG. 2C. In the "remuneration" = Kona gold system 20 _ more can be advanced - step removal of the partial thickness of the patterned layer 40, as shown in Figure 1G, Figure 2D. 30 See Figure 3A In the present invention, the conductive pads and the outer structure of the present invention have various changes, and a metal surface treatment can be selectively formed on the external contact 22 or the conductive interface 44. In the above, the conductive surface layer can selectively set the metal surface treatment layer 8 thereon. In the present invention, the pattern metal layer of the wafer holder and the conductive interface can be selectively plated. The way of making 'so as long as the development exposure technology can be matched with the spacing, this method can produce high-quality small-size and fine-pitch conductive joints in 201142958. Compared with the butterfly method, the fork is limited to the speed of the replacement of the medicine. And the thickness of the off, its difficulty in controlling the fine pitch Therefore, the use of the electric fuel type can have higher reliability and achievement rate, so that a more complicated conductive joint structure can be fabricated, as shown in FIG. 5, the structure of the stepped conductive joint 44. The method can also be used to fabricate a conductive interface which can have a positive trapezoidal or inverted trapezoidal structure as shown in FIGS. 4A and 4B. Following the above description, the method of fabricating the structure will be described later, referring to FIG. 1c, to the image transfer layer 30. Intercalating with the strippable metal layer 2 to form a first patterned metal layer, for example, a patterned metal layer 40, a primary image transfer layer 3 can be disposed on the patterned metal layer 40 and partially patterned. The upper surface of the metal layer 4 is as shown in Fig. 6a. Next, electroplating forms a second patterned metal layer 43 on the exposed patterned metal layer 4' as shown in Fig. 6B. Then, referring to FIG. 6C, the image transfer layer 3 is removed, and the conductive pad 44 is obtained, and the side of the conductive pad 44 has a stepped structure, as shown in FIG. However, the four-sided flat pinless package structure of the present invention is not limited thereto, and the conductive pad 44 having a stepped structure as shown in FIG. 4D is fabricated by the above method. The method of the present invention can control the image transfer layer (3G). Figure 1B) Shape, such as trapezoidal (not shown on the circle), can be made into a conductive interface which can have a positive trapezoidal or inverted trapezoidal structure, as shown in Figures 4A and 4B. In one embodiment, referring to FIG. 7A and FIG. 7B, the patterned metal layer 4 includes at least one wafer holder 42 and a plurality of conductive pads 44, and further includes a line 46 for electrically connecting the two conductive materials. Pad 44. One of the two conductive pads 44 is electrically connected to the wafer 5, and the other of the conductive pads 44 is electrically connected to one of the external contacts r (shown in FIG. 1H). Here, as previously described, the metal surface treatment layer 80 is more selectively disposed on the conductive pads 44 for wire bonding. Following the above, FIG. 8A to FIG. 81 are schematic flowcharts of a four-sided flat pinless package method according to still another embodiment of the present invention for fabricating the structure shown in FIGS. 7A and 7B. In this embodiment, the four-sided flat pinless package method includes the following steps. 201142958 First, referring to Fig. 8A, a loading plate 1 is provided in which a peelable metal layer 20 is disposed on at least one surface of the package carrier. Next, as shown in Fig. 8D, a first patterned metal layer 41 is formed on the peelable metal layer 20. And forming a first patterned metal layer 411' is stacked on the first patterned metal layer 41. Referring to FIG. 8E, an insulating layer 93 is formed on the strippable metal layer 20 and the first patterned metal layer 41, and the first patterned metal layer 411 is exposed, and the insulating layer 93 is disposed on each stack. The first patterned metal layer 41 and the first patterned metal layer 411 are separated into a plurality of external interfaces 48 electrically isolated from each other, wherein the insulating layer 93 can be disposed on the package carrier 10 by means of printing. on. In one embodiment, a φ surface treatment step can be performed on the patterned insulating layer 93 to form a rough surface to enhance bonding with a substance subsequently disposed thereon, wherein a dry or wet plasma treatment method can be utilized. To be done. Moreover, as shown in FIG. 8F, a first bonding metal 411 covering the insulating layer 93 and exposed by the metal bonding layer 94 may be selectively formed by a sputtering method to strengthen the subsequent wiring and the patterned insulating layer 93. The bonding function, wherein the material of the metal bonding layer 94 includes, but is not limited to, Chin or copper. In the above embodiment, the step of forming the external pad 48 is as shown in FIG. 8B and FIG. 8C, and includes: disposing a first image transfer layer 33 on the peelable metal layer 2, and partially exposing the exposed portion. The metal layer is subsequently formed by electroplating to form a first patterned metal layer 4G on the strippable metal layer 2G. Further, as shown in Fig. 8C, the first image transfer layer 34 is disposed on the first image transfer layer 33 and a portion of the first patterned metal layer 41 is exposed. The electric ore formation first patterned metal I 411 is stacked on the first patterned metal layer 41, and the first image transfer layer Μ and the first image transfer layer 34 are removed to form a structure as shown in Fig. 8D. Then, as shown in FIG. 8G, a second patterned metal layer is formed, such as a patterned metal layer 4'' over the outer via of the insulating layer 93, wherein the patterned metal layer 40 includes at least a wafer carrier 42, a plurality of conductive pads 44 and a plurality of lines 46, and the patterned metal layer 40 is electrically connected to the external contacts 48. The metal surface treatment layer 82 is selectively disposed on the conductive interface 44. In this embodiment, the step of forming the patterned metal layer 4〇 of 201142958 is as shown in the figure, including: disposing a second image turn 35 on the insulating layer 93 and exposing a part of the insulating layer and externally connecting, The second image transfer layer 35 is removed from the outer pad 48 of the insulating layer. After removing the first layer 35, the method further includes removing the second image transfer layer % subordinate bonding layer 94 ′ as shown in FIG. 11Η, so that the metal bonding layer % has the same patterned configuration as the first layer. . Is it a card? A wafer packaging step is performed. As shown in FIG. 81, a wafer 5 is placed on the crystal and the cathode is fixed, and the plurality of leads 6 are electrically connected to the wafer 5 and the conductive contacts 44; the electrical connections are electrically connected to the conductive pads 44, and the two are electrically connected. In the case of the conductive pad 44, the connection of the conductive pad 44 is connected to the package transfer plate 10, and the peelable metal layer is removed to expose the dried image: Γ _8 Κ, 8L shows the different applications after removing the carrier, respectively, as shown in Fig. 8J / / - metal surface treatment layer 8 暴露 exposed exposed external coating: edge layer 93 forming - layer packaging material 73, where the package Material 73 may be the same or different than the material of the de-loading material 76. As shown in Fig. 8K, after the metal ruthenium metal layer 41 is transferred, the insulating layer 93 is selectively provided on the external contact 48 of the conductive day. Moreover, as shown in Fig. 8L, it seems to be connected. The structural design can be a multi-layer stack # each layer of conductive pad package drawing iA·91 is a fourth embodiment of the invention, and the fourth embodiment of the four-figure script is used to manufacture the figure as shown in FIG. 7A and FIG. 7B. The structure of the show. The difference is that the two-pin package method includes the following steps. The surface treatment layer of the above embodiment can be formed at different stages. As shown in Fig. 9A, a loading plate 1 is provided, which has a cap loading plate 1〇 to 201142958, a surface-removable metal layer 2〇. Next, as shown in Fig. 9B, a first patterned metal layer 4 is formed on the peelable metal layer 2''. The step of forming the first patterned metal layer 41 includes: providing a first-image transfer layer a on the strippable metal layer and exposing a portion of the strippable metal layer 20; then, electrically (iv) forming a first patterned metal layer 41 on the strippable metal layer 2 on the outside of the storm; and removing the first image transfer layer ^. Referring to the drawings, the insulating layer 93 is formed on the strippable metal 20, and the insulating layer 93 has a plurality of openings to expose a portion of the patterned metal.
接著，如圖犯，形成—金屬接合層94,覆蓋絕緣層93,並暴露 =:圖Ϊ化金屬層41，以加強絕緣層93,與之後設置於其上之線 者’如圖9Ε所示’形成一第一次圖案化金屬層4ΐι，於 化金屬層41’上，其中第-次圖案化金屬層川，堆 金屬層41，上，且絕緣層93,將堆疊設置的第一圖 數個對==一次圖案化金屬層411，分隔成彼此電性隔絕的複 層40，，於绍络~战—第二圖案化金屬層，如圖案化金屬 屬㈣，係包括;」對外W8’上’其中第二圖案化金 你，且對外接塾^第 接^，與複數線路 成第二圖案化合属馬，认屬層40電性連接。於一實施例中，形 第二影像轉簡35^部分^2^^® 9G所示，包括：設置-化金屬層4U，；電鍍形成第二上’並暴露出的第一次圖案 一次圖案化金縣4η，μ —_化金屬層4G，在金屬接合層94,與第Next, as shown, a metal bonding layer 94 is formed, covering the insulating layer 93, and exposed = the patterned metal layer 41 to reinforce the insulating layer 93, and the line disposed thereon is as shown in FIG. 'Forming a first patterned metal layer 4ΐ, on the metal layer 41', wherein the first patterning metal layer, the metal layer 41, the upper layer, and the insulating layer 93, the first number of layers to be stacked Pairs == once patterned metal layer 411, separated into layers 40 electrically isolated from each other, in Shaoluo ~ war - second patterned metal layer, such as patterned metal genus (four), including; "outer W8" The upper layer is patterned with gold, and the external layer is connected to the first layer, and the plurality of lines are combined into a second pattern, and the layer 40 is electrically connected. In one embodiment, the second image is formed by a portion of the second image, including: a metallization layer 4U, and a first pattern of the first pattern is formed by electroplating. Huajin County 4η, μ__metal layer 4G, in metal bonding layer 94, and
式移除第二影像轉移層35，^^f象轉移層35,；以及以_方 之結構。 方的金屬接合層94,，以形成如圖12G 片承座42,；利用複數條驟’。如圖9H所示’設置一晶月50’於晶 以及利用一封裝材料7〇，' 、60電性連接晶片50’與導電接點44,； 後，如圖9H及91所_〇包封5丨線6〇’ '晶片5〇,與導電接點44,。最 不，移除封裝載板1〇並暴露出對外接墊48，。於 201142958 又一實施例中，如圖91所示，更可選擇性的設置金屬表面處理層8〇, 於外露的對外接墊48’上。形成堆疊式對外接墊可使後續製程掌握度 較高，進而提高製程良率。此外，在金屬層與絕緣層之間可形成一= 屬接合層以增加絕緣材料與金屬層的接合功能。The second image transfer layer 35, the transfer layer 35, and the structure of the _ are removed. The square metal bonding layer 94 is formed to form the wafer carrier 42 as shown in Fig. 12G; As shown in FIG. 9H, 'setting a crystal 50' to the crystal and using a packaging material 7', '60, electrically connecting the wafer 50' and the conductive contact 44; and then, as shown in FIGS. 9H and 91 5 丨 line 6 〇 ' ' wafer 5 〇, with conductive contacts 44,. At the very least, the package carrier 1 is removed and the external pads 48 are exposed. In still another embodiment of 201142958, as shown in Fig. 91, a metal surface treatment layer 8 is more selectively disposed on the exposed external pad 48'. Forming a stacked external pad can make the subsequent process mastery higher, thereby improving the process yield. In addition, a bonding layer may be formed between the metal layer and the insulating layer to increase the bonding function of the insulating material and the metal layer.
综合上述，本發明四邊扁平無接腳封裝方法藉由使用具有可剝 離金屬層的封裝載板，並可利用此可剝離金屬層進行圖案化作為其後 封裝體外部接點，提供整體封裝製程與封裝結構的多樣性。另外， 所有製程皆可使用既有技術與設偫，並未增加成本盥困難 度。更者，由於圖案化可剝離金屬層之製程係使用影像轉移技術 或黃光微影技術，耻可有效達成高密度與_㈣結構。本發明 除可使用現有技術外，亦可應用於雙面製程。且本發明與 ^ 板之封裝方法她，封„„可可时毅複使騎質吏^ 具有較低的成本與較佳的優勢。 以上所述之實施例僅係為說明本發明之技術思想及特點，盆 在使熟習此項技藝之人士㈣瞭解本發•内容並據以實施當不能 範圍，即大凡依本發明所揭示之精神所作之均 寺.文化或修飾，仍應涵蓋在本發明之專利範圍内。 201142958 【圖式簡單說明】 圖1A、圖1B、圖1C、圖1D、圖1E、圖1F、圖1G與圖 1H為本發明一實施例之流程示意圖。 圖2A、圖2B、圖2C與圖2D為本發明不同實施例之示意 圖。 圖3A、圖3B、圖3C與圖3D為本發明不同實施例之局部 放大示意圖。 圖4A、圖4B、圖4C與圖4D為本發明不同實施例之局部 放大示意圖。 圖5為本發明一實施例之示意圖。 圖6A、圖6B與圖6C為本發明一實施例之部分流程示意圖。 圖7A與圖7B為本發明一實施例之示意圖。 圖8A、圖8B、圖8C、圖8D、圖8E、圖8F、圖8G、圖8H、 圖81、圖8J、圖8K與圖8L為本發明不同實施例之示意圖。 圖9A、圖9B、圖9C、圖9D、圖9E、圖9F、圖9G、圖9H、 與圖91為本發明不同實施例之示意圖。 【主要元件符號說明】 10 封裝載板 12 金屬易剝離表面 20 可剝離金屬層 22 外部接點 30 影像轉移層 14 201142958In summary, the four-sided flat pinless package method of the present invention provides a package process by using a package carrier having a strippable metal layer, and can be patterned by using the strippable metal layer as an external contact of the package. The diversity of the package structure. In addition, all processes can use existing technologies and designs without increasing cost and difficulty. Moreover, since the process of patterning the strippable metal layer uses image transfer technology or yellow light lithography technology, the high density and _(4) structure can be effectively achieved. The present invention can also be applied to a two-sided process in addition to the prior art. Moreover, the present invention and the method of encapsulating the board have the advantages of lower cost and better advantages. The embodiments described above are merely illustrative of the technical spirit and features of the present invention, and the person skilled in the art (4) understands the contents of the present invention and implements the scope of the present invention, that is, the spirit disclosed by the present invention. The temples, cultures, or modifications made by the company should still be covered by the patent of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1A, Fig. 1B, Fig. 1C, Fig. 1D, Fig. 1E, Fig. 1F, Fig. 1G and Fig. 1H are schematic diagrams showing the flow of an embodiment of the present invention. 2A, 2B, 2C and 2D are schematic views of different embodiments of the present invention. 3A, 3B, 3C and 3D are partially enlarged schematic views of different embodiments of the present invention. 4A, 4B, 4C and 4D are partially enlarged schematic views of different embodiments of the present invention. Figure 5 is a schematic illustration of an embodiment of the invention. 6A, 6B and 6C are partial flow diagrams of an embodiment of the present invention. 7A and 7B are schematic views of an embodiment of the present invention. 8A, 8B, 8C, 8D, 8E, 8F, 8G, 8H, 81, 8J, 8K and 8L are schematic views of different embodiments of the present invention. 9A, 9B, 9C, 9D, 9E, 9F, 9G, 9H, and 91 are schematic views of different embodiments of the present invention. [Main component symbol description] 10 Package carrier board 12 Metal easy peeling surface 20 Peelable metal layer 22 External contact 30 Image transfer layer 14 201142958
30， 次影像轉移層 33、33， 第一影像轉移層 34 第一次影像轉移層 35 、 35， 第二影像轉移層 40 圖案化金屬層 4 卜 41， 第一圖案化金屬層 411 ' 41Γ 第一次圖案化金屬層 42、42， 晶片承座 43 第二圖案化金屬層 44、44， 導電接墊 46、46， 線路 48、48， 對外接墊 50、50， 晶片 60、60， 引線 70、70， 封裝材料 73 封裝材料 80、80， 金屬表面處理層 82 金屬表面處理層 93 、 93， 絕緣層 94、94， 金屬接合層 1530, the second image transfer layer 33, 33, the first image transfer layer 34, the first image transfer layer 35, 35, the second image transfer layer 40, the patterned metal layer 4, 41, the first patterned metal layer 411 ' 41 Once patterned metal layers 42, 42 , wafer holders 43 second patterned metal layers 44 , 44 , conductive pads 46 , 46 , lines 48 , 48 , external pads 50 , 50 , wafers 60 , 60 , leads 70 70, encapsulating material 73 encapsulating material 80, 80, metal surface treatment layer 82 metal surface treatment layer 93, 93, insulating layer 94, 94, metal bonding layer 15