201140871 六、發明說明： 【發明所屬之技術領域】 [0001] 本發明涉及一種發光元件，尤其涉及一種發光二極體及 其製造方法。 【先前技術·】 [0002] 發光二極體（Light Emi 11 i ng Diode ; LED )在高功 率照明的運用上，除了須持續提昇亮度外，散熱問題為 另一亟需解決的主要問題。當發光二極體的光取出效率 不佳時，無法穿出發光元件（發光二極體及其封裝體） 的光線會轉換為熱能。若無法有效地將此熱能導出發光 元件，發光二極體在操作時溫度會上升，因而造成元件 可靠性問題。 [0003] 為解決發光元件的散熱問題，對發光二極體進行封裝時 ，目前常採用以覆晶接合（f 1 ip-chip bonding )取代 傳統的導線接合（wire bonding)。覆晶接合即直接將 發光二極體晶片面朝下用焊料或者導電膠接合至一導熱 基板上。此種方式可使發光二極體的散熱性能得到提昇 。然而，習知發光二極體的晶片較薄，在覆晶接合或後 續加工過程中容易碎裂。 【發明内容】 [0004] 有鑒於此，有必要提供一種較高強度的發光二極體，並 提供一種該發光二極體的製造方法。 [0005] 一種發光二極體，包括一發光二極體晶片，該發光二極 體晶片包括第一半導體層、第一電極、活性層、第二半 導體層及第二電極，該活性層設於該第一半導體層上， 099114755 表單編號A0101 第4頁/共34頁 0992026193-0 201140871 該第二半導體層形成於該活性層上，該第二電極設於該 第二半導體層上，由該第一半導體層、活性層、第二半 導體層及第二電極構成一疊層，其中該疊層的中部設有 盲孔，該盲孔依次貫穿第二電極、第二半導體層及活性 « 層，並延伸至該第一半導體層内，該第一電極設於第一 1 半導體層上並對應設於該盲孔内，該第一電極上設有一 第一支撐層，該第二電極上設有一第二支撐層，該第二 支撐層與第一支撐層相間隔。 ^ [0006] 一種發光二極體的製造方法，包括如下步驟：提供一磊 Ο 晶片，該蟲晶片包括一基底及設於該基底上的一蟲晶層 ，該磊晶層包括依次設於該基底上的一第一半導體層、 一活性層及上第二半導體層，該磊晶片上開設有至少一 盲孔，該盲孔依次貫穿第二半導體層及活性層，並延伸 至該第一半導體層内；在該盲孔内於第一半導體層上製 作第一電極，並於該第二半導體層上製作第二電極；以 及在第一電極上製作一鍍層以作為第一支撐層，並在第 Q 二電極上製作一鍍層為作為第二支撐層。 [0007] 與習知技術相比，上述發光二極體中，藉由在第一電極 及第二電極上分別形成第一支撐層與第二支撐層，可提 高發光二極體晶片的強度。因此，當發光二極體晶片採 用覆晶方式安裝於導熱基板上時，不易碎裂。另外，該 第一支撐層以及該第二支撐層還可以增加發光二極體的 散熱功能。 【實施方式】 [0008] 如圖1所示為本發明發光二極體100的第一實施例。該發 099114755 表單編號A0101 第5頁/共34頁 0992026193-0 201140871 光二極體100包括一導熱基板10及採用覆晶方式接合於該 導熱基板1 0上的一發光二極體晶片20。 [0009] [0010] [0011] [0012] 請一併參閱圖8-9 ,該發光二極體晶片20包括一基底21、 一第一半導體層22、一活性層（active layer) 23、 一第一半導體層24、一第一電極26、一第二電極25、一 絕緣層27、一第一支撐層29及一第二支撐層28。其中， 該發光二極體晶片20的材料可以為氮化物半導體' 111 一v 族化合物半導體或11 - VI族化合物半導體。該第一半導體 層22可以為N型半導體層，該第二半導體層24可為p型半 導體層’該活性層23可以為多層量子井（multiple- quantum-well ， MQW ) » 該基底10材料可為藍寶石（亦即鋁氧化合物，Ai2〇3)、 碳化矽（SiC)、矽（Si)、氧化鋅（ZnO)、氧化鎂（ MgO)及砷化鎵（GaAs)等。 該第一半導體層22形成於該基底21上，該活性層23形成 於該第一半導體層22上，該第二半導體層24形成於該活 性層23上，該第二電極25形成於該第二半導體層24上， 即該第一半導體層22、活性層23、第二半導體層24及第 二電極25依次疊置於該基底21上，從而由該第一半導體 層22、活性層23、第二半導體層24及第二電極25構成一 疊層30。該疊層30上設有一柱形的盲孔31，該盲孔31由 上自下依次貫穿第二電極25、第二半導體層24及活性層 23，並延伸至該第一半導體層22内。 s亥第一電極26形成於第一半導體層22上並位於該盲孔31 099114755 表單編號A0101 第6頁/共34頁 0992026193-0 201140871 内。所述第一電極26呈圓柱狀，該第一電極26與疊層30 之間形成一環形的收容空間32 (如圖7所示）。該絕緣層 27包括一環形的第一部分271及一第二部分272。絕緣層 27的第一部分271覆蓋於盲孔31的周面上，絕緣層27的 第二部分272由該第一部分271的頂端周緣水平向外延伸 ，以將第二電極25靠近盲孔31的一部分覆蓋。該第二支 撐層28形成於該第二電極25上，並位於該絕緣層27的周 邊。該第一支撐層2 9形成於該第一電極26上並與第二支 撐層28相間隔。該第一支撐層29包括一主體部291及由該 主體部291向下延伸的一環形的接合部292。該主體部 291覆蓋於該第一電極26的外端面上，主體部291的周緣 向外延伸以部分覆蓋該絕緣層27的第二部分272，該接合 部292由主體部291向下延伸至收容空間32内，所述接合 部292圍設於第一電極26的周邊，並位於第一電極26的周 面與絕緣層27的第一部分271之間。所述第一支撐層29與 第二支撐層28大致上同高，即第一支撐層29背向第一電 極26的一外端面與第一支撐層28背向第二電極25的一外 端面呈大致同平面設置。 [0013] 如圖2-3所示，製造該發光二極體100時，首先提供一磊 晶片101，該磊晶片101包括基底21及設於該基底21上的 一磊晶層102，該磊晶層102包括第一半導體層22、活性 層23及第二半導體層24。磊晶層102的中央位置設有盲孔 31。該盲孔31可以利用微影技術以及蝕刻方式製成。 [0014] 如圖4所示，於該磊晶片101的第二半導體層24上製作第 二電極25,該第二電極25的材料為金（Au)、鎳（Ni) 099114755 表單編號A0101 第7頁/共34頁 0992026193-0 201140871 、把（Pd)、銀（Ag)、鉑（Pt)、鋁（A1)、銅（Cu )、氧化銦錫（lndium· Tin Oxides ; ITO)、錫（Sn )、鈦（Ti)、銦（in)、鍺（Ge)及鉻（Cr)中的— 種’或為上述材料的組合。 [0015] 如圖5-6所示’在磊晶片1〇1的盲孔31的周面及第二電極 25靠近盲孔31的部分上形成絕緣層27。 [0016] 如圖7所示’在盲孔31内於第一半導體層22上形成第一電 極26，該第一電極26可採用與第二電極25相同的材料製 成。 [0017] 如圖8-9所示，接著利用電鍍或化學鍍的方法，在第一電 極26上鍍一層金屬以形成第一支撐層29，並在第二電極 25上鑛一層金屬以形成第二支撐層2名，以及，從而製成 該發光二極體晶片20。該第一支撐層29位於發光二極體 晶片20的中部’該第二支撑層28圍設於該第一支樓層29 的周邊。該第一支撐層29及第二支撑層28均由金屬製成 ’其材料為錄（Ni)、銅（Cu...)、金（Au)、姻（in) 或錫（Sn) ’第一支撐層29及_二支撐層28的厚度為1〇 β m以上。 [0018] 請再次參閱圖1，完成第一支撐層29與第二支撐層28的製 作後，再提供導熱基板10，該導熱基板10上設有第一接 合墊11與一第二接合墊12，該第一接合墊11及第二接合 墊12的形狀可分別與圖9中所示第一支撐層29及第二支樓 層2 8的形狀相對應。然後，將圖8所示的發光二極體晶片 20倒置後設於該導熱基板10上，並將該發光二極體10〇的 099114755 表單編號A0101 第8頁/共34頁 0992026193-0 201140871 第一支撐層29與第二支撐層28分別與導熱基板10的第一 接合墊11及第二接合墊12相接合，從而將發光二極體晶 片20倒裝於導熱基板10上，即採用覆晶方式將發光二極 體晶片20安裝至導熱基板10上。 [0019] Ο 發光二極體100中，藉由在第一電極26及第二電極25上分 別形成第一支撐層29與第二支撐層28，該第一支撐層29 與第二支撐層28均由金屬製成，可提高發光二極體晶片 20的強度。因此，當發光二極體晶片20採用覆晶方式安 裝於導熱基板10上時，不易碎裂，使得發光二極體100的 良率大為提昇。另外，該第一支撐層29與第二支撐層28 還充當反射層，可以將發光二極體晶片20發出的光反射 至出光面，從而提高出光效率。再則，第一支撐層29的 外端面與第二支撐層28的外端面呈同平面設置，將發光 二極體晶片20倒裝於導熱基板10上時，可提高接合的可 靠度，以提昇散熱效率。 [0020] Ο 如圖10-11所示，位於該發光二極體100出光側的基底21 可以藉由鐳射剝離技術（laser lift-off)、研磨、# 刻等方式自發光二極體晶片20的第一半導體層22上移除 。再利用物理或化學的方法，例如鐳射或化學蝕刻，對 第一半導體層22背向活性層23的一外表面進行粗化處理 而得到一具凹凸結構的粗化面221，以破壞光線在第一半 導體層22内的全反射，從而進一步提昇發光二極體100的 出光效率。由於發光二極體100設有第一支撐層29與第一 支撐層28，移除該基底21時，發光二極體晶片20亦不易 碎裂。 099114755 表單編號A0101 第9頁/共34頁 0992026193-0 201140871 [0021] 發光二極體100中，由於第一支撐層29的外端面與第二支 撐層28的外端面呈同平面設置，從而導熱基板10亦可不 包含第一、第二接合墊11、12。如圖12所示為本發明發 光二極體的第二實施例。本實施例中，導熱基板10a上未 設置接合墊而包含一電路結構，該電路結構包括一第一 電極11a與一第二電極12a，其中發光二極體晶片20直接 安裝在導熱基板l〇a上，且發光二極體晶片20的第一支撐 層29與第二支撐層28分別與導熱基板10a的電路結構的第 一電極11a與第二電極12a電連接。相較於習知技術，可 以不需在導熱基板l〇a上額外製作接合墊，而直接於發光 二極體100上形成支撐層28、29並直接黏著於導熱基板 10a上並電連接導熱基板10a的電路結構，如此一來，不 僅可以降低元件的高低差，亦可以去除於導熱基板l〇a上 製作接合墊的時間以及成本。 [0022] 如圖13所示為本發明發光二極體200的第三實施例。該發 光二極體200包括一導熱基板40及採用覆晶方式接合於該 導熱基板40上的一具較大尺寸的發光二極體晶片50，該 發光二極體晶片50的結構與第一實施例中發光二極體晶 片20的結構相似，同樣包括基底51、第一半導體層52、 活性層53、第二半導體層54、第二電極55、第一電極56 、絕緣層57、第一支撐層59及第二支撐層58。兩者之間 的區別在於：本實施例中的發光二極體晶片50中，第一 電極5 6的數量為四個（圖13所示剖視圖中僅示出兩個） ，且呈矩陣排列。 [0023] 本實施例的發光二極體200同樣可按照第一實施中所述的 099114755 表單編號A0101 第10頁/共34頁 0992026193-0 201140871 Ο Ο 製造方法製成，只不過在製造本實施例中的發光二極體 200時，所提供的磊晶片401上需要設置四個盲孔61 (如 圖14所示），並且在每個盲孔61中形成一第一電極56。 在製作絕緣層57時，絕緣層57包括位於第一電極56的周 面與對應的盲孔61的周面之間的複數第一部分571、以及 位於第二電極55與第一支撐層59之間且連為一體的一第 二部分572 (如圖13與15所示）。另外，第一支撐層59 同時覆蓋四個第一電極56，並由絕緣層57將第一支撐層 59與第二電極55相絕緣，且第一支撐層59對應每一第一 電極56設有一接合部592。該第二支撐層58圍設於該第一 支撐層59的周邊並與第一支撐層59相間隔（圖13與圖16 所示）。本實施例中，第一支撐層59背向第一電極56的 一外端面與該第二支撐層58背向第二電極55的一外端面 亦呈同平面設置。該發光二極體晶片50設於導熱基板40 上時，第一支撐層59及第二支撐層58亦分別與導熱基板 40上的一第一接合墊41及一第二接合墊42i相接合（圖13 所示）。該發光二極體晶片50中，第一電極56的數量及 佈置方式並不局限如此，還可根據具體需求對第一電極 56的數量及佈置方式做相應的改變，例如第一電極56的 數量為3個並呈三角形排列，或第一電極56的數量為5個 並呈環形排列。 [0024] 如圖17所示，為提高該發光二極體200的出光效率，亦可 以將基底51自第一半導體52上移除，並對第一半導體層 52的表面進行粗化處理而得到一具凹凸結構的粗化面521 099114755 表單編號A0101 第11頁/共34頁 0992026193-0 201140871 [0025] 综上所述，本發明符合發明專利要件，爰依法提出專利 申請。惟，以上所述者僅為本發明之較佳實施例，舉凡 熟悉本案技藝之人士，在爰依本發明精神所作之等效修 飾或變化，皆應涵蓋於以下之申請專利範圍内。 【圖式簡單說明】 [0026] 圖1為本發明發光二極體第一實施例的到視結構示意圖。 [0027] 圖2為用於製造圖1所示發光二極體的一磊晶片的俯視圖 〇 [0028] 圖3為圖2所示磊晶片沿111 - III線的剖視圖。 [0029] 圖4為圖3所示磊晶片上形成第二電極後的剖視結構示意 圖。 [0030] 圖5為於圖4所示磊晶片的盲孔内及第二電極上設置一絕 緣層後的剖視結構示意圖。 [0031] 圖6為圖5的俯視圖。 [0032] 圖7為於圖5所示磊晶片的盲孔内形成第一電極後的剖視 結構示意圖。 [0033] 圖8為於圖7所示發光二極體晶片的第一電極及第二電極 上分別形成支撐層後的剖視結構示意圖。 [0034] 圖9為圖8的俯視圖。 [0035] 圖10為將圖1所示發光二極體的基底自第一半導體層上移 除後的剖視結構示意圖。 [0036] 圖11為圖10所示發光二極體經表面粗化後的剖視結構示 099114755 表單編號A0101 第12頁/共34頁 0992026193-0 201140871 意圖。 [0037] 圖12為本發明發光二極體第二實施例的剖視結構示意圖 0 [0038] 圖1 3為本發明發光二極體第三實施例的剖視結構示意圖 [0039] 圖14為用於製造圖13所示發光二極體的一磊晶片的俯視201140871 VI. Description of the Invention: [Technical Field] [0001] The present invention relates to a light-emitting element, and more particularly to a light-emitting diode and a method of manufacturing the same. [Prior Art·] [0002] In the application of high-power illumination, in addition to the need to continuously increase the brightness, the problem of heat dissipation is another major problem that needs to be solved. When the light extraction efficiency of the light-emitting diode is not good, the light that cannot pass through the light-emitting element (the light-emitting diode and its package) is converted into heat energy. If this heat energy cannot be effectively derived from the light-emitting element, the temperature of the light-emitting diode rises during operation, which causes component reliability problems. [0003] In order to solve the heat dissipation problem of the light-emitting element, when the light-emitting diode is packaged, f1 ip-chip bonding is often used instead of the conventional wire bonding. The flip chip bonding directly bonds the light emitting diode chip face down with solder or conductive paste to a thermally conductive substrate. In this way, the heat dissipation performance of the light-emitting diode can be improved. However, conventional light-emitting diode wafers are relatively thin and are susceptible to chipping during flip chip bonding or subsequent processing. SUMMARY OF THE INVENTION [0004] In view of the above, it is necessary to provide a higher intensity light emitting diode and to provide a method of manufacturing the light emitting diode. [0005] A light emitting diode comprising a light emitting diode chip, the light emitting diode chip comprising a first semiconductor layer, a first electrode, an active layer, a second semiconductor layer and a second electrode, wherein the active layer is disposed on On the first semiconductor layer, 099114755 Form No. A0101 Page 4 / Total 34 Page 0992026193-0 201140871 The second semiconductor layer is formed on the active layer, and the second electrode is disposed on the second semiconductor layer. a semiconductor layer, an active layer, a second semiconductor layer and a second electrode form a laminate, wherein a middle portion of the laminate is provided with a blind hole, and the blind hole sequentially penetrates the second electrode, the second semiconductor layer and the active layer, and And extending into the first semiconductor layer, the first electrode is disposed on the first semiconductor layer and correspondingly disposed in the blind hole, the first electrode is provided with a first supporting layer, and the second electrode is provided with a first electrode And a second supporting layer spaced apart from the first supporting layer. [0006] A method for fabricating a light-emitting diode, comprising the steps of: providing a trench wafer, the wafer comprising a substrate and a crystal layer disposed on the substrate, the epitaxial layer comprising a first semiconductor layer, an active layer and an upper second semiconductor layer on the substrate, wherein the epitaxial wafer is provided with at least one blind via, the blind via sequentially penetrates the second semiconductor layer and the active layer, and extends to the first semiconductor a first electrode is formed on the first semiconductor layer in the blind via hole, and a second electrode is formed on the second semiconductor layer; and a plating layer is formed on the first electrode as the first support layer, and A plating layer is formed on the Q-th electrode as a second supporting layer. Compared with the prior art, in the above-described light-emitting diode, the strength of the light-emitting diode wafer can be improved by forming the first support layer and the second support layer on the first electrode and the second electrode, respectively. Therefore, when the light-emitting diode wafer is mounted on the heat-conductive substrate by flip chip, it is not easily broken. In addition, the first supporting layer and the second supporting layer can also increase the heat dissipation function of the light emitting diode. [Embodiment] FIG. 1 shows a first embodiment of a light-emitting diode 100 of the present invention. The photodiode 100 includes a thermally conductive substrate 10 and a light emitting diode chip 20 bonded to the thermally conductive substrate 10 by flip chip bonding. [0012] [0012] Referring to FIG. 8-9 together, the LED wafer 20 includes a substrate 21, a first semiconductor layer 22, an active layer 23, and a The first semiconductor layer 24, a first electrode 26, a second electrode 25, an insulating layer 27, a first supporting layer 29 and a second supporting layer 28. The material of the LED wafer 20 may be a nitride semiconductor '111-V compound semiconductor or a 11-VI compound semiconductor. The first semiconductor layer 22 may be an N-type semiconductor layer, and the second semiconductor layer 24 may be a p-type semiconductor layer. The active layer 23 may be a multiple-quantum-well ( MQW). It is sapphire (ie, aluminum oxide compound, Ai2〇3), tantalum carbide (SiC), bismuth (Si), zinc oxide (ZnO), magnesium oxide (MgO), and gallium arsenide (GaAs). The first semiconductor layer 22 is formed on the substrate 21, the active layer 23 is formed on the first semiconductor layer 22, the second semiconductor layer 24 is formed on the active layer 23, and the second electrode 25 is formed on the first The first semiconductor layer 22, the active layer 23, the second semiconductor layer 24, and the second electrode 25 are sequentially stacked on the substrate 21 so that the first semiconductor layer 22, the active layer 23, The second semiconductor layer 24 and the second electrode 25 constitute a laminate 30. The stack 30 is provided with a column-shaped blind hole 31 which penetrates the second electrode 25, the second semiconductor layer 24 and the active layer 23 from the top to the bottom, and extends into the first semiconductor layer 22. The first electrode 26 is formed on the first semiconductor layer 22 and is located in the blind hole 31 099114755 Form No. A0101 Page 6 of 34 0992026193-0 201140871. The first electrode 26 has a cylindrical shape, and an annular receiving space 32 (shown in FIG. 7) is formed between the first electrode 26 and the laminate 30. The insulating layer 27 includes an annular first portion 271 and a second portion 272. The first portion 271 of the insulating layer 27 covers the peripheral surface of the blind via 31, and the second portion 272 of the insulating layer 27 extends horizontally outward from the peripheral edge of the top end of the first portion 271 to bring the second electrode 25 close to a portion of the blind via 31. cover. The second support layer 28 is formed on the second electrode 25 and is located around the insulating layer 27. The first support layer 296 is formed on the first electrode 26 and spaced apart from the second support layer 28. The first support layer 29 includes a body portion 291 and an annular joint portion 292 extending downwardly from the body portion 291. The main body portion 291 covers the outer end surface of the first electrode 26, and the peripheral edge of the main body portion 291 extends outward to partially cover the second portion 272 of the insulating layer 27. The joint portion 292 extends downward from the main body portion 291 to receive In the space 32, the joint portion 292 surrounds the periphery of the first electrode 26 and is located between the circumferential surface of the first electrode 26 and the first portion 271 of the insulating layer 27. The first supporting layer 29 and the second supporting layer 28 are substantially the same height, that is, an outer end surface of the first supporting layer 29 facing away from the first electrode 26 and an outer end surface of the first supporting layer 28 facing away from the second electrode 25 They are arranged in the same plane. As shown in FIG. 2-3, when the light emitting diode 100 is manufactured, an epitaxial wafer 101 is provided. The epitaxial wafer 101 includes a substrate 21 and an epitaxial layer 102 disposed on the substrate 21. The seed layer 102 includes a first semiconductor layer 22, an active layer 23, and a second semiconductor layer 24. A blind hole 31 is provided at the center of the epitaxial layer 102. The blind via 31 can be fabricated using lithography and etching. [0014] As shown in FIG. 4, a second electrode 25 is formed on the second semiconductor layer 24 of the epitaxial wafer 101. The material of the second electrode 25 is gold (Au), nickel (Ni) 099114755, and the form number A0101 is 7 Page / Total 34 pages 0992026193-0 201140871 , (Pd), silver (Ag), platinum (Pt), aluminum (A1), copper (Cu), indium tin oxide (lndium· Tin Oxides; ITO), tin (Sn ), a type of titanium (Ti), indium (in), germanium (Ge), and chromium (Cr) or a combination of the above materials. [0015] As shown in FIGS. 5-6, an insulating layer 27 is formed on the peripheral surface of the blind via 31 of the epitaxial wafer 1 and the portion of the second electrode 25 adjacent to the blind via 31. [0016] As shown in FIG. 7, a first electrode 26 is formed on the first semiconductor layer 22 in the blind via 31, and the first electrode 26 can be made of the same material as the second electrode 25. [0017] As shown in FIGS. 8-9, a metal is then plated on the first electrode 26 to form a first support layer 29 by electroplating or electroless plating, and a layer of metal is deposited on the second electrode 25 to form a first The two support layers are 2, and thereby, the light-emitting diode wafer 20 is fabricated. The first support layer 29 is located in the middle of the LED array 20. The second support layer 28 surrounds the periphery of the first support floor 29. The first support layer 29 and the second support layer 28 are both made of metal. The material is recorded as (Ni), copper (Cu...), gold (Au), in (in) or tin (Sn). The thickness of one of the support layer 29 and the second support layer 28 is 1 〇β m or more. [0018] Referring to FIG. 1 again, after the fabrication of the first supporting layer 29 and the second supporting layer 28 is completed, the thermally conductive substrate 10 is further provided, and the first bonding pad 11 and the second bonding pad 12 are disposed on the thermally conductive substrate 10. The shapes of the first bonding pad 11 and the second bonding pad 12 may correspond to the shapes of the first supporting layer 29 and the second supporting floor 28 shown in FIG. 9, respectively. Then, the light-emitting diode chip 20 shown in FIG. 8 is inverted and disposed on the heat-conductive substrate 10, and the light-emitting diode 10 is 099114755, the form number A0101, page 8 / total 34 page 0992026193-0 201140871 A supporting layer 29 and a second supporting layer 28 are respectively bonded to the first bonding pad 11 and the second bonding pad 12 of the thermally conductive substrate 10, thereby flipping the LED substrate 20 on the thermally conductive substrate 10, that is, using flip chip The luminescent diode chip 20 is mounted on the thermally conductive substrate 10. [0019] In the illuminating diode 100, the first supporting layer 29 and the second supporting layer 28 are formed on the first electrode 26 and the second electrode 25, respectively, the first supporting layer 29 and the second supporting layer 28 Both are made of metal to increase the strength of the light-emitting diode wafer 20. Therefore, when the light-emitting diode chip 20 is mounted on the heat-conductive substrate 10 in a flip chip manner, it is less likely to be broken, so that the yield of the light-emitting diode 100 is greatly improved. In addition, the first supporting layer 29 and the second supporting layer 28 also function as a reflective layer, and the light emitted from the LED wafer 20 can be reflected to the light emitting surface, thereby improving light extraction efficiency. Furthermore, the outer end surface of the first supporting layer 29 is disposed in the same plane as the outer end surface of the second supporting layer 28, and when the LED body 20 is flipped on the heat conducting substrate 10, the reliability of the bonding can be improved to improve Cooling efficiency. [0020] As shown in FIG. 10-11, the substrate 21 on the light-emitting side of the light-emitting diode 100 can be self-luminous diode wafer 20 by laser lift-off, grinding, etching, or the like. The first semiconductor layer 22 is removed. The outer surface of the first semiconductor layer 22 facing away from the active layer 23 is roughened by physical or chemical methods, such as laser or chemical etching, to obtain a roughened surface 221 having a concave-convex structure to destroy the light. The total reflection in the semiconductor layer 22 further enhances the light-emitting efficiency of the light-emitting diode 100. Since the light emitting diode 100 is provided with the first supporting layer 29 and the first supporting layer 28, when the substrate 21 is removed, the light emitting diode chip 20 is also not easily broken. 099114755 Form No. A0101 Page 9 of 34 0992026193-0 201140871 [0021] In the light emitting diode 100, since the outer end surface of the first supporting layer 29 is disposed in the same plane as the outer end surface of the second supporting layer 28, heat conduction The substrate 10 may not include the first and second bonding pads 11, 12. A second embodiment of the light-emitting diode of the present invention is shown in FIG. In this embodiment, the thermal pad substrate 10a is not provided with a bonding pad and includes a circuit structure. The circuit structure includes a first electrode 11a and a second electrode 12a. The LED substrate 20 is directly mounted on the thermally conductive substrate 10a. The first support layer 29 and the second support layer 28 of the light-emitting diode wafer 20 are electrically connected to the first electrode 11a and the second electrode 12a of the circuit structure of the heat conductive substrate 10a, respectively. Compared with the prior art, the bonding pads can be additionally formed on the heat conducting substrate 10a, and the supporting layers 28 and 29 are directly formed on the light emitting diode 100 and directly adhered to the heat conducting substrate 10a and electrically connected to the heat conducting substrate. The circuit structure of 10a can not only reduce the height difference of the components, but also remove the time and cost of making the bonding pads on the heat conducting substrate 10a. [0022] FIG. 13 shows a third embodiment of the light-emitting diode 200 of the present invention. The light-emitting diode 200 includes a heat-conducting substrate 40 and a larger-sized LED chip 50 bonded to the heat-conducting substrate 40. The structure and the first implementation of the LED wafer 50 The structure of the light-emitting diode wafer 20 is similar in the example, and includes the substrate 51, the first semiconductor layer 52, the active layer 53, the second semiconductor layer 54, the second electrode 55, the first electrode 56, the insulating layer 57, and the first support. Layer 59 and second support layer 58. The difference between the two is that in the light-emitting diode wafer 50 of the present embodiment, the number of the first electrodes 56 is four (only two are shown in the cross-sectional view of Fig. 13), and they are arranged in a matrix. [0023] The light-emitting diode 200 of the present embodiment can also be fabricated according to the manufacturing method of 099114755 Form No. A0101, page 10/34 pages 0992026193-0 201140871 第一 所述 described in the first embodiment, except that the present embodiment is manufactured. In the case of the light-emitting diode 200, four blind holes 61 (shown in FIG. 14) are provided on the epi-wafer 401, and a first electrode 56 is formed in each of the blind holes 61. When the insulating layer 57 is formed, the insulating layer 57 includes a plurality of first portions 571 between the circumferential surface of the first electrode 56 and the peripheral surface of the corresponding blind hole 61, and between the second electrode 55 and the first supporting layer 59. And connected to a second part 572 (as shown in Figures 13 and 15). In addition, the first supporting layer 59 covers the four first electrodes 56 at the same time, and the first supporting layer 59 is insulated from the second electrode 55 by the insulating layer 57, and the first supporting layer 59 is provided corresponding to each of the first electrodes 56. Engagement portion 592. The second support layer 58 surrounds the periphery of the first support layer 59 and is spaced apart from the first support layer 59 (shown in Figures 13 and 16). In this embodiment, an outer end surface of the first supporting layer 59 facing away from the first electrode 56 and an outer end surface of the second supporting layer 58 facing away from the second electrode 55 are also disposed in the same plane. When the LED substrate 50 is disposed on the heat conducting substrate 40, the first supporting layer 59 and the second supporting layer 58 are also respectively joined to a first bonding pad 41 and a second bonding pad 42i on the heat conducting substrate 40 ( Figure 13)). In the LED array 50, the number and arrangement of the first electrodes 56 are not limited thereto, and the number and arrangement of the first electrodes 56 may be changed according to specific requirements, for example, the number of the first electrodes 56. The numbers are three and arranged in a triangle, or the number of the first electrodes 56 is five and arranged in a ring shape. As shown in FIG. 17, in order to improve the light-emitting efficiency of the light-emitting diode 200, the substrate 51 may be removed from the first semiconductor 52, and the surface of the first semiconductor layer 52 may be roughened. A roughened surface of a concave-convex structure 521 099114755 Form No. A0101 Page 11 / Total 34 page 0992026193-0 201140871 [0025] In summary, the present invention meets the requirements of the invention patent, and patent application is filed according to law. However, the above description is only the preferred embodiment of the present invention, and equivalent modifications or variations made by those skilled in the art of the present invention should be included in the following claims. BRIEF DESCRIPTION OF THE DRAWINGS [0026] FIG. 1 is a schematic view showing the structure of a first embodiment of a light-emitting diode according to the present invention. 2 is a plan view of an epitaxial wafer for fabricating the light-emitting diode of FIG. 1. FIG. 3 is a cross-sectional view of the epitaxial wafer of FIG. 2 taken along line 111-III. [0027] FIG. 4 is a cross-sectional structural view showing a second electrode formed on the epitaxial wafer shown in FIG. 3. FIG. 5 is a cross-sectional structural view of the blind hole of the epitaxial wafer shown in FIG. 4 and an insulating layer disposed on the second electrode. 6 is a plan view of FIG. 5. 7 is a cross-sectional structural view showing the first electrode formed in the blind hole of the epitaxial wafer shown in FIG. 5. 8 is a cross-sectional structural view showing a support layer formed on each of the first electrode and the second electrode of the light-emitting diode wafer shown in FIG. 7. 9 is a plan view of FIG. 8. 10 is a cross-sectional structural view showing the substrate of the light-emitting diode shown in FIG. 1 removed from the first semiconductor layer. 11 is a cross-sectional structural view of the light-emitting diode shown in FIG. 10 after surface roughening. 099114755 Form No. A0101 Page 12 of 34 0992026193-0 201140871 Intent. 12 is a cross-sectional structural view showing a second embodiment of a light-emitting diode according to the present invention. [0038] FIG. 13 is a cross-sectional structural view showing a third embodiment of the light-emitting diode according to the present invention. [0039] FIG. Overhead view of an epitaxial wafer used to fabricate the light-emitting diode shown in FIG.
[0040] [0041] [0042][0042] [0042]
[0043] [0044] [0045] [0046] [0047] [0048] [0049] [0050] 圖。 圖15為於圖14所示磊晶片上形成絕緣層後的俯視圖。 圖1 6為圖1 3所示發光二極體中的發光二極體晶片倒裝於 導熱基板之前的俯視圖。 圖17為圖13所示發光二極體去除基底並經表面粗化處理 後的剖視結構示意圖。 【主要元件符號說明】 導熱基板：10、l〇a、40 發光二極體：100、200 磊晶片：101、401 磊晶層：102 第一接合墊：11、41 第二接合墊：12、42 發光二極體晶片：20、50 基底：21、51 099114755 表單編號A0101 第13頁/共34頁 0992026193-0 201140871 [0051] 第一半導體層：22、52 [0052] 粗化面：221、521 [0053] 活性層：23、53 [0054] 第二半導體層：24、54 [0055] 第一電極：26、56、11a [0056] 第二電極：25、55、12a [0057] 絕緣層：27、57 [0058] 第一部分：271、571 [0059] 第二部分：272、572 [0060] 第一支撐層：29、59 [0061] 第二支撐層：28、58 [0062] 主體部：291 [0063] 接合部：292、592 [0064] 疊層：30 [0065] 盲孔·· 31、61 [0066] 收容空間：32 099114755 表單編號A0101 第14頁/共34頁 0992026193-0[0045] [0050] [0050] [0050] [0050] FIG. Figure 15 is a plan view showing the formation of an insulating layer on the epitaxial wafer shown in Figure 14. Figure 16 is a plan view of the light-emitting diode of the light-emitting diode shown in Figure 13 before being flip-chip mounted on the thermally conductive substrate. Fig. 17 is a cross-sectional structural view showing the light-emitting diode of Fig. 13 with the substrate removed and subjected to surface roughening treatment. [Main component symbol description] Thermal substrate: 10, l〇a, 40 Light-emitting diode: 100, 200 Epitaxial wafer: 101, 401 Epitaxial layer: 102 First bonding pad: 11, 41 Second bonding pad: 12. 42 LED wafer: 20, 50 Substrate: 21, 51 099114755 Form No. A0101 Page 13 / Total 34 Page 0992026193-0 201140871 [0051] First semiconductor layer: 22, 52 [0052] Roughening surface: 221, 521 [0053] Active layer: 23, 53 [0054] Second semiconductor layer: 24, 54 [0055] First electrode: 26, 56, 11a [0056] Second electrode: 25, 55, 12a [0057] Insulation layer : 27, 57 [0058] Part 1: 271, 571 [0059] Part 2: 272, 572 [0060] First support layer: 29, 59 [0061] Second support layer: 28, 58 [0062] Main body : 291 [0063] Joint: 292, 592 [0064] Lamination: 30 [0065] Blind hole · 31, 61 [0066] Containing space: 32 099114755 Form number A0101 Page 14 / Total 34 page 0992026193-0