TW201134322A - Method for manufacturing printed circuit board - Google Patents

Method for manufacturing printed circuit board Download PDF

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Publication number
TW201134322A
TW201134322A TW99107968A TW99107968A TW201134322A TW 201134322 A TW201134322 A TW 201134322A TW 99107968 A TW99107968 A TW 99107968A TW 99107968 A TW99107968 A TW 99107968A TW 201134322 A TW201134322 A TW 201134322A
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TW
Taiwan
Prior art keywords
line
layer
copper foil
foil layer
copper
Prior art date
Application number
TW99107968A
Other languages
Chinese (zh)
Other versions
TWI420990B (en
Inventor
Yao-Wen Bai
Pan Tang
Xiao-Ping Li
Original Assignee
Foxconn Advanced Tech Inc
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Publication date
Application filed by Foxconn Advanced Tech Inc filed Critical Foxconn Advanced Tech Inc
Priority to TW99107968A priority Critical patent/TWI420990B/en
Publication of TW201134322A publication Critical patent/TW201134322A/en
Application granted granted Critical
Publication of TWI420990B publication Critical patent/TWI420990B/en

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Abstract

A method for manufacturing a printed circuit board includes steps below. Firstly, a first copper foil is provided. The first copper foil has a first surface and a second surface at an opposite side thereof to the first surface. Secondly, a first supporting layer is formed on the first surface of the first copper foil. Thirdly, a first circuit is formed on the second surface of the first copper foil by electroplating. Fourthly, a dielectric layer is formed on the second surface of the first copper foil, the first circuit is in contact with the dielectric layer. Fifthly, the first supporting layer is removed from the first surface of the first copper foil. Sixthly, the first copper foil is etched to form a second circuit. A distribution of the second circuit is corresponding to that of the first circuit, thus the first conductive circuit and the second conductive circuit overlap with each other thereby constituting a first circuit pattern.

Description

201134322 六、發明說明: 【發明所屬之技術領域】 [0001] 本發明涉及電路板製作領域’尤其涉及一種製作厚銅電 路板之方法。 【先前技4标】 [0002] 隨著科學技術之進步,印刷電路板於電子領域得到之廣 泛之應用。印刷電路板因具有裝配密度高等優點而得到 廣泛之應用。關於電路板之應用請參見文獻Takahashi, A. Ooki, N. Nagai, A. Akahoshi, H. Mukoh, A. Wajima, M. Res. Lab, High density multilayer printed circuit board f〇r HITAC M-880 . IEEE Trans, on Components, Packaging, and Manufacturing Technology, 1992) 15(4): 41g_425 〇 [_先前減巾,㈣電路㈣要為好元件提供電氣 連接與必要之機械讀,還需要與電源錢,從而需要 電路板中能夠經受較大之電流並具有良好之散熱功能及 控制特性阻抗之功能。為滿足這些要求,厚銅電路板應 運而生。厚銅電路板通常係指線路厚度大於1〇5微米之電 路板然而於製作上述之厚鋼電路板之過程中,如果 採用傳統之直接_厚銅之方式形成線路 ,由於銅箔厚 度較大,錢編彳線路過程中形成㈣,導致形成之線 路板之線該線距難以㈣,電路板之較性較差。並 且由於形成之線路厚度較大,線路凸出於介質層之高 度較大,於電路表面形成防焊層時,需要形成厚度較大 之防焊層,並且形叙防焊層容易出現氣泡與褶敏等現 099107968 表單編號A0101 第4頁/共36頁 0992014297-0 201134322 象,造成生產之電路板品質不良。 【發明内容】 [0004] [0005] [0006] Ο [0007] ❹ [0008] [0009] 有鑑於此,提供一種能夠提供厚銅線路,並能夠保證製 作之線路具有良好之穩定性之電路板製作方法實屬必要201134322 VI. Description of the Invention: [Technical Field of the Invention] [0001] The present invention relates to the field of circuit board manufacturing, and particularly to a method of manufacturing a thick copper circuit board. [Previous technology 4 standard] [0002] With the advancement of science and technology, printed circuit boards have been widely used in the field of electronics. Printed circuit boards are widely used due to their high assembly density. For the application of the circuit board, please refer to the literature Takahashi, A. Ooki, N. Nagai, A. Akahoshi, H. Mukoh, A. Wajima, M. Res. Lab, High density multilayer printed circuit board f〇r HITAC M-880 . IEEE Trans, on Components, Packaging, and Manufacturing Technology, 1992) 15(4): 41g_425 〇[_ Previously reduced, (4) Circuit (4) To provide electrical connections and necessary mechanical reading for good components, It requires a function in the board that can withstand large currents and has good heat dissipation and control characteristic impedance. To meet these requirements, thick copper boards have emerged. A thick copper circuit board generally refers to a circuit board having a line thickness greater than 1 〇 5 μm. However, in the process of fabricating the above-mentioned thick steel circuit board, if a conventional direct _ thick copper method is used to form a line, since the thickness of the copper foil is large, The formation of the money in the process of the line (4), resulting in the formation of the line of the circuit board, the line distance is difficult (four), the board is less stringent. Moreover, since the thickness of the formed line is large, the height of the line protrudes from the dielectric layer, and when the solder resist layer is formed on the surface of the circuit, it is necessary to form a solder resist layer having a large thickness, and the solder resist layer is prone to bubbles and pleats. Min et al. 099107968 Form No. A0101 Page 4 / Total 36 Pages 0992014297-0 201134322 Image, resulting in poor quality of the printed circuit board. SUMMARY OF THE INVENTION [0007] [0007] In view of this, there is provided a circuit board capable of providing a thick copper line and capable of ensuring good stability of the fabricated circuit. Production method is really necessary

Q Χ下將以實施例說明一種電路板製作方法。 種電路板製作方法,包括步驟:提供第一銅箔層,所 返第一銅箔層具有相對之第一表面與第二表面;於第一 表面形成第—支撐層;於所述第二表面上藉由電鍍形成 第 /厶 〜線路;於所述第二表面上形成介質層,所述第一線 路與所述介質層接觸;去除第一表面之第一支撐層;從 〜表面蝕刻所述第一銅箔層以形成與第一線路之分佈 位置相對應之第二線路,從而使得第一線路與第二線路 in -y 及重疊以共同構成第一線路圖形》 與先前技術相較,本技術方案提供之電路板製作方法, 導電線路圖形均包括兩線路部分,其中第一線路由電鍍 也成,第二線路由蝕刻形成,並且第一線路嵌入於介質 層這樣可避免單獨由蝕刻形成導電線路時側蝕現象 對形成之導電線路之品質之影響。 【實施方式] 了面結合複數附圖及複數實施例對本技術方案提供之電 路板製作方法作進一步說明。 本技術方案實施例提供一種電路板之製作方法,以製作 單面電路板為例進行說明,所述電路板之製作方法包括 099107968 表單編號A0101 第5頁/共36頁 0992014297-0 201134322 如下步驟: [0010]請參閱圖1,第一步,提供第一銅箔層丨1 〇。 _]本實施例中,第一銅镇層11〇為經過裁切後之銅羯,其形 狀與欲製作之電路板之形狀相對應。第一銅箔層具有 相對第一表面111與第二表面112。第 纟’即第-表面ill與第二表面112之間距可根據實際製 作之導電線路進行選擇,其可為30微米至180微米。 _2]請參閱圖2,第二步,於第__銅箱層11〇之第_表面m上 形成支撐層120。 剛帛-mi層11〇之厚度較小,其較柔軟,於後續制程中容 易產生變形,如產生褶皺、趣曲等。本實施例中於第 -銅羯層no之第-表面U1貼合支禮層12〇。支揮層12〇 由具有較大硬度之材料製成,所述材料可為塑膝或者活 性較差之金屬等。支撑層120起到對第一鋼箱層ιι〇之補 強作用’以方便後續制程。 刚#第-鋪層110之厚度較大時,不需要進行補強時,可 不設置支撐層120。 [_請-併參閱圖3至圖6,第三步,於第一銅落層11〇之第二 表面112形成第一線路131。 剛Μ,於第-_層11()之第二表面112形成光致抗钱劑 140,並藉由影像轉移之方式於第二表面U2形成與第一 線路131形狀互補之剩餘光致抗蝕劑141,使得與第一線 路131之形狀相對應之第一銅落層η〇從剩餘光致抗姑劑 099107968 表單編號Α0101 第6頁/共36頁 0992014297-0 201134322 141—側露出。具體為, ⑽。光致抗細40可㈣面111塗覆光致抗钱劑 ,亦可藉由於第二表二:::光致抗蚀 抗餘劑140進行曝光及顯旦^膜之方式形成。對光致 狀相對應區域之光::二從而將與第-線路⑶之形 [0017] Ο Ο 然^於第一銅箱層U0從剩餘光致抗钱劑141 —側露出 之二域進仃電鑛,形成第—線路131。藉由電链銅之方式 ,於從剩餘光致抗糊41_侧露出之第一 _層110上 -線路131。第—線路131之厚度可根據欲制得之 第一線路圖形130之厚度進行設定,使得第-線路131之 厚,:第銅泊層1U)之厚度之和與欲制得之第―線路圖 形130之厚度相等。 [0018] [0019] 最後,將剩餘光致抗餘劑1 4 1去除。 採用與剩餘光致抗钱劑141發生反應之溶液與剩餘光致抗 蝕劑141發生反應,從而使得剩餘光致抗侧141從第一 銅箔層110之第二表面112去除。 闺請參見圖7’第四步’於所述第二表面112上形成第一介 質廣⑽’並使得第一線路131與第一介質層15〇相接觸 _]所述第-介質層150可藉由壓合之方式形成於第二表面 U2上’亦可藉由印刷介電材料之方式形狀第二表面 112上。 099107968 表單編號A0101 第7頁/共36頁 0992014297-0 201134322 [0022] [0023] [0024] [0025] [0026] [0027] [0028] 099107968 清參閱圖8 ’第五步,將古, 將支撐層120仗弟一銅箔層! 1〇之第 一表面111上去除。 »月參閱圖9 ’第六步,從第_表面1U叙刻所述第一銅箔 層110以形成與第-線路圖形130之分佈位置相對應之第 二線路132 ’從而使得第—線路131與第二線路132相互 重疊以共同構成第一線路圖形13〇。 於進行本步驟之前,如果第-銅IS層11G與第-線路131 之厚度之和不能滿足欲製作之第一線路圖形13〇之厚度, 還可進—步包括於第-銅落層110之第-表面111形成電 艘銅層’以滿足製作之第-線路圖形130之祕厚度之要 求。 於形成第一線路圖形130之後,還可進一步於第一線路圖 形130上形成防焊層,以對第一線路圖形13〇進行保護。 本技術方案第二實施例提妈一種雙面電路板之製作方法 ’該方法包括如下步驟: 凊參閱圖10,第一步,提供第一銅箔層210與第二銅箔層 220。 第一銅羯層210與第二銅箔層22〇為經過裁切後之銅箔, 其形狀與欲製作之電路板之形狀相對應。第一銅箔層21〇 具有相對第一表面211與第二表面212。第一銅箔層210 之厚度’即第一表面211與第二表面212之間之間距可根 據實際製作之導電線路進行選擇,其可為3〇微米至18〇微 米之間。第二銅箔層220具有相對之第三表面221與第四 表面222,第二銅箔層220之厚度亦可為30微米至180微 表單編號A0101 201134322 [0029] 米之間。 "月參閱圖U ’第二步,於第_鋼羯層21〇之第—表面211 上形成第一支撐層231,於第二銅箔層22〇之第三表面 221上形成第二支撐層232。 ' [0030] 凊參閱圖12,第三步’於第-鋼箔層21〇之第二表面a" 形成第一線路241,於第二銅箱層22〇之第四表面形 成第三線路251。 [0031] 〇 〇 "月參閱圖13至圖14,本實施例中,採用如下方法於第一 銅名層21〇之第二表面212形成第一線路241。首先,於 第一銅落層210之第二表面212形成與光致抗餘劑26〇, 並藉由影像轉移之方式於第二表面212形成與第—線路 241形狀互補之剩餘光致抗蝕劑261,使得與第一線路 241之形狀相對應之第一銅㈣21〇從剩餘光致抗姓劑 如-側露出。具體為,於第—表面211塗覆光致抗蚀劑 260。光致抗蝕劑260可藉由印刷光致抗蝕劑之方式形成 ,亦可藉由於第二表面2i2貼合乾膜之方式形& 致 抗钱劑2 6 0進行曝先及顯影,從而將與第一線路2 * ^之形 狀相對應區域之光致抗儀劑260去除,得到剩餘光致^ 劑26卜使得與第-線路241相對應之第一㈣層21二 剩餘光致抗蝕劑261—侧露出。 [0032] 然後,於第-銅⑽210從剩餘光致抗μ劑26ι_側露出 之區域進行電鍵’形成第-線路24卜藉由電鑛銅之方气 ,於從剩餘光致祕郷卜側露出 形成第-線路24卜形成之第-線路241之形狀與欲製作 099107968 表單編號A0101 第9頁/共36頁 0992014297-0 201134322 之第—線路圖形240之形狀相同。第-線路241之厚度可 根據欲制得之第—線路圖形24Q之厚度進行設^,使得第 =路如之厚度與第—_21Q之厚度之和與欲制得 之第一線路圖形240之厚度相等。 [0033] [0034] [0035] [0036] [0037] 最後,將剩餘光致抗蝕劑261去除。 :剩餘光致抗細61發生反應之溶液與剩餘光致抗 餘劑41發生反應,從而使得剩餘光致抗钱劑如從第一銅 箔層210之第二表面212去除。 採用相同之方法,於第二㈣她之第四表 第三線路251» 請參閱圖15,第五步,使得第-_層210之第二表面 212與第二㈣1層22Q之第四表面222相對,於所述第二 表面212與第四表面222之間形成第一介質層27〇,並使 得第-線路241與第三線路251分別從第_介質層27〇之 兩相對表面相接觸。 本實施例中’藉由壓合第-㈣層21Q、第—介質層27〇 與第二_層220之方式使得第__層21()、第一介質 層270與第二⑽l422()成為—個整體。具體為,依次堆 疊第-鋪層21〇、第-介質層27()與第二㈣層22〇, 第一介質層270具有相對之第_上表面271與第:下表面 272,使得第-銅羯層210之第二表面212與第一介質層 270之第一上表面271相對’第二銅箱層22〇之第四表面 222與第-介質層270之第-下表面奶相對,藉由加敎 加壓之方式,使得第-銅箱層21()、第—介質層27〇盘第 099107968 表單編號A0101 第10頁/共36頁 0992014297-0 201134322 二銅羯層220緊密接觸,並使得第—線路圖形24〇之第一 線路241從第一上表面271—側嵌入第一介質層27〇中, 第三線路251從第一下表面272一側嵌入於第一介質層 2 7 0 中。 [0038] 請參閱圖16,第六步,將第—支#層231從第—㈣層 210之第-表面211上去除,將第二支擇層232從第二銅 層220之第三表面221上去除。 [0039] Ο 於去除第一支撐層23丨與第二支撐層232之後,可於第一 銅落層210之第-表面211與第二銅落層22〇之第三表面 221上電链銅層,以增加第_辦層21()與第二銅箱層 220之厚度。 [0040] 請參閱圖17 ’第七步’_第—銅㈣210形成第-線路 圖形240之第:線路242,第—線路241與、二線路⑷共 同成第-線路圖形240,蝕刻第二銅_22〇形成第二線 Ο [0041] 路圖細之第四線細,第三線_與第四線細 共同形成第二線路圖形25〇。 本實施射,藉由影像轉移-㈣之方式於第—銅落層 2H内形成第二線路242與於第二㈣層m内形成第四 線路252。即先於第—表面211上形成光致抗_,终後 藉由曝光及顯影形成與第—線路圖形240形狀互補之剩餘 光致抗㈣’然後㈣沒有_餘絲抗_覆蓋之第 -銅羯層210去除,再將剩餘光致抗_去除,從而得到 第二線路242。第二線路242與第一線路241於垂直於第 -介質層270之方向上相互重合,共同形成第一線'路圖形 099107968 表單編號A0101 第11頁/共36頁 0992014297-0 201134322 採用同樣之方法,於第二銅箔層22〇内形成第 >,筮芑綠政9 P; 1咖穿rm仏灿A ------ 240 · 百以形成第四線 路252,第三線路251與第四線路252於垂直於第—介晰 層270之方向上相互對應,並共同構成第二線路圖形^ 〇 [0042] [0043] [0044] 請參閱圖18,第八步,於第一線路圖形24〇上形成第— 焊層281,於第二線路圖形250上形成第二防焊層Μ?。防 第-防焊層281與第二防焊層282可藉由塗布液態光致抗 蝕劑,然後藉由曝光、顯影及烘烤之步驟形成。 几 本技術方案提供之電減製作方法還可進料層電路板 之製作’即將製作形成之兩以上單面電 路板之間設則層,然後進行壓合,便可=層面: 銅電路板。 予 [0045] [0046] 099107968 本技術方案提供之電路板製作方案,每個線路圖形均包 括兩相互對應之線路構成,其中第—線路㈣_ 第二線路由触刻形成,並且第一線路嵌入於介質層中 這樣可避免單獨由⑽形成導電線路日#舰現象對形成 之導電線路之品質之影響。進—步,由於僅有第二線路 凸出於介質層’因此可有效线免由於導電線路厚度大 導致之於導電線路表面形成防烊層時出現之氣泡或者相 敵等現象,提高了製作之電路板之外觀品質。 综上所述’本發明確已符合發明專利之要件遂依法提 出專利巾請。恨,以上所述者僅為本發明之較佳實施方 武,自不能以此限制本案之中請專利範圍。舉凡熟悉本 案技藝之人士援依本發明之精神所作之等效修韩或變化 第12頁/共36頁 表單編號A0101 0992014297-0 201134322 ,皆應涵蓋於以下申請專利範圍内。 【圖式簡單說明】 [0047] 圖1係本技術方案第一實施例提供第一銅箔層之示意圖。 [0048] 圖2係本技術方案第一實施例提供第一銅箔層形成有支撐 層之示意圖。 [0049] 圖3係本技術方案第一實施例提供之第一銅箔層形成有光 致抗蝕劑後之示意圖。 [0050] 圖4係圖3之光致抗蝕劑進行曝光顯影後之示意圖。 [0051] 圖5係本技術方案第一實施例提供之第一銅箔層形成第一 線路後之示意圖。 [0052] 圖6係本技術方案第一實施例提供之去除剩餘光致抗蝕劑 後之示意圖。 [0053] 圖7係本技術方案第一實施例提供之第一銅箔層之第二表 面上形成介質層後之示意圖。 [0054] 圖8係本技術方案第一實施例提供之去除支撐層後之示意 圖。 [0055] 圖9係本技術方案第一實施例製作之電路板之剖面示意圖 〇 [0056] 圖1 0係本技術方案第二實施例提供之第一銅箔層與第二 銅落.層之示意圖。 [0057] 圖11係本技術方案第一實施例提供第一銅箔層與第二銅 箔層形成有支撐層之示意圖。 099107968 表單編號A0101 第13頁/共36頁 0992014297-0 201134322 [0058] [0059] [0060] [0061] [0062] [0063] [0064] [0065] [0066] [0067] [0068] [0069] [0070] [0071] 099107968 圖1 2係本技術方案第一實施例提供之第一銅箔層與第二 銅箔層表面形成導電線路後之示意圖。 圖1 3係本技術方案第二實施例提供之第一銅箔層形成有 光致抗蝕劑後之示意圖。 圖14係本技術方案第二實施例提供之第一銅箔層形成第 一線路圖形後之示意圖。 圖15係本技術方案第二實施例提供之第一銅箔層與第二 銅箔層之間形成有介質層後之示意圖。 圖16係本技術方案第二實施例提供之去除第一支撐層與 第二支撐層後之示意圖。 圖17係本技術方案第二實施例提供之形成第一線路圖形 與第二線路圖形後之示意圖。 圖18係本技術方案第二實施例提供之形成第一防焊層與 第二防焊層後之示意圖。 【主要元件符號說明】 第一銅箔層:110、21 0 、211 ' 212 130 、 240 、241 ' 242 第14頁/共36頁 0992014297-0 第一表面:111 第二表面:112 支撐層:120 第一線路圖形: 第一線路:131 第二線路:132 表單編號A0101 201134322 Ο [0072] 光致抗敍劑 :140、 [0073] 剩餘光致抗蝕劑:1 [0074] 第一介質層 :150 ' [0075] 第二銅箔層 :220 [0076] 第三表面: 221 [0077] 第四表面: 222 [0078] 第一支撐層 :231 [0079] 第二支撐層 :232 [0080] 第二線路圖形:250 [0081] 第三線路: 251 [0082] 第四線路: 252 [0083] 第一上表面 :271 [0084] 第一下表面 :272 [0085] 第一防焊層 :281 [0086] 第二防焊層 :282 099107968 表單編號Α0101 第15頁/共36頁 0992014297-0A method of fabricating a circuit board will be described by way of example. The method for manufacturing a circuit board includes the steps of: providing a first copper foil layer, wherein the returned first copper foil layer has opposite first and second surfaces; forming a first support layer on the first surface; and on the second surface Forming a first/next line by electroplating; forming a dielectric layer on the second surface, the first line contacting the dielectric layer; removing a first support layer of the first surface; etching the surface from the surface The first copper foil layer forms a second line corresponding to the distribution position of the first line, such that the first line and the second line in -y and overlap to form the first line pattern together, compared with the prior art, The circuit board manufacturing method provided by the technical solution, the conductive circuit pattern comprises two line parts, wherein the first line is formed by electroplating, the second line is formed by etching, and the first line is embedded in the dielectric layer, thereby avoiding formation of conductive by etching alone. The effect of the side etching phenomenon on the quality of the formed conductive line during the line. [Embodiment] A circuit board manufacturing method provided by the present technical solution is further described in conjunction with a plurality of drawings and a plurality of embodiments. The embodiment of the present invention provides a method for manufacturing a circuit board, which is described by taking a single-sided circuit board as an example. The manufacturing method of the circuit board includes 099107968 Form No. A0101 Page 5 / Total 36 Page 0992014297-0 201134322 The following steps are as follows: [0010] Referring to FIG. 1, in a first step, a first copper foil layer 丨1 提供 is provided. In the present embodiment, the first copper town layer 11 is a cut copper bead having a shape corresponding to the shape of the circuit board to be fabricated. The first copper foil layer has a first surface 111 and a second surface 112 opposite to each other. The first 纟', i.e., the distance between the first surface ill and the second surface 112, may be selected according to the actual conductive path, which may be from 30 micrometers to 180 micrometers. _2] Referring to FIG. 2, in the second step, the support layer 120 is formed on the first surface m of the __ copper box layer 11〇. The thickness of the 帛-mi layer 11 较小 is small, it is soft, and it is easy to be deformed in subsequent processes, such as wrinkles and interesting music. In the present embodiment, the support layer 12 is bonded to the first surface U1 of the first copper layer No. The support layer 12 is made of a material having a large hardness, which may be a plastic knee or a less active metal. The support layer 120 acts as a reinforcing effect on the first steel box layer to facilitate subsequent processing. When the thickness of the first-ply layer 110 is large, the support layer 120 may not be provided when reinforcement is not required. [_Please - and referring to Figs. 3 to 6, in the third step, the first line 131 is formed on the second surface 112 of the first copper falling layer 11A. The photo-resistance agent 140 is formed on the second surface 112 of the first layer _11, and the remaining photoresist is complementary to the shape of the first line 131 on the second surface U2 by image transfer. The agent 141 is such that the first copper falling layer η 相对 corresponding to the shape of the first line 131 is exposed from the side of the remaining photo-anti-allergic agent 099107968 Form No. 1010101 Page 6/36 pages 0992014297-0 201134322 141. Specifically, (10). The photo-resistant anti-fine 40 can be coated with a photo-anti-money agent by the (four)-face 111, or can be formed by exposure and development of the second surface of the second::: photoresist anti-residue 140. The light corresponding to the photoreceptive region: two is thus formed in the shape of the first line (3) [0017] Ο ^ 于 第一 第一 第一 第一 第一 第一 第一 第一 第一 第一 第一 第一 第一 第一 第一 第一 第一 第一 第一 第一 第一 第一 第一 第一 第一仃Electrical mine, forming the first line 131. On the first _ layer 110 exposed from the remaining photo-blocking paste 41_ side, the line 131 is formed by means of an electric chain copper. The thickness of the first line 131 can be set according to the thickness of the first line pattern 130 to be obtained, such that the thickness of the first line 131, the thickness of the copper layer 1U) and the first line pattern to be obtained 130 is equal in thickness. [0019] Finally, the remaining photo-anti-resistance agent 1 4 1 is removed. The solution reacted with the remaining photo-anti-moisture agent 141 is reacted with the remaining photo-resistance 141 such that the remaining photo-resistance side 141 is removed from the second surface 112 of the first copper foil layer 110. Referring to FIG. 7 'fourth step', a first medium width (10)' is formed on the second surface 112 and the first line 131 is brought into contact with the first dielectric layer 15A. The first dielectric layer 150 may be Formed on the second surface U2 by press bonding' can also be shaped on the second surface 112 by printing a dielectric material. 099107968 Form No. A0101 Page 7 / Total 36 Pages 0992014297-0 201134322 [0023] [0024] [0028] [0028] [0028] 099107968 Clearly refer to Figure 8 'Step 5, will be ancient, will Support layer 120 brothers a copper foil layer! The first surface 111 of the first layer is removed. Referring to FIG. 9 'the sixth step, the first copper foil layer 110 is scribed from the first surface 1U to form a second line 132 ′ corresponding to the distribution position of the first line pattern 130 such that the first line 131 The second line 132 overlaps with each other to collectively constitute the first line pattern 13A. Before performing this step, if the sum of the thicknesses of the first copper IS layer 11G and the first line 131 does not satisfy the thickness of the first line pattern 13〇 to be fabricated, it may be further included in the first copper falling layer 110. The first surface 111 forms an electric copper layer 'to meet the requirements for the secret thickness of the fabricated first-line pattern 130. After the first line pattern 130 is formed, a solder resist layer may be further formed on the first line pattern 130 to protect the first line pattern 13A. The second embodiment of the present invention provides a method for fabricating a double-sided circuit board. The method includes the following steps: Referring to FIG. 10, in a first step, a first copper foil layer 210 and a second copper foil layer 220 are provided. The first copper layer 210 and the second copper foil layer 22 are cut copper foils, and the shape thereof corresponds to the shape of the circuit board to be fabricated. The first copper foil layer 21 has opposite first and second surfaces 211, 212. The thickness of the first copper foil layer 210, i.e., the distance between the first surface 211 and the second surface 212, may be selected according to the actual fabricated conductive trace, which may be between 3 Å and 18 Å. The second copper foil layer 220 has a third surface 221 and a fourth surface 222 opposite thereto, and the second copper foil layer 220 may have a thickness of 30 micrometers to 180 micrometers between the form numbers A0101 201134322 [0029]. "Month Referring to Figure U', the first support layer 231 is formed on the first surface 211 of the first steel layer 21, and the second support is formed on the third surface 221 of the second copper foil layer 22 Layer 232. Referring to FIG. 12, the third step 'forms the first surface 241 on the second surface a" of the first steel foil layer 21, and forms the third line 251 on the fourth surface of the second copper box layer 22〇. . Referring to FIG. 13 to FIG. 14, in the present embodiment, the first line 241 is formed on the second surface 212 of the first copper name layer 21 by the following method. First, a photoresist is formed on the second surface 212 of the first copper falling layer 210, and the remaining photoresist is complementary to the shape of the first line 241 on the second surface 212 by image transfer. The agent 261 is such that the first copper (tetra) 21 相对 corresponding to the shape of the first line 241 is exposed from the remaining photo-resistance agent such as the side. Specifically, the photoresist 260 is coated on the first surface 211. The photoresist 260 can be formed by printing a photoresist, or by exposing and developing the anti-money agent 250 by the second surface 2i2 being attached to the dry film. The photo-resistance agent 260 of the region corresponding to the shape of the first line 2*^ is removed, and the remaining photo-resistue 26 is obtained so that the first (four) layer 21 corresponding to the first line 241 is left. Agent 261 - side exposed. [0032] Then, in the region where the first copper (10) 210 is exposed from the side of the remaining photo-anti-anti-antimicrobial agent 26, the electric bond 'forms the first-line 24' by the electric copper to the side, from the remaining light to the secret side The shape of the first line 241 formed to form the first line 24 is the same as the shape of the line pattern 240 to be made 099107968 Form No. A0101 Page 9/36 Page 0992014297-0 201134322. The thickness of the first line 241 can be set according to the thickness of the first line pattern 24Q to be obtained, such that the sum of the thickness of the first path and the thickness of the first - 21Q and the thickness of the first line pattern 240 to be obtained. equal. [0037] [0037] Finally, the remaining photoresist 261 is removed. The solution in which the remaining photo-resistance 61 reacts with the remaining photo-resistance agent 41, so that the remaining photo-anti-moisture agent is removed from the second surface 212 of the first copper foil layer 210. Using the same method, in the second (four) her fourth table third line 251» Please refer to FIG. 15, the fifth step, so that the second surface 212 of the first-th layer 210 and the fourth surface 222 of the second (four) 1 layer 22Q In contrast, a first dielectric layer 27 is formed between the second surface 212 and the fourth surface 222, and the first line 241 and the third line 251 are respectively in contact with the opposite surfaces of the first dielectric layer 27 . In the present embodiment, the first dielectric layer 270 and the second dielectric layer 270 and the second (10) l422 () are formed by pressing the first (four) layer 21Q, the first dielectric layer 27, and the second layer 220. - a whole. Specifically, the first-layer 21 〇, the first dielectric layer 27 ( ) and the second (four) layer 22 堆叠 are stacked in this order, and the first dielectric layer 270 has a first surface 271 and a lower surface 272 opposite to each other, such that - The second surface 212 of the copper layer 210 is opposite to the first upper surface 271 of the first dielectric layer 270. The fourth surface 222 of the second copper box layer 22 is opposite to the first surface of the first dielectric layer 270. Pressing and pressing, the first copper layer 21 (), the first dielectric layer 27, the disk 099107968, the form number A0101, the 10th page, the 36th page, the 0992014297-0 201134322 The first line 241 of the first line pattern 24 is embedded in the first dielectric layer 27 from the first upper surface 271 side, and the third line 251 is embedded in the first dielectric layer 2 7 from the first lower surface 272 side. in. Referring to FIG. 16, the sixth step, the first branch layer 231 is removed from the first surface 211 of the first (four) layer 210, and the second selected layer 232 is removed from the third surface of the second copper layer 220. Removed on 221. [0039] After the first support layer 23 and the second support layer 232 are removed, the copper may be electrically connected to the first surface 211 of the first copper falling layer 210 and the third surface 221 of the second copper falling layer 22 The layer is added to increase the thickness of the first layer 21 () and the second copper box layer 220. [0040] Please refer to FIG. 17 'seventh step'_the copper (four) 210 forms the first line pattern 240: line 242, the first line 241 and the second line (4) together form the first line pattern 240, etch the second copper _22 〇 forming the second line Ο [0041] The fourth line of the road pattern is thin, and the third line _ and the fourth line are thin together to form the second line pattern 25 〇. In the present embodiment, the second line 242 is formed in the first copper layer 2H and the fourth line 252 is formed in the second (four) layer m by image transfer-(4). That is, a photo-resistance is formed on the first surface 211, and then the remaining photo-resistance (four) complementary to the shape of the first-line pattern 240 is formed by exposure and development. Then (4) there is no _ residual ray-resistant cover-copper The germanium layer 210 is removed, and the remaining light is again removed, thereby obtaining the second line 242. The second line 242 and the first line 241 coincide with each other in a direction perpendicular to the first dielectric layer 270 to form a first line 'road pattern 099107968. Form No. A0101 Page 11 / Total 36 Page 0992014297-0 201134322 Using the same method , forming a second in the second copper foil layer 22, 筮芑 绿 绿 9 9; 1 咖 穿 仏 A A ------ 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成 形成The fourth line 252 corresponds to each other in a direction perpendicular to the first clear layer 270, and together constitutes a second line pattern. [0042] [0044] Referring to FIG. 18, the eighth step is on the first line. A first solder layer 281 is formed on the pattern 24, and a second solder resist layer is formed on the second line pattern 250. The anti-solder layer 281 and the second solder resist layer 282 can be formed by applying a liquid photo-resist and then exposing, developing and baking. The electrosurgical fabrication method provided by several technical solutions can also be used for the production of the feed layer circuit board. The layer between the two or more single-sided circuit boards to be formed is formed, and then pressed, and then the layer: copper circuit board. [0046] [0046] 099107968 The circuit board manufacturing scheme provided by the technical solution, each circuit pattern comprises two mutually corresponding lines, wherein the first line (four)_the second line is formed by the touch, and the first line is embedded in In the dielectric layer, the influence of the formation of the conductive line day # ship phenomenon on the quality of the formed conductive line can be avoided. Step-by-step, since only the second line protrudes from the dielectric layer', the effective line can avoid the phenomenon of bubbles or enemies which occur when the anti-corrosion layer is formed on the surface of the conductive line due to the large thickness of the conductive line, thereby improving the manufacturing process. The appearance quality of the board. In summary, the invention has indeed met the requirements of the invention patent, and the patent towel is required in accordance with the law. Hate, the above is only a preferred implementation of the present invention, and it is not possible to limit the scope of patents in this case. Anyone who is familiar with the skill of the present invention will be able to comply with the equivalent of the spirit of the present invention. Page 12 of 36 Form No. A0101 0992014297-0 201134322, all of which are covered by the following patents. BRIEF DESCRIPTION OF THE DRAWINGS [0047] FIG. 1 is a schematic view showing a first copper foil layer according to a first embodiment of the present technical solution. 2 is a schematic view showing a first embodiment of the present technical solution, in which a first copper foil layer is formed with a support layer. 3 is a schematic view showing a first copper foil layer provided with a photoresist according to a first embodiment of the present technical solution. 4 is a schematic view of the photoresist of FIG. 3 after exposure and development. 5 is a schematic view of the first copper foil layer provided by the first embodiment of the present technical solution after forming a first line. 6 is a schematic view of the first embodiment of the present invention after removing residual photoresist. [0052] FIG. 7 is a schematic view showing the formation of a dielectric layer on the second surface of the first copper foil layer provided by the first embodiment of the present technical solution. 8 is a schematic view of the first embodiment of the present technical solution after removing the support layer. 9 is a schematic cross-sectional view of a circuit board produced by the first embodiment of the present invention. [0056] FIG. 10 is a first copper foil layer and a second copper foil layer provided by the second embodiment of the present technical solution. schematic diagram. 11 is a schematic view showing a first embodiment of the present invention, in which a first copper foil layer and a second copper foil layer are formed with a support layer. 000107968 Form No. A0101 Page 13 / Total 36 Pages 0992014297-0 201134322 [0058] [0060] [0064] [0064] [0068] [0069] [0069] [0071] FIG. 1 is a schematic view showing a conductive line formed on a surface of a first copper foil layer and a second copper foil layer provided by the first embodiment of the present technical solution. Fig. 1 is a schematic view showing the first copper foil layer provided by the second embodiment of the present technical solution after the photoresist is formed. Figure 14 is a schematic view showing the first copper foil layer of the second embodiment of the present invention after forming a first line pattern. Figure 15 is a schematic view showing a dielectric layer formed between a first copper foil layer and a second copper foil layer according to a second embodiment of the present invention. Figure 16 is a schematic view of the second embodiment of the present invention after removing the first support layer and the second support layer. Figure 17 is a schematic view showing the formation of the first line pattern and the second line pattern provided by the second embodiment of the present technical solution. Figure 18 is a schematic view showing the formation of a first solder resist layer and a second solder resist layer according to a second embodiment of the present technical solution. [Description of main component symbols] First copper foil layer: 110, 21 0, 211 ' 212 130 , 240 , 241 ' 242 Page 14 / Total 36 pages 0992014297-0 First surface : 111 Second surface : 112 Support layer : 120 First line pattern: First line: 131 Second line: 132 Form number A0101 201134322 Ο [0072] Photoreceptor: 140, [0073] Residual photoresist: 1 [0074] First dielectric layer : 150 ' [0075] second copper foil layer: 220 [0076] third surface: 221 [0077] fourth surface: 222 [0078] first support layer: 231 [0079] second support layer: 232 [0080] Second line pattern: 250 [0081] Third line: 251 [0082] Fourth line: 252 [0083] First upper surface: 271 [0084] First lower surface: 272 [0085] First solder mask: 281 [0086] Second solder mask: 282 099107968 Form number Α 0101 Page 15 / Total 36 page 0992014297-0

Claims (1)

201134322 七 中清專利範圍: ·—種電路板製作方法’包括步驟: 表面與 提供第一銅猪層,所述第—鋼箱層具有相對之第 第二表面; 乐 於第一表面形成第一支撐層; 於所述第二表面上藉由電链形成第一線路; 於所述第二表面上形成介皙 層接觸; …所述第-線路與所述介質 去除第一表面之第一支擇層; 從第-表面關所述第—鋼箱層以形成與第 位置相對應之第二線路,從而使得第一線第路=佈 互重疊以共同構成第一線路圖形。 帛一線路相 2 ·如申請專利範圍第1項所述之電路板製作方法,其中,於 :第二Γ藉由電鑛形成第—線路包括如下步驟 H表面形成光致抗侧,藉由影像轉移 工藝去除與P線路分佈位置相對應之光致抗_,以暴 露出與第-線路之分佈位置相對應之第一銅箱層;’、 於暴露出之第一銅落層上進行電鍍,以形成第一線路。 .如申4專利範園第2項所述之電路板製作方法,其中,於 幵y成第線路之後去除剩餘之光致抗敍齊J。 .如申明專利範園第1項所述之電路板製作方法,其中,於 形成第一線路圖形之後,於第-線路圖形上形成第-防谭 層以覆蓋與保護第—線路圖形。 如申請專利範圍第i項所述之電路板製作方法,其尹,於 使第-鋼落層形成與第一線路相對應之第二線路之前,還 099107968 表單編號A〇H)j 第丨6頁/共36頁 0992014297-0 201134322 進一步包括於第一銅箔層之第一表面上電鍵銅層,以增加 第一銅箔層之厚度之步驟。 6 .如申請專利範圍第1項所述之電路板製作方法,其中,所 述第一銅箔層之厚度為30微米至180微米。 7 . —種電路板製作方法,包括步驟: 提供第一銅箔層與第二銅箔層,所述第一銅箔層具有相對 之第一表面與第二表面,所述第二銅箔層具有相對之第三 表面與第四表面; , 於第一表面形成第一支撐層,於第三表面形成第二支撐層 〇 ; 於所述第二表面上藉由電鍍形成第一線路,於所述第四表 面上藉由電鍍形成第三線路; 使得所述第一銅箔層之第二表面與第二銅箔層之第四表面 相對,並於第一銅箔層之第二表面與第二銅箔層之第四表 面之間形成介質層,所述第一線路與第三線路均與所述介 質層接觸; 去除第一表面之第一支撐層與第四表面之第二支撐層; 〇 從第一表面蝕刻所述第一銅箔層以形成與第一線路之分佈 位置相對應之第二線路,從而使得第一線路與第二線路相 互重疊以共同構成第一線路圖形,從第三表面蝕刻所述第 二銅箔層以形成與第三線路相對應之第四線路,所述第三 線路與第四線路共同構成第二線路圖形。 8.如申請專利範圍第7項所述之電路板製作方法,其中,於 所述第一銅猪層之第二表面上電鍍形成第一線路與於所述 第二銅箔層之第四表面上電鍍形成第三線路包括如下步驟 099107968 表單編號A0101 第17頁/共36頁 0992014297-0 201134322 於第一銅箔層之第二表面形成光致抗蝕劑,藉由影像轉移 工藝去除與第一線路分佈位置相對應之光致抗蝕劑,以暴 露出與第一線路之分佈位置相對應之第一銅箔層,於第二 銅箔層之第四表面形成光致抗蝕劑,藉由影像轉移工藝去 除與第三線路分佈位置相對應之光致抗蝕劑,以暴露出與 第三線路之分佈位置相對應之第二銅箔層; 於暴露出之第一銅箔層上進行電鍍,以形成第一線路,於 暴露出之第二銅箔層上進行電鍍,以形成第三線路。 9 .如申請專利範圍第7項所述之電路板製作方法,其中,於 形成第一線路圖形與第二線路圖形之後,於第一線路圖形 上形成第一防焊層以覆蓋與保護第一線路圖形,於第二線 路圖形上形成第二防焊層以覆蓋與保護第二線路圖形。 10 .如申請專利範圍第7項所述之電路板製作方法,其中,於 去除第一支撐層與第二支撐層之後,於形成第二線路與第 四線路之前,還包括於第一銅箔層之第一表面與第二銅箔 層之第三表面上電鍍銅層,以增加第一銅箔層之厚度與第 二銅箱層之厚度之步驟。 099107968 表單編號A0101 第18頁/共36頁 0992014297-0201134322 The scope of the Qizhongqing patent: · a method of manufacturing a circuit board' includes the steps of: providing a first copper pig layer on the surface, the first steel box layer having a second surface opposite; forming a first surface on the first surface a support layer; forming a first line on the second surface by an electrical chain; forming a dielectric layer contact on the second surface; ... the first line and the medium removing the first surface of the first surface Selecting the first steel box layer from the first surface to form a second line corresponding to the first position such that the first line roads are overlapped to form a first line pattern. The method of manufacturing a circuit board according to the first aspect of the invention, wherein: the second step of forming the first line by the electric ore comprises the step of forming a photo-resistance side by the following step H, by using the image The transfer process removes the photoinduced resistance _ corresponding to the distribution position of the P line to expose the first copper box layer corresponding to the distribution position of the first line; ', plating on the exposed first copper falling layer, To form the first line. The method for manufacturing a circuit board according to claim 2, wherein the remaining light is removed after the first line is removed. The method of fabricating a circuit board according to claim 1, wherein after forming the first line pattern, a first anti-tamping layer is formed on the first line pattern to cover and protect the first line pattern. For example, in the method for fabricating a circuit board according to item i of the patent application, Yin, before the formation of the second steel line corresponding to the first line, is also 099107968 Form No. A〇H)j 丨6 Page / 36 pages 0992014297-0 201134322 further comprising the step of electrically bonding a copper layer on the first surface of the first copper foil layer to increase the thickness of the first copper foil layer. 6. The method of fabricating a circuit board according to claim 1, wherein the first copper foil layer has a thickness of from 30 micrometers to 180 micrometers. 7. A method of fabricating a circuit board, comprising the steps of: providing a first copper foil layer and a second copper foil layer, the first copper foil layer having opposite first and second surfaces, the second copper foil layer Having a third surface and a fourth surface; forming a first support layer on the first surface and a second support layer on the third surface; forming a first line on the second surface by electroplating Forming a third line on the fourth surface by electroplating; causing the second surface of the first copper foil layer to face the fourth surface of the second copper foil layer, and on the second surface of the first copper foil layer Forming a dielectric layer between the fourth surface of the second copper foil layer, the first line and the third line are both in contact with the dielectric layer; removing the first support layer of the first surface and the second support layer of the fourth surface; Etching the first copper foil layer from the first surface to form a second line corresponding to the distribution position of the first line, such that the first line and the second line overlap each other to collectively constitute the first line pattern, from Three surface etching of the second copper foil layer The third line is formed corresponding to the fourth line, the third line and the fourth line together constitute the second line pattern. 8. The method of fabricating a circuit board according to claim 7, wherein the first surface of the first copper layer is plated to form a first line and the fourth surface of the second copper layer Forming the third line on the upper plating includes the following steps: 099107968 Form No. A0101 Page 17 / Total 36 Page 0992014297-0 201134322 Forming a photoresist on the second surface of the first copper foil layer, and removing the first by the image transfer process a photoresist corresponding to the line distribution position to expose a first copper foil layer corresponding to the distribution position of the first line, and a photoresist on the fourth surface of the second copper foil layer, by using a photoresist The image transfer process removes the photoresist corresponding to the distribution position of the third line to expose the second copper foil layer corresponding to the distribution position of the third line; and electroplating on the exposed first copper foil layer To form a first line, electroplating is performed on the exposed second copper foil layer to form a third line. 9. The method of fabricating a circuit board according to claim 7, wherein after forming the first line pattern and the second line pattern, forming a first solder resist layer on the first line pattern to cover and protect the first The circuit pattern forms a second solder mask on the second line pattern to cover and protect the second line pattern. 10. The method of fabricating a circuit board according to claim 7, wherein after removing the first support layer and the second support layer, before forming the second line and the fourth line, further comprising the first copper foil And plating a copper layer on the first surface of the layer and the third surface of the second copper foil layer to increase the thickness of the first copper foil layer and the thickness of the second copper box layer. 099107968 Form No. A0101 Page 18 of 36 0992014297-0
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TWI640234B (en) * 2016-10-06 2018-11-01 大陸商鵬鼎控股(深圳)股份有限公司 Circuit board with coppercircuit and method for manufacturing same

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TW556453B (en) * 2002-02-01 2003-10-01 Shiue-Fang Wu PCB with inlaid outerlayer circuits and production methods thereof
JP4713131B2 (en) * 2004-11-19 2011-06-29 株式会社マルチ Printed wiring board and method for manufacturing the printed wiring board

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI640234B (en) * 2016-10-06 2018-11-01 大陸商鵬鼎控股(深圳)股份有限公司 Circuit board with coppercircuit and method for manufacturing same
US11160166B2 (en) 2016-10-06 2021-10-26 Avary Holding (Shenzhen) Co., Limited. Printed circuit board with high-capacity copper circuit

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