201126528 六、發明說明： 【發明所屬之技術領域】 本發明係關於一種可擴充樣本記憶體之記憶體測試設 備’尤指一種適用於測試揮發性或非揮發性記憶體之半導 體測試設備。 【先前技術】 由於目前電子多媒體產品日趨普及，對於儲存媒體的 需求日益增加。此外，也隨著技術不斷的發展，儲存媒體 的容量成倍數增加，例如Flash/FlashCard/EEPR〇M/XR〇M 等非揮發性記憶體從早期256MB、512MB、1GB ，到現 在的8GB、16GB、32GB等不斷大容量不斷的被開發出來❶ 然而，以現有記憶體的測試設備而言，在面對更大容量的 測試規格時，往往捉襟見肘不敷使用，僅能不斷擴充設備 或組件，耗費大量成本。 詳言之’請參閲圖1 ’圖1係習知記憶體測試設備之系 統架構示意圖。習知記憶體測試設備主要包括一自測控制 器9、一樣式記憶體Memory Board,簡稱PM Board)、以及複數測試裝置（圖中未示）β其中，每一測試裝 置電性連接有一記憶體92 ’而樣式記憶體板91則儲存有欲 進行測試的資料。進行測試時，自測控制器9控制將樣式記 憶體板91内的資料’寫入/燒錄至測試裝置内的記憶體92。 接著’自測控制器9再逐一比對記憶體92、與樣式記憶體板 91内的資料是否—致。 201126528 然而’現有技術中，記憶體測試設備的樣式記憶體板 91的容量是固定的。當欲進行測試記憶體的容量大於樣式 記憶體板91的容量時，除非升級測試設備的規格，否則將 無法進行測試。據此，依據現今記憶體測試設備的現有技 術而言’一但面臨待測記憶體容量大於測試設備的規格 時’只有靠不斷的擴充設備規格，別無他法。然而，擴充 或升級測試設備的規格，需延滯整個產線，費時費工影響 產此’又需耗費驚人的升級成本。 【發明内容】 本發明為一種可擴充樣本記憶體之記憶體測試設備， 包括：複數測試座、一控制模組、及一主控制器。其中， 複數測試座（DUT，Device Under Test)容設有複數待測記憶 體。而控制模組電性耦接有一樣本記憶體。另外，主控制 器分別電性連接至複.數測試座、及控制模組。其中，主控 制器控制該控制模組儲存一樣本資料至樣本記憶體，且主 控制器控制該控制模組讀取樣本記憶體之樣本資料並將之 存入複數待測s己憶體内為待測資料。又，主控制器控制該 控制模組讀取樣本記憶體内儲存之樣本資料並逐一比 數待測記憶體内儲存之待測資料。因此’本發明藉由控制 模組、及樣本記憶體之設置，可視實際需求擴充測試規二、 及樣本記憶體容量，並可透過控制模組之控制存取，任意 變更欲進行測試比對之樣本資料。 201126528 其中，本發明之樣本記憶體的健存容量可大於等於複 數待測記憶體之儲存m此，方可提供完整之測試資 料’而取得更準確的顧結果1佳的是，樣本記憶體與 複數待測記憶體具有相同規格，主要係因❹與待測記憶 體之儲存容量、顆粒規格、運作時脈、及資料頻寬等相同 規格的樣本記憶體，將可獲得更準確的檢測結果。而樣本 S己憶體可為廠商提供.之已燒錄有特定内容的樣本記憶體、 抑或是較待測記憶體儲存容量大的非揮發性記憶體（如 Flash/EEPROM等）、或揮發性記憶體（如SRam/dram等）。 再者，本發明可更包括有一測試介面裝置（Hi Fix)，.其 係包括有複數測試座、及控制模組。亦即，測試介面裝置 不僅設置有複數測試座，而測試介面裝置内部可容置控制 模組及、樣本記憶體。據此，藉由控制模組、及樣本記憶 體容置於測試介面裝置内，以方便進行變更或擴充。此外， 本發明可更包括有一測試頭（Test Head)，其係電性連接測 試介面裝置、及主控制器。其中，本發明測試頭主要用以 提供控制訊號、及電源供給之電性連接。 另外’本發明之主控制器可控制控制模組讀取樣本記 憶體内儲存之樣本資料並逐一比對複數待測記憶體内儲存 之待測資料，比對不符合時，便輸出對應之警示訊號。當 然’右比對結果為符合的情況下’亦可輸出一正常訊號。 而警示訊號可以是一聲光電之警示訊號，也可以是一比對 結果旗標，如PASS/FAIL。此外，本發明可更包括有一分 料裝置（Handler)，其係電性連接主控制器。分料裝置係用 201126528 以取放複數待測記憶體於複數賴蘭，亦即用以提供取 放、進料、及測試後之分料等。 再且本發明之控制模組可包括有一複雜可程式邏輯 裝置（Complex programmable L〇gic ，縮寫：cpLD)、 元件可程式邏輯開陣列（Field Pr(5grammable201126528 VI. Description of the Invention: [Technical Field] The present invention relates to a memory test device that can expand a sample memory, particularly a semiconductor test device suitable for testing volatile or non-volatile memory. [Prior Art] Due to the increasing popularity of electronic multimedia products, the demand for storage media is increasing. In addition, with the continuous development of technology, the capacity of storage media has increased exponentially. For example, non-volatile memory such as Flash/FlashCard/EEPR〇M/XR〇M has been 256MB, 512MB, 1GB from the early stage, and now 8GB, 16GB. 32GB and other constant large-capacity products have been continuously developed. However, in the case of existing memory test equipment, in the face of larger-capacity test specifications, it is often difficult to use, and only equipment or components can be continuously expanded. A lot of cost. In detail, please refer to FIG. 1 'FIG. 1 is a schematic diagram of a system architecture of a conventional memory test device. The conventional memory testing device mainly includes a self-test controller 9, a memory card (PM Board), and a plurality of test devices (not shown) β, wherein each test device is electrically connected to a memory. 92' and the style memory board 91 stores the data to be tested. When the test is performed, the self-test controller 9 controls the writing/burning of the material in the style memory board 91 to the memory 92 in the test apparatus. Then, the self-test controller 9 compares the data in the memory 92 and the pattern memory board 91 one by one. 201126528 However, in the prior art, the capacity of the pattern memory board 91 of the memory test device is fixed. When the capacity of the test memory is larger than the capacity of the style memory board 91, the test cannot be performed unless the specifications of the test equipment are upgraded. Accordingly, according to the prior art of today's memory test equipment, once the capacity of the memory to be tested is larger than the specifications of the test equipment, there is no alternative to continuously expanding the equipment specifications. However, expanding or upgrading the specifications of the test equipment requires delaying the entire production line, which can be costly and labor intensive. SUMMARY OF THE INVENTION The present invention is a memory test device capable of expanding a sample memory, comprising: a plurality of test sockets, a control module, and a main controller. Among them, the DUT (Device Under Test) has a plurality of memory to be tested. The control module is electrically coupled to a sample memory. In addition, the main controller is electrically connected to the complex test socket and the control module respectively. Wherein, the main controller controls the control module to store the same data to the sample memory, and the main controller controls the control module to read the sample data of the sample memory and deposits the sample data into the plurality of samples to be tested. Data to be tested. Moreover, the main controller controls the control module to read the sample data stored in the sample memory and compare the data to be tested stored in the memory to be measured one by one. Therefore, the present invention expands the test gauge 2 and the sample memory capacity according to actual needs by the control module and the setting of the sample memory, and can be arbitrarily changed through the control module to control the comparison. Sample data. 201126528 wherein the sample memory of the present invention has a storage capacity greater than or equal to the storage of the plurality of memory to be tested, so that the complete test data can be provided to obtain a more accurate result. 1 The sample memory and the sample memory are The plurality of memory to be tested have the same specifications, mainly because the sample memory of the same specification, such as the storage capacity, particle size, operation clock, and data bandwidth of the memory to be tested, can obtain more accurate detection results. The sample S memory can be provided by the manufacturer. The sample memory that has been burned with specific content, or the non-volatile memory (such as Flash/EEPROM) that has a larger storage capacity than the memory to be tested, or the volatile Memory (such as SRam/dram, etc.). Furthermore, the present invention may further include a test interface device (Hi Fix), which includes a plurality of test sockets, and a control module. That is, the test interface device is not only provided with a plurality of test sockets, but the test interface device can accommodate the control module and the sample memory. Accordingly, the control module and the sample memory are placed in the test interface device to facilitate the change or expansion. Furthermore, the present invention may further include a test head electrically connected to the test interface device and the main controller. The test head of the present invention is mainly used for providing electrical connection between the control signal and the power supply. In addition, the main controller of the present invention can control the control module to read the sample data stored in the sample memory and compare the data to be tested stored in the plurality of memory to be tested one by one, and output a corresponding warning when the comparison does not match. Signal. Of course, a normal signal can also be output if the result of the right alignment is met. The warning signal can be a photoelectric warning signal or a comparison result flag such as PASS/FAIL. Furthermore, the present invention may further include a Handler that is electrically connected to the main controller. The dispensing device uses 201126528 to pick up and store the plurality of memory to be tested in the complex Rylan, which is used to provide the materials for picking, feeding, and testing. Furthermore, the control module of the present invention may comprise a complex programmable logic device (Complex programmable L〇gic, abbreviated as: cpLD), and a component programmable logic open array (Field Pr (5grammable)
Gate Array，縮 寫：FPGA)、或其他等效裝置。據此，本發明之控制模組 可視實際需求，彈性設定或變更測試規格。其中，控制模 組主要用以執行樣本記憶體與主控制器間協調運作、及控 制存取等工作。 較佳的是，本發明可更包括有一中央伺服器，其係透 過一網路與主控制器電性連接。其中，樣本資料係由中央 伺服器透過網路提供給樣本記憶體。據此，可透過近端網 路、或網際網路直接下載儲存樣本資料，無須因為不同測 試規格而替換樣本記憶體，或移除樣本記憶體至另外機器 進行燒錄不同資料等多餘程序，可大幅減少人力及時間成 本。 本發明另一態樣為一種可擴充樣本記憶體之記憶體測 4設備，包括：複數測試座、一控制模組、及一主控制器。 其中複數測試座其容設有複數待測記憶體。而控制模組電 性耦接有一可替換式記憶體。可替換式記憶體儲存有一樣 本資料。且主控制器分別電性連接至複數測試座、及控制 模組。其中，主控制器控制控制模組讀取可替換式記憶體 之樣本資料並將之存入複數待測記憶體内為待測資料。 又，主控制器控制控制模組讀取可替換式記憶體内儲存之 201126528 樣本資料並逐一比對複數待測記憶體内儲存之待測資料。 據此，本發明藉由控制模組、及可替換式記憶體之設置， 可視實際測試規格之需求，而直接替換或採用提供樣本資 料之可替換式記憶體.，而達到可彈性變更或設定、及擴充 之功效。 較佳的是，本發明之可替換式記憶體較佳為可直接插 拔替換，其於變更測試規格時，方便直接進行替換。此外， 本發明之可替換式記憶體之儲存容量可以是等於或大於複 數待測記憶體之儲存容量，當然與複數待測記憶體具有相 同規格為佳。其中，可替換式記憶體可為廠商提供之已燒 錄有特定内容的樣本記憶體。 【實施方式】 請同時參閱圖2，圖2係本發明一較佳實施例記憶體測 試設備之立體圖。如圖2中所示之記憶體測試設備，其中測 試頭7(Test Head)上電性連接有一測試介面裝置卜測試頭7 主要用以提供控制訊號、及電源供給之電性連接。而測試 介面裝置1上又設置有複數測試座2(DUT，Device Under Test) ’其用以容設有複數待測記憶體3，以進行測試。此外， 於測试介面裝置1上方有設置有一分料裝置8(Hancjier)，其 係用以取放複數待測記憶體3於複數測試座2内，亦即負責 待測記憶體3之取放、進料、及測試後之分料等任務。 再請一併參閱圖3、及圖4，圖3係本發明可擴充樣本記 憶體之記憶體測試設備一較佳實施例測試介面裝置之立體 201126528 圖，圖4係本發明一較佳實施例之系統架構圖。圖中於測試 介面裝置1内另顯示有一控制模組4,其電性耦接有一樣本 記憶體5。在本實施例中，控制模組4為一複雜可程式邏輯 裝置（CPLD，Complex Programmable Logic Device)，其亦可 為元件可程式邏輯閘陣列（FPGA，Field Programmable Gate Array)、或其他等效裝置。 再者，本實施例之控制模組4採用複雜可程式邏輯裝置 主要係因不論其軟體、硬體、或韌體皆可輕易進行變更或 設定，具彈性、可擴充等優點。其中，控制模組4主要用以 執行樣本記憶體5與主控制器6間協調運作、控制存取等工 作而樣本a己憶體5之健存容量大於或等於複數待測記憶體 3之儲存容量。據此，才可提供完整之測試資料，而取得更 準確的測試結果。 其中’樣本記憶體5與複數待測記憶體3具有相同規 格，例如待測記憶體3之儲存容量、顆粒規格、運作時脈、 及資料頻寬等規格皆與樣本記憶體5相同，如此將可獲得更 準確的檢測結果。其中，樣本記憶體5可為廠商提供之以燒 錄有特定内容的記憶體、抑或是較待測記憶體3儲存容量大 的非揮發性記憶體（如Flash/EEPROM等）、或揮發性記憶體 (如 SRAM/DRAM)。 另外圖中顯示有一主控制器ό，分別電性連接至複數 測s式座2、分料裝置8、及控制模組4。其中，主控制器^控 ，該控制模組4儲存一樣本資料51至樣本記憶體5内❶接 者，主控制器6控制控制模組4讀取樣本記憶體5之樣本資料 201126528 51並將之存入複數待測記憶體3内為待測資料31。最後，主 控制器6控制該控制模組4讀取樣本記憶體5内儲存之樣本 資料51並逐一比對複數待測記憶準3内儲存之待測資料 3 1。當比對符合或不符合時，皆輸出對應之警示訊號。本 實施例之警示訊號為.比對結果旗標，如pass/Fail等比對驗證 結果，並將之儲存。當然，警示訊號也可以是一聲光電之 警示訊號。 此外，圖中又顯示有一申央伺服器1〇，其係透過一網 路I與主控制器6電性連接。本實施例之樣本資料51可由中 央伺服器10透過網路I以提供給樣本記憶體5。據此本實 施例可透過近端網路、或網際網路直接下載儲存樣本資料 51，無須因為不同測試規格而替換樣本記憶體5，或移除樣 本記憶體5至另外機器進行燒錄不同資料等多餘程序，可大 幅減少人力、及時間成本。 再且，本發明可擴充樣本記憶體之記憶體測試設備另 一實施例同樣包括有複數測試座2、控制模組4、及主控制 器6等。其中，複數測試座2容設有複數待測記憶體3 ;而控 制模組4電性耦接有一可替換式記憶體5〇，其係儲存有一樣 本資料51。本實施例中，可替換式記憶體5〇為可直接插拔 替換，其於變更測試規格時，方便直接進行替換。此外， 本實施例之可替換式記憶體5〇之儲存容量可以是等於複數 待測記憶體3之儲存容量，其令又與複數待測記憶體3具有 相同規格’且為待㈣商提供之已燒錄有特定内容的樣本 資料51之記憶體為佳。 201126528 至於，主控制器6則同樣分別電性連接至複數測試座 2、及控制模組4。其中，主控制器6控制該控制模組4讀取 可替換式記憶體5 0之樣本資料51並將之存入複數待測記憶 體3内為待測資料31。接著，主控制器6控制控制模組4讀取 了替換式s己憶體50内儲存之樣本資料51並逐一比對複數待 測記憶體3内儲存之待測資料31。最後’比對結果如同前述 實施例，同樣輸出比對結果旗標，如卩抑^以丨丨等，並將之儲 存。據此，本實施例藉由控制模組4、及可替換式記憶體5〇 之設置，可視實際測試規格之需求，而直接替換或採用提 供樣本資料51之可替換式記憶體50,而達到可彈性變更或 設定、擴充、及節省成本之功效。 上述實施例僅係為了方便說明而舉例而已，本發明所 主張之權利範@自應以中請專利範圍所述為準， 於上述實施例。 【圖式簡單說明】 圖1係習知記憶體測試設備之系統架構示意圖。 圖2係本發明一較佳實施例記憶體測試設備之立體圖 圖3係本發明一較佳實施例測試介面裝置之立體圖。 圖4係本發明一較佳實施例之系統架構圖。 【主要元件符號說明】 2測試座 4 控制模組 1測試介面裝置10中央伺服器 3待測記憶體 31待測資料 201126528 5樣本記憶體 6主控制器 9自測控制器 I 網路 50可替換式記憶體 51樣本資料 7 測試頭 8 分料裝置 91樣式記憶體板 92記憶體Gate Array, abbreviation: FPGA), or other equivalent device. Accordingly, the control module of the present invention flexibly sets or changes the test specifications according to actual needs. Among them, the control module is mainly used to perform coordinated operation between the sample memory and the main controller, and control access. Preferably, the present invention further includes a central server electrically coupled to the host controller via a network. The sample data is provided by the central server to the sample memory through the network. According to this, the sample data can be directly downloaded through the near-end network or the Internet, without replacing the sample memory due to different test specifications, or removing the sample memory to another machine for burning unnecessary programs and the like. Significantly reduce manpower and time costs. Another aspect of the present invention is a memory test device capable of expanding a sample memory, comprising: a plurality of test sockets, a control module, and a main controller. The plurality of test sockets are provided with a plurality of memory to be tested. The control module is electrically coupled to a replaceable memory. The replacement memory stores the same information. The main controller is electrically connected to the plurality of test sockets and the control module. The main controller control module reads the sample data of the replaceable memory and stores it in the plurality of memory to be tested as the data to be tested. In addition, the main controller control module reads the 201126528 sample data stored in the replaceable memory and compares the data to be tested stored in the plurality of memory to be tested one by one. Accordingly, the present invention can be flexibly changed or set by directly replacing or using a replaceable memory providing sample data by the setting of the control module and the replaceable memory, depending on the requirements of the actual test specifications. And the effect of expansion. Preferably, the replaceable memory of the present invention is preferably directly pluggable and replaceable, which is convenient for direct replacement when the test specifications are changed. In addition, the storage capacity of the replaceable memory of the present invention may be equal to or greater than the storage capacity of the plurality of memory to be tested, and of course it is preferably the same size as the plurality of memory to be tested. Among them, the replaceable memory can be a sample memory provided by the manufacturer that has been burned with specific content. [Embodiment] Please refer to FIG. 2 at the same time. FIG. 2 is a perspective view of a memory testing device according to a preferred embodiment of the present invention. The memory test device shown in FIG. 2, wherein the test head 7 is electrically connected to a test interface device. The test head 7 is mainly used for providing electrical connection between the control signal and the power supply. The test interface device 1 is further provided with a DUT (Device Under Test) for accommodating a plurality of memory 3 to be tested for testing. In addition, a loading device 8 (Hancjier) is disposed above the test interface device 1 for picking up and dropping a plurality of memory 4 to be tested in the plurality of test sockets 2, that is, responsible for picking up and dropping the memory 3 to be tested. Tasks such as feeding, and testing after the test. Please refer to FIG. 3 and FIG. 4 together. FIG. 3 is a perspective view of a memory device for expanding the sample memory of the present invention. FIG. 4 is a perspective view of a test interface device. FIG. 4 is a preferred embodiment of the present invention. System architecture diagram. A control module 4 is additionally shown in the test interface device 1 and electrically coupled to a sample memory 5. In this embodiment, the control module 4 is a Complex Programmable Logic Device (CPLD), which may also be a Field Programmable Gate Array (FPGA), or other equivalent device. . Furthermore, the control module 4 of the present embodiment adopts a complex programmable logic device mainly because it can be easily changed or set regardless of its software, hardware, or firmware, and has the advantages of flexibility and expandability. The control module 4 is mainly used to perform the coordinated operation, control access, and the like between the sample memory 5 and the main controller 6, and the storage capacity of the sample a memory 5 is greater than or equal to the storage of the plurality of memory 3 to be tested. capacity. Based on this, complete test data can be provided to obtain more accurate test results. The sample memory 5 and the plurality of memory 3 to be tested have the same specifications. For example, the storage capacity, particle size, operating clock, and data bandwidth of the memory 3 to be tested are the same as those of the sample memory 5, and thus More accurate test results are available. The sample memory 5 can be a memory provided by the manufacturer to burn specific content, or a non-volatile memory (such as Flash/EEPROM) having a larger storage capacity than the memory 3 to be tested, or a volatile memory. Body (such as SRAM / DRAM). In addition, a main controller 显示 is shown in the figure, which is electrically connected to the plurality of squatters 2, the dispensing device 8, and the control module 4. Wherein, the main controller controls, the control module 4 stores the same data 51 to the sample memory 5, and the main controller 6 controls the control module 4 to read the sample data 201126528 51 of the sample memory 5 and The data to be tested 31 is stored in the plurality of memory 3 to be tested. Finally, the main controller 6 controls the control module 4 to read the sample data 51 stored in the sample memory 5 and compare the data to be tested stored in the plurality of memory modules 3 to be tested one by one. When the comparison meets or does not match, the corresponding warning signal is output. The warning signal of this embodiment is a comparison result flag, such as pass/Fail, etc., and the verification result is stored. Of course, the warning signal can also be a warning signal of photoelectricity. In addition, the figure further shows a server 1 , which is electrically connected to the main controller 6 through a network I. The sample material 51 of this embodiment can be supplied to the sample memory 5 via the network I via the central server 10. According to this embodiment, the sample data 51 can be directly downloaded through the near-end network or the Internet, without replacing the sample memory 5 due to different test specifications, or removing the sample memory 5 to another machine for burning different data. Such redundant procedures can significantly reduce manpower and time costs. Furthermore, another embodiment of the memory test device capable of expanding the sample memory of the present invention also includes a plurality of test sockets 2, a control module 4, a main controller 6, and the like. The plurality of test sockets 2 are provided with a plurality of memory modules 3 to be tested, and the control module 4 is electrically coupled to a replaceable memory device 5, which stores the same information 51. In this embodiment, the replaceable memory 5 is directly replaceable and replaceable, and it is convenient to directly replace when testing the test specifications. In addition, the storage capacity of the replaceable memory 5 in this embodiment may be equal to the storage capacity of the plurality of memory 3 to be tested, which has the same specifications as the plurality of memory 3 to be tested, and is provided by the (four) vendor. The memory of the sample data 51 having the specific content has been burned. 201126528 As for the main controller 6, it is also electrically connected to the plurality of test sockets 2 and the control module 4 respectively. The main controller 6 controls the control module 4 to read the sample data 51 of the replaceable memory 50 and store it in the plurality of test memory 3 as the data to be tested 31. Then, the main controller 6 controls the control module 4 to read the sample data 51 stored in the alternative memory 50 and compares the data 31 to be tested stored in the plurality of test memories 3 one by one. The final 'alignment result is the same as the previous embodiment, and the comparison result flag is also output, such as 卩 ^ 丨丨 , , , , , , , , , , 。 。 。 。 。 。. Accordingly, the present embodiment can be directly replaced or replaced with the replaceable memory 50 that provides the sample data 51 by the setting of the control module 4 and the replaceable memory 5〇, according to the requirements of the actual test specifications. Flexible change or set, expansion, and cost savings. The above-described embodiments are merely examples for the convenience of the description, and the claims of the present invention are based on the above-mentioned embodiments. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic diagram of a system architecture of a conventional memory test device. 2 is a perspective view of a memory testing device in accordance with a preferred embodiment of the present invention. FIG. 3 is a perspective view of a test interface device in accordance with a preferred embodiment of the present invention. 4 is a system architecture diagram of a preferred embodiment of the present invention. [Main component symbol description] 2 test socket 4 control module 1 test interface device 10 central server 3 memory to be tested 31 data to be tested 201126528 5 sample memory 6 main controller 9 self-test controller I network 50 can be replaced Memory 51 sample data 7 test head 8 dispensing device 91 style memory board 92 memory
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