TW201125139A - Solar cell crystallized using microcrystalline semiconductor layer and method for fabricating the same - Google Patents

Solar cell crystallized using microcrystalline semiconductor layer and method for fabricating the same Download PDF

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TW201125139A
TW201125139A TW99139491A TW99139491A TW201125139A TW 201125139 A TW201125139 A TW 201125139A TW 99139491 A TW99139491 A TW 99139491A TW 99139491 A TW99139491 A TW 99139491A TW 201125139 A TW201125139 A TW 201125139A
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semiconductor layer
layer
solar cell
amorphous
microcrystalline
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TW99139491A
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Chinese (zh)
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Si-Woo Lee
Yoo-Jin Lee
Dong-Jee Kim
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Tg Solar Corp
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Priority claimed from KR1020090113758A external-priority patent/KR101084650B1/en
Priority claimed from KR1020090116094A external-priority patent/KR101084652B1/en
Application filed by Tg Solar Corp filed Critical Tg Solar Corp
Publication of TW201125139A publication Critical patent/TW201125139A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/036—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes
    • H01L31/0368—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including polycrystalline semiconductors
    • H01L31/03682—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including polycrystalline semiconductors including only elements of Group IV of the Periodic Table
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/036—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/036—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes
    • H01L31/0368—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including polycrystalline semiconductors
    • H01L31/03682—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including polycrystalline semiconductors including only elements of Group IV of the Periodic Table
    • H01L31/03685—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including polycrystalline semiconductors including only elements of Group IV of the Periodic Table including microcrystalline silicon, uc-Si
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/075—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PIN type, e.g. amorphous silicon PIN solar cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/545—Microcrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
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    • Y02E10/546—Polycrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/548—Amorphous silicon PV cells

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Photovoltaic Devices (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

Disclosed are a crystallized solar cell which uses a microcrystalline semiconductor layer and a production method for said solar cell. The disclosed solar cell which uses a microcrystalline semiconductor layer is provided with: a substrate (100); a lower electrode (200) which is formed on the substrate (100); a photoelectric element (300) which comprises a polycrystalline semiconductor layer (320) which is formed on the lower electrode (200) and which has crystalline particles (30) extending in the same direction as the movement direction of the electrons or electron holes; and an upper electrode (500) which is formed on the photoelectric element (300).

Description

201125139 六、發明說明： 【發明所屬技冬好領域3 發明領域 本發明係有關於一種經使用微晶半導體層結晶化之太 陽能電池及其製造方法。更詳細言之，本發明係有關於一 種可使用微晶半導體，在低溫(例如600°C以下）將非晶半導 體層結晶化之多晶太陽能電池及其製造方法。 t Φΐίτ 發明背景 一般，使用非晶矽(a-Si)之太陽能電池因非晶矽物質本 身之特性，載子之擴散長度(diffusion length)遠低於單晶石夕 或多晶矽(p-si)。因此，當非晶矽太陽能電池以pn接合構造 製造時’以光所生成之電子-電洞對(electron-hole pairs)之收 集效率非常低，當長時間在光露出時，便出現惡化現象， 而有時間越長，光電轉換效率越降低之問題。 為解決此問題，已提出一種太陽能電池，其係使用不 添加雜質之本質（intrinsic)半導體層作為光吸收層，形成於 雜質摻雜濃度高之p型及η型間之非晶矽pin構造及藉將此 構造在高溫熱處理（例如600。(：以上）而結晶化成多晶矽之多 晶石夕pin構造。 在此pin構造中’於光吸收層之i層與雜質摻雜濃度高之 P層及η層的接合面形成空乏區，並於内部產生電場(eiectric field)。因此，在i層藉入射光所生成之電子-電洞對非擴散， 而是藉内部之電場’可形成電子㈠移動至η型矽層，電洞 201125139 移動至P型矽層之漂移電流。 Γ ^'明内 發明概要 發明欲解決之課題 然而’在習知多晶矽pin構造中，因非晶矽結晶化時， 要求熱處理溫度為600。(3以上之高溫，故在熱處理過程中， 有基板變形(例如基板之撓曲），雜質無謂地擴散至石夕層（特 別是光吸收層），而使光電轉換效率降低之問題。 為解決此問題，提出一種使用電漿化學氣相沉積法 (Plasma Enhanced Chemical Vapor Deposition : PECVD)，來 利用為非晶矽與多晶矽之交界物質之微晶矽（"c _ S i)的太 陽能電池。然而，使用PECVD，形成微晶矽時，要求低沉 積壓力及高沉積電力條件’而不易控制製裎條件，且微晶 矽之材料特性較多晶矽差等，在太陽能電池之生產性及光 電轉換效率之提高有限度。 是故’本發明之目的係為解決上述習知技術之諸問題 而發明者’其係提供可使用微晶半導體之特性，在低溫亦 可易將非晶半導體結晶化之太陽能電池及其製造方法。 又，本發明另一目的係提供可具有於與在光吸收層所 生成之電子及電洞之移動方向相同之方向上成長的晶粒邊 界之太陽能電池及其製造方法。 再者，本發明另一目的係提供藉有效率地抑制非晶半 導體層之結晶化，可提高光電轉換效率之太陽能電池及其 製造方法。 201125139 又’本發明又另一目的係提供可利用微晶半導體之特 性，在多重接合之光電元件中，僅將上部光電元件結晶化 之太1%能電池及其製造方法。 用以欲解決課題之手段 本發明之上述目的可以下述太陽能電池達成，前述太 陽能電池特徵在於包含有基板、形成於該基板上之下部電 極、形成於該下部電極上，並包含多晶半導體層之光電元 件’以及及形成於該光電元件上之上部電極，其中該多晶 半導體層具有於與電子或電洞之移動方向相同之方向上成 長的晶粒邊界。 又’本發明之上述目的亦可以下述太陽能電池達成’ 前述太陽能電池特徵在於包含有基板、形成於該基板上之 下部電極、形成於該下部電極上，並具有非晶半導體層之 下部光電元件、形成於該下部光電元件上，並包含多晶半 導體層之上部光電元件，以及形成於該上部光電元件上之 上部電極’其中該多晶半導體層具有於與電子或電洞之移 動方向相同之方向上成長的晶粒邊界、。 再者’本發明之上述目的亦可以下述太陽能電池之製 造方法達成，前述太陽能電池之製造方法特徵在於具有以 下步驟.（a)將微晶半導體層形成於已層疊之非晶半導體層 間，及(b)形成具有下述多晶半導體層之光電元件前述多 曰0半導體層係藉進行熱處理製程，將前述微晶半導體層及 刖述非晶切體層之至少—部份結晶化形成者。 在此，前述(a)步驟可具有以下步驟：（al)將第丨非晶半 201125139 導體層形成於基板上之下部電極上；（a2)將下部之第2非晶 半導體層形成於前述第1非晶半導體層上；（a3)將前述微晶 半導體層形成於前述下部之第2非晶半導體層上；（a4)將上 部之第2非晶半導體層形成於前述微晶半導體層上；及(a5) 將第3非晶半導體層形成於前述上部之第2非晶半導體層 上。 發明效果 根據本發明，可使用微晶矽，製造在低溫特性亦優異 之多晶石夕太陽能電池。 又，根據本發明，藉於與在光吸收層所生成之電子及 電洞之移動方向相同之方向形成晶粒邊界，使電子與電洞 之移動率提高，藉此，可使太陽能電池之光電轉換效率提 高。 再者，根據本發明，由於可以原位(in situ)方式依序形 成非晶矽及微晶矽，將此結晶化，故可使太陽能電池之可 靠度及生產性提高。 又，根據本發明，可利用用微晶矽，在多重接合之光 電元件中，僅將上部光電元件結晶化成在低溫特性仍優異 之多晶石夕。 圖式簡單說明 第1圖係顯示經使用本發明第1實施形態之微晶半導體 層結晶化之太陽能電池之製造過程的圖。 第2圖係顯示經使用本發明第1實施形態之微晶半導體 層結晶化之太陽能電池之製造過程的圖。 201125139 第3圖係顯示經使用本發明第1實施形態之微晶半導體 層結晶化之太陽能電池之製造過程的圖。 第4圖係顯示經使用本發明第1實施形態之微晶半導體 層結晶化之太陽能電池之製造過程的圖。 第5圖係顯示經使用本發明第1實施形態之微晶半導體 層結晶化之太陽能電池之製造過程的圖。 第6圖係顯示經使用本發明第2實施形態之微晶半導體 層結晶化之積層式太陽能電池之製造過程的圖。 第7圖係顯示經使用本發明第2實施形態之微晶半導體 層結晶化之積層式太陽能電池之製造過程的圖。 第8圖係顯示經使用本發明第2實施形態之微晶半導體 層結晶化之積層式太陽能電池之製造過程的圖。 第9圖係顯示經使用本發明第2實施形態之微晶半導體 層結晶化之積層式太陽能電池之製造過程的圖。 第10圖係顯示經使用本發明第2實施形態之微晶半導 體層結晶化之積層式太陽能電池之製造過程的圖。 I：實施方式3 用以實施發明之形態 以下，為更明確地理解關於本發明上述目的及技術性 結構、以及伴隨其之作用效果之詳細事項，參照與本發明 較佳實施形態相關之圖式來詳細說明。 在本說明書中，以最常使用作為半導體層之原材料之 矽（Si)為例來說明，本發明不限於此，可無限制地使用具有 半導體特性之眾所皆知之物質。 7 201125139 第1實施形態 在以下之詳細說明，為方便，以太陽能電池之基板1〇〇 之單位電池區域（在太陽能電池中進行光電轉換之區域）為 中心來說明。 第1圖~第5圖係顯示經使用本發明第1實施形態之微晶 半導體層結晶化之太陽能電池之製造過程的圖。 首先，如第1圖所示，可提供基板10〇。基板1〇〇之材質 可使用透明之玻璃基板，但未必限於此，根據太陽能電池 接收光之方向，諸如玻璃、塑膠之透明材質或諸如矽、金 屬（例如SUS(Stainless Steel))之不透明材質皆可使用。 其次’圖中未示’藉於基板1〇〇之表面進行粗化 (texturing)製程’可形成粗糙度。在本發明中，粗化係指用 以防止因入射至太陽能電池之基板表面之光反射，在光學 上損失’其特性因而降低之現象者。即，係使基板表面粗 糙者，係指於基板表面形成凹凸圖形。如此，當基板表面 藉粗化而變粗糙時，從表面反射一次之光再往太陽能電池 之方向反射，故可減低光之損失，光捕獲量增加，而可使 太陽能電池之光電轉換效率提高。 此時，粗化製程可使用喷砂法來進行，包含以壓縮空 氣噴射姓刻粒子來姓刻之乾喷砂、及將钱刻粒子與液體一 同喷射來蝕刻之濕喷砂。用於噴砂之蝕刻粒子係可無限制 地使用如砂、微小金屬般，可以物理性撞擊，於基板設凹 凸之粒子。當然亦可依需要，省略粗化製程。 然後，可將反射防止層（圖中未示）形成於基板100上。 201125139 反射防止層可發揮下述仙，前述作用係防止因藉由基板 100入射之太陽光不為矽層吸收而直接反射至外部，而使太 陽能電池之效率降低的現象。反射防止層之原材料可為透 明絕緣層之氧化矽物（si0x)、氮化矽*(siNX)，但未必限 於此。 反射防止層之形成方法可包含諸如低壓化學氣相沉積 法（Low Pressure Chemical Vapor Deposition : LPCVD)或電 t 化學氣相沉積法（Plasma Enhance(1 Chemical Vapor Deposition : PECVD)等之化學氣相沉積法(Chemical Vap〇r Deposition : CVD)。 然後，可將導電性材質之下部電極2〇〇形成於基板1〇〇 上。下部電極200之原材料可使用接觸電阻低，且具透明性 質之透明電極(Transparent Conductive Oxide ; TC0)。透明 電極(TCO)可為 AZO(ZnO : Al)、IT〇(IndiUm-Tin-〇Xide)、 GZO(ZnO : Ga)、BZO(ZnO : B)、及FT0(Sn02 : F)任一個。 下部電極200之形成方法可包含諸如熱蒸鍍法(Thermai Evaporation)、電子束蒸鍍法（E_beam Evap〇rati〇n)、濺鍍 (sputtering)之物理氣相;儿積法（physical Vapor Deposition : PVD)及諸如LPCVD、PECVD、金屬有機化學氣相沉積法 (Metal Organic Chemical Vapor Deposition: MOCVD)之化學 氣相沉積法(Chemical Vapor Deposition : CVD)。 接著，如第2圖所示，可將具有p型、丨型、政（特別是 p+型、i型、n+型）、η型、i型、p型（特別是n+型、丨型、p+ 型）、p型、η型、η型（特別是p+型、n_型、n+型）或n型、n 201125139 .父、 成於下部電極2。。上。在此— 相對之差，#雜濃度之 古^差/純摻雜浪度較'高。舉例言之，叫系指摻雜 门、n-。§無+或·之顯不時’係㈣輯度無特別之限制。 位於P型與η型間之i型砂層可發揮作為纽收層之功能。 P型（特別是n+型 在本實施形態中，將_石夕層31〇]型石夕層32〇'n型石夕 層330依序形成於下部電極⑽上。更詳細言之，將p型第上 非晶矽層3H)形成於下部電極上，接著，將i型第2非晶 石夕層320形成於第1非晶砍層31〇上，然後，將n型第3非晶石夕 層33〇形成於第2非晶石夕層32〇上，藉此，可構成^固光電元 件 300。 又，在本實施形態中，形成第2非晶矽層32〇之際，可 進一步將微晶矽層322形成於第2_ι非晶矽層321與第2 2非 晶矽層323間。更詳細言之，可將第2_丨非晶矽層321形成於 第1非晶矽層310上，接著，將微晶矽層322形成於第21非 晶矽層321上，然後，將第2-2非晶矽層323形成於微晶矽層 322上。由於此微晶矽可以之後之熱處理製程，在低於非晶 石夕之溫度結晶化，故微晶石夕層322可發揮誘發相鄰之非晶石夕 層321、323之結晶化之功能。另一方面，微晶矽層322不以 上述為限來配置，亦可形成於第1非晶矽層31〇與第2非晶矽 層320間或第2非晶矽層320與第3非晶矽層330間。 第1非晶矽層310、第2非晶矽層320(321、323)及第3非 晶矽層330以及微晶矽層322較佳可使用PECVD來形成。以 PECVD依序形成第2-1非晶矽層321、微晶矽層322及第2-2 10 201125139 非晶石夕層323之際，可調整源氣體SiH4(或Si2H6)與輔助氣體 H2之〉昆合比來形成。即，可使H2相對於SiH4(或Si2H6)之比 率減少出2亦可為〇)，來形成第2-1非晶矽層321及第2-2非晶 石夕層323 ’可使H2相對於SiH4(或Si2H6)之比率增加，來形成 微晶石夕層322。如此，由於在PECVD，控制調整源氣體及輔 助氣體之遇合比率形成之矽層之結晶化度的技術為眾所皆 知之方法，故在本說明省略詳細之說明。 另—方面’以PECVD形成第1非晶矽層310、第2非晶矽 層320、及第3非晶矽層330之際，宜利用在單一腔内，以單 一製程依序進行之原位方式。如此一來’由於之後構成光 電兀件300之第1非晶矽層310、第2非晶矽層320及第3非晶 石夕層330在不露出至外部環境下形成，故太陽能電池之可靠 度提兩’製造製程簡單，製造時間縮短，且太陽能電池之 生產性提高。 接著’如第3圖所示，以預定之溫度進行熱處理製程， 可將微晶矽層322結晶化成多晶矽層322P。此時，微晶矽可 視為具有非晶矽與多晶矽之中間程度之細微構造。因而， 微晶石夕可在低於非晶矽之溫度結晶化成多晶矽。舉例言 之’若將非晶矽結晶化之溫度為6001：以上時，微晶矽在600 °C以下之低溫（例如550〇c)亦可結晶化成多晶矽。然後，由 於微晶石夕可發揮作為非晶矽之結晶化所需之晶種（seed)的 作用’故以第2-1非晶矽層321及第2-2非晶矽層323與微晶矽 層322之交界面為中心，第2-1非晶矽層321及第2_2非晶矽層 323也依序進展結晶化，而可形成為第2-1多晶矽層321P及201125139 VI. Description of the Invention: [Technical Field of the Invention] The present invention relates to a solar cell crystallization by using a microcrystalline semiconductor layer and a method of manufacturing the same. More specifically, the present invention relates to a polycrystalline solar cell which can crystallize an amorphous semiconductor layer at a low temperature (e.g., 600 ° C or lower) using a microcrystalline semiconductor, and a method of manufacturing the same. BACKGROUND OF THE INVENTION In general, a solar cell using amorphous germanium (a-Si) has a diffusion length of a carrier which is much lower than that of a single crystal or polycrystalline germanium (p-si) due to the characteristics of the amorphous germanium material itself. . Therefore, when an amorphous germanium solar cell is fabricated in a pn junction structure, the collection efficiency of electron-hole pairs generated by light is very low, and deterioration occurs when light is exposed for a long time. The longer the time, the lower the photoelectric conversion efficiency. In order to solve this problem, a solar cell has been proposed which uses an intrinsic semiconductor layer which does not contain impurities as a light absorbing layer, and is formed in a p-type and n-type amorphous 矽pin structure having a high impurity doping concentration and By constructing this structure in a high-temperature heat treatment (for example, 600: (above) and crystallizing into polycrystalline germanium, a polycrystalline spine pin structure. In this pin structure, the i layer of the light absorbing layer and the P layer having a high impurity doping concentration and The joint surface of the η layer forms a depletion region and generates an eiectric field inside. Therefore, the electron-hole pair generated by the incident light in the i layer is non-diffused, but the internal electric field is used to form an electron (1) movement. To the η-type 矽 layer, the hole 201125139 moves to the drift current of the P-type 矽 layer. Γ ^'Ming the invention summary of the problem to be solved by the invention. However, in the conventional polycrystalline 矽pin structure, when amorphous crystallization is required, The heat treatment temperature is 600. (High temperature of 3 or more, so during the heat treatment, there is deformation of the substrate (for example, deflection of the substrate), impurities are unnecessarily diffused to the layer (especially the light absorbing layer), and the photoelectric conversion effect is obtained. In order to solve this problem, a plasma enhanced chemical Vapor Deposition (PECVD) method is proposed to utilize a microcrystalline germanium which is a boundary material between amorphous germanium and polycrystalline germanium ("c_S i) Solar cells. However, when PECVD is used to form microcrystalline germanium, low deposition pressure and high deposition power conditions are required, and it is not easy to control the conditions of the crucible, and the material properties of the microcrystalline crucible are more crystallized, etc., in solar cells. There is a limit to the increase in productivity and photoelectric conversion efficiency. Therefore, the object of the present invention is to solve the problems of the above-mentioned conventional techniques, and the inventors have provided characteristics that can use microcrystalline semiconductors, and can be easily used at low temperatures. A solar cell in which a crystalline semiconductor is crystallized and a method of manufacturing the same. Another object of the present invention is to provide a solar energy which can have a grain boundary which grows in the same direction as the direction of movement of electrons and holes generated in the light absorbing layer. Further, another object of the present invention is to provide an efficiency of suppressing crystallization of an amorphous semiconductor layer, which can be improved. Solar cell with electric conversion efficiency and method for manufacturing the same. 201125139 Further, another object of the present invention is to provide a feature that can utilize the characteristics of a microcrystalline semiconductor, and in the multi-joined photovoltaic element, only the upper photovoltaic element is crystallized by 1%. The battery and the method for producing the same. The object of the present invention is achieved by the solar cell characterized in that the solar cell comprises a substrate, an electrode formed on the lower surface of the substrate, and a lower electrode. And a photovoltaic element comprising a polycrystalline semiconductor layer and an upper electrode formed on the photovoltaic element, wherein the polycrystalline semiconductor layer has a grain boundary that grows in the same direction as the direction of movement of the electron or the hole. Further, the above object of the present invention can also be achieved by a solar cell characterized in that the solar cell is characterized in that a substrate is included, a lower electrode is formed on the substrate, and is formed on the lower electrode, and has a photovoltaic element under the amorphous semiconductor layer. Formed on the lower photovoltaic element, and comprising a photovoltaic element above the polycrystalline semiconductor layer, and an upper electrode formed on the upper photovoltaic element, wherein the polycrystalline semiconductor layer has the same direction of movement as the electron or the hole Grain boundaries that grow in the direction. Furthermore, the above object of the present invention can also be achieved by the following method for producing a solar cell, characterized in that the method for producing a solar cell has the following steps: (a) forming a microcrystalline semiconductor layer between the stacked amorphous semiconductor layers, and (b) Forming a Photoelectric Element Having a Polycrystalline Semiconductor Layer The multi-turn 0 semiconductor layer is formed by crystallization of at least a part of the microcrystalline semiconductor layer and the amorphous cut layer described above by a heat treatment process. Here, the step (a) may have the steps of: (al) forming a second amorphous semi-201125139 conductor layer on the lower electrode of the substrate; (a2) forming a lower second amorphous semiconductor layer in the foregoing (a3) forming the microcrystalline semiconductor layer on the second amorphous semiconductor layer on the lower portion; (a4) forming an upper second amorphous semiconductor layer on the microcrystalline semiconductor layer; And (a5) forming a third amorphous semiconductor layer on the second amorphous semiconductor layer on the upper portion. Advantageous Effects of Invention According to the present invention, a microcrystalline germanium solar cell excellent in low-temperature characteristics can be produced by using microcrystalline germanium. Moreover, according to the present invention, the grain boundary is formed in the same direction as the direction of movement of the electrons and holes generated in the light absorbing layer, so that the mobility of electrons and holes is increased, whereby the photovoltaic of the solar cell can be made. Conversion efficiency is improved. Further, according to the present invention, since the amorphous germanium and the microcrystalline germanium can be sequentially formed in situ, the crystallizing is performed, so that the reliability and productivity of the solar cell can be improved. Further, according to the present invention, it is possible to use only the microcrystalline germanium to crystallize only the upper photovoltaic element into a polycrystalline stone which is excellent in low-temperature characteristics in the multiple-joined photovoltaic element. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a view showing a manufacturing process of a solar cell crystallized by using the microcrystalline semiconductor layer of the first embodiment of the present invention. Fig. 2 is a view showing a manufacturing process of a solar cell crystallized by using the microcrystalline semiconductor layer of the first embodiment of the present invention. 201125139 Fig. 3 is a view showing a manufacturing process of a solar cell which is crystallized by using the microcrystalline semiconductor layer of the first embodiment of the present invention. Fig. 4 is a view showing a manufacturing process of a solar cell crystallized by using the microcrystalline semiconductor layer of the first embodiment of the present invention. Fig. 5 is a view showing a manufacturing process of a solar cell crystallized by using the microcrystalline semiconductor layer of the first embodiment of the present invention. Fig. 6 is a view showing a manufacturing process of a laminated solar cell which is crystallized by using the microcrystalline semiconductor layer of the second embodiment of the present invention. Fig. 7 is a view showing a manufacturing process of a laminated solar cell crystallized by using the microcrystalline semiconductor layer of the second embodiment of the present invention. Fig. 8 is a view showing a manufacturing process of a laminated solar cell which is crystallized by using the microcrystalline semiconductor layer of the second embodiment of the present invention. Fig. 9 is a view showing a manufacturing process of a laminated solar cell crystallized by using the microcrystalline semiconductor layer of the second embodiment of the present invention. Fig. 10 is a view showing a manufacturing process of a laminated solar cell crystallized by using the microcrystalline semiconductor layer of the second embodiment of the present invention. I. Embodiment 3 Mode for Carrying Out the Invention Hereinafter, in order to more clearly understand the above-described objects and technical configurations of the present invention and the detailed effects of the effects thereof, reference is made to the drawings relating to preferred embodiments of the present invention. To elaborate. In the present specification, ytterbium (Si) which is the most commonly used raw material for the semiconductor layer is exemplified, and the present invention is not limited thereto, and a material having a well-known semiconductor property can be used without limitation. 7 201125139 First Embodiment In the following detailed description, for convenience, a unit cell region (a region where photoelectric conversion is performed in a solar cell) of a substrate 1 of a solar cell will be mainly described. Figs. 1 to 5 are views showing a manufacturing process of a solar cell which is crystallized by using the microcrystalline semiconductor layer of the first embodiment of the present invention. First, as shown in Fig. 1, a substrate 10A can be provided. The material of the substrate 1 can be a transparent glass substrate, but it is not necessarily limited thereto. According to the direction in which the solar cell receives light, a transparent material such as glass or plastic or an opaque material such as bismuth or metal (for example, SUS (Stainless Steel)) be usable. Next, 'not shown' is subjected to a texturing process by the surface of the substrate 1 to form a roughness. In the present invention, the roughening refers to a phenomenon in which light reflected by the surface of the substrate of the solar cell is prevented from being optically lost, and its characteristics are lowered. That is, when the surface of the substrate is roughened, a concave-convex pattern is formed on the surface of the substrate. When the surface of the substrate is roughened by roughening, the light reflected from the surface is reflected in the direction of the solar cell, so that the loss of light can be reduced, and the amount of light trapping can be increased, and the photoelectric conversion efficiency of the solar cell can be improved. At this time, the roughening process can be carried out by sand blasting, including dry blasting by surging the surnamed particles by compressed air, and wet blasting by etching the etched particles together with the liquid. The etched particle system for sand blasting can be used without any limitation, such as sand or a minute metal, and can be physically impacted to provide concave and convex particles on the substrate. Of course, the roughening process can also be omitted as needed. Then, a reflection preventing layer (not shown) may be formed on the substrate 100. 201125139 The anti-reflection layer functions to prevent the solar light incident on the substrate 100 from being directly reflected to the outside without being absorbed by the ruthenium layer, thereby reducing the efficiency of the solar cell. The raw material of the antireflection layer may be a transparent insulating layer of cerium oxide (si0x) or tantalum nitride* (siNX), but is not necessarily limited thereto. The method for forming the antireflection layer may include a chemical vapor deposition method such as Low Pressure Chemical Vapor Deposition (LPCVD) or Plasma Enhance (1 Chemical Vapor Deposition: PECVD). (Chemical Vap〇r Deposition: CVD). Then, the lower electrode 2 of the conductive material can be formed on the substrate 1. The raw material of the lower electrode 200 can be a transparent electrode having a low contact resistance and having a transparent property ( Transparent Conductive Oxide ; TC0). Transparent Electrode (TCO) can be AZO (ZnO : Al), IT 〇 (IndiUm-Tin-〇Xide), GZO (ZnO : Ga), BZO (ZnO : B), and FT0 (Sn02) : F) Any of the methods for forming the lower electrode 200 may include a physical vapor phase such as a Thermai Evaporation, an E-beam Evaporation method, or a sputtering process; Physical Vapor Deposition (PVD) and Chemical Vapor Deposition (CVD) such as LPCVD, PECVD, and Metal Organic Chemical Vapor Deposition (MOCVD). As shown in Fig. 2, it can be p-type, 丨-type, political (especially p+ type, i-type, n+ type), η-type, i-type, p-type (especially n+ type, 丨 type, p+ type), p Type, η type, η type (especially p+ type, n_ type, n+ type) or n type, n 201125139. Parent, formed in the lower electrode 2. On. Here - relative difference, #杂浓度古The difference/pure doping wave is higher than 'high. For example, it refers to the doping gate, n-. § no + or · is not visible at the time' system (four) is not particularly limited. Located in P type and η The type i sand layer can function as a retraction layer. P type (especially the n+ type in the present embodiment, the _shi shi layer 31 〇 type) shi shi layer 32 〇 'n type shi shi layer 330 The order is formed on the lower electrode (10). More specifically, the p-type upper amorphous layer 3H) is formed on the lower electrode, and then the i-type second amorphous layer 320 is formed on the first amorphous layer. After the layer 31 is formed, the n-type third amorphous layer 33 is formed on the second amorphous layer 32, whereby the photovoltaic element 300 can be formed. Further, in the present embodiment, When the second amorphous germanium layer 32 is formed, the micro The germanium layer 322 is formed between the second amorphous layer 321 and the second amorphous layer 323. More specifically, the second amorphous germanium layer 321 can be formed on the first amorphous germanium layer 310, and then the microcrystalline germanium layer 322 can be formed on the 21st amorphous germanium layer 321, and then A 2-2 amorphous germanium layer 323 is formed on the microcrystalline germanium layer 322. Since the microcrystalline crucible can be crystallized at a temperature lower than that of the amorphous stone after the heat treatment process, the microcrystalline layer 322 can function to induce crystallization of the adjacent amorphous layer 321 and 323. On the other hand, the microcrystalline germanium layer 322 is not limited to the above, and may be formed between the first amorphous germanium layer 31A and the second amorphous germanium layer 320 or the second amorphous germanium layer 320 and the third non-third. The wafer layer 330 is between. The first amorphous germanium layer 310, the second amorphous germanium layer 320 (321, 323), the third amorphous germanium layer 330, and the microcrystalline germanium layer 322 are preferably formed by PECVD. When the 2-1st amorphous germanium layer 321, the microcrystalline germanium layer 322, and the 2-2 10 201125139 amorphous austenite layer 323 are sequentially formed by PECVD, the source gas SiH4 (or Si2H6) and the auxiliary gas H2 can be adjusted. 〉 Kunhe is formed. That is, the ratio of H2 to SiH4 (or Si2H6) can be reduced by 2 or 〇), and the 2-1st amorphous germanium layer 321 and the 2-2 amorphous rock layer 323' can be formed to make H2 relatively The ratio of SiH4 (or Si2H6) is increased to form a microcrystalline layer 322. As described above, in the PECVD, a technique for controlling the degree of crystallization of the ruthenium layer formed by adjusting the ratio of the source gas to the auxiliary gas is well known, and thus the detailed description is omitted in the description. On the other hand, when the first amorphous germanium layer 310, the second amorphous germanium layer 320, and the third amorphous germanium layer 330 are formed by PECVD, it is preferable to use the single in-situ process in a single process. the way. In this way, the solar cell is reliable because the first amorphous germanium layer 310, the second amorphous germanium layer 320, and the third amorphous germanium layer 330 which constitute the photovoltaic element 300 are formed without being exposed to the external environment. The two manufacturing processes are simple, the manufacturing time is shortened, and the productivity of the solar cell is improved. Next, as shown in Fig. 3, the microcrystalline germanium layer 322 can be crystallized into a polycrystalline germanium layer 322P by performing a heat treatment process at a predetermined temperature. At this time, the microcrystalline germanium can be regarded as a fine structure having an intermediate degree between the amorphous germanium and the polycrystalline germanium. Thus, the microcrystalline stone can be crystallized into polycrystalline germanium at a temperature lower than that of the amorphous germanium. For example, when the temperature at which the amorphous germanium is crystallized is 6001: or more, the microcrystalline germanium may be crystallized into polycrystalline germanium at a low temperature (for example, 550 ° C) of 600 ° C or lower. Then, since the microcrystalline stone can exert the role of a seed required for the crystallization of the amorphous germanium, the second 2-1 amorphous layer 321 and the second - 2 amorphous layer 323 and the micro The interface between the crystal germanium layer 322 is centered, and the 2-1st amorphous germanium layer 321 and the second 2 amorphous germanium layer 323 are also sequentially crystallized, and can be formed into the 2-1st poly germanium layer 321P and

S 11 201125139 第2-2多晶矽層323P。在此過程中，由於發揮晶種之作用之 微晶矽以前述交界面為中心，與前述交界面垂直，且於上 方或下方擴散’故第2非晶矽層320可結晶化成多晶石夕層（光 吸收層）’該多晶石夕層具有於與前述交界面垂直之方向成長 之晶粗邊界(grain boundary)、及於與前述晶粒邊界垂直之 方向排列之多晶石夕之晶粒。因而’由於光吸收層之晶粒邊 界之成長方向與在光吸收層所生成之電子或電洞之移動方 向相同，故在太陽能電池内’電子或電動之移動率增加， 而可使太陽能電池之光電轉換效率提高。 接著’如第4圖所示，根據第3圖之熱處理製程之進展 狀況(例如熱處理時間），連第1非晶矽層310及第3非晶矽層 330亦連續地進展結晶化’而可形成為第1多晶矽層310P及 第3多晶矽層330P。即，將微晶矽作為晶種，以600°C以下 之低溫熱處理，亦可將第1非晶矽層310、第2非晶矽層320 及第3非晶矽層330結晶化成第1多晶矽層310P、第2多晶石夕 層320P、及第3多晶矽層。因而，可防止因高溫熱處理引起 之基板1〇〇之變形（例如基板之撓曲）。 另一方面，為促進第1非晶矽層310與第3非晶矽層330 更有效率之結晶化，而將另一金屬層（圖中未示）形成於第1 非晶矽層310及/或第3非晶矽層330上’第1非晶矽層310與 第3非晶矽層330亦可以金屬誘發結晶化（Metal Induced Crystallization : MIC)方式結晶化。當然，在此過程中，亦 可促進第2-1非晶矽層321、第2-2非晶矽層323之結晶化。前 述金屬層之成份可包含Ni、Al、Ti、Ag、Au、Co、Sb、Pd、 12 201125139S 11 201125139 2-2 polysilicon layer 323P. In this process, since the microcrystalline germanium functioning as a seed crystal is centered on the interface, perpendicular to the interface, and diffused above or below, the second amorphous germanium layer 320 can be crystallized into polycrystalline stone. Layer (light absorbing layer) 'the polycrystalline layer has a grain boundary that grows in a direction perpendicular to the interface, and a polycrystalline stone that is arranged in a direction perpendicular to the grain boundary grain. Therefore, since the growth direction of the grain boundary of the light absorbing layer is the same as the direction of movement of the electron or hole generated in the light absorbing layer, the mobility of the electron or the electric motor increases in the solar cell, and the solar cell can be made. The photoelectric conversion efficiency is improved. Then, as shown in FIG. 4, according to the progress of the heat treatment process (for example, the heat treatment time) in FIG. 3, the first amorphous germanium layer 310 and the third amorphous germanium layer 330 are continuously crystallized continuously. The first polysilicon layer 310P and the third polysilicon layer 330P are formed. That is, the microcrystalline germanium is used as a seed crystal, and the first amorphous germanium layer 310, the second amorphous germanium layer 320, and the third amorphous germanium layer 330 may be crystallized into the first polycrystalline silicon by heat treatment at a low temperature of 600 ° C or lower. The layer 310P, the second polycrystalline layer 320P, and the third polysilicon layer. Therefore, deformation of the substrate 1 (e.g., deflection of the substrate) due to high-temperature heat treatment can be prevented. On the other hand, in order to promote more efficient crystallization of the first amorphous germanium layer 310 and the third amorphous germanium layer 330, another metal layer (not shown) is formed on the first amorphous germanium layer 310 and The first amorphous germanium layer 310 and the third amorphous germanium layer 330 on the third amorphous germanium layer 330 may be crystallized by metal induced crystallization (MIC). Of course, in this process, crystallization of the 2-1st amorphous germanium layer 321 and the 2-2 amorphous germanium layer 323 can also be promoted. The composition of the foregoing metal layer may include Ni, Al, Ti, Ag, Au, Co, Sb, Pd, 12 201125139

Cu任一個或2個以上之組合。前述金屬層之形成方法可勹八One or a combination of two or more of Cu. The formation method of the foregoing metal layer can be

低壓化學氣相沉積法、電漿化學氣相沉積法、原子單位I 沉積法、濺鍍法等。由於金屬誘發結晶化方式之非晶矽二 結晶化方法為眾所皆知之技術，故關於此之詳細說明在本 說明書中省略。 然後，如第5圖所示，可將導電性材質之上部電極5〇〇 幵y成於由第1多晶石夕層3i〇p、第2多晶石夕層320P及第3多晶石夕 層構成之光電元件300P上。上部電極500之材質可包含 透明電極（TCO)或為一般之導電性原材料之銅（Cu)、鋁 (A1)、鈦(Ti)、銀(Ag)及該等之合金等，但不限於該等。上 部電極500之形成方法可包含諸如濺鍍之物理氣相沉積法 及諸如LPCVD、PECVD、MOCVD之化學氣相沉積法等。 藉此，在本實施形態，可實現利用微晶石夕層之具有優 異之光電轉換效率、可靠度及生產性的多晶石夕太陽能電 池10 〇 第2實施形態 本實施形態係指在第1實施形態中，争接式太陽能電池 為光電元件以多重接合(multi junction)層疊之構造者，在以 下之詳細說明中’將以二重接合層疊之争接式太陽能電池 作為中心來說明’但不限於此，亦可為包括具有三重接合 以上之積層構造之太陽能電池的概念。 又，本實施形態在二重接合之積層式太陽能電池之點 與第1實施形態不同’在以下之本實施形態之說明中，省略 與第1實施形態重複之内容。Low pressure chemical vapor deposition, plasma chemical vapor deposition, atomic unit I deposition, sputtering, and the like. Since the amorphous crystallization method of metal-induced crystallization is well known, the detailed description thereof is omitted in the present specification. Then, as shown in FIG. 5, the conductive material upper electrode 5〇〇幵y can be formed from the first polycrystalline layer 3i〇p, the second polycrystalline layer 320P, and the third polycrystalline layer. The photovoltaic element 300P is formed on the eve layer. The material of the upper electrode 500 may include a transparent electrode (TCO) or copper (Cu), aluminum (A1), titanium (Ti), silver (Ag), and the like, which are general conductive materials, but are not limited thereto. Wait. The method of forming the upper electrode 500 may include physical vapor deposition such as sputtering and chemical vapor deposition such as LPCVD, PECVD, MOCVD, and the like. Therefore, in the present embodiment, the polycrystalline stone solar cell 10 having excellent photoelectric conversion efficiency, reliability, and productivity using the microcrystalline layer can be realized. The second embodiment is the first embodiment. In the embodiment, the contiguous solar cell is a structure in which the photovoltaic elements are stacked in a multi-junction. In the following detailed description, 'the double-joined laminated solar cell is used as a center to explain 'but not However, it is also possible to adopt the concept of a solar cell including a laminated structure having a triple bond or more. In the embodiment of the present embodiment, the present embodiment is different from the first embodiment.

S 13 201125139 1()__示經使用本發明第2實施形態之微 晶半V體層結晶化之積層式太陽能電池之製造過程的圖。 首先’如第6圖所示，提供基板100，於基板100上形成 下部電極200。 接著’將ρ型♦層31〇、丨型矽層32〇、η裂矽層33〇依序 形成於下部f極2〇〇上。更詳細言之，將ρ型下部第冰晶石夕 層310形成於下部電極2〇〇上，接著，將丨型下部第2非晶矽 層320形成於下部第1非晶矽層31〇上，然後，將η型下部第3 非晶矽層330形成於下部第2非晶矽層32〇上，藉此，可構成 層疊有下部矽層310、320、330之下部光電元件300。 然後’如第7圖所示’將ρ型矽層41〇、丨型矽層42〇、η 型矽層430依序形成於下部光電元件3〇〇上。更詳細言之， 將ρ型上部第1非晶矽層410形成於下部光電元件3〇〇上，接 著，將i型上部第2非晶矽層420形成於上部第1非晶矽層410 上，然後’將η型上部第3非晶矽層430形成於上部第2非晶 矽層420上’藉此，可形成層疊有上部矽層41〇、420、430 之上部光電元件400。 在本實施形態中，形成上部第2非晶石夕層420之際，可 進一步將微晶矽層422形成於上部第2-1非晶矽層421與上 部第2-2非晶石夕層423間。更詳細言之，可將上部第2-1非晶 矽層421形成於下部第3非晶矽層330上，接著，將微晶矽層 422形成於上部第2-1非晶矽層421上，然後，將上部第2-2 非晶石夕層423形成於微晶石夕層422上。由於此微晶石夕可以之 後之熱處理製程，在低於非晶矽之溫度結晶化，故微晶矽 14 201125139 層422可發揮誘發相鄰之非晶矽層421、423之結晶化之功 月匕。另一方面’微晶石夕層422不以上述為限來配置，亦可形 成於上部第1非晶矽層410與上部第2非晶矽層42〇間或上部 第2非晶矽層420與上部第3非晶矽層430間。 接著，如第8圖所示，藉以預定之溫度進行熱處理製 程’可將微晶矽層422結晶化成多晶矽層422P。此時，微晶 矽與第1實施形態同樣地，在600〇C以下之低溫(例如550〇c) 亦可結晶化成多晶矽，在此過程中，微晶矽發揮作為非晶 矽之結晶化所需之晶種之作用，而以上部第21非晶矽層 421及上部第2-2非晶石夕層423與微晶石夕層422之交界面為中 心’上部第2-1非晶矽層42丨及上部第2_2非晶矽層423也依序 進展結晶化，而可形成為第2-1多晶矽層421P及第2-2多晶矽 層423P。 接著，如第9圖所示，根據第8圖之熱處理製程之進展 狀況(例如熱處理時間），連上部第1非晶矽層410及上部第3 非晶矽層430亦連續地進展結晶化，而可形成為上部第1多 B曰矽層410P及上部第3多晶矽層43〇p。即，將微晶矽作為晶 種，以600°C以下之低溫熱處理，亦可將上部第1非晶矽層 41 〇、上部第2非晶矽層420及上部第3 #晶矽層430結晶化成 上部第1多晶矽層41〇p、上部第2多晶矽層420P、及上部第3 多晶矽層430P。 另一方面’圖中未示，亦可於下部光電元件3〇〇與上部 光電元件400間、更具體為下部第3非晶矽層330與上部第1 非晶石夕層410間進一步形成透明導電體之遮斷層（圖中未S 13 201125139 1()__ shows a manufacturing process of a laminated solar cell in which a microcrystalline half V layer of the second embodiment of the present invention is crystallized. First, as shown in Fig. 6, a substrate 100 is provided, and a lower electrode 200 is formed on the substrate 100. Next, a p-type ♦ layer 31 〇, a 矽 type 矽 layer 32 〇, and an η cleft layer 33 〇 are sequentially formed on the lower f pole 2 。. More specifically, a p-type lower cereolite layer 310 is formed on the lower electrode 2, and then a lower-type second amorphous layer 320 is formed on the lower first amorphous layer 31, Then, the n-type lower third amorphous germanium layer 330 is formed on the lower second amorphous germanium layer 32, whereby the photovoltaic element 300 underlying the lower germanium layers 310, 320, and 330 can be laminated. Then, as shown in Fig. 7, a p-type germanium layer 41, a germanium layer 42A, and an n-type germanium layer 430 are sequentially formed on the lower photovoltaic element 3''. More specifically, the p-type upper first amorphous germanium layer 410 is formed on the lower photovoltaic element 3, and then the i-type upper second amorphous germanium layer 420 is formed on the upper first amorphous germanium layer 410. Then, the n-type upper third amorphous germanium layer 430 is formed on the upper second amorphous germanium layer 420. Thus, the upper photovoltaic element 400 in which the upper germanium layers 41A, 420, and 430 are laminated can be formed. In the present embodiment, when the upper second amorphous layer 420 is formed, the microcrystalline layer 422 can be further formed on the upper second 2-1 amorphous layer 421 and the upper second-2 amorphous layer 423 rooms. More specifically, the upper second 2-1 amorphous germanium layer 421 can be formed on the lower third amorphous germanium layer 330, and then the microcrystalline germanium layer 422 can be formed on the upper second 2-1 amorphous germanium layer 421. Then, the upper 2-2 amorphous layer 423 is formed on the microcrystalline layer 422. Since the microcrystalline stone can be crystallized at a temperature lower than that of the amorphous germanium, the microcrystalline germanium 14 201125139 layer 422 can exert the function of inducing crystallization of the adjacent amorphous germanium layers 421 and 423. dagger. On the other hand, the microcrystalline layer 422 is not limited to the above, and may be formed between the upper first amorphous germanium layer 410 and the upper second amorphous germanium layer 42 or the upper second amorphous germanium layer 420. Between the upper third amorphous germanium layer 430. Next, as shown in Fig. 8, the microcrystalline germanium layer 422 can be crystallized into a polycrystalline germanium layer 422P by performing a heat treatment process at a predetermined temperature. In this case, in the same manner as in the first embodiment, the microcrystalline germanium can be crystallized into polycrystalline germanium at a low temperature of 600 〇C or lower (for example, 550 〇c), and in the process, the microcrystalline cerium is crystallized as an amorphous germanium. The role of the seed crystal is required, and the interface between the upper 21st amorphous layer 421 and the upper 2-2 amorphous slab layer 423 and the microcrystalline layer 422 is the center 'upper 2-1 amorphous 矽The layer 42 丨 and the upper second _2 amorphous layer 423 are also sequentially crystallized, and can be formed into the 2-1st polysilicon layer 421P and the 2-2 polysilicon layer 423P. Next, as shown in FIG. 9, according to the progress of the heat treatment process (for example, the heat treatment time) of FIG. 8, the upper first amorphous germanium layer 410 and the upper third amorphous germanium layer 430 are continuously crystallized. The upper first B layer 410P and the upper third poly layer 43〇p can be formed. That is, the microcrystalline germanium is used as a seed crystal, and the upper first amorphous germanium layer 41, the upper second amorphous germanium layer 420, and the upper third # germanium layer 430 may be crystallized by low-temperature heat treatment at 600 ° C or lower. The upper first polysilicon layer 41〇p, the upper second polysilicon layer 420P, and the upper third polysilicon layer 430P are formed. On the other hand, 'not shown, it is possible to further form a transparent space between the lower photovoltaic element 3A and the upper photovoltaic element 400, more specifically, the lower third amorphous germanium layer 330 and the upper first amorphous layer 410. Interceptor of the conductor (not shown in the figure)

S 15 201125139 示）。前述遮斷層可發揮下述作用，前述作用係以微晶矽層 422為晶種之結晶化僅進展至上部第.丨非晶矽層41〇為止，下 部第3非晶矽層330以下之層、即構成下部光電元件300之非 晶石夕層310、320、330則遮斷結晶化之進行者。又，前述遮 斷層可於下部第3非晶矽層330與上部第1多晶矽層410P間 進行歐姆接觸(ohmic contact)，結果，亦可發揮使太陽能電 池之光電轉換效率提高之作用。此時，前述遮斷層宜為於 Zn〇添加少量A1之AZO(ZnO : A1)，但未必限於此，可無特 別限制地使用一般之ITO、ZnO、IZO、FT0(Sn02 : F)、BZO 等之透明導電性原材料。 接著，如第10圖所示，將導電性材質之上部電極5〇〇形 成於上部光電元件400P上。 藉此’在本實施形態中，與第1實施形態同樣地，藉利用微 晶石夕’可實現具有具優異之光電轉換效率、可靠度及生產 性之二重接合構造之事接式多晶矽太陽能電池。 【圖式簡單説明】 第1圖係顯示經使用本發明第1實施形態之微晶半導體 層結晶化之太陽能電池之製造過程的圖。 第2圖係顯示經使用本發明第1實施形態之微晶半導體 層結晶化之太陽能電池之製造過程的圖。 第3圖係顯示經使用本發明第1實施形態之微晶半導體 層結晶化之太陽能電池之製造過程的圖。 第4圖係顯示經使用本發明第1實施形態之微晶半導體 層結晶化之太陽能電池之製造過程的圖。 16 201125139 第5圖係顯示經使用本發明第丨實施形態之微晶半導體 層結晶化之太陽能電池之製造過程的圖。 第6圖係顯示經使用本發明第2實施形態之微晶半導體 層結晶化之積層式太陽能電池之製造過程的圖。 第7圖係顯示經使用本發明第2實施形態之微晶半導體 層結晶化之積層式太陽能電池之製造過程的圖。 第8圖係顯示經使用本發明第2實施形態之微晶半導體 層結晶化之積層式太陽能電池之製造過程的圖。 第9圖係顯示經使用本發明第2實施形態之微晶半導體 層結晶化之積層式太陽能電池之製造過程的圖。 第10圖係顯示經使用本發明第2實施形態之微晶半導 體層結晶化之積層式太陽能電池之製造過程的圖。 【主要元件符號說明】 10，20...太陽能電池 100...基板 200···下部電極 3〇0 ’ 300P·.‘光電元件(下部光 電元件） 310...第1非晶矽層 310P…第1多晶矽層 320…第2非晶矽層 320P...第2多晶石夕層 321…第2-1非晶矽層 321P…第2-1多晶矽層 322，422…微晶矽層 322P...多晶矽層 323.·.第2-2非晶矽層 323P...第2-2多晶矽層 330.. .第3非晶矽層 330P…第3多晶石夕層 400，400P.·.上部光電元件 410.. .上部第1非晶石夕層 410P...上部第1多晶矽層 420…上部第2非晶矽層 420P…上部第2多晶矽層 421…上部第2-1非晶碎層 421P··.第2-1多晶矽層 17 201125139 422P...多晶矽層 423...上部第2-2非晶矽層 423P···第2-2多晶矽層 430...上部第3非晶矽層 430P...上部第3多晶矽層 500…上部電極 18S 15 201125139 shows). The above-mentioned barrier layer can function as follows: the crystallization of the seed crystal of the microcrystalline germanium layer 422 is progressed only to the upper first amorphous germanium layer 41, and the lower third amorphous germanium layer 330 is below the layer. That is, the amorphous vertices 310, 320, and 330 constituting the lower photovoltaic element 300 block the progress of crystallization. Further, the above-mentioned shielding layer can perform ohmic contact between the lower third amorphous germanium layer 330 and the upper first polycrystalline germanium layer 410P, and as a result, the photoelectric conversion efficiency of the solar battery can be improved. In this case, the AZO (ZnO: A1) having a small amount of A1 is preferably added to the Zn layer, but it is not necessarily limited thereto, and general ITO, ZnO, IZO, FT0 (Sn02: F), BZO, etc. may be used without particular limitation. Transparent conductive raw material. Next, as shown in Fig. 10, the conductive material upper electrode 5 is formed on the upper photovoltaic element 400P. According to the present embodiment, in the same manner as in the first embodiment, the micro-junction solar energy having excellent double-junction structure with excellent photoelectric conversion efficiency, reliability, and productivity can be realized by using the microcrystalline stone. battery. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a view showing a manufacturing process of a solar cell crystallized by using the microcrystalline semiconductor layer of the first embodiment of the present invention. Fig. 2 is a view showing a manufacturing process of a solar cell crystallized by using the microcrystalline semiconductor layer of the first embodiment of the present invention. Fig. 3 is a view showing a manufacturing process of a solar cell crystallized by using the microcrystalline semiconductor layer of the first embodiment of the present invention. Fig. 4 is a view showing a manufacturing process of a solar cell crystallized by using the microcrystalline semiconductor layer of the first embodiment of the present invention. 16 201125139 Fig. 5 is a view showing a manufacturing process of a solar cell which is crystallized by using the microcrystalline semiconductor layer of the embodiment of the present invention. Fig. 6 is a view showing a manufacturing process of a laminated solar cell which is crystallized by using the microcrystalline semiconductor layer of the second embodiment of the present invention. Fig. 7 is a view showing a manufacturing process of a laminated solar cell crystallized by using the microcrystalline semiconductor layer of the second embodiment of the present invention. Fig. 8 is a view showing a manufacturing process of a laminated solar cell which is crystallized by using the microcrystalline semiconductor layer of the second embodiment of the present invention. Fig. 9 is a view showing a manufacturing process of a laminated solar cell crystallized by using the microcrystalline semiconductor layer of the second embodiment of the present invention. Fig. 10 is a view showing a manufacturing process of a laminated solar cell crystallized by using the microcrystalline semiconductor layer of the second embodiment of the present invention. [Description of main component symbols] 10, 20... Solar cell 100... Substrate 200··· Lower electrode 3〇0 '300P·.'Photoelectric element (lower photo element) 310...1st amorphous layer 310P...first polysilicon layer 320...second amorphous germanium layer 320P...second polycrystalline layer 321...the second 2-1 amorphous layer 321P...the 2-1th polycrystalline layer 322,422...microcrystalline germanium Layer 322P...Polycrystalline germanium layer 323.. 2-2 amorphous germanium layer 323P... 2-2 polysilicon layer 330.. 3rd amorphous germanium layer 330P... 3rd polycrystalline layer 400, 400P.·. upper photovoltaic element 410.. upper first amorphous sap layer 410P... upper first polysilicon layer 420... upper second amorphous layer 420P... upper second polysilicon layer 421... upper part 2 1 amorphous fracture layer 421P··. 2-1 polysilicon layer 17 201125139 422P...polycrystalline germanium layer 423...upper 2-2 amorphous germanium layer 423P···2-2 polysilicon layer 430... Upper third amorphous germanium layer 430P... upper third polysilicon layer 500... upper electrode 18

Claims (1)

201125139 七、申請專利範圍： 1. 一種太陽能電池，其特徵在於包含有： 基板； 下部電極，係形成於該基板上； 光電元件，係形成於該下部電極上，並包含多晶半 導體層，該多晶半導體層具有於與電子或電洞之移動方 向相同之方向上成長的晶粒邊界，及 上部電極，係形成於該光電元件上。 2. —種太陽能電池，其特徵在於包含有： 基板； 下部電極，係形成於該基板上； 下部光電元件，係形成於該下部電極上，並具有非 晶半導體層； 上部光電元件，係形成於該下部光電元件上，並包 含多晶半導體層，該多晶半導體層具有於與電子或電洞 之移動方向相同之方向上成長的晶粒邊界；及 上部電極，係形成於該上部光電元件上。 3. 如申請專利範圍第1或2項之太陽能電池，其中前述多晶 半導體層含有排列於與前述晶粒邊界垂直之方向上的 晶粒。 4. 如申請專利範圍第1或2項之太陽能電池，其中前述多晶 半導體層係光吸收層。 5. 如申請專利範圍第1或2項之太陽能電池，其中前述多晶 半導體層係多晶矽層。 S 19 201125139 6. 如申請專利範圍第1或2項之太陽能電池，其中更於前述 基板與前述下部電極間，形成一為透明絕緣體之反射防止 層0 7. 如申請專利範圍第2項之太陽能電池，其中更於前述下 部光電元件與前述上部光電元件間，形成一為透明導電 體之遮斷層。 8. —種太陽能電池之製造方法，其特徵在於包含以下步驟： (a) 將微晶半導體層形成於已層疊之非晶半導體層 間；及 (b) 形成含有多晶半導體層之光電元件，前述多晶半 導體層係藉進行熱處理製程，將前述微晶半導體層及前 述非晶半導體層之至少一部份結晶化而形成者。 9. 如申請專利範圍第8項之太陽能電池之製造方法，其中 前述(a)步驟包含以下步驟： (al)將第1非晶半導體層形成於基板上之下部電極 上； (a 2)將下部之第2非晶半導體層形成於前述第1非晶 半導體層上； (a3)將前述微晶半導體層形成於前述下部之第2非 晶半導體層上； (a4)將上部之第2非晶半導體層形成於前述微晶半 導體層上；及 (a5)將第3非晶半導體層形成於前述上部之第2非晶 半導體層上。 20 201125139 ^申响專利範圍第8項之太陽能電池之製造方法，其中 月1j述多晶半導體層含有於與電子或電洞之移動方向相 同之方向上成長的晶粒邊界。 士申胡專利範圍第8項之太陽能電池之製造方法，其中 月1J述多晶半導體層含有排列於與前述晶粒邊界垂直之 方向上的晶粒。 12·如申請專利範圍第8項之太陽能電池之製造方法，其中 觔述非晶半導體層及前述微晶半導體層使用化學氣相 〉儿積法形成。 13.如申請專利範圍第8項之太陽能電池之製造方法，其中 月）述非Ba半導體層及前述微晶半導體層以原位(比 situ) 方式形成。 14·如申請專利範圍第9項之太陽能電池之製造方法，其中 將金屬層形成於如述非晶半導體層之至少1層上。 S 21201125139 VII. Patent application scope: 1. A solar cell, comprising: a substrate; a lower electrode formed on the substrate; a photoelectric element formed on the lower electrode and comprising a polycrystalline semiconductor layer, The polycrystalline semiconductor layer has a grain boundary that grows in the same direction as the direction of movement of the electron or the hole, and the upper electrode is formed on the photovoltaic element. 2. A solar cell, comprising: a substrate; a lower electrode formed on the substrate; a lower photovoltaic element formed on the lower electrode and having an amorphous semiconductor layer; and an upper photovoltaic element formed And a polycrystalline semiconductor layer having a grain boundary grown in a direction opposite to a moving direction of the electron or the hole; and an upper electrode formed on the upper photovoltaic element on. 3. The solar cell according to claim 1 or 2, wherein the polycrystalline semiconductor layer contains crystal grains arranged in a direction perpendicular to the grain boundaries. 4. The solar cell according to claim 1 or 2, wherein the polycrystalline semiconductor layer is a light absorbing layer. 5. The solar cell of claim 1 or 2, wherein the polycrystalline semiconductor layer is a polycrystalline germanium layer. 6. The solar cell of claim 1 or 2, wherein an antireflection layer is formed as a transparent insulator between the substrate and the lower electrode. 7. Solar energy as claimed in claim 2 In the battery, a blocking layer which is a transparent conductor is formed between the lower photovoltaic element and the upper photovoltaic element. 8. A method of manufacturing a solar cell, comprising the steps of: (a) forming a microcrystalline semiconductor layer between the stacked amorphous semiconductor layers; and (b) forming a photovoltaic element including the polycrystalline semiconductor layer, The polycrystalline semiconductor layer is formed by crystallizing at least a part of the microcrystalline semiconductor layer and the amorphous semiconductor layer by a heat treatment process. 9. The method of manufacturing a solar cell according to claim 8, wherein the step (a) comprises the steps of: (al) forming a first amorphous semiconductor layer on a lower electrode of the substrate; (a 2) a second lower amorphous semiconductor layer is formed on the first amorphous semiconductor layer; (a3) the microcrystalline semiconductor layer is formed on the second lower amorphous semiconductor layer; (a4) the second non-element a crystalline semiconductor layer is formed on the microcrystalline semiconductor layer; and (a5) a third amorphous semiconductor layer is formed on the upper second amorphous semiconductor layer. 20 201125139 The method for manufacturing a solar cell according to the eighth aspect of the invention, wherein the polycrystalline semiconductor layer contains a grain boundary which grows in the same direction as the direction of movement of the electron or the hole. The method for manufacturing a solar cell according to the eighth aspect of the invention, wherein the polycrystalline semiconductor layer contains crystal grains arranged in a direction perpendicular to the grain boundary. 12. The method of manufacturing a solar cell according to claim 8, wherein the amorphous semiconductor layer and the microcrystalline semiconductor layer are formed by a chemical vapor phase method. 13. The method of manufacturing a solar cell according to claim 8, wherein the non-Ba semiconductor layer and the microcrystalline semiconductor layer are formed in situ (in situ). The method of manufacturing a solar cell according to claim 9, wherein the metal layer is formed on at least one of the amorphous semiconductor layers. S 21
TW99139491A 2009-11-24 2010-11-17 Solar cell crystallized using microcrystalline semiconductor layer and method for fabricating the same TW201125139A (en)

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US11101398B2 (en) 2015-03-23 2021-08-24 Sunpower Corporation Blister-free polycrystalline silicon for solar cells

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US11101398B2 (en) 2015-03-23 2021-08-24 Sunpower Corporation Blister-free polycrystalline silicon for solar cells
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