KR101084650B1 - Solar cell crystallized using microcrystalline semiconductor layer and method for fabricating the same - Google Patents

Abstract

Disclosed is a solar cell crystallized using a microcrystalline semiconductor layer and a method of manufacturing the same. The solar cell crystallized using the microcrystalline semiconductor layer according to the present invention includes an optoelectronic device 300 including a polycrystalline semiconductor layer 320 having a grain boundary 30 grown in the same direction as the movement direction of electrons or holes. Characterized in that it comprises a solar cell characterized in that.

Solar cell, fine crystalline silicon, polycrystalline silicon, amorphous silicon, grain, grain boundary

Description

SOLAR CELL CRYSTALLIZED USING MICROCRYSTALLINE SEMICONDUCTOR LAYER AND METHOD FOR FABRICATING THE SAME

The present invention relates to a solar cell crystallized using a microcrystalline semiconductor layer and a method of manufacturing the same. More specifically, a microcrystalline semiconductor layer may be disposed between the amorphous semiconductor layers (particularly, the light absorbing layer) and then thermally treated to crystallize the amorphous semiconductor layer at a lower temperature (eg, 600 degrees or less). The present invention relates to a polycrystalline solar cell and a method of manufacturing the same.

In general, a thin film solar cell using amorphous silicon (a-Si) has a very low diffusion length of a carrier compared to single crystal or polycrystalline silicon due to the characteristics of the amorphous silicon material itself. Therefore, when manufactured with a pn junction structure, the collection efficiency of electron-hole pairs generated by light is very low, and when exposed to light for a long time, deterioration occurs and the photoelectric conversion efficiency decreases with time. Have

In order to solve this problem, an amorphous silicon pin structure formed between p-type and n-type having a high impurity doping concentration by using an intrinsic semiconductor layer containing no impurity as a light absorbing layer, and heat treatment at high temperature ( For example, a solar cell having a polycrystalline silicon pin structure which crystallizes to polycrystalline silicon (p-si) at 600 degrees or more) has been proposed.

In such a p-i-n structure, a depletion region is formed at the junction between the i-layer, which is a light absorbing layer, and the p-layer and the n-layer, which have a high impurity doping concentration, to generate an electric field therein. Therefore, the electron-hole pair generated by the incident light (receiving) in the i-layer is moved by electrons (-) to the n-type silicon layer and holes (+) to the p-type silicon layer according to the internal electric field, not diffusion. (drift) Current can flow.

However, in such a polycrystalline silicon pin structure, since the heat treatment temperature is required to be higher than 600 degrees at the time of crystallization of the amorphous silicon, the substrate is deformed (for example, the substrate is warped) and impurities are unnecessary as the silicon layer (especially the light absorbing layer). There is a problem in that the diffusion decreases the photoelectric conversion efficiency.

In order to solve this problem, a solar cell using microcrystalline Si (μc-Si), which is a boundary material between amorphous silicon and polycrystalline silicon, has been proposed using plasma enhanced chemical vapor deposition (PECVD). However, the formation of microcrystalline silicon using PECVD requires low deposition pressure and high deposition power conditions, which increases process time, and results in a small grain size and amorphous phase compared to polycrystalline silicon, resulting in mass production and photoelectric conversion efficiency. There is a limit in that.

Accordingly, the present invention has been made to solve the above problems of the prior art, and provides a solar cell and a method for manufacturing the same, which can easily crystallize an amorphous semiconductor even at low temperatures by using the characteristics of the microcrystalline semiconductor. There is this.

Another object of the present invention is to provide a solar cell and a method of manufacturing the same, which may have grain boundaries grown in the same direction as the direction of movement of electrons and holes generated in the light absorption layer.

Another object of the present invention is to provide a solar cell and a method of manufacturing the same, which can improve the photoelectric conversion efficiency by efficiently controlling the crystallization of the amorphous semiconductor layer.

Representative configuration of the present invention for achieving the above object is as follows.

The above object of the present invention is achieved by a solar cell comprising a photovoltaic device comprising a polycrystalline semiconductor layer having grain boundaries grown in the same direction as the direction of movement of electrons or holes.

In addition, the above object of the present invention (a) forming a microcrystalline semiconductor layer between the stacked amorphous semiconductor layer; And (b) forming a photovoltaic device comprising a polycrystalline semiconductor layer formed by crystallizing at least a portion of the microcrystalline semiconductor layer and the amorphous semiconductor layer by performing a heat treatment process. It is also achieved by a manufacturing method.

In this case, the polycrystalline semiconductor layer may include grains arranged in a direction perpendicular to the grain boundaries.

The polycrystalline semiconductor layer may be a light absorbing layer.

The optoelectronic device may have a structure in which p, i, n type or n, i, p type semiconductor layers are sequentially stacked.

The optoelectronic device may have a structure in which p, n, n type or n, n, p type semiconductor layers are sequentially stacked.

The polycrystalline semiconductor layer may be a polycrystalline silicon layer.

The step (a) may include: (a1) forming a first amorphous semiconductor layer on a lower electrode on the substrate; (a2) forming a lower second amorphous semiconductor layer on the first amorphous semiconductor layer; (a3) forming the microcrystalline semiconductor layer on the lower second amorphous semiconductor layer; (a4) forming an upper second amorphous semiconductor layer on the microcrystalline semiconductor layer; And (a5) forming a third amorphous semiconductor layer on the upper second amorphous semiconductor layer.

The polycrystalline semiconductor layer may include grain boundaries grown in the same direction as the moving direction of the electrons or holes.

The amorphous semiconductor layer and the microcrystalline semiconductor layer may be formed using a chemical vapor deposition method.

The amorphous semiconductor layer and the microcrystalline semiconductor layer may be formed in situ.

A metal layer may be formed on at least one of the amorphous semiconductor layers.

An anti-reflection layer, which is a transparent insulating layer, may be further formed between the substrate and the lower electrode.

According to the present invention, it is possible to produce a polycrystalline silicon solar cell having excellent properties even at low temperatures using fine crystalline silicon.

In addition, according to the present invention, it is possible to sequentially form and crystallize amorphous silicon and fine crystalline silicon in an in situ manner, it is possible to improve the reliability and productivity of the solar cell.

Further, according to the present invention, the photoelectric conversion efficiency of the solar cell can be improved by forming a grain boundary in the same direction as the movement direction of electrons and holes generated in the light absorbing layer to improve mobility.

In addition, according to the present invention, the crystallization process of the amorphous silicon layer can be promoted more efficiently by using a metal induced crystallization (MIC) method in addition to the method using fine crystalline silicon.

DETAILED DESCRIPTION The following detailed description of the invention refers to the accompanying drawings that show, by way of illustration, specific embodiments in which the invention may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the invention. It should be understood that the various embodiments of the present invention are different but need not be mutually exclusive. For example, certain features, structures, and characteristics described herein may be implemented in other embodiments without departing from the spirit and scope of the invention in connection with an embodiment. It is also to be understood that the position or arrangement of the individual components within each disclosed embodiment may be varied without departing from the spirit and scope of the invention. The following detailed description, therefore, is not to be taken in a limiting sense, and the scope of the present invention, if properly described, is defined only by the appended claims, along with the full range of equivalents to which such claims are entitled. In the drawings, like reference numerals refer to the same or similar functions throughout the several aspects, and length, area, thickness, and the like may be exaggerated for convenience.

DETAILED DESCRIPTION Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily implement the present invention.

[Preferred Embodiments of the Invention]

In the following detailed description according to an embodiment of the present invention, silicon (Si) which is most commonly used as a material of a semiconductor layer is described as an example, but the present invention is not limited thereto, and a known material having semiconductor characteristics. You can use them without limitation.

In addition, in the following detailed description according to an embodiment of the present invention, a case where one microcrystalline semiconductor layer is formed between the light absorbing layers will be described as an example, but the present invention is not limited thereto and is amorphous. ) It is to be understood that the overall technology of forming a microcrystalline semiconductor layer between semiconductors and using the seed as a seed to crystallize the amorphous semiconductor layer is comprehensive.

1 to 5 are views illustrating a manufacturing process of a solar cell crystallized using a microcrystalline semiconductor layer according to an embodiment of the present invention.

First, referring to FIG. 1, a substrate 100 may be provided. The material of the substrate 100 may be a transparent glass substrate, but is not limited thereto, and may be a transparent material such as glass or plastic or silicon or metal [for example, SUS (Stainless Steel) according to a direction in which solar cells receive light. All opaque materials such as)] can be used.

Subsequently, although not shown, a roughness may be formed by performing a texturing process on the surface of the substrate 100. Texturing in the present invention is intended to prevent the phenomenon that the characteristics of the light is reduced by reflecting the light incident on the substrate surface of the solar cell is optically lost. That is, making a surface of a board | substrate rough and forming an uneven | corrugated pattern on a board | substrate surface is said. As such, when the surface of the substrate is roughened by texturing, the light reflected once from the surface may be reflected back toward the solar cell, thereby reducing the loss of light and increasing the amount of light trapping, thereby improving the photoelectric conversion efficiency of the solar cell. You can.

In this case, a representative texturing method may be a sand blasting method, which includes both dry blasting for spraying etched particles with compressed air and wet blasting for etching etched particles with liquid. On the other hand, the etching particles used in the sand blasting of the present invention can be used without limitation, particles that can form irregularities on the substrate by physical impact, such as sand, small metal. Of course, the texturing process may be omitted if necessary.

Subsequently, an antireflection layer (not shown) may be formed on the substrate 100. The anti-reflection layer may serve to prevent a phenomenon in which solar light incident through the substrate 100 is not absorbed by the silicon layer and is directly reflected to the outside, thereby lowering the efficiency of the solar cell. The material of the anti-reflection layer may be silicon oxide (SiO _x ) or silicon nitride (SiN _x ), which is a transparent insulating layer, but is not limited thereto.

The method of forming the reflective ring layer may include chemical vapor deposition (CVD), such as Low Pressure Chemical Vapor Deposition (LPCVD) and Plasma Enhanced Chemical Vapor Deposition (PECVD). Can be.

Subsequently, a lower electrode 200 of a conductive material may be formed on the substrate 100. The material of the lower electrode 200 may use a transparent conductive oxide (TCO), which is a transparent electrode having low contact resistance and transparent properties. For example, it may be any one of AZO (ZnO: Al), ITO (Indium-Tin-Oxide), GZO (ZnO: Ga), BZO (ZnO: B), and SnO ₂ (SnO ₂ : F), but is not limited thereto. And conventional conductive materials can be used without limitation.

The lower electrode 200 may be formed using physical vapor deposition (PVD), LPCVD, PECVD, metal organic chemistry such as thermal evaporation, e-beam evaporation, and sputtering. Chemical Vapor Deposition (CVD), such as Metal Organic Chemical Vapor Deposition (MOCVD).

Next, referring to FIG. 2, on the lower electrode 200, p, i, n type (especially p +, i, n +), n, i, p type (especially n +, i, p +), p, n , a silicon layer 300 in which a semiconductor layer of n type (particularly p +, p−, n +) or n, n, p type (particularly n +, n−, p +) is stacked can be formed. Here, the meaning of + and-represents a relative difference in doping concentration, and means that + has a higher concentration of doping than-. For example, n + is higher doped than n-. If there is no indication of + or-, there is no particular restriction on the doping concentration. In addition, the semiconductor layer located between p and n type functions as a light absorbing layer (for example, i type).

 In this invention, the case where it forms in order of p type, i type, and n type is demonstrated as an example. The silicon layer 300 may be formed by a chemical vapor deposition method such as PECVD or LPCVD. Since the silicon layer 300 may perform a function of an optoelectronic device that may receive light by a subsequent process to produce power, Hereinafter, the silicon layer 300 and the optoelectronic device are used in an equivalent sense.

In more detail, the first amorphous silicon layer 310 of the p-type conductivity type is formed on the lower electrode 200, and then the second amorphous silicon of the i-type conductivity type is formed on the first amorphous silicon layer 310. The layer 320 may be formed, and then an n-type conductive third amorphous silicon layer 330 may be formed on the second amorphous silicon layer 320 to form the silicon layer 300 as one optoelectronic device. . In this embodiment, in the process of forming the second amorphous silicon layer 320, the microcrystalline silicon layer 322 is disposed between the lower second amorphous silicon layer 321 and the upper second amorphous silicon layer 323. ) Can be further formed.

That is, an optoelectronic device including the microcrystalline silicon layer 322 may be formed between one or more stacked amorphous silicon layers 310, 321, 323, and 330. The heat treatment process may be crystallized at a lower temperature than the amorphous silicon to induce crystallization of adjacent amorphous silicon.

As a method of forming the second amorphous silicon layer 320, for example, the mixing ratio of SiH ₄ (or Si ₂ H ₆ ) and H ₂ may be adjusted. In this case, reducing the ratio of H ₂ (H ₂ is which may be zero) to the lower / upper second amorphous silicon layer (321, 323) to which they are attached may form, by the ratio of H ₂ increases the fine crystalline silicon layer (322 However, since the method for forming the microcrystalline silicon is a well-known technique, detailed description thereof will be omitted.

On the other hand, the silicon layer 300 as described above may be formed in an in situ manner to proceed sequentially in a single process in a single chamber to reduce the defect that the silicon layer 300 is exposed to the outside air and contaminated The reliability of the solar cell is improved, the manufacturing process is simplified, and the manufacturing time is shortened, thereby improving the productivity of the solar cell.

Here, the i-type means intrinsic without impurities, and the n-type or p-type doping is preferably doped with impurities in situ when forming the amorphous silicon layer. It is common to use boron (B) as an impurity in P-type doping and phosphorus (P) or arsenic (As) as an impurity in n-type doping, but it is not limited to this, and well-known techniques can be used without limitation.

Next, referring to FIG. 3, the microcrystalline silicon layer 322 may be crystallized into a polycrystalline silicon layer by performing a heat treatment process at a predetermined temperature. In this case, it can be seen that the microcrystalline silicon has a microstructure in the middle of the amorphous silicon and polycrystalline silicon. In other words, the microstructure of the microcrystalline silicon is a mixture of amorphous silicon and polycrystalline silicon, the grain size is smaller than the grain size of the polycrystalline silicon. Therefore, crystallization of fine crystalline silicon may be performed at a lower temperature than when amorphous silicon is directly crystallized into polycrystalline silicon. For example, if the temperature for crystallizing amorphous silicon is 600 degrees or more, an embodiment of the present invention may be used. The heat treatment process according to may be carried out at a low temperature of less than 600 degrees.

Subsequently, the grains of the crystallized microcrystalline semiconductor layer 322 may function as seeds, so that the lower and upper second amorphous silicon layers adjacent to the interface of the crystallized microcrystalline semiconductor layer 322 are adjacent to each other. Crystallization may also proceed sequentially (321, 323).

Next, referring to FIG. 4, crystallization may proceed continuously even to the first amorphous silicon layer 310 and the third amorphous silicon layer 330 according to the degree of performance (eg, heat treatment time) of the above-described heat treatment process. have. Therefore, even the low temperature heat treatment, the entire silicon layer 300 can be crystallized sequentially into polycrystalline silicon, thereby preventing the substrate 100 from being deformed (for example, warping of the substrate) due to the high temperature, and in situ. In this manner, a polycrystalline silicon solar cell having excellent reliability and mass productivity can be realized. This will be described in detail with reference to FIG. 6 below.

Next, referring to FIG. 5, an upper electrode 400 of a conductive material may be formed on the silicon layer 300. The material of the upper electrode 400 may include transparent conductive oxide (TCO), which is a transparent electrode, or copper (Cu), aluminum (Al), titanium (Ti), silver (Ag), and the like, which are conventional conductive materials. It may be, but is not limited thereto. The method of forming the upper electrode 400 may include a physical vapor deposition method such as sputtering and a chemical vapor deposition method such as LPCVD, PECVD, and MOCVD.

Fine crystalline Semiconductor layer  Crystallized Silicon Layer Using

In the following description, a detailed configuration and forming method of the crystallized silicon layer 300 performing important functions for the implementation of the present invention will be described.

6 is a view showing in detail a portion of the crystallized silicon layer according to an embodiment of the present invention.

Referring to FIG. 6, the microcrystalline silicon layer 322 may be first crystallized between the second amorphous silicon layer 320, which is a light absorbing layer even at a low temperature, by a heat treatment process according to an embodiment of the present invention. This is because the microcrystals included in the semiconductor layer 322 act as seeds and crystallization proceeds around them. Accordingly, a plurality of first grains 10 may be formed in a horizontal direction with the second amorphous silicon layer 320 in the region where the microcrystalline semiconductor layer 322 is located.

Subsequently, at the interface between the first grain 10 and the amorphous silicon in contact with the upper and lower portions (the lower and upper second amorphous silicon layers 321 and 323), the first grain 10, which has already been crystallized, is continuously grown as a seed. Can be. In this case, the grain boundary 30 may be formed in the same direction as the growth direction of the second grain 20 at the boundary between the second grains 20 growing perpendicular to the arrangement direction of the first grain 10.

Therefore, excellent mobility can be obtained along the grain boundaries 30 grown in the same direction as the movement direction of electrons and holes generated in the center of the light absorbing layer, thereby improving the photoelectric conversion efficiency of the entire solar cell.

Although not shown, the second grain 20 may be sequentially grown up to the first amorphous silicon layer 310 and the third amorphous silicon layer 330, where the first amorphous silicon layer 310 and the first amorphous silicon layer 310 and the third amorphous silicon layer 310 are grown. In order to promote crystallization of the third amorphous silicon layer 330 more efficiently, a separate metal layer (not shown) is formed on the first amorphous silicon layer 310 and / or the third amorphous silicon layer 330 to form a first metal layer. The amorphous silicon layer 310 and the third amorphous silicon layer 330 may also undergo crystallization by a metal induced crystallization (MIC) method. Of course, the crystallization of the lower and upper second amorphous silicon layers 321 and 323 may be promoted in this process.

The component of the metal layer may include any one of Ni, Al, Ti, Ag, Au, Co, Sb, Pd, Cu, or a combination of two or more thereof. The metal layer may be formed by a low pressure chemical vapor deposition method, a plasma chemical vapor deposition method, an atomic unit layer deposition method, a sputtering method, or the like.

Since the method of crystallizing amorphous silicon by the metal-induced crystallization method is a known technique, a detailed description thereof will be omitted herein.

In addition, although not shown, a defect removal process may be further performed to further improve the properties of the polycrystalline silicon. In the present invention, the polycrystalline silicon layer is subjected to hydrogen plasma treatment to remove defects (eg, impurities and dangling bonds) present in the polycrystalline silicon layer.

In the foregoing detailed description, the present invention has been described by specific embodiments such as specific components and the like, but the embodiments and drawings are provided only to help a more general understanding of the present invention, and the present invention is limited to the above embodiments. However, one of ordinary skill in the art can make various modifications and variations from this description. Therefore, the spirit of the present invention should not be construed as being limited to the above-described embodiments, and all of the equivalents or equivalents of the claims, as well as the following claims, I will say.

1 to 5 are views illustrating a manufacturing process of a solar cell crystallized using a microcrystalline semiconductor layer according to an embodiment of the present invention.

6 is a view showing in detail a portion of the crystallized silicon layer according to an embodiment of the present invention.

<Explanation of symbols for the main parts of the drawings>

10: first grain

20: second grain

30: grain boundary

100: substrate

200: lower electrode

300: silicon layer (semiconductor layer, photoelectric device)

310: first amorphous silicon layer

320: second amorphous silicon layer

321: Lower second amorphous silicon layer

322: microcrystalline silicon layer

323: Upper second amorphous silicon layer

330: third amorphous silicon layer

400: upper electrode

Claims (18)

(a) forming a microcrystalline semiconductor layer between the stacked amorphous semiconductor layers; And (b) forming an optoelectronic device including a polycrystalline semiconductor layer formed by performing a heat treatment to crystallize the microcrystalline semiconductor layer and at least a portion of the amorphous semiconductor layer Method for manufacturing a solar cell comprising a. The method of claim 1, In step (a), (a1) forming a first amorphous semiconductor layer on the lower electrode on the substrate; (a2) forming a lower second amorphous semiconductor layer on the first amorphous semiconductor layer; (a3) forming the microcrystalline semiconductor layer on the lower second amorphous semiconductor layer; (a4) forming an upper second amorphous semiconductor layer on the microcrystalline semiconductor layer; And (a5) forming a third amorphous semiconductor layer on the upper second amorphous semiconductor layer Method for manufacturing a solar cell comprising a. The method of claim 1, The polycrystalline semiconductor layer is a manufacturing method of a solar cell, characterized in that it comprises a grain boundary grown in the same direction as the movement direction of electrons or holes. The method of claim 3, And said polycrystalline semiconductor layer comprises grains arranged in a direction perpendicular to said grain boundaries. The method of claim 1, The polycrystalline semiconductor layer is a manufacturing method of a solar cell, characterized in that the light absorbing layer. The method of claim 1, The photovoltaic device is a manufacturing method of a solar cell, characterized in that the p, i, n-type or n, i, p-type semiconductor layer sequentially stacked structure. The method of claim 1, The photoelectric device is a manufacturing method of a solar cell, characterized in that the p, n, n-type or n, n, p-type semiconductor layer is a stacked structure sequentially. The method of claim 1, The polycrystalline semiconductor layer is a manufacturing method of a solar cell, characterized in that the polycrystalline silicon layer. The method of claim 1, The amorphous semiconductor layer and the fine crystalline semiconductor layer is a method of manufacturing a solar cell, characterized in that formed by chemical vapor deposition. The method of claim 1, The amorphous semiconductor layer and the fine crystalline semiconductor layer is a method of manufacturing a solar cell, characterized in that formed in situ (in situ) method. 3. The method of claim 2, The method of manufacturing a solar cell, characterized in that to form a metal layer on at least one of the amorphous semiconductor layer. 3. The method of claim 2, A method of manufacturing a solar cell, further comprising: forming an antireflection layer, which is a transparent insulating layer, between the substrate and the lower electrode. The solar cell of claim 1, wherein the solar cell is manufactured using the method of manufacturing the solar cell of claim 1. delete delete delete delete delete

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