201123132 六、發明說明： 【發明所屬之技術領域j 本發明是有關於顯示技術領域 =】器及其溫度感測控制電路以及溫度丄：動 高*矩:=器例如主動式矩陣液晶顯示器因具有 = ΐ應用範圍廣等優點而被廣泛應用於201123132 VI. Description of the invention: [Technical field of invention] The present invention relates to the field of display technology and its temperature sensing control circuit and temperature 丄: moving height * moment: = for example, an active matrix liquid crystal display has = ΐ is widely used in a wide range of applications
'°電腦、桌上型顯示器以及電視等消費性電子 示ί的H經取代傳統的陰極射線管(CRT)顯示器而成為顯 目前’液晶顯示11面板的應關向大 新，(例如職或細z)和高解析度三個大方更 而Ik之帶來㈣侧是雜驅動㈣電路隨著面板上之資料 線負載的增加、資料更新速度的加快和大量的輸出通道電路集 ^於-顆積體電路會產生大量的熱量使得體積電路溫度升 尚，過高的體積電路溫度存在電路燒毀之風險。 【發明内容】 本發明的目的就是在提供一種主動式矩陣顯示器，可避免 電路因溫度過高而造成燒毁之風險。 本發明的再一目的是提供一種溫度感測控制電路，可避免 電路因溫度過向而造成燒毀之風險。 本發明的又一目的是提供一種溫度感測控制方法，可避免 電路因溫度過高而造成燒毁之風險。 本發明實施例提出的一種主動式矩陣顯示器包括時序控 制器、閘極驅動電路、源極驅動電路以及控制邏輯電路。時序 控制器用以產生初始閘極啟始訊號及初始源極控制訊號；源極 驅動電路包括多個源極驅動積體電路’每一源極驅動積體電路[s] 4 201123132 包括通道開關電路、輸出級電路以及熱保護電路，其中輸出級 電路包括多個輸出通道，這些輸出通道藉由通道開關電路電性 搞接至多個資料線以向這些資料線提供顯示資料，熱保護電路 感測源極驅動積體電路之内部溫度，依據内部溫度產生輸出訊 號以及將輸$訊號與初始閘極啟始訊朗步化後和初始源極 控制訊號進行邏輯運算而得新的源極控制訊號以控制通道開 關電路之導通/截止狀態；控制邏輯電路對這些源極驅動積體 電，之ί保護電路產生的輸出訊號與初始閘極啟始訊號執行 • 邏輯運算而得新的閘極啟始訊號來決定是否致能閘極驅動電 路。 在本發明的一實施例中，上述之每一源極驅動積體電路更 包括電荷分翔關電路，電性祕各個㈣線至預設電位並接 叉新的源極控制訊號之控制，其中電荷分享開關電路之導通/ 截止狀態與通道開關電路之導通/截止狀態相反。 在本發明的一實施例中，上述之每一源極驅動積體電路之 熱保護電路包括熱感測電路、參考電壓產生電路、比較器以及 第二控制邏輯電路；其中熱感測電路感測源極驅動積體電路之 ® 内部度並輸出與内部溫度相對應的感測電壓，參考電壓產生 電路用以產生至少一參考電壓，比較器依據感測電壓與參考電 壓產生上述之輸出訊號，第二控制邏輯電路將上述之輸出訊號 與初始閘極啟始訊號同步化後和初始源極控制訊號進行邏輯 運算而得上述之新的源極控制訊號。 在本發明的一實施例中，上述之第二控制邏輯電路包括邊 緣觸發D型正反器以及或閘；其中邊緣觸發D型正反器以初 始閘極啟始訊號作為邊緣觸發訊號對上述之輸出訊號執行同 步化，或閘對初始源極控制訊號與邊緣觸發D型正反器之輸 201123132 出訊號執行或閘運算而得上述之新的源極控制訊號。 在本發明的一實施例中，上述之第二控制邏輯電路更包括 反相器’用以對上述之新的源極控制訊號執行反相操作以控制 電性耦接各個資料線至預設電位之電荷分享開關電路的導通/ 截止狀態。 在本發明的一實施例中’上述之控制邏輯電路對各個源極 驅動積體電路之熱保護電路產生的輸出訊號執行或非閘運算 後再和初始閘極啟始訊號進行與閘運算而得上述之新的閘極 啟始訊號。 在本發明的一實施例中’上述之控制邏輯電路對各個源極 驅動積體電路之熱保護電路產生的輸出訊號執行與閘運算後 再和初始閘極啟始訊號進行與閘運算而得上述之新的閘極啟 始訊號。 本發明實施例提出的一種溫度感測控制電路適於應用於 主動式矩陣顯示器，其中主動式矩陣顯示器包括時序控制器、 源極驅動電路、閘極驅動電路以及多個資料線；時序控制器用 以產生初始閘極啟始訊號及初始源極控制訊號，源極驅動電路 包括輸出級電路及通道開關電路，輸出級電路包括多個輸出通 道’各個輸出通道藉由通道開關電路電性耦接至各個資料線以 向各個資料線提供顯示資料。本實施例之溫度感測控制電路包 括.熱保護電路以及控制邏輯電路；熱保護電路感測源極驅動 電路中之積體電路溫度，依據積體電路溫度產生輸出訊號，以 及將輪出訊號與初始閘極啟始訊號同步化後和初始源極控制 讯號進行邏輯運算而得新的源極控制訊號以控制通道開關電 路;。控制邏輯電路對上述之輸出訊號與初始閘極啟始訊號執行 邏輯運算而得新的閘極啟始訊號來決定是否致能閘極驅動^ 201123132 路。 在本發明的一實施例中，上述之溫度感測控制電路之熱保 護電路產生的上述之新的源極控制訊號進一步控制電性耦接 各個資料線至預設電位之電荷分享開關電路，而電荷分享開關 電路之導通/截止狀態與通道開關電路之導通/截止狀態相反。 在本發明的一實施例中，上述之溫度感測控制電路之熱保 護電路包括：熱保護電路、參考電壓產生電路、比較器以及第 一控制邏輯電路；其中熱保護電路感測源極驅動電路之積體電 ❿路溫度並輸出與積體電路溫度相對應的感測電壓，參考電壓產 生，路用以產生至少一參考電壓，比較器依據感測電壓與參考 電壓產生上述之輸出訊號，第二控制邏輯電路將上述之輪出訊 ，與，始閘極啟始訊號同步化後和初始源極控制訊號進行邏 輯運算而得上述之新的源極控制訊號。 在本發明的一實施例中，上述之溫度感測控制電路之第二 控制邏輯電路包括邊緣觸發D型正反器以及或閘；其中邊緣 觸發D型正反器以初始閘極啟始訊號作為邊緣觸發訊號對上 述之輸出訊號執行同步化，或閘對初始源極控制訊號與邊緣觸 響發D型正反器之輸出訊號執行或閘運算而得上述之新的源極 控制訊號。 在本發明的一實施例中’上述之溫度感測控制電路之第二 控制邏輯電路更包括反相器’對上述之新的源極控制訊號執行 反相操似㈣電性_各鳄_至預設電㈣電荷分享 開關電路之導通/截止狀態。 ，發明實施例提出的—種溫度感測控财法適於執行於 動式矩陣顯示器，其中主動式矩陣顯示器包括時序控制器、 源極驅動電路、閘極驅動電路以及多個資料線；時序控制器用 201123132 以產生初始閘極啟始訊號及初始源極控制訊號’源極驅動電路 包括輸出級電路，輸出級電路包括多個輸出通道用以輸出顯示 資料。本實施例之溫度感測控制方法包括步驟：感測源極驅動 電路之體積電路溫度；依據積體電路溫度產生輸出訊號；將輸 出訊號與初始閘極啟始訊號同步化後和初始源極控制訊號進 行邏輯運算而得新的源極控制訊號；利用新的源極控制訊號決 定各個輸出通道是否將顯示資料提供至各個資料線；對輸出訊 號與初始閘極啟始訊號執行邏輯操作而得新的閘極啟始訊 號；以及利用新的閘極啟始訊號決定是否致能閘極驅動電路。 在本發明的一實施例中，上述之溫度感測控制方法更包括 步驟：利用反相後之新的源極控制訊號決定各個資料線是否與 預設電位進行電荷分享。 ^ 在本發明的一實施例中，上述之依據積體電路溫度產生輸 出訊號之步驟包括：根據積體電路溫度產生感測電壓；以及依 據感測電壓與一組參考電壓之比較結果產生上述之輸出訊號。 在本發明的一實施例中，上述之參考電壓包括第一參考電 壓以及大於第-參考電壓之第二參考親，而依誠測電壓與 參考電壓之綠結果產生輸出域之步驟包括：當感測電壓小 於第-參考電壓，判定輸纽號為高位準；#感測電壓大於第 -參考電壓’判定輸iin隨為低轉；以及當感測電壓介於第 :參考電壓與第二參考電壓之間，維持輸出訊號之當前位準不 變。 在本發明的-實施例中，上述之將輸出訊號與初始問極啟 ==同步化後和㈣源極控軌號崎賴運算而得新的 源極控制訊號之步驟包括：將輸出訊號輸人至D型正反器， 並以初始閘極啟始訊號作為D型正反器之邊緣觸發訊t以 201123132 對D型正反器之輸出訊號與初始源極控制訊號進行或閘運 算而得上述之新的源極控制訊號。 本發明另一實施例提出的一種溫度感測控制方法適於應 用於主動式矩陣顯示器，其中主動式矩陣顯示器包括時序控制 器、多個源極驅動積體電路、閘極驅動電路以及多個資料線； 時序控制器用以產生初始閘極啟始訊號及初始源極控制訊 號’每一源極驅動積體電路包括輸出級電路且此輸出級電路包 括多個輸出通道以輸出顯示資料。本實施例之溫度感測控制方 φ 法包括步驟：感測每一源極驅動積體電路之工作溫度而得多個 工作溫度；分別依據各個工作溫度產生多個輸出訊號；將每一 輸出δίΐ號與初始閘極啟始訊號同步化後和初始源極控制訊號 進行邏輯運算而得多個新的源極控制訊號；分別利用各個新的 源極控制訊號決定各個源極驅動積體電路之輸出通道是否將 顯示資料提供至各個資料線；對各個輸出訊號與初始閘極啟始 訊號執行邏輯操作而得新的閘極啟始訊號；以及利用此新的閘 極啟始訊號決定是否致能閘極驅動電路。 在本發明的一實施例中，上述之溫度感測控制方法中之對 φ 各個輸出訊號與初始閘極啟始訊號進行邏輯而得新的閘極啟 始訊號包括步驟：對各個輸出訊號執行或非閘運算；以及將或 非運算之結果與初始閘極啟始訊號進行與閘運算而得上述之 新的閘極啟始訊號。 在本發明的一實施例中，上述之溫度感測控制方法中之對 各個輸出訊號與初始閘極啟始訊號進行邏輯而得新的閘極啟 始訊號包括步驟：對各個輸出訊號執行與閘運算；以及將與閘 運算之結果與初始閘極啟始訊號再進行與閘運算而得上述之 新的閘極啟始訊號。 201123132 本發明實施例於主動式矩陣顯示器中配置溫度感測控制 電路’藉此當感測到源極驅動電路中之積體電路溫度過高時產 生相應的控制訊號去控制閘極驅動電路的操作以及切斷源極 驅，電路與貧料線的連接，如此可避免大電流的抽載而造成功 率4耗大溫度過高之現象’以有效避免電路因溫度過高而造成 燒毀之風險。 ▲為讓本發明之上述和其他目的、特徵和優點能更明顯易 懂’下文特舉較佳實施例，並配合所附圖式，作詳細說明如下。 • 【實施方式】 請參閱圖1，其繪示出相關於本發明實施例之一種主動式 矩陣顯不器的結構示意圖。如圖i所示，主動式矩陣顯示器 10匕括·陣列基板12、源極驅動電路、閘極驅動電路以及印 刷電路板14。本實施例巾’源極驅動f路包括多個源極驅動 積體電路XI〜X6，閘極驅動電路包括設置於陣列基板12之兩 侧的多個閘極驅動積體電路γι〜γ6而作為雙邊閘極驅動電 路，但並非用來限制本發明。 _ 陣列基板12上形成有多條資料線DIj、多條閘極線以 及電性耦接至資料線DL與閘極線GL之多個畫素p(圖1中僅 繪示出一個作為舉例說明）；陣列基板12上具有如圖丨虛線框 所示的顯不區域，晝素p形成於顯示區域内。 源極驅動積體電路X1〜X6電性耦接於陣列基板12與印刷 電f板14之間且與資料線DL電性相接以向資料線dl提供顯 示誠料。本實施例中，源極驅動積體電路χ1〜χ6皆係採用晶 片接合於軟性電路板（c〇F，chip_〇n_mm)之封裝方式（本發 明並不以此為限）’其包括軟性電路板131以及覆晶接合於軟 性電路板131上之驅動晶片133,從而源極驅動積體電路 201123132 XI〜X6係透過軟性電路板131與陣列基板12及印刷電路板14 相電性耦接。 閘極驅動積體電路Y1〜Y 6電性耦接至陣列基板丨2以向閘 極線GL提供閘極驅動訊號來控制晝素p中的電晶體之導通/ 截止狀態。類似地’本實施例之各個閘極驅動積體電路Υ1〜Υ6 亦係採用COF封裝方式，但並不限於此，其還可為其他封裝 方式例如COG (Chip-on-Glass)封裝，又或者是直接整合於 陣列基板12上而得陣列上閘極電路（goA，Gate-on-Array )。 φ 印刷電路板14上形成有時序控制器141及主控制邏輯電 路1320。其中時序控制器141產生初始閘極啟始訊號yDI〇 至各個源極驅動積體電路XI〜Χ6與主控制邏輯電路1320 ;主 控制邏輯電路1320接收各個源極驅動積體電路XI〜χ6產生之 輸出訊號VC_outl〜VC_out6以及時序控制器141提供之初始 閘極啟始訊號YDIO後進行相應的邏輯運算以產生新的閘極 啟始訊號YDIO_T ;在此’輸出訊號vc_〇utl〜VC_out6係分 別與源極驅動積體電路XI〜X6之工作溫度相關，從而此新的 閘極啟始訊號YDIO—T也係與各個源極驅動積體電路XI〜 ® 之工作溫度相關。 請一併參閱圖1、圖2及圖3，圖2及圖3繪示出源極驅 動積體電路XI〜X6 _的驅動晶片133之電路結構的實施型 態。如圖2及圖3所示’驅動晶片133包括輸出級電路1338、 通道開關電路1339a、電荷分享開關電路1339b以及内建的熱 保護電路1330。其中，輸出級電路1338包括多個輸出通道 CH，這些輸入通道CH分別藉由通道開關電路1339a電性耦 接至多個資料線DL以向各個資料線DL提供顯示資料，電荷 分享開關電路13 3 9b電性耦接各個資料線D L至預設電位例如 201123132 享開關電路路13撕與電荷分 3通/戴止狀態與電荷分享開關電路13 = 例如Ν型電日體^關電路1339a可包括多個開關電晶體 生電aa體或p型電晶體；類似地，電荷分享 可包括多個開關電晶體’且這些開關電晶體之導電類'° Computers, desktop monitors, and consumer electronics such as TVs have replaced the traditional cathode ray tube (CRT) display and become the current 'liquid crystal display 11 panel'. z) and high resolution three generous and Ik (4) side is the hybrid drive (four) circuit with the increase of the data line load on the panel, the speed of data update and a large number of output channel circuit sets The bulk circuit generates a large amount of heat so that the temperature of the volume circuit rises, and the temperature of the excessive volume circuit has the risk of burning the circuit. SUMMARY OF THE INVENTION It is an object of the present invention to provide an active matrix display that avoids the risk of burnout of the circuit due to excessive temperature. It is still another object of the present invention to provide a temperature sensing control circuit that avoids the risk of burnout of the circuit due to temperature overshoot. It is still another object of the present invention to provide a temperature sensing control method which avoids the risk of burning of the circuit due to excessive temperature. An active matrix display according to an embodiment of the present invention includes a timing controller, a gate driving circuit, a source driving circuit, and a control logic circuit. The timing controller is configured to generate an initial gate start signal and an initial source control signal; the source drive circuit includes a plurality of source drive integrated circuits 'Each source drive integrated circuit[s] 4 201123132 includes a channel switch circuit, The output stage circuit and the thermal protection circuit, wherein the output stage circuit comprises a plurality of output channels, the output channels are electrically connected to the plurality of data lines by the channel switching circuit to provide display data to the data lines, and the thermal protection circuit senses the source Driving the internal temperature of the integrated circuit, generating an output signal according to the internal temperature, and logically calculating the input signal and the initial gate start signal and the initial source control signal to obtain a new source control signal to control the channel The on/off state of the switch circuit; the control logic circuit drives the integrated circuit to generate power, and the output signal generated by the ί protection circuit and the initial gate start signal perform a logic operation to obtain a new gate start signal to determine Whether the gate drive circuit is enabled. In an embodiment of the invention, each of the source driving integrated circuits further includes a charge splitting circuit, and each of the (4) lines is electrically connected to a preset potential and is controlled by a new source control signal, wherein The on/off state of the charge sharing switch circuit is opposite to the on/off state of the channel switch circuit. In an embodiment of the invention, the thermal protection circuit of each of the source driving integrated circuits includes a thermal sensing circuit, a reference voltage generating circuit, a comparator, and a second control logic circuit; wherein the thermal sensing circuit senses The source drives the internality of the integrated circuit and outputs a sensing voltage corresponding to the internal temperature, the reference voltage generating circuit generates at least one reference voltage, and the comparator generates the output signal according to the sensing voltage and the reference voltage, The second control logic circuit synchronizes the output signal with the initial gate start signal and logically operates the initial source control signal to obtain the new source control signal. In an embodiment of the invention, the second control logic circuit includes an edge-triggered D-type flip-flop and an OR gate; wherein the edge-triggered D-type flip-flop uses the initial gate start signal as an edge trigger signal for the above The output signal performs synchronization, or the gate performs the above-mentioned new source control signal on the input/gate operation of the initial source control signal and the edge-triggered D-type flip-flop. In an embodiment of the invention, the second control logic circuit further includes an inverter for performing an inversion operation on the new source control signal to control the electrical coupling of each data line to a preset potential. The on/off state of the charge sharing switch circuit. In an embodiment of the present invention, the control logic circuit performs the AND gate operation on the output signal generated by the thermal protection circuit of each source driving integrated circuit, and then performs the AND gate operation on the initial gate start signal. The above new gate start signal. In an embodiment of the present invention, the control logic circuit performs the above-mentioned control operation on the output signal generated by the thermal protection circuit of each source-driven integrated circuit, and then performs an AND operation on the initial gate start signal. The new gate starts signal. A temperature sensing control circuit according to an embodiment of the present invention is suitable for use in an active matrix display, wherein the active matrix display includes a timing controller, a source driving circuit, a gate driving circuit, and a plurality of data lines; Generating an initial gate start signal and an initial source control signal, the source driving circuit includes an output stage circuit and a channel switching circuit, and the output stage circuit includes a plurality of output channels 'each output channel is electrically coupled to each by a channel switching circuit The data line provides display information to each data line. The temperature sensing control circuit of the embodiment includes: a thermal protection circuit and a control logic circuit; the thermal protection circuit senses the integrated circuit temperature in the source driving circuit, generates an output signal according to the integrated circuit temperature, and outputs the output signal After the initial gate start signal is synchronized, the initial source control signal is logically operated to obtain a new source control signal to control the channel switch circuit. The control logic circuit performs a logic operation on the output signal and the initial gate start signal to obtain a new gate start signal to determine whether the gate drive ^201123132 is enabled. In an embodiment of the invention, the new source control signal generated by the thermal protection circuit of the temperature sensing control circuit further controls a charge sharing switch circuit electrically coupled to each data line to a preset potential, and The on/off state of the charge sharing switch circuit is opposite to the on/off state of the channel switch circuit. In an embodiment of the invention, the thermal protection circuit of the temperature sensing control circuit includes: a thermal protection circuit, a reference voltage generating circuit, a comparator, and a first control logic circuit; wherein the thermal protection circuit senses the source driving circuit The integrated circuit temperature and output a sensing voltage corresponding to the temperature of the integrated circuit, the reference voltage is generated, the path is used to generate at least one reference voltage, and the comparator generates the output signal according to the sensing voltage and the reference voltage, The second control logic circuit obtains the new source control signal by synchronizing the above-mentioned wheel and the initial gate start signal and the initial source control signal. In an embodiment of the invention, the second control logic circuit of the temperature sensing control circuit includes an edge-triggered D-type flip-flop and an OR gate; wherein the edge-triggered D-type flip-flop uses the initial gate start signal as The edge trigger signal synchronizes the output signal, or the gate performs a new source control signal on the output signal of the initial source control signal and the edge touch D-type flip-flop to perform the above-mentioned new source control signal. In an embodiment of the present invention, the second control logic circuit of the temperature sensing control circuit further includes an inverter to perform an inversion operation on the new source control signal (4). Preset (4) The on/off state of the charge sharing switch circuit. The temperature sensing control method proposed by the embodiment of the invention is suitable for being implemented in a dynamic matrix display, wherein the active matrix display comprises a timing controller, a source driving circuit, a gate driving circuit and a plurality of data lines; 201123132 to generate an initial gate start signal and an initial source control signal. The source drive circuit includes an output stage circuit, and the output stage circuit includes a plurality of output channels for outputting display data. The temperature sensing control method of the embodiment includes the steps of: sensing a volume circuit temperature of the source driving circuit; generating an output signal according to the integrated circuit temperature; synchronizing the output signal with the initial gate start signal and initial source control The signal is logically operated to obtain a new source control signal; the new source control signal is used to determine whether each output channel provides display data to each data line; and the output signal and the initial gate start signal are logically operated to obtain new signals. The gate start signal; and the new gate start signal is used to determine whether the gate drive circuit is enabled. In an embodiment of the invention, the temperature sensing control method further includes the step of: determining whether each data line is shared with a predetermined potential by using a new source control signal after the inversion. In an embodiment of the invention, the step of generating an output signal according to the integrated circuit temperature includes: generating a sensing voltage according to the integrated circuit temperature; and generating the foregoing according to the comparison between the sensing voltage and a set of reference voltages. Output signal. In an embodiment of the invention, the reference voltage includes a first reference voltage and a second reference pro that is greater than the first reference voltage, and the step of generating an output domain according to the green result of the voltage and the reference voltage includes: The measured voltage is less than the first reference voltage, and the input signal is determined to be a high level; the sense voltage is greater than the first reference voltage to determine that the input iin is low; and when the sense voltage is between the reference voltage and the second reference voltage The current level of the output signal is maintained. In the embodiment of the present invention, the step of synchronizing the output signal with the initial polarity and the initial source and the source control signal to obtain a new source control signal includes: outputting the output signal The human to the D-type flip-flop, and the initial gate start signal is used as the edge trigger of the D-type flip-flop. The 201123132 is used to perform the gate operation on the output signal of the D-type flip-flop and the initial source control signal. The new source control signal described above. A temperature sensing control method according to another embodiment of the present invention is suitable for application to an active matrix display, wherein the active matrix display includes a timing controller, a plurality of source driving integrated circuits, a gate driving circuit, and a plurality of materials. The timing controller is configured to generate an initial gate start signal and an initial source control signal. Each source drive integrated circuit includes an output stage circuit and the output stage circuit includes a plurality of output channels to output display data. The temperature sensing control method φ method of the embodiment includes the steps of: sensing a working temperature of each source driving integrated circuit to obtain a plurality of operating temperatures; respectively generating a plurality of output signals according to the respective operating temperatures; each output is δίΐ The number is synchronized with the initial gate start signal and logically operated with the initial source control signal to obtain a plurality of new source control signals; respectively, each new source control signal is used to determine the output of each source drive integrated circuit Whether the channel provides display data to each data line; performs a logic operation on each output signal and the initial gate start signal to obtain a new gate start signal; and uses the new gate start signal to determine whether to enable the gate Pole drive circuit. In an embodiment of the invention, in the temperature sensing control method, the new gate start signal is logically generated for each of the output signals of φ and the initial gate start signal, including the steps of: performing or The non-gate operation; and the result of the NAND operation and the initial gate start signal are gated to obtain the new gate start signal. In an embodiment of the present invention, in the temperature sensing control method, each of the output signals and the initial gate start signal are logically derived to obtain a new gate start signal, including: performing a gate on each output signal The operation and the new gate start signal are performed by performing a gate operation on the result of the gate operation and the initial gate start signal. 201123132 The embodiment of the present invention configures the temperature sensing control circuit in the active matrix display, thereby generating a corresponding control signal to control the operation of the gate driving circuit when the temperature of the integrated circuit in the source driving circuit is sensed to be too high. And cut off the source drive, the connection of the circuit and the lean line, so as to avoid the phenomenon that the power of 4 is too high and the temperature is too high, so as to avoid the risk of the circuit being burnt due to excessive temperature. The above and other objects, features, and advantages of the present invention will become more apparent and understood. [Embodiment] Please refer to FIG. 1, which is a schematic structural diagram of an active matrix display device according to an embodiment of the present invention. As shown in FIG. 1, the active matrix display 10 includes an array substrate 12, a source driving circuit, a gate driving circuit, and a printed circuit board 14. In the embodiment, the source driving f path includes a plurality of source driving integrated circuits XI to X6, and the gate driving circuit includes a plurality of gate driving integrated circuits γι to γ6 disposed on both sides of the array substrate 12 as Bilateral gate drive circuit, but not intended to limit the invention. A plurality of data lines DIj, a plurality of gate lines, and a plurality of pixels p electrically coupled to the data lines DL and the gate lines GL are formed on the array substrate 12 (only one of them is illustrated in FIG. 1 as an example) The array substrate 12 has a display area as shown by a broken line in the figure, and the pixel p is formed in the display area. The source driving integrated circuits X1 to X6 are electrically coupled between the array substrate 12 and the printed circuit board 14 and electrically connected to the data line DL to provide display information to the data line dl. In this embodiment, the source driving integrated circuits χ1 to χ6 are packaged by a wafer bonded to a flexible circuit board (c〇F, chip_〇n_mm) (the invention is not limited thereto), which includes softness. The circuit board 131 and the driving wafer 133 are flip-chip bonded to the flexible circuit board 131, so that the source driving integrated circuits 201123132 XI to X6 are electrically coupled to the array substrate 12 and the printed circuit board 14 through the flexible circuit board 131. The gate driving integrated circuits Y1 to Y6 are electrically coupled to the array substrate 丨2 to supply a gate driving signal to the gate line GL to control the on/off state of the transistor in the pixel p. Similarly, the gate driving integrated circuits Υ1 to Υ6 of the present embodiment are also COF packaged, but are not limited thereto, and may be other packaging methods such as a COG (Chip-on-Glass) package, or It is directly integrated on the array substrate 12 to form an on-grid gate circuit (goA, Gate-on-Array). A timing controller 141 and a main control logic circuit 1320 are formed on the φ printed circuit board 14. The timing controller 141 generates an initial gate start signal yDI 〇 to the respective source drive integrated circuits XI Χ 6 and the main control logic circuit 1320; the main control logic circuit 1320 receives the respective source drive integrated circuits XI χ 产生 6 The output signals VC_out1 to VC_out6 and the initial gate start signal YDIO provided by the timing controller 141 perform corresponding logic operations to generate a new gate start signal YDIO_T; where the 'output signals vc_〇utl~VC_out6 are respectively The operating temperature of the source drive integrated circuits XI to X6 is related, so that the new gate start signal YDIO-T is also related to the operating temperature of each of the source drive integrated circuits XI to ® . Referring to Fig. 1, Fig. 2 and Fig. 3 together, Fig. 2 and Fig. 3 show an embodiment of the circuit configuration of the drive wafer 133 of the source drive integrated circuits XI to X6. As shown in Figures 2 and 3, the drive wafer 133 includes an output stage circuit 1338, a channel switch circuit 1339a, a charge sharing switch circuit 1339b, and a built-in thermal protection circuit 1330. The output stage circuit 1338 includes a plurality of output channels CH. The input channels CH are electrically coupled to the plurality of data lines DL by the channel switching circuit 1339a to provide display data to the respective data lines DL. The charge sharing switch circuit 13 3 9b Electrically coupling each data line DL to a preset potential, for example, 201123132, enjoying the switch circuit path 13 tearing and charge splitting 3-way/wearing state and charge sharing switch circuit 13 = for example, the Ν type electric body body ^1 circuit 1339a may include multiple Switching transistor generates aa or p-type transistor; similarly, charge sharing can include multiple switching transistors 'and the conducting classes of these switching transistors
或;目；通道開關電路職中的開關電晶體之導電類型相同 請:併參閱圖卜圖4、圖5及圖6,圖4纷示出 矩陣顯示H 1G中 < —種熱感測控制電路的電路圖，圖5岭： 出相關於圖4所示熱感測控制電路之多個訊號的時序圖6 繪示出主動式矩陣顯示器之主控制邏輯電路1320的電^圖 之一實施型態。 闺 具體地，圖4所示之熱感測控制電路132包括多個前述之 熱保護電路1330以及前述之主控制邏輯電路1320 ;各個熱保 護電路13 30則係分別内建於各個源極驅動積體電路χ丨〜χ 6内 以感測各個源極驅動積體電路χι〜χ6之内部溫度（亦即積體 電路之工作溫度），但此並非用來限制本發明。各個熱保護電 路1330亦可分別與各個源極驅動積體電路XI〜Χ6熱性連接 (亦即，能夠有效地感測到各個源極驅動積體電路XI〜Χ6的 溫度變化）且與各個源極驅動積體電路XI〜Χ6分離設置，只 要能達成感測到各個源極驅動積體電路XI〜Χ6的工作溫度之 目的即可。 承上述，熱保護電路1330包括熱感測電路1331、參考電 壓產生電路1332、比較器1333以及次控制邏輯電路1334，其 m 12 201123132 中-人控制邏輯電路1334包括邊緣觸發〇型正反器1335、或閘 1336以及反相器1137。 〆 更具體地，熱感測電路1331電性輕接至比較器1333之反 相輸入端（-)，用以感測源極驅動積體電路XI〜中之相庳 者例如Xl(或X6)的工作溫度例wtl(或t6)、依據感測到^ 工作溫度tl (或t6)產生相應的感測電壓例vdi (或VD6)、 並將產生之感測電壓VD1 (或VD6)輸入至比較器1333的反 相輸入端（-)。從圖5可以得知，熱感測電路1331係具有負 • 溫度係數的電路，換言之，其感測到的工作溫度越高，則產生 的感測電壓越低；可以理解的是，本發明並不限於此舉例，熱 感測電路1331也可根據實際應用之需要採用具有正溫度係& 的電路。 參考電壓產生電路1332電性耦接至比較器1333之非反相 輸入端（ + )，用以產生至少一個參考電壓，例如本實施例中 之一組參考電壓Vt+及Vt_，且參考電壓Vt_大於參考電壓Or; the switching circuit of the channel switch circuit has the same conductivity type of the switch transistor: Please refer to Figure 4, Figure 5 and Figure 6, Figure 4 shows the matrix display H 1G <-type thermal sensing control Circuit diagram of the circuit, FIG. 5: Timing of a plurality of signals related to the thermal sensing control circuit shown in FIG. 4, FIG. 6 illustrates an embodiment of the main control logic circuit 1320 of the active matrix display. . Specifically, the thermal sensing control circuit 132 shown in FIG. 4 includes a plurality of the aforementioned thermal protection circuits 1330 and the aforementioned main control logic circuit 1320; each of the thermal protection circuits 13 30 is built in each source driving product. The internal circuits of the respective source drive integrated circuits (1 to χ6 (that is, the operating temperature of the integrated circuit) are sensed in the body circuits χ丨~χ6, but this is not intended to limit the present invention. Each of the thermal protection circuits 1330 can also be thermally connected to each of the source driving integrated circuits XI to Χ6 (that is, the temperature changes of the respective source driving integrated circuits XI to Χ6 can be effectively sensed) and the respective sources The drive integrated circuits XI to Χ6 are separately provided as long as the operation temperature of each of the source drive integrated circuits XI to Χ6 is sensed. In the above, the thermal protection circuit 1330 includes a thermal sensing circuit 1331, a reference voltage generating circuit 1332, a comparator 1333, and a secondary control logic circuit 1334, wherein the m 12 201123132 middle-man control logic circuit 1334 includes an edge-triggered 正-type flip-flop 1335. , or gate 1336 and inverter 1137. More specifically, the thermal sensing circuit 1331 is electrically connected to the inverting input terminal (-) of the comparator 1333 for sensing a phase in the source driving integrated circuit XI~ such as X1 (or X6). The working temperature example wtl (or t6) generates a corresponding sensing voltage example vdi (or VD6) according to the sensed operating temperature t1 (or t6), and inputs the generated sensing voltage VD1 (or VD6) to the comparison. Inverting input (-) of the device 1333. As can be seen from FIG. 5, the thermal sensing circuit 1331 is a circuit having a negative temperature coefficient, in other words, the higher the sensed operating temperature is, the lower the sensing voltage is generated; it is understood that the present invention Not limited to this example, the thermal sensing circuit 1331 may also employ a circuit having a positive temperature system & The reference voltage generating circuit 1332 is electrically coupled to the non-inverting input terminal (+) of the comparator 1333 for generating at least one reference voltage, such as a set of reference voltages Vt+ and Vt_ in the embodiment, and the reference voltage Vt_ Greater than the reference voltage
Vt+。如圖5所示，參考電壓Vt-對應於感測到的工作溫度為參 考溫度t-時之感測電壓，參考電壓Vt+對應於感測到的工作溫 度為參考溫度t+時之感測電壓；其中參考溫度t+大於參考溫 度t-。 比較器1333之輸出端電性輕接至主控制邏輯電路以 及邊緣觸發D型正反器1335,因此其輸出端產生之輸出訊號 例如VC_outl (或VC_out6)將輸入至主控制邏輯電路mo 以及邊緣觸發D型正反器1335之資料輸入端D。如圖5所示， 輸出訊號VC_outl之位準由感測電壓VD1與參考電壓vt+及 相對大小關係決定，當感測到的工作溫度〖丨高於參考溫 度Η時，對應感測電壓VD1小於參考電壓vt+，此時輸出二 13 201123132 _為高位準；之後，#__讀溫度u低 於，考溫度t-時，對應感測電· VD1大於參考電壓％，此時 ，出訊號vc_Gutl才從高位準跳變為低位準；而當感測到的工 作溫度U介於參考溫度t·與參考溫度t+之間時，對應感測電 介於參考電壓vt读參考電壓vt_之間，此時輸出訊號 _outl之位準保持為當前位準。類似地，輸出訊號 之位準由感測電壓VD6與參考電壓vt+及vt_之相對大小-關係 決定。Vt+. As shown in FIG. 5, the reference voltage Vt- corresponds to the sensing voltage when the sensed operating temperature is the reference temperature t-, and the reference voltage Vt+ corresponds to the sensing voltage when the sensed operating temperature is the reference temperature t+; Wherein the reference temperature t+ is greater than the reference temperature t-. The output of the comparator 1333 is electrically connected to the main control logic circuit and the edge-triggered D-type flip-flop 1335, so that the output signal generated by the output thereof, such as VC_outl (or VC_out6), is input to the main control logic circuit mo and the edge trigger. The data input terminal D of the D-type flip-flop 1335. As shown in FIG. 5, the level of the output signal VC_outl is determined by the relationship between the sensing voltage VD1 and the reference voltage vt+ and the relative magnitude. When the sensed operating temperature is higher than the reference temperature, the corresponding sensing voltage VD1 is smaller than the reference. Voltage vt+, at this time output 2 13 201123132 _ is high level; afterwards, #__ reading temperature u is lower than, when the temperature t- is measured, the corresponding sensing power · VD1 is greater than the reference voltage %, at this time, the signal vc_Gutl is only The high level quasi-jump becomes a low level; and when the sensed operating temperature U is between the reference temperature t· and the reference temperature t+, the corresponding sensing current is between the reference voltage vt and the reference voltage vt_, at this time The level of the output signal _outl remains at the current level. Similarly, the level of the output signal is determined by the relative magnitude of the sense voltage VD6 and the reference voltages vt+ and vt_.
邊緣觸發D型正反器1335之時脈輸入端（CK)因電性柄 接關係而接收來自時序控制n 141之初始閘極啟始訊號The clock input (CK) of the edge-triggered D-type flip-flop 1335 receives the initial gate start signal from the timing control n 141 due to the electrical handle relationship
YDIO 作為邊緣號’以使輸纽細如vc—耐（或vc_祕) 與初始閘極啟始訊號YDI〇同步而得同步後的輸出訊號郡 (或 VQ6)。 或問1336因電性#接關係而接收同倾的輸出訊號νφ (或VQ6)以及由圖1所科序控㈣141產生之初始源極控 制訊號STB ’並對同步後的輸出訊號釋（或VQ6)與初始 源極控制訊號STB執行或閘運算後而得新的源極控制訊號 VCT_EN1 (或VCT—EN6)。本實施例中，新的源極控制訊號 VCT—EN1 (或VCT—EN6)將作為通道開關電路1339a之控制 訊號以決定通道開關電路1339a内之各個開關電晶體之導通/ 戴止狀態。結合圖5可以得知，當同步後的輸出訊號VQ1 (或 VQ6)為咼位準時’表示源極驅動積體電路XI (或乂6)之當 刚工作溫度過高，則新的源極源極控制訊號 VCT_EN1 (或 VCT_EN6)使源極驅動積體電路χι (或χ6)内的通道開關 電路1338截止’從而源極驅動積體電路χ1 (或χ6)停止向 資料線DL提供顯示資料，如此可避免大電流的抽載而造成功 201123132 溫ί過高之現象；之後，待同步後的輪出訊號哪 (或VQ6)為低位準時，表示源極驅動積體電路a (或糾 度t經下降_作溫度範圍内’則新的源極控制訊號 — 或VCT一EN6)使源極驅動積體電路XI (戋χ6) 内的通道開關電路1338導通，從而源極驅動積體電路幻（或 X6)可繼續向資料線DL提供顯示資料。YDIO is the output signal county (or VQ6) that is synchronized with the edge number ' to synchronize the input signal such as vc-resistant (or vc_ secret) with the initial gate start signal YDI〇. Or 1336 receives the same tilted output signal νφ (or VQ6) and the initial source control signal STB generated by the sequence control (4) 141 of FIG. 1 and outputs the synchronized output signal (or VQ6). A new source control signal VCT_EN1 (or VCT_EN6) is obtained after the gate control operation is performed with the initial source control signal STB. In this embodiment, the new source control signal VCT_EN1 (or VCT-EN6) will be used as the control signal of the channel switch circuit 1339a to determine the on/off state of each of the switch transistors in the channel switch circuit 1339a. As can be seen from FIG. 5, when the synchronized output signal VQ1 (or VQ6) is clamped, it means that the source drive integrated circuit XI (or 乂6) has a new operating temperature when the operating temperature is too high. The pole control signal VCT_EN1 (or VCT_EN6) turns off the channel switching circuit 1338 in the source driving integrated circuit χι (or χ6), so that the source driving integrated circuit χ1 (or χ6) stops providing the display data to the data line DL, so It can avoid the phenomenon that the high current is pumped up and the temperature of 201123132 is too high. After that, when the round signal after synchronization (or VQ6) is low, it means that the source drives the integrated circuit a (or the correction t In the falling _ temperature range, the new source control signal - or VCT - EN6 - turns on the channel switching circuit 1338 in the source driving integrated circuit XI (戋χ6), so that the source drives the integrated circuit phantom (or X6) Continue to provide display data to the data line DL.
反相器1337電性耗接至或閘1336之輸出端以對新的源極 控制訊號VCT—EN1 (或VCT—EN6)騎反_作而得反相後 籲讀的源極控制訊號。本實施例中，反相後之新的源極控制訊 號VCT_EN1 (或VCT—EN6)將作為電荷分享開關電路133% 之控制訊號以決定電荷分享開關電路133%内之各個開關電 晶體之導通/截止狀態。在此，由於電荷分享開關電路133% 之導通/截止狀態與通道開關電路1339a之導通/截止狀態相 反，因此在源極驅動積體電路X1 (或Χ6)停止向資料線“DL 提供顯示資料期間，可將資料線DL與預設電位例如vc〇M 或AGND進行電荷分享，以有效消除主動式矩陣顯示器1〇顯 示過程中之殘影現象。 • 圖6所示之主控制邏輯電路132〇包括或非閘以及與閘， 用以對各個源極驅動積體電路χι〜Χ6之輸出訊號 VC_0utl〜VC_out6進行或非閘運算後再和初始閘極啟始訊號 YDIO進行與閘運算而得新的閘極啟始訊號yDI〇_t，以決定 是否致能閘極驅動電路中之閘極驅動積體電路γι〜γ6。從圖5 中可以付知’輸出§凡號VC一outl〜VC_out6 (圖5中僅示出 VC_outl及VC_out6)中存在至少一者為高位準（表示源極驅 動積體電路XI〜X6中至少一者之工作溫度過高）時，即使初 始閘極啟始訊號YDI0中啟始脈衝到來，新的閘極啟始訊號 201123132 YDIO_T仍保持為低位準直至下一個啟始脈衝之到來以及所 有源極驅動積體電路Χ1〜Χ6之工作溫度皆位於操作溫度 内。 於其他實施例中，主控制邏輯電路1320也可具有其他合 適的電路結構，例如當感測到的工作溫度過高，對應比較器 1333產生之輸出訊號vc—〇utl〜vc_〇ut6為低位準而非前述實 施例中之高位準時，主控制邏輯電路132〇可採用圖7所示的 電路結構。具體地，圖7所示之主控制邏輯電路132〇包括二 φ 與閘’以對各個源極驅動積體電路XI〜X6之輸出訊號 VC—out 1〜VC—out6進行與閘運算後再和初始閘極啟始訊^ YDI0進行與閘運算而得新的閘極啟始訊號YDIO-T來決定是 否致能閘極驅動電路中之閘極驅動積體電路γι〜γ6，其可達 成相同之目的。 綜上所述’本發明實施例於主動式矩陣顯示器中配置溫度 感測控制電路，藉此當感測到源極驅動電路中之積體電路溫度 過高時產生相應的控制訊號去控制閘極驅動電路的操作以^ 切斷源極驅動電路與資料線的連接，如此可避免大電流的抽載 • 而造成功率消耗大溫度過高之現象，以有效避免電路因溫度過 高而造成燒毀之風險。 另外，任何熟習此技藝者還可對本發明上述實施例提出的 主動式矩陣顯示器及熱感測控制電路之結構作適當變更，例如 適當變更源極驅動積體電路的數量、閘極驅動積體電路的數 直、主控制邏輯電路之電路結構、次控制邏輯電路之電路结構 等等，只要能達成有效避免電路因溫度過高而造成燒毁風險之 目的均可。 雖然本發明已以較佳實施例揭露如上，然其並非用以限定 201123132 本發明’任何熟習此技藝者，在*麟本發明 内，=可作些許之更動與潤飾，因此本發 ^觀圍 附之申請專·_界定者轉。 平農乾圍$視後 【圖式簡單說明】 器的Γ構丨/tT。㈣於本發明實施例之―種主動式轉顯示 路結型=示源極w動積體電路中的畔晶片之電 路結=:=源極驅動積雜電路中的*動晶片之電 制電所示主動式矩陣顯示器中之—種熱感測控 時序出相關於圖4所示熱感測控制電路之多個訊號的 的電==主動式矩陣顯示器之主控制娜The inverter 1337 is electrically connected to the output of the OR gate 1336 to reverse the read-back source control signal for the new source control signal VCT-EN1 (or VCT-EN6). In this embodiment, the inverted new source control signal VCT_EN1 (or VCT_EN6) will serve as the control signal of the charge sharing switch circuit 133% to determine the conduction of each switching transistor in the charge sharing switch circuit 133%. Cutoff status. Here, since the on/off state of the charge sharing switch circuit 133% is opposite to the on/off state of the channel switch circuit 1339a, the source drive integrated circuit X1 (or Χ6) stops supplying the display data to the data line "DL". The data line DL can be charge-shared with a preset potential such as vc〇M or AGND to effectively eliminate the image sticking phenomenon in the display process of the active matrix display. • The main control logic circuit 132 shown in FIG. The non-gate and the gate are used to perform a gate operation on the output signals VC_0utl~VC_out6 of the respective source drive integrated circuits χι to Χ6, and then perform a gate operation with the initial gate start signal YDIO to obtain a new gate. The pole start signal yDI〇_t is used to determine whether the gate drive integrated circuit γι~γ6 in the gate drive circuit is enabled. It can be seen from Fig. 5 that the output § 凡凡 VC an outl ~ VC_out6 (in Figure 5 It is only shown that at least one of VC_out1 and VC_out6) is at a high level (indicating that the operating temperature of at least one of the source driving integrated circuits XI to X6 is too high), even if the initial gate start signal YDI0 starts the pulse. arrival The new gate start signal 201123132 YDIO_T remains at the low level until the next start pulse and the operating temperatures of all the source drive integrated circuits Χ1~Χ6 are within the operating temperature. In other embodiments, the main control The logic circuit 1320 can also have other suitable circuit structures. For example, when the sensed operating temperature is too high, the output signal vc_〇utl~vc_〇ut6 generated by the corresponding comparator 1333 is a low level instead of the foregoing embodiment. When the high level is on time, the main control logic circuit 132 can adopt the circuit structure shown in Fig. 7. Specifically, the main control logic circuit 132 shown in Fig. 7 includes two φ and gate ' to drive the integrated circuit XI to each source. X6 output signal VC_out 1~VC_out6 performs the gate operation and then the initial gate start signal ^YDI0 to perform the gate operation to obtain a new gate start signal YDIO-T to determine whether to enable the gate The gate in the driving circuit drives the integrated circuits γι~γ6, which can achieve the same purpose. In summary, the embodiment of the present invention configures a temperature sensing control circuit in an active matrix display, thereby sensing when When the temperature of the integrated circuit in the source driving circuit is too high, a corresponding control signal is generated to control the operation of the gate driving circuit to cut off the connection between the source driving circuit and the data line, thereby avoiding the pumping of a large current. The phenomenon that the power consumption is too high and the temperature is too high, so as to effectively avoid the risk of the circuit being burnt due to excessive temperature. In addition, any active matrix display and thermal sensing control circuit proposed by the above embodiments of the present invention can also be used by anyone skilled in the art. The structure is appropriately changed, for example, the number of source drive integrated circuits, the number of gate drive integrated circuits, the circuit structure of the main control logic circuit, the circuit structure of the secondary control logic circuit, and the like are appropriately changed, as long as effective Avoid the possibility of burning the circuit due to excessive temperature. Although the present invention has been disclosed in the preferred embodiments as above, it is not intended to limit the invention of the present invention to any one of the inventions. In the invention, it is possible to make some changes and retouching. Attached to the application of the special _ define the transfer. Pingnong dry circumference after the view of the [simplification of the diagram] the structure of the device / tT. (4) In the embodiment of the present invention, an active turn display junction type = a circuit of a source wafer in a source-source w-body circuit ====================================================================== The thermal sensing control timing in the active matrix display shows the electrical control of the plurality of signals related to the thermal sensing control circuit shown in FIG. 4 == the main control of the active matrix display
的電動式矩_示器之主控制邏細 【主要元件符號說明】 10 :主動式矩陣顯示器 12 :陣列基板 14 :印刷電路板 XI〜X6 :源極驅動積體電路 Y1〜Y6 ·閘極驅動積體電路 DL :資料線 GL :閘極線 201123132 1320 :主控制邏輯電路 141 :時序控制器 131 :軟性電路板 133 :驅動晶片 VC_outl〜VC_out6 :輸出訊號 YDIO :初始閘極啟始訊號 YDIO_T :新的閘極啟始訊號 VCOM :共用電壓 • p:畫素 1330 :熱保護電路 1338 :輸出級電路 1339a :通道開關電路 1339b :電荷分享開關電路 CH :輸出通道 AGND :類比接地電位 132 :熱感測控制電路 1331 :熱感測電路 # 1332 :參考電壓產生電路 1333 :比較器 1334 :次控制邏輯電路 1335 :邊緣觸發D型正反器 1336 :或閘 1337 :反相器 VD1、VD6 :感測電壓The main control logic of the electric moment_displayer [main component symbol description] 10: active matrix display 12: array substrate 14: printed circuit board XI~X6: source drive integrated circuit Y1~Y6 · gate drive Integrated circuit DL: data line GL: gate line 201123132 1320: main control logic circuit 141: timing controller 131: flexible circuit board 133: drive wafer VC_outl~VC_out6: output signal YDIO: initial gate start signal YDIO_T: new Gate start signal VCOM: shared voltage • p: pixel 1330: thermal protection circuit 1338: output stage circuit 1339a: channel switch circuit 1339b: charge sharing switch circuit CH: output channel AGND: analog ground potential 132: thermal sensing Control circuit 1331: Thermal sensing circuit # 1332: Reference voltage generating circuit 1333: Comparator 1334: Secondary control logic circuit 1335: Edge triggered D-type flip-flop 1336: or Gate 1337: Inverters VD1, VD6: Sense voltage
Vt+、Vt-:參考電壓 VC outl、VC out6 :輸出訊號 201123132 STB :初始源極控制訊號 VQ1、VQ6 :同步後的輸出tfl號 VCT一EN卜VCT_EN6 :新的源極控制訊號 t+、t- ·參考溫度 [S]Vt+, Vt-: reference voltage VC outl, VC out6: output signal 201123132 STB: initial source control signal VQ1, VQ6: output after synchronization tfl number VCT-EN Bu VCT_EN6: new source control signal t+, t- · Reference temperature [S]
1919