201114138 六、發明說明： 【發明所屬之技術領域】 本發明涉及一種放電電路，尤其涉及一種消耗 • 功率較小且放電時間可調節的自動高壓放電電路。 ^ 【先前技術】 驅動電路主要用來將輸入的直流電壓’作電麼 位元准的調節，並使其穩定在所設定的一電壓值， • 其利用驅動上橋及下橋功率元件的切換而產生脈 波，此脈波經過電感電容組成的低通濾波器後產生 穩定的直流電壓，以供給各種電子產品，具體請參 閱Volkan Kursun等人2004年在IEEE系統中發表 的 “HIGH INPUT VOLTAGE STEP-DOWN DC-DC CONVERTERS FOR INTEGRATION IN A LOW VOLTAGE CMOS PROCESS” 一文。 g 在驅動電路中，一般需要增加一個功率因素校 正電路（Power Factor Corrector，PFC )，用以改變輸 入電流的波形與相角，修正電流中的高次諧波。具 體地，該功率因素校正電路包括一個濾波電容，以 通過該濾波電容有效地修正電流中的高次諧波。該 濾波電容的大小取決於負載的大小，負載越大，該 濾、波電容也就越大。 當電源接通時，負載正常工作，該濾波電容可 有效地修正電流中的高次諧波，同時，該濾波電容 201114138BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a discharge circuit, and more particularly to an automatic high-voltage discharge circuit that consumes less power and has an adjustable discharge time. ^ [Prior Art] The driver circuit is mainly used to adjust the input DC voltage to the voltage level and stabilize it at a set voltage value. • It uses the switching of the upper and lower bridge power components. A pulse wave is generated, which generates a stable DC voltage through a low-pass filter composed of an inductor and a capacitor to supply various electronic products. For details, please refer to "HIGH INPUT VOLTAGE STEP" published by Volkan Kursun et al. in IEEE System in 2004. -DOWN DC-DC CONVERTERS FOR INTEGRATION IN A LOW VOLTAGE CMOS PROCESS". g In the driver circuit, it is generally necessary to add a Power Factor Corrector (PFC) to change the waveform and phase angle of the input current and correct the higher harmonics in the current. Specifically, the power factor correction circuit includes a filter capacitor to effectively correct higher harmonics in the current through the filter capacitor. The size of the filter capacitor depends on the size of the load. The larger the load, the larger the filter and wave capacitance. When the power is turned on, the load works normally. The filter capacitor can effectively correct the higher harmonics in the current. At the same time, the filter capacitor 201114138
=存電當電源斷開時，負餅止工作， 儲: 子在該慮波電容中的電能並不能通過負载釋放， ^而通過自然放電將儲存在該滤波電容中的電能釋 其放電時間較長，容易出現高壓觸電。為避免 觸電危險，一般利用電阻將儲存在該濾波電容 =咖放掉。且為了避免消耗過多功率，而選 =電阻對該濾波電容進行放電。但是，選用大電 :放電，其放電時間較長，以致儲存在該濾波電容 的電壓赌存時間較長，仍可能導致高壓觸電危險。 有鑒於此，有必要提供一種消耗功率較小且放 電時間可以調節的放電電路。 【發明内容】 Γ囬埘以貫施例說明 日守間可以調節的自動高壓放電電路 —種放電電路，其與一個功率因素校正電路丨 2出端電連接’且該功率因素校正電路的輸出端〕 義為第一節點，該功率因素校正電路中具有一個; 波電容。該放電電路包括一個第一二極體，—個 輕δ器，一個第一二極體，一個第一電容，一個; 電I元，以及一個ΝΡΝ型三極體。該第—二極體丨 正極與一個外接電壓電連接。該光耦合器具有一> 初級面與一個次級面，該初級面的輸入端與該第 一極體的負極電連接，該次級面的輸入端外接一〗 201114138 入電壓。該第二二極體的正極與該初級面的輸出端 電連接。該第一電容的正極與該第二二極體的負極 電連接，該第一電容的負極接地。該放電單元包括 一個MOSFET以及一個放電電阻。該MOSFET的柵 極與該第一電容的正極電連接，該MOSFET的源極 接地，該MOSFET的漏極通過該放電電阻與第一節 點電連接。該NPN型三極體的基極與該次級面的輸 出端電連接，該NPN型三極體的發射極接地，該 NPN型三極體的集電極與該第一電容的正極電連 接。 相對於先前技術，當電路接通時，該功率因素 校正電路正常工作，該濾波電容用於濾除電源電路 中的高次諧波，並儲存電能。該光耦合器與該NPN 型二極體導通’該第'一電容儲存電能。由於該 MOSFET戴止，因此，該放電電路消耗的功率較小。 • 當電路斷開時，該光耦合器與該NPN型三極體截 止，儲存在第一電容中的電能釋放，以使該MOSFET 導通，從而使儲存在該濾、波電容中的電能通過該放 電單元自動進行放電，以避免高壓觸電危險。並且 可以通過調節該放電電阻的阻值大小調節放電時 間，實現快速放電目地。 【實施方式】 下面將結合附圖對本發明實施方式作進一步的 2〇1114138 詳細說明。 Η)二!：1’本發明實施例提供的-種放電電路 體地’該功率因素校正電之：。具 輸出㈣㈣20的輸入& vln與電源 ‘出鳊電連接，該功率因素校正電路20的輸出端定 義為第-節點A。該功率因素校正電路== Storage When the power is disconnected, the negative cake stops working, and the energy stored in the wave capacitor is not released by the load. ^ The natural discharge discharges the electrical energy stored in the filter capacitor. Long, prone to high voltage electric shock. In order to avoid the risk of electric shock, the resistor is usually stored in the filter capacitor = coffee. In order to avoid consuming too much power, the resistor is selected to discharge the filter capacitor. However, the selection of large electricity: discharge, its discharge time is too long, so that the voltage stored in the filter capacitor is longer, which may still cause high voltage electric shock. In view of this, it is necessary to provide a discharge circuit that consumes less power and can adjust the discharge time. SUMMARY OF THE INVENTION An automatic high-voltage discharge circuit that can be adjusted between day-to-day guards is described as a discharge circuit electrically connected to an output of a power factor correction circuit 丨2 and the output of the power factor correction circuit 〕 is the first node, the power factor correction circuit has one; wave capacitance. The discharge circuit includes a first diode, a light delta device, a first diode, a first capacitor, an electric cell, and a germanium triode. The first diode 丨 positive electrode is electrically connected to an external voltage. The optocoupler has a primary surface and a secondary surface. The input end of the primary surface is electrically connected to the negative pole of the first polar body, and the input end of the secondary surface is externally connected to a voltage of 201114138. The positive electrode of the second diode is electrically coupled to the output of the primary face. The anode of the first capacitor is electrically connected to the cathode of the second diode, and the cathode of the first capacitor is grounded. The discharge cell includes a MOSFET and a discharge resistor. The gate of the MOSFET is electrically connected to the anode of the first capacitor, the source of the MOSFET is grounded, and the drain of the MOSFET is electrically connected to the first node through the discharge resistor. The base of the NPN-type triode is electrically connected to the output end of the secondary surface, the emitter of the NPN-type triode is grounded, and the collector of the NPN-type triode is electrically connected to the anode of the first capacitor. In contrast to the prior art, the power factor correction circuit operates normally when the circuit is turned on, and the filter capacitor is used to filter out higher harmonics in the power supply circuit and store electrical energy. The optocoupler is electrically coupled to the NPN-type diode to store the electrical energy. Since the MOSFET is worn, the discharge circuit consumes less power. • When the circuit is disconnected, the optocoupler and the NPN-type triode are turned off, and the electric energy stored in the first capacitor is released to turn on the MOSFET, so that the electric energy stored in the filter and the wave capacitor passes through the The discharge unit automatically discharges to avoid the risk of high voltage electric shock. And the discharge time can be adjusted by adjusting the resistance of the discharge resistor to achieve a rapid discharge target. [Embodiment] Hereinafter, embodiments of the present invention will be further described in detail with reference to the accompanying drawings. Η) 二!: 1' The discharge circuit provided by the embodiment of the present invention is 'the power factor correction electric:. The input & vln having the output (4) (four) 20 is connected to the power supply ‘outlet, and the output of the power factor correction circuit 20 is defined as the first node A. The power factor correction circuit =
固遽、波電容21’其用於遽除電源電流中的高次譜波。 該放電電路10包括一個第一二極體^，—個光 耗ΰ器12’ 一個第二二極體13，一個第一電容μ， 一個ΝΡΝ型三極體15以及一個放電單元16。 ^弟一二極體U的正極與外接電壓vdd電連 接。在本實施例中，該外接電壓VDD為功率因素校 正電路20輸出的一個15伏左右的辅助電壓，當功 率因素校正電路20斷開時，該外接電壓VDD斷 即為0伏。 該光輕合器12包括一個初級面121與一個次級 面122。該初級面121具有一個輸入端i21a以及一 個輸出端121b。該次級面122具有一個輸入端i22a 以及一個輸出端122b。該光麵合器12的初級面121 的輸入端121a與該第一二極體11的負極電連接。 該光耦合器12的次級面122的輸入端122a直接與 外接電壓VDD電連接。該光搞合器12的次級面122 的輸出端122b通過一個第一電阻191接地。 201114138 優選地，在該光耦合器12的初級面121的輸入 端121a與該第一二極體11的負極之間設置一個穩 壓二極體17。該穩壓二極體17的正極與該光耦合 器12的初級面121的輸入端121a電連接。該穩壓 二極體17用於保證該光耦合器12的輸入電壓為恒 壓。 該第二二極體13的正極與該光耦合器12的初 級面121的輸出端121b電連接，其負極與該第一電 容14的正極電連接。該第一電容14的負極接地。 優選地，在該第二二極體13與該光耦合器12 的初級面121的輸出端121b之間設置一個分壓電路 18。具體地，該分壓電路18包括一個第二電容181， 一個第二電阻182、一個第三電阻183以及一個第 四電阻184。該第二電阻182與該第三電阻183串 聯設置於該光耦合器12的初級面121的輸出端121b 與第二二極體13之間，且該第二電阻182與該第三 電阻183相連接處定義為第二節點B。該第四電阻 184與該第二電容181並聯，且該並聯電路一端與 該第二®點B電連接，另一端接地。The solid-state, wave capacitor 21' is used to remove high-order spectral waves in the power supply current. The discharge circuit 10 includes a first diode, a light damper 12', a second diode 13, a first capacitor μ, a 三-type triode 15 and a discharge cell 16. ^ The positive pole of the dipole U is electrically connected to the external voltage vdd. In the present embodiment, the external voltage VDD is an auxiliary voltage of about 15 volts outputted by the power factor correction circuit 20. When the power factor correction circuit 20 is turned off, the external voltage VDD is 0 volts. The light combiner 12 includes a primary face 121 and a secondary face 122. The primary surface 121 has an input terminal i21a and an output terminal 121b. The secondary surface 122 has an input end i22a and an output end 122b. The input end 121a of the primary surface 121 of the optical finisher 12 is electrically connected to the negative electrode of the first diode 11. The input terminal 122a of the secondary side 122 of the optical coupler 12 is directly electrically coupled to the external voltage VDD. The output end 122b of the secondary face 122 of the optical combiner 12 is grounded via a first resistor 191. 201114138 Preferably, a voltage stabilizing diode 17 is disposed between the input end 121a of the primary surface 121 of the optical coupler 12 and the negative terminal of the first diode 11. The positive electrode of the stabilizing diode 17 is electrically connected to the input end 121a of the primary surface 121 of the optical coupler 12. The voltage stabilizing diode 17 is used to ensure that the input voltage of the photocoupler 12 is constant. The anode of the second diode 13 is electrically connected to the output end 121b of the primary surface 121 of the photocoupler 12, and the cathode thereof is electrically connected to the anode of the first capacitor 14. The negative pole of the first capacitor 14 is grounded. Preferably, a voltage dividing circuit 18 is disposed between the second diode 13 and the output end 121b of the primary surface 121 of the optical coupler 12. Specifically, the voltage dividing circuit 18 includes a second capacitor 181, a second resistor 182, a third resistor 183, and a fourth resistor 184. The second resistor 182 is disposed in series with the third resistor 183 between the output end 121b of the primary surface 121 of the optical coupler 12 and the second diode 13 , and the second resistor 182 is opposite to the third resistor 183 . The connection is defined as the second node B. The fourth resistor 184 is connected in parallel with the second capacitor 181, and one end of the parallel circuit is electrically connected to the second ® point B, and the other end is grounded.
該NPN型三極體15的基極通過一個第五電阻 192與該光耦合器12的次級面122的輸出端122b 電連接。該NPN型三極體15的集電極通過一個第 六電阻193與該第一電容14的正極電連接。該NPN 201114138 型三極體15的發射極接地。 該放電單元16包括一個MQSFET 161以及一個 放電電阻162。優選地，該MOSFET 161的柵極通 • 過一個第七電阻194與該第NPN型三極體的集電極 • 電連接。該MOSFET 161的源極接地，其漏極該放 電電阻162與負載電源Vin電連接。 當電路接通時，即該功率因素校正電路20的輸 • 入端Vin與該外接電壓VDD均接通，該功率因素校 正電路20正常工作，該濾波電容21用於濾除電源 電路中的高次諧波，並儲存電能。光耦合器12導 通，該第一電容14儲存電能，並可以通過控制該分 壓電路18的各電阻的大小，可以控制儲存在該第一 電容14中的電量的多少。同時，該NPN型三極體 15的基極電壓約為VDD，該NPN型三極體15導 通，該NPN型三極體15的集電極的電壓趨近於零，The base of the NPN-type triode 15 is electrically connected to the output terminal 122b of the secondary face 122 of the photocoupler 12 via a fifth resistor 192. The collector of the NPN type triode 15 is electrically connected to the positive electrode of the first capacitor 14 through a sixth resistor 193. The emitter of the NPN 201114138 type triode 15 is grounded. The discharge cell 16 includes an MQSFET 161 and a discharge resistor 162. Preferably, the gate of the MOSFET 161 is electrically connected to the collector of the first NPN-type transistor via a seventh resistor 194. The source of the MOSFET 161 is grounded, and the discharge resistor 162 is electrically connected to the load power source Vin. When the circuit is turned on, that is, the input terminal Vin of the power factor correction circuit 20 and the external voltage VDD are both turned on, the power factor correction circuit 20 operates normally, and the filter capacitor 21 is used to filter out the high voltage in the power circuit. Subharmonic and store electrical energy. The photocoupler 12 is turned on, the first capacitor 14 stores electrical energy, and the amount of electric charge stored in the first capacitor 14 can be controlled by controlling the magnitude of each resistor of the voltage dividing circuit 18. Meanwhile, the base voltage of the NPN type triode 15 is about VDD, the NPN type triode 15 is turned on, and the voltage of the collector of the NPN type triode 15 approaches zero.
B 即該MOSFET 161的柵極電壓基本為零，該MOSFET 161截止，因此，該放電電路消耗的功率較小。 當電路斷開時，即該功率因素校正電路20的輸 入端Vin與該外接電壓VDD均斷開，該光耦合器 12截止，該NPN型三極體15的基極電壓為零，該 NPN型三極體15截止。儲存在該第一電容14中的 電量通過該第六電阻193與該第七電阻194提供一 個偏壓給MOSFET 161，以使該MOSFET 161導通。 201114138 因此’儲存在該濾波電容21中的電能通過該放電單 凡丄6自動進行放電，以避免高壓觸電危險。並且， 儲存在第一電容14中的電能也可以通過該放電單 元16自動進行放電。 該放電電路10用於釋放儲存在該濾波電容21 中的電能，其放電快慢取決於該放電電阻162的大 小。具體地，該放電電阻162越大，放電越慢，放 電時間越長，反之’該放電電阻162越小，放電越 快’放電時間越短。可以理解的是，儲存在該第一 電容14中的電能也通過該放電電路進行釋放。 而該第電谷14中的電能的放電快慢則取決於該 刀壓電路18中各電阻的大小。具體地，該放電電路 10的外接電壓經過該分壓電路18之後，部分電壓 儲存在該第一電容14中，該分壓電路18分配給該 第一電容14的電壓越多，則需要的放電時間越長， 反之，該第一電容14中儲存的電壓越少，需要的放 電時間越短。 該放電電路10結構簡單，消耗的功率較小，可 ^自動將儲存在濾、波電容21中的電_放，以避免 同壓觸電危險。並且可以通過調節該放電電阻162 的阻值大小調節放電時間’實現快速放電目地。 另外’本領域技術人員還可於本發明精神内做 其他變化用於本發明的設計，只要其不偏離本發明 11 201114138 的技術效果均可。這些依據本發明精神所做的變 化，都應包含在本發明所要求保護的範圍之内。 【圖式簡單說明】 圖1是本發明實施例提供的放電電路的電路示 意圖。B, that is, the gate voltage of the MOSFET 161 is substantially zero, and the MOSFET 161 is turned off, so that the discharge circuit consumes less power. When the circuit is disconnected, that is, the input terminal Vin of the power factor correction circuit 20 is disconnected from the external voltage VDD, the optical coupler 12 is turned off, and the base voltage of the NPN-type triode 15 is zero, the NPN type The triode 15 is turned off. The amount of electricity stored in the first capacitor 14 is supplied to the MOSFET 161 via the sixth resistor 193 and the seventh resistor 194 to turn the MOSFET 161 on. 201114138 Therefore, the electric energy stored in the filter capacitor 21 is automatically discharged through the discharge unit 6 to avoid the risk of high voltage electric shock. Moreover, the electrical energy stored in the first capacitor 14 can also be automatically discharged through the discharge unit 16. The discharge circuit 10 is for discharging the electric energy stored in the filter capacitor 21, and the discharge speed depends on the size of the discharge resistor 162. Specifically, the larger the discharge resistor 162 is, the slower the discharge is, and the longer the discharge time is. On the contrary, the smaller the discharge resistor 162 is, the faster the discharge is. The discharge time is shorter. It can be understood that the electrical energy stored in the first capacitor 14 is also released through the discharge circuit. The speed of discharge of the electrical energy in the first valley 14 depends on the magnitude of each resistor in the blade circuit 18. Specifically, after the external voltage of the discharge circuit 10 passes through the voltage dividing circuit 18, a part of the voltage is stored in the first capacitor 14. The more voltage the voltage dividing circuit 18 allocates to the first capacitor 14, the more The longer the discharge time, the less the voltage stored in the first capacitor 14, the shorter the discharge time required. The discharge circuit 10 has a simple structure and consumes less power, and can automatically discharge the electricity stored in the filter and wave capacitor 21 to avoid the risk of electric shock at the same voltage. And the discharge time can be adjusted by adjusting the resistance value of the discharge resistor 162 to achieve a rapid discharge target. Further, those skilled in the art can make other variations within the spirit of the invention for use in the design of the present invention as long as it does not deviate from the technical effects of the present invention 11 201114138. All changes made in accordance with the spirit of the invention are intended to be included within the scope of the invention. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a circuit diagram of a discharge circuit according to an embodiment of the present invention.
【主要元件符號說明】 放電電路 10 功率因素校正電路 20 濾波電容 21 第一二極體 11 光柄合器 12 第二二極體 13 第一電容 14 NPN型三極體 15 放電單元 16 初級面 121 次級面 122 初級面的輸入端 121a 初級面的輸出端 121b 次級面的輸入端 122a 次級面的輸出端 122b 第一電阻 191 12 201114138 穩壓二極體 17 分壓電路 18 第二電容 181 第二電阻 182 第三電阻 183 第四電阻 184 第五電阻 192 第六電阻 193 MOSFET 161 放電電阻 162 第七電阻 194[Main component symbol description] Discharge circuit 10 Power factor correction circuit 20 Filter capacitor 21 First diode 11 Optical shank 12 Second diode 13 First capacitor 14 NPN type triode 15 Discharge unit 16 Primary surface 121 Secondary surface 122 primary surface input terminal 121a primary surface output terminal 121b secondary surface input terminal 122a secondary surface output terminal 122b first resistor 191 12 201114138 voltage stabilizing diode 17 voltage dividing circuit 18 second capacitor 181 second resistor 182 third resistor 183 fourth resistor 184 fifth resistor 192 sixth resistor 193 MOSFET 161 discharge resistor 162 seventh resistor 194
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