TW201306458A - Pseudo bypass switching system - Google Patents

Abstract

A pseudo bypass switching system comprises a bridge rectifier coupled to an AC power source, a voltage boosting converter inclusive of an inductor coil, and a filtering capacitor sequentially connected in parallel by order, and outputs through a DC converter. The system is characterized by setting a time retaining gain modifier and a pseudo bypass system. In which the time retaining gain modifier has one end coupled to the filtering capacitor and the other end coupled to the DC converter. The pseudo bypass system connects with the time retaining gain modifier in parallel and is configured inductively in coordination with the inductor coil inside the voltage boosting converter through an induction coil. Accordingly, the induction coil provides voltage through the inductor coil in the voltage boosting converter and makes the pseudo bypass system connected with the time retaining gain modifier in parallel for on/off switch, so as to bypass the time retaining gain modifier in a relative time.

Description

Virtual bypass switching system

The present invention relates to a virtual bypass switching system, and more particularly to a virtual bypass switching system for a visual condition switching mode bypass secondary boost circuit.

In fact, today's general power supply has a so-called Hold-Up Time technology. The so-called hold time means that the output voltage can still be a large-capacity capacitor after the input power supply drops (Drop-Out). Maintaining an output voltage within a constant regulation range requires a minimum of 12 milliseconds of hold time to stabilize the output voltage.

The hold time is proportional to the available energy in the filter capacitor for energy storage. At the same time, the available energy is proportional to the square of the difference between the maximum voltage and the minimum voltage in the operating voltage range of the DC converter, so that it is constant to be used. During the hold time, its DC converter must be designed for a wide range of voltages, but this will sacrifice the efficiency of the power converter. It can be seen that the problems and shortcomings derived from the conventional power supply circuit are not a good designer, and need to be improved.

The main purpose of the present invention is to improve the holding time, improve the overall efficiency of the AC/DC power supply, and constant the output power power density.

The secondary objective is to switch the mating control hold time gainer with a virtual grounding mode that does not consume power to significantly increase the hold time and maintain a stable output.

The invention can achieve the above object, comprising a bridge rectifier coupled to an AC power source, a boost converter including an inductor coil, and a filter capacitor sequentially connected in parallel, and a DC converter output is characterized by There is a hold time gainer and a virtual bypass system. One end of the hold time gain device is coupled to the filter capacitor, and the other end is coupled to the DC converter. The virtual bypass system is connected in parallel with the hold time gain device, and is coupled to the inductor coil in the boost converter through an induction coil. Therefore, the induction coil is supplied with a voltage through the inductance coil in the boost converter, so that the virtual bypass system connected in parallel with the hold time gain device can be turned on and off, so that the time gain device will be bypassed in a relative time.

Preferably, the virtual bypass system further includes a virtual bypass switch, a gate drive controller, and a DC reset. The virtual bypass switch is provided with a first bypass end and a second bypass end, the first bypass end is connected with the filter capacitor, the second bypass end is connected with the DC converter, and a gate drive controller is One end is electrically connected to the virtual bypass switch; the one-way current reset device has one end electrically connected to the gate drive controller, and the other end is electrically connected to the induction coil.

Preferably, the boost converter further comprises a field effect transistor and a diode, and the field effect transistor is a metal oxide semiconductor field effect transistor.

Preferably, the hold time gain device further comprises an inductor coil, a field effect transistor and a diode, and the field effect transistor is a metal oxide semiconductor field effect transistor.

Preferably, the virtual bypass switch further comprises a field effect transistor, and the field effect transistor is a metal oxide semiconductor field effect transistor.

Preferably, the gate drive controller comprises at least one bipolar transistor and at least one diode.

The technical means adopted by the present invention demonstrates the need for the power converter to adjust the output voltage after the input voltage falls, and significantly improves the retention time performance in combination with the maintenance time gain device and the virtual bypass system, allowing The DC converter operates at the limited input voltage, thereby maintaining optimum power conversion efficiency with enhanced hold time.

Please refer to the first figure. This figure is a block diagram of a conventional power supply circuit. It is connected by an AC power supply in sequence to a parallel bridge rectifier 10, a boost converter 20, a filter capacitor 30, and a DC converter. 40, until the output load.

Please refer to the second figure. This figure is a schematic diagram of a conventional power supply circuit. The bridge circuit is a full bridge filter 10; the boost converter 20 is mainly composed of an inductor coil 21 and a field effect transistor ( The FET) 22 and the diode 23 are composed of a common embodiment. The field effect transistor is usually a metal oxide semiconductor field effect transistor (MOSFET); the working principle is a DC input converted by the bridge rectifier. The voltage is converted into a regulated DC output voltage higher than the input voltage: when the field effect transistor 22 as the switch is turned on, the input DC voltage is applied to both ends of the inductor 21, and the diode 23 is turned off due to the reverse bias. Inductor coil 21 stores energy from the input power source. When the field effect transistor 22 is turned off, the storage in the inductor 21 can cause the diode 23 to be forward biased, and the energy is transmitted to the output of the filter capacitor 30 and the DC converter 40.

Referring to the third to fifth figures, the virtual bypass switching system 100 of the present invention is connected in parallel with a virtual bypass system 60 by a hold time gainer 50, and is connected in parallel to the filter capacitor 30 and the DC converter 40. The virtual bypass system 60 includes a virtual bypass switch 61, a gate drive controller 62, and a DC resetter 63.

The DC resetter 63 is electrically connected to the gate drive controller 62, and the gate drive controller 62 is also electrically connected to the virtual bypass switch 61. The virtual bypass switch 61 is provided with a first bypass terminal 612 and a The second bypass terminal 613 is connected to the filter capacitor 30, and the second bypass terminal 613 is connected to the DC converter 40.

The DC resetter 63 is a Grenacher circuit (Greinacher-Schaltung) which is cascaded by diodes 632 and 633 and capacitors 631 and 634. The electrical connection induction coil 70 and the induction coil 21 are inductively arranged to form a plurality of The voltage is applied to the gate drive controller 62; the gate drive controller 62 is controlled by a collector and an emitter of a bipolar transistor (BJT) 621, and the base is connected to a diode 622 and a virtual bypass. The switch 61 is electrically connected. The hold time gainer 50 is similar to the internal arrangement of the boost converter 20 and includes an inductor 51, a field effect transistor 52 and a diode 53.

With the above-described connection setting, in the normal mode, since the output voltage setting of the hold time gainer 50 is slightly smaller than the maximum peak voltage from the front end boost converter 20, and also slightly larger than the minimum input voltage of the rear DC converter 40, The hold time gainer 50 is not activated. At this time, the virtual bypass switch 61 shorts the input and output phases of the hold time gainer 50 to the bypass state. However, when the input voltage drops or the front end bridge rectifier is turned off, the capacitor The stored voltage of 634 attenuates and automatically turns off the field effect transistor 611 in the virtual bypass switch 61, so that the hold time gainer 50 becomes active; in this embodiment, the field effect transistor 611 fast switching control is used to protect The hold time gainer 50 and the virtual bypass switch 61 when turned on; when the hold time gainer 50 is activated, the field effect transistor 52 starts to switch and the inductor 51 starts to generate a reverse current due to self inductance, and the field effect transistor 611 current When the direction is reversed, the forward voltage between the source and the source gradually increases. When the voltage plus the diode 622 is sufficient to push the bipolar transistor 621, the field effect is obtained. Crystal 611 is closed.

Therefore, when the energy in the filter capacitor 30 is used during the hold time, the loop of the hold time gainer 50 will adjust the output voltage to the DC converter 40 to maintain a constant output voltage, for the sake of The use of time gainer 50 and virtual bypass system 60 will significantly increase hold time without sacrificing the performance of the overall converter.

The detailed description of the preferred embodiments of the present invention is intended to be limited to the scope of the invention, and is not intended to limit the scope of the invention. The patent scope of this case.

100. . . Virtual bypass switching system

10. . . Bridge rectifier

20. . . Boost converter

twenty one. . . Inductor coil

twenty two. . . Field effect transistor

twenty three. . . Dipole

30. . . Filter capacitor

40. . . DC converter

50. . . Hold time gainer

51. . . Inductor coil

52. . . Field effect transistor

53. . . Dipole

60. . . Virtual bypass system

61. . . Virtual bypass switch

611. . . Field effect transistor

612. . . First bypass

613. . . Second bypass

62. . . Gate drive controller

621. . . Bipolar transistor

622. . . Dipole

63. . . DC reset

631. . . capacitance

632. . . Dipole

633. . . Dipole

634. . . capacitance

70. . . Induction coil

The first figure is a block diagram of a conventional power supply circuit.

The second figure is a schematic diagram of a conventional power supply circuit.

The third figure is a block diagram (1) of the present invention.

The fourth figure is a block diagram (2) of the present invention.

The fifth figure is a schematic diagram of the circuit of the present invention.

100. . . Virtual bypass switching system

10. . . Bridge rectifier

20. . . Boost converter

30. . . Filter capacitor

40. . . DC converter

50. . . Hold time gainer

60. . . Virtual bypass system

70. . . Induction coil

Claims (6)

A virtual bypass switching system includes a bridge rectifier coupled to an AC power source, a boost converter including an inductor coil, and a filter capacitor sequentially connected in parallel, and the DC converter output is characterized by: a hold time gainer having one end coupled to the filter capacitor and the other end coupled to the DC converter; and a virtual bypass system coupled in parallel with the hold time gain and through an induction coil and the boost converter The inductor coil is internally inductively configured; thereby, the induction coil is supplied with a voltage through an inductor coil in the boost converter, so that the virtual bypass system connected in parallel with the hold time gain device can be turned on and off, so that the relative time will be maintained. Gain bypass. The virtual bypass system of claim 1, wherein the virtual bypass system further comprises: a virtual bypass switch, and a first bypass end and a second bypass end, wherein the first The bypass terminal is connected to the filter capacitor, the second bypass terminal is connected to the DC converter, and one gate drive controller has one end electrically connected to the virtual bypass switch; and a DC current reset device, one end and the gate drive controller Electrically connected, the other end is electrically connected to the induction coil. The virtual bypass switching system of claim 1, wherein the boost converter further comprises a field effect transistor and a diode, and the field effect transistor is a metal oxide semiconductor field effect transistor field. Effect transistor. The virtual bypass switching system of claim 1, wherein the holding time gain device further comprises an inductor coil, a field effect transistor and a diode, and the field effect transistor is a metal oxide semiconductor field. Effect transistor. The virtual bypass switching system of claim 2, wherein the virtual bypass switch further comprises a field effect transistor, and the field effect transistor is a metal oxide semiconductor field effect transistor. The virtual bypass switching system of claim 2, wherein the gate drive controller comprises at least one bipolar transistor and at least one diode.