201106826 六、發明說明： 【發明戶斤屬之技術領域3 相關申請案 本案要請求2008年8月14日申請之No. 61/189,171美國 臨時專利申請案的優先權和利益，其完整内容併此附送。 發明領域 本發明概有關於印刷電路（配線)板及製造它的方法，尤 係有關一種具有附加功能性的多層印刷電路板和製造它的 方法。 C 才支冬好3 相關技術之說明 大部份的電子系統會包含具有高密度電子互接物的印 刷電路板。一印刷電路板可包含一或更多個電路核心、基 材或載體等。在一具有該一或更多電路載體的印刷電路板 之製造方案中，電子迴路(例如接墊、電子互接物等）會被製 設於一個別電路載體的相反兩面上來形成一對電路層。該 電路板的此等電路層對嗣可被物理或化學地接合來形成該 印刷電路板，即藉製成一黏劑（或一預浸膠體或一黏結層）， 將該等電路層對和黏劑堆疊在一壓機中，固化該所造成的 電路板結構，鑽孔或以雷射鑽射貫孔，然後以一銅材料鍍 著該等貫孔來互接該等電路層對。該固化製程係被用來固 化該黏劑以提供該電路板結構的永久性物理黏結。但是， 該等黏劑在該固化製程時通常會甚大地收縮。該收縮與稍 後的貫孔鑽設和金屬鍍著製程結合會使可觀的應力進入該 201106826 整體結構中，而在組合及/或其它的熱製程中造成損壞或該 等電路層間之不可靠的互接或黏結。故，乃有需要一種材 料和相關的製程，其係能補償此等收縮並能提供該等電路 層對間之無應力且可靠的電子互接物者。 此外，該等貫孔（或通道）以銅材料來鍍著需要一額外 的、昂貴的、且耗時的製程順序，其較難以一快速的轉換 來進行。故，乃有需要提供一種印刷電路板及製造它的方 法，其在組合製程時係能被迅速且容易地組合，及/或確保 該印刷電路板上之互接物（或貫孔或微通道）的對準而得減 少組合成本。再者，亦有需要提供一種具有附加功能性的 多層印刷電路板及製造它的方法。 I：發明内容3 發明概要 本發明的實施例態樣係指向以平行製程在一或二個層 合循環中所形成之堆疊的微通道層合印刷電路板之增添 物，且/或其可具有載體對載體，次對次的（次總成對次總成) 附接物等係設有導電通道等各沿z軸以一導電材料(例如以 一導電膏)填滿。 本發明之一實施例提供一種製造一印刷電路板之至少 一部份的方法。該方法包括在處理多數個次總成的至少一 個之後將該多數個次總成互相附接。其中，該各次總成皆 包含多數個電路層，且至少一個該等次總成的處理係包 括：形成至少一孔具有一第一直徑及一第一深度由該至少 一個該等次總成之一第一側進入該至少一個次總成中；在 4 201106826 該至少一孔處形成至少一個沉頭孔具有一第二直徑大於該 第一直徑，及一較短於該第一深度的第二深度由該至少— 個忒等次總成之該第一側進入該至少一個次總成中；進行 該至少一孔及該至少一沉頭孔的金屬化步驟來金屬化該至 少一孔和該至少一沉頭孔；施加一層合黏劑於該至少—個 次總成的該第一側上；施加一保護膜於該層合黏劑上；形 成至少一通道進入該層合黏劑中以曝露該至少一沉頭孔之 一金屬化部份；將至少一導電膏填入形成於該層合黏劑中 之該至少一通道中；及移除該保護膜以曝露該至少一個次 總成上的層合黏劑而來與其它的該等次總成附接。 在一貫施例中，該至少一孔和該至少一沉頭孔的金屬 化包括電解鍍著該至少一孔和該至少一沉頭孔以電鍍封閉 該至少一孔和該至少一沉頭孔。該至少一孔和該至少一沉 頭孔的電鍍可包括電解銅來鍍著該至少一孔和該至少一沉 頭孔，而以銅來鍍封該至少一孔和該至少一沉頭孔。 在一實施例中，該等次總成的附接包括：將該等次總 成互相對準；及固化該至少一個次總成上的層合黏劑以使 該多數個次總成互相層合。 在一實施例中，該至少一個次總成包含一基材，至少 一箔墊在該基材上，及一預浸膠體在該基材上並覆蓋該至 少一箔墊，其中該至少一孔的形成包括在對應於該至少一 箔墊的位置鑽設該至少一孔，且其中該至少一沉頭孔的形 成包括在對應於該至少一馆墊的位置鑽設該至少一沉頭 孔。在一實施例中，該至少一孔的鑽設包括完全地穿過該 201106826 預浸膠體和該至少一箔墊來鑽設該至少一孔，而該至少一 沉頭孔的鑽設包括至少部份地穿過該預浸膠體且只部份地 穿過該至少一箔墊來鑽設該至少一沉頭孔。在一實施例 中’該至少一孔的鑽設包括至少部份地穿過該預浸膠體、 該至少一箔墊和該基材來鑽設該至少一孔，且該至少一沉 頭孔的鑽設包括至少部份地穿過該預浸膠體來鑽設該至少 一沉頭孔。 在一實施例中，於該至少一孔的鑽設之前，該方法更 包括：層合一固體金屬箔層於該至少一個次總成的一側上 作為忒至少一個次總成之一最外層；及選擇地移除該固體 金屬箔層的一部份而在一對應於該至少一孔和該至少一沉201106826 VI. Description of the invention: [Technical field of the invention of the households 3 Related applications The case shall request the priority and interest of the US provisional patent application filed on August 14, 2008, No. 61/189,171, the full content of which Comes with. FIELD OF THE INVENTION The present invention relates generally to printed circuit (wiring) boards and methods of making same, and more particularly to a multilayer printed circuit board having additional functionality and a method of making the same. C 支冬冬好3 Description of Related Techniques Most electronic systems contain printed circuit boards with high-density electronic connectors. A printed circuit board can include one or more circuit cores, substrates or carriers, and the like. In a fabrication of a printed circuit board having the one or more circuit carriers, electronic circuits (eg, pads, electronic interconnects, etc.) are formed on opposite sides of a separate circuit carrier to form a pair of circuit layers . The circuit layer pairs of the circuit board may be physically or chemically bonded to form the printed circuit board, that is, by using an adhesive (or a prepreg or a bonding layer), and the circuit layers are The adhesive is stacked in a press to cure the resulting circuit board structure, drilled or laser drilled through the holes, and then the copper holes are plated with the through holes to interconnect the circuit layer pairs. The curing process is used to cure the adhesive to provide permanent physical bonding of the board structure. However, such adhesives typically shrink very much during the curing process. This shrinkage combined with later through hole drilling and metal plating processes can cause considerable stresses to enter the 201106826 monolithic structure, causing damage or unreliable between the circuit layers in combination and/or other thermal processes. Interconnect or bond. Accordingly, there is a need for a material and associated process that compensates for such shrinkage and provides an unstressed and reliable electronic interconnect between the pairs of circuit layers. Moreover, the plating of the vias (or vias) with copper material requires an additional, expensive, and time consuming process sequence that is more difficult to perform with a quick transition. Accordingly, it would be desirable to provide a printed circuit board and method of making same that can be quickly and easily combined during a combined process and/or to ensure interconnects (or vias or microchannels) on the printed circuit board. The alignment is reduced to reduce the cost of the combination. Furthermore, there is a need to provide a multilayer printed circuit board with additional functionality and a method of making the same. I: SUMMARY OF THE INVENTION 3 SUMMARY OF THE INVENTION Embodiments of the present invention are directed to additions to stacked microchannel laminated printed circuit boards formed in one or two lamination cycles in a parallel process, and/or may have The carrier-to-carrier, the second-order (secondary assembly to the secondary assembly) attachments and the like are provided with conductive channels and the like, each of which is filled with a conductive material (for example, a conductive paste) along the z-axis. One embodiment of the present invention provides a method of fabricating at least a portion of a printed circuit board. The method includes attaching the plurality of sub-assemblies to each other after processing at least one of the plurality of sub-assemblies. Each of the sub-assemblies includes a plurality of circuit layers, and the processing of the at least one of the sub-assemblies includes: forming at least one hole having a first diameter and a first depth from the at least one of the sub-assemblies One of the first sides enters the at least one sub-assembly; at 4 201106826, the at least one hole forms at least one counterbore having a second diameter greater than the first diameter, and a shorter than the first depth The second depth is entered into the at least one sub-assembly by the first side of the at least one sub-equal; the metallization step of the at least one hole and the at least one counterbore is performed to metallize the at least one hole and The at least one counterbore; applying a layer of adhesive to the first side of the at least one sub-assembly; applying a protective film to the laminating adhesive; forming at least one passage into the laminating adhesive Exposing a metalized portion of the at least one counterbore; filling at least one conductive paste into the at least one channel formed in the layered adhesive; and removing the protective film to expose the at least one The layered adhesive is added to the other The assembly is attached. In a consistent embodiment, the metallization of the at least one aperture and the at least one counterbore includes electroplating the at least one aperture and the at least one counterbore to electroplate the at least one aperture and the at least one counterbore. The plating of the at least one hole and the at least one counterbore may include electrolytic copper plating the at least one hole and the at least one counterbore, and plating the at least one hole and the at least one counterbore with copper. In an embodiment, the attaching of the sub-assemblies includes: aligning the sub-assemblies with each other; and curing the laminating adhesive on the at least one sub-assembly such that the plurality of sub-assemblies are layer-by-layer Hehe. In one embodiment, the at least one sub-assembly comprises a substrate, at least one foil pad on the substrate, and a prepreg on the substrate and covering the at least one foil pad, wherein the at least one hole The forming includes drilling the at least one hole at a position corresponding to the at least one foil pad, and wherein forming the at least one counterbore hole comprises drilling the at least one counterbore at a position corresponding to the at least one hall pad. In one embodiment, the drilling of the at least one hole includes completely drilling the at least one hole through the 201106826 prepreg and the at least one foil pad, and the drilling of the at least one counterbore comprises at least a portion The at least one counterbore is drilled through the prepreg and only partially through the at least one foil pad. In one embodiment, the at least one hole drilling includes at least partially passing the prepreg, the at least one foil pad, and the substrate to drill the at least one hole, and the at least one counterbore The drilling includes drilling the at least one counterbore at least partially through the prepreg. In an embodiment, before the drilling of the at least one hole, the method further comprises: laminating a solid metal foil layer on one side of the at least one sub-assembly as one of the outermost layers of the at least one sub-assembly And selectively removing a portion of the solid metal foil layer to correspond to the at least one hole and the at least one sink
該餘隙處鑽設該至少一沉頭孔。選擇地移除騎的固體金 屬名層來形成6紐隙可包括選擇地移除該部份的固體金屬 箔層以形成該餘隙使其具有 二直徑。 一第三直徑實質上相同於該第 在-實施例中，該方法更包含：形成至少另一孔實質 一深度由至少另一個該等次總成The at least one counterbore is drilled in the clearance. Selectively removing the rider's solid metal name layer to form the 6-gap can include selectively removing the portion of the solid metal foil layer to form the clearance to have a diameter of two. A third diameter is substantially the same as in the first embodiment, the method further comprising: forming at least one other aperture substantially one depth from at least one other of the secondary assemblies
上具有该第一直徑和該第一 之第二側進入該至少另一 處形成至少另一沉頭孔實質 201106826 數個次總成的附接可包括：對準該至少一沉頭孔和該至少 另^ 儿頭孔使其互相面對並經由該至少一填滿該導電膏的 通道電減；及固化該至少__個次總成上的層合黏劑以將 β亥至少一個次總成層合於該至少另一個次總成。 在實施例中，該第一直徑係約為6mils(密耳=千分之 一0寸），而該第二直徑係約為1〇mUs。 在一實施例中，該至少一沉頭孔係以雷射鑽孔所形 成而°玄至少一孔係以機械鑽孔所形成《該至少一通道可 被以雷射鑽孔來形成。 在一實施例中，該至少一沉頭孔係藉鑽孔所形成，該 至少-孔係藉鑽孔所形成’且該至少—通道係藉鑽孔所形成。 本發明的另一實施例提供一種製造一印刷電路板之至 少-部份的方法。該方法包括在處理至少_個該等次總成 之後將該多數個次總成相互附接。每—個該等次總成皆包 含多數的電路層，_至少—個次總㈣處理包括：由該 至少-個次總成之-第―側進人該至少_個次總成中形成 至少-沉頭孔具有-第-直徑及_第—深度；在該至少一 沉頭孔處由該至少-個次總成之該第—側進人該至少一個 次總成中形成至少-孔具有—第二直徑小於該第—直徑及 一第二深度較長於該第-深度；進行該至少—孔和該至少 一沉頭孔的金屬化步驟以金屬化該至少—孔和該至少一沉 ㈣；施加-層合黏劑於該至少—個次總成的該第一側 上；施加-保賴於該層合黏劑上；形成至少—通道於該 層合黏射以曝露該至少-沉頭孔之一金屬化部份.充填 201106826 至少一導電膏於被形成在該層合黏劑中之該至少一通首 内；及移除該保護膜來曝露該至少-個次總成上的層= 劑以供與其它的次總成附接。 本發明的另一實施例提供一種印刷電路板其包含多數 個次總成’每-個該等次總成包含多數個電路層並具有至 少-沉頭孔和至少-孔，該至少_沉頭孔具有一[直徑 和一第一深度由該至少一個次總成之一第一側進入該至^ -個次總成巾，該至少-孔具有—第二直徑小於該第一直 徑及-第二深度較長於該第—深度在該至少—沉頭孔處由 該至少-個次總狀該第-側進人該至少—個次總成中； 一金屬被金屬化於該至少-孔和該至少_沉頭孔中；多數 的層合黏劑’每—該等層合_係介於—個次總成與一對 應的次總成之間，並有至少—通道被形成貫穿其中；及一 配接膏充填於該至少—通道内，其中該等次總成會經由該 各層合_之駐少—微料及該各讀狀該至少一沉 頭孔和該至少一孔來互相電耦接。 在一實施例中’該至少-孔中的金屬係以在該至少一 沉頭孔内的金屬來與該至少-孔牢固地錨定。 在-實施例中，該至少—沉頭孔係構製成會與至少另 個次總成的至少另一沉頭孔相對並增加一接觸表面積。 圖式簡單說明 所附圖式會與其說明來示出本發明的實施例，並與描 述内容-起絲解釋本發明的原理。 專利或申請槽案含有至少一彩色緣製的圖式。此具有 8 201106826 彩色圖式的專利或專利申請公開案的複製本將可在經要求 並繳付所須費用後由專利局提供。 第ΙΑ、1B和1C圖示出依據本發明之一實施例之一可容 許一次總成被製備的詳細製程。 第2圖表示依據本發明之一實施例將三個次總成結合 在一起。 第3圖係為一墨接點之一詳圖乃示出該包料在第2圖之 該二次總成上皆係相對較“平”的。 第4A和4B圖示出包料之一雷射沉頭孔態樣，其係依據 本發明之一實施例被製成較“平”的以供次總成對次總成附接。 C實方佐方式3 較佳實施例之詳細說明 在以下詳細說明中，只有本發明的某些實施例被示出 及描述，僅作為舉例說明。如精習於該技術者將可瞭解， 該等所述實施例能被以各種不同的方式修正，但都不超出 本發明的精神或範圍。因此，該等圖式和說明本質上應被 視為舉例而非限制性的。 又，在本申請案的内容中，當一元件被稱為係在另一 元件“上”時，其可為直接在該另一元件上，或係間接在該 另一元件上而有一或更多個中介元件介於其間。在本說明 書中相同的標號係指相同的元件。 如所擬想，本發明的實施例提供一種具有附加功能性 的多層印刷電路板及一種製造它的方法。 更詳言之，藉平行構建或層合單面的疊片所製成之堆 201106826 疊式微通道等曾被揭示，並且是2007年2月14日申請之No. 7,523,545美國專利的主題’其係被讓渡給本發明的相同受 讓人’且其内容併此附送。於此，在一實施例中，一單面 的疊片會被施加黏劑’而通道會被以雷射穿過該黏劑來產 生並填滿墨液。該等不同的各層係被平行製成並堆疊在一 起以供層合。該第二面箔會在一印刷及蝕刻製程中被顯像 並触刻。這些層等可在堆疊和層合之前被個別地測試。 傳統的依序層合時常需要在一第二層合之前先層合該 等次總成來將第一次總成附接於第二次總成。此種次總成 對次總成的附接能以如同多個單面材料的方式來完成，假 使二或更多個次總成被以此方式來附接，則將可能構建非 常高縱橫比的導電路徑穿過PCB以供譬如探針卡的用途。 傳統的依序構建亦能以例如3 +N+3(3個次總成+N個次總成 +3個次總成）的結構由中間向外來開始，其會由中央逐離地 添加更外層。一類似的策略可與單疊方法一起進行。 如上所述之No. 7,523,545美國專利面對黏劑厚度和銅 厚度的問題。於此，本發明實質已發現層合一片預浸膠體 於較厚的銅，將可藉造成一次總成具有該預浸膠體包封的 厚重銅，而容許包封的導體和一平坦表面來實行單層核心 的堆疊。 本發明實質亦已發現更多FR4和GPY材料以外的材料 種類能被使用於該單層平行構建製程。 使用電漿(Diconex)和化學磨削的大量通道製法乃可適 用於製造該等通道’特別是在必須被磨削之較細的結構物 10 201106826 或較薄層中。 更詳言之，依據本發明的實施例之平行構建技術（平行 構建）的附加功能係如下： 1. 將2個金屬層次結構物併入該平行構建中 a. 單面的印墨核心可被倒反置設在該2金屬層次總成 的一側上，而在相反側上，該單面核心會在堆疊時被以相 反定向來佈設。 b. 次總成可被由一個核心或由多個以預浸膠體或具 有黏劑之組合物等固接在一起的核心來製成。 c. 次總成可具有電鍍貫孔等，它們可被填滿導電或非 導電的填孔料。 d. 次總成可為一種平行構建的單層和雙層複合物的 混成物。 2. 將1金屬層次結構併入該平行構建中 a. 次總成可被由一個核心或由多個以預浸膠體或具 有黏劑之組合物等固接在一起的核心來製成。 b. 次總成可具有電鍍貫孔等，它們可被填滿導電或非 導電的填孔料。 c. 次總成可為一種平行構建的單層和雙層複合物的 混成物。 d. 次總成可使用一傳統的印刷貫孔(PTH)或一具有沉 頭孔的金屬（或銅）包料，如更詳述於後印刷貫孔(PTH)。 3. 將預浸膠體併附於厚銅以便造成一平坦的單面次總成。Attaching the first diameter and the first second side into the at least one other to form at least one other counterbore substantially 201106826 number of sub-assemblies may include: aligning the at least one counterbore and the At least the other holes are faced to each other and electrically reduced via the at least one channel filling the conductive paste; and the layered adhesive on the at least __ times assembly is cured to at least one time Laminated to the at least another sub-assembly. In an embodiment, the first diameter is about 6 mils (mil = one thousandth of a thousand) and the second diameter is about 1 〇 mUs. In one embodiment, the at least one counterbore is formed by a laser drilled hole and at least one of the holes is formed by mechanical drilling. The at least one passage may be formed by laser drilling. In one embodiment, the at least one counterbore is formed by a borehole, the at least - bore being formed by the borehole and the at least - passage being formed by the borehole. Another embodiment of the present invention provides a method of fabricating at least a portion of a printed circuit board. The method includes attaching the plurality of sub-assemblies to each other after processing at least one of the sub-assemblies. Each of the sub-assemblies includes a plurality of circuit layers, and at least one sub-fourth (four) processing includes: forming at least the at least one sub-assembly into the at least one sub-assembly a counterbore having a -th-diameter and a _th-depth; at the at least one counterbore, the at least one sub-assembly of the at least one sub-assembly forms at least one hole having at least one hole - the second diameter is smaller than the first diameter and a second depth is longer than the first depth; performing a metallization step of the at least - hole and the at least one counterbore to metallize the at least - hole and the at least one sink (four) Applying a layering adhesive to the first side of the at least one subassembly; applying - retaining on the laminating adhesive; forming at least - a channel in the lamination to expose the at least - sinking a metallized portion of the head hole. Filling 201106826 at least one conductive paste in the at least one head formed in the layered adhesive; and removing the protective film to expose the layer on the at least one sub-assembly = agent for attachment to other secondary assemblies. Another embodiment of the present invention provides a printed circuit board comprising a plurality of sub-assemblies each of the sub-assemblies comprising a plurality of circuit layers and having at least a counterbore and at least a hole, the at least _ countersunk The hole has a [diameter and a first depth from the first side of the at least one sub-assembly into the second sub-assembly towel, the at least-hole having a second diameter smaller than the first diameter and - The second depth is longer than the first depth in the at least the counterbore by the at least one sub-grace of the first side into the at least one sub-assembly; a metal is metallized at the at least-hole and The at least _ counterbored hole; a majority of the viscous agent 'each- _ _ _ is between - a sub-assembly and a corresponding sub-assembly, and at least - the channel is formed therethrough; And a matching paste is filled in the at least one channel, wherein the sub-assemblies are electrically coupled to each other via the respective laminations--the micro-materials and the at least one counterbore and the at least one hole of the readings Pick up. In one embodiment, the at least - metal in the hole is securely anchored to the at least - hole with metal within the at least one counterbore. In an embodiment, the at least the counterbore is configured to oppose at least one other counterbore of the at least another subassembly and to increase a contact surface area. BRIEF DESCRIPTION OF THE DRAWINGS The accompanying drawings, which are illustrated in the claims The patent or application slot contains at least one color edge pattern. A copy of this patent or patent application publication having a color pattern of 8 201106826 will be provided by the Patent Office upon request and payment of the required fee. Figures 1, 1B and 1C illustrate a detailed process in which one assembly can be prepared in accordance with one embodiment of the present invention. Figure 2 illustrates the joining of three sub-assemblies in accordance with one embodiment of the present invention. Figure 3 is a detailed view of one of the ink contacts showing that the package is relatively "flat" in the secondary assembly of Figure 2. 4A and 4B illustrate a laser counterbore pattern of one of the packages, which is made "flat" in accordance with an embodiment of the present invention for attachment of the secondary assembly to the secondary assembly. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT In the following detailed description, only certain embodiments of the invention are shown and described, by way of illustration only. As will be appreciated by those skilled in the art, the described embodiments can be modified in various different ways without departing from the spirit or scope of the invention. Accordingly, the drawings and description are to be regarded as illustrative and not limiting. In the context of the present application, when an element is referred to as being "on" another element, it may be directly on the other element or indirectly on the other element. There are multiple mediation components in between. In the present specification, the same reference numerals are used to refer to the same elements. As contemplated, embodiments of the present invention provide a multilayer printed circuit board with additional functionality and a method of making the same. In more detail, a stack of 201106826 stacked microchannels, which are made by laminating or laminating a single-sided laminate, has been disclosed, and is the subject of the U.S. Patent No. 7,523,545, filed on Feb. 14, 2007. It is assigned to the same assignee of the present invention' and its contents are hereby attached. Here, in one embodiment, a single sided laminate will be coated with an adhesive' and the passage will be lasered through the adhesive to create and fill the ink. The different layers are made in parallel and stacked together for lamination. The second foil is imaged and engraved in a printing and etching process. These layers and the like can be individually tested before stacking and lamination. Conventional sequential lamination often requires the sub-assembly to be laminated prior to the second lamination to attach the first assembly to the second assembly. The attachment of such sub-assembly to the sub-assembly can be accomplished in a manner similar to a plurality of single-sided materials, and if two or more sub-assemblies are attached in this manner, it is possible to construct a very high aspect ratio. The conductive path passes through the PCB for use as a probe card. The traditional sequential construction can also start from the middle with a structure such as 3 + N + 3 (3 sub-assemblies + N sub-assemblies + 3 sub-assemblies), which will be added from the center. Outer layer. A similar strategy can be performed with the single stack method. The U.S. Patent No. 7,523,545, the disclosure of which is incorporated herein by reference. Herein, it has been found in the essence of the present invention that laminating a piece of prepreg to thicker copper will result in the primary assembly having the thick copper encapsulated by the prepreg, allowing the encapsulated conductor and a flat surface to be implemented. Stacking of single-layer cores. It has also been found in the essence of the invention that more material types than FR4 and GPY materials can be used in the single layer parallel build process. A large number of channels using plasma (Diconex) and chemical grinding are suitable for making such channels', especially in the thinner structures 10 201106826 or thinner layers that must be ground. More specifically, the additional functionality of the parallel construction technique (parallel construction) in accordance with an embodiment of the present invention is as follows: 1. Incorporate two metal hierarchies into the parallel construction a. The single-sided ink core can be The reverse is disposed on one side of the 2 metal level assembly, and on the opposite side, the single side core is disposed in the opposite orientation when stacked. b. The secondary assembly can be made from a core or a plurality of cores that are secured together with a prepreg or a composition having an adhesive or the like. c. The secondary assembly may have plated through holes or the like which may be filled with a conductive or non-conductive hole-filling material. d. The secondary assembly can be a mixture of single and double layer composites constructed in parallel. 2. Incorporating a 1 metal hierarchy into the parallel build a. The secondary assembly can be made from a core or a plurality of cores that are secured together with a prepreg or a composition with an adhesive or the like. b. The secondary assembly may have plated through holes or the like which may be filled with a conductive or non-conductive hole-filling material. c. The secondary assembly can be a mixture of single and double layer composites constructed in parallel. d. The secondary assembly may use a conventional printed through hole (PTH) or a metal (or copper) material with counterbored holes, as described in more detail in the post-printing through-hole (PTH). 3. Attach the prepreg to the thick copper to create a flat, single-sided sub-assembly.
4. 擴張可容許的材料表至包括所有目前用於構建PCB 11 201106826 的材料。 5.擴張可容許的釋離材料表至包括釋離塗層紙。 ,6.通道可独電m學磨削或其它製造該等通道的 適當方法來製成。 /本發㈣實施例現將參照所關式更完整地描述於 後。如精f於該技術者鱗解，料所述實施例可被以各 種適田的方式修正*不超A本發明的精神或範圍。 第ΙΑ、1B和1C圖示出一細節以容許一次總成針對—製 程來被製備。於此’該次總成會被製成相對較“平”的以便 數個次結構的組合。m造較平坦的電路板或該電 路板之次組件的相關技術係被揭述於2〇〇8年6月5日申請之 No. 12/157’G21美國專利中請案中，其已讓渡給本發明的相 同受讓人’且其内容併此附送。 更詳s之，依據本發明之一實施例而使用一互相附接 多數個次總成的層合製程順序來製造一印刷電路板之至少 一部份的方法將被參照第1A、⑴和⑴圖來說明。 如在第1A圖中所示，一第一次總成1〇〇會被處理。該第 一次總成1〇〇包含多數個電路層。於此，在第1A圖中，一或 更多個孔110等各具有一第一直徑和一第一深度會由該第 一次總成100之一第一側120被形成。於此，該等孔110係藉 機械鑽孔來形成，但本發明並不因而受限。此外，如第1A 圖中所示，一或更多個沉頭孔130等會被形成，其各具有一 第二直徑大於該第一直徑，及—第二深度由該第一次總成 100之該第一側120鼻起短於該第一深度。在一實施例中， 12 201106826 該第一直徑係約6mils(密耳），而該第二直徑係約1 Omils。於 此，亦如第1Α圖中所示，一沉頭孔130係形成在一位置處其 對應於一對應孔110。此外，雖在第1Α圖中係示出該等沉頭 孔130是在該等孔1〇〇被形成之後才被形成，但本發明並不 因而受限。即，在本發明的另一實施例中’該等沉頭孔13〇 可於該等孔100被形成之前先被形成。 在第1Β圖中，該等孔110和沉頭孔130會被以一金屬材 料140來金屬化。就此，在一實施例中，該等孔u〇和沉頭 孔130係藉電解錄著該等孔11〇和沉頭孔13〇以電鍵封閉該 等孔110和沉頭孔130而被金屬化。該等孔no和沉頭孔13〇 的電解鍍著可包括電解銅來鍍著該等孔11〇和沉頭孔13〇， 而以銅電鍍封閉該等孔和沉頭孔。 又，如第1Β圖中所示，一固體金屬箔層15〇係先前層合 於該第一次總成10 0之該第一側丨2 〇上作為該第—次總成的 最外層者’會被姓刻或平坦化而由該第一次總成1〇〇之該第 -側12 0除去。-㉟合黏劑(黏性膜)i 7 〇嗣會被施加於該第一 次總成⑽的第-側12〇上。-保護膜(釋離膜)嗣會被施加於 該層合黏劑上。 於此，該保護膜（或Mylar片）係被示出以介設於該保護 膜和第-次總成議之間的層合黏劑（或預浸膠體或黏結 層）Π〇來_於該次總成。但切明的賴膜並不僅限於 Mylar(聚酯薄膜)片’而可由任何適當的材料製成，譬如聚 醋、定向的聚丙烯、聚I乙烯、聚乙烯、高密度聚乙烯、 聚萘乙烯、pacothane、聚甲基戊烯，或其化合物等。又， 13 201106826 在第ic圖中，一或更多個通道160會被形成於該層合黏劑 170中’且位置分別對應於該等沉頭孔130和孔11〇。於此， 在第1C圖中，該通道(或微通道）160係以雷射鑽孔來形成。 但是’本發明並不因而受限。 又，如第1C圖中所示，一導電膏（導電墨）會被填入形 成於該層合黏劑170中的通道160内。： 最後’如第1C、2和3圖中所示，日最終的印刷電路板（咬 一最終次總成)2〇〇會藉移除該保護膜（見第…圖）以堆疊並 與一第二次總成1〇〇’層合（見第2和3圖）而來形成。即，如第 2矛3圖所示’ 5亥第一次總成100’係被置設成使該層合黏劑 17〇介於該二個次總成1〇〇和1〇〇’之間，然後再固化來形成 該最終的印刷電路板200(見第2圖）。於此，該最終印刷電路 板2〇〇會被形成使該各通道160亦位置對應於位在該第一次 總成10 0中的多數個銅箔墊（即第1A圖中所示之蝕刻的導 體）180之至少一個。且，在一實施例中，該第二次總成⑺^， 係以一實質上類似於用以形成第一次總成1〇〇的方法來形成。 於此，第2圖中所示的印刷電路板2〇〇包含多數個電路 層。在該等通道160中的導電膏與在該等沉頭孔13〇和孔11〇 中的金屬材料140會將位於第一次總成1〇〇中的多個銅箔塾 180電連接於位在第二次總成1〇〇，中的多個銅箔墊（例如蝕 刻的導體）等。 據此且綜觀上述，一具有2軸互接物（例如該等孔u〇、 沉頭孔130、及/或微通道160)的印刷電路板會被提供，复At 消除一鍍著微通道的需要，及/或消除一平坦化一表面上的 201106826 鍍著凸體之需要’其能被以—或兩個廣合循環來製成，及/ 或其能具有載體對栽體（或次總成對次總成）的附接物乃具 有導電通道等’各沿該z軸填滿一導電材料(例如以一導電膏）。 又，在一實施例中，在該至少一個孔110中的金屬材料 (或金屬）140係藉在一對應沉頭孔13〇中的金屬材料（或金 屬）140來與該至少—孔110牢随錯定。 在一實她例中，且如第3圖中所示，該第一次總成1〇〇 的沉頭孔13 0係構製成可與該第二次總成10 〇，之另一對應 沉頭孔相對並增加—接觸表面積。 在一實施例中，該第一和第二次總成100和100’係被如 下地附接：互相對準該第—和第二次總成1〇〇和1〇〇,；及固 化第一次總成100上的層合黏劑17〇以使該第一和第二次總 成100與100’互相層合。 即是，综觀上述，該多個次總成的附接可包括：對準 至少一沉頭孔130與至少另一沉頭孔130使其互相面對’在 經由至少一填滿該導電膏的通道160互相電耦接；及固化在 至少一個該等次總成（例如該第一次總成10 0)上的層合黏劑 17 0以將該至少一個次總成層合於另一個次總成（例如該第 二次總成100’）。 在一實施例中，每一個形成該電路板200的該等次總成 皆包含一基材，至少一箔塾(或銅箔墊)在該基材上，及一預 浸膠體在該基材上並覆蓋該至少一箔墊，其中至少一個該 等孔110係藉鑽設該至少一孔使其位置對應於該至少一络 墊而被形成，且至少一個該沉頭孔係藉鑽設至少一沉頭孔 15 201106826 使其位置對應於該至少一箔墊而被形成。在一實施例中， 該至少一孔110的鑽設包括完全地貫穿該預浸膠體和該至 少一 fl塾來鑽設該至少一孔110’且該至少一沉頭孔13〇的 鑽設包括至少部份地貫穿而僅部份地貫穿該至少_箱塾來 鑽設該至少一沉頭孔130。在一實施例中，該至少—孔丨1〇 的鑽設包括至少部份她貫穿該預浸膠體、該至少一箱塾和 該基材來鑽設該至少一孔110，而該至少一沉頭孔13〇的鑽 設包括至少部份地貫穿該預浸膠體來鑽設該至少一沉頭孔 130。 如所示，第2圖代表3個次總成如前所述地連接在一 起，即在PTH以墨接點附接。第3圖係為該墨接點的詳圖， 乃示出該二次總成上的包料各皆相對較“平坦”的。第4八和 4 B圖示出包料之一雷射沉頭孔態樣，該包料係被製成較‘‘平 坦”的以供次總成對次總成附接。 於此，在第1A、1B和1C圖中，依據本發明之一實施例 的沉頭孔係被示出為機械地製成，但本發明並不因而受 限。在另一實施例中，並請參見第4八和牝圖，例如，該沉 頭孔可藉在該貫孔周圍顯像一開口，再以雷射移除該周圍 材料而被形成。即，如第4A和4B圖中所示，在本發明之一 實施例中，於鑽設該至少一孔31〇之前，該方法更包含：層 合一固體金屬箔層（箔）3〇〇於該至少一個該等次總成之該第 一側上，作為該至少一個次總成的最外層；及選擇性地移 除泫固體金屬箔層3〇〇的一部份而在一對應於該至少一孔 310和至少一對應沉頭孔330的位置形成一餘隙。該至少一 16 201106826 孔310的形成可包括在該餘隙處鑽設該至少一孔31 〇，而該 至少一沉頭孔3 3 0的形成可包括在該餘隙處鑽設該至少一 礼頭孔330。選擇地移除該固體金屬箔層3〇〇的一部份來形 成該餘隙係可包括移除該固體金屬箔層3〇〇的該部份以形 成該餘隙而具有一直徑實質上相同於該至少一對應沉頭孔 330的直徑。假使一c〇2雷射被使用，則例如在第丨八、2和3 圖中所示的銅箔塾（或触刻的導體）18〇將會棺止進一步的穿 透。可能較佳的是較小直徑的孔，具有非圓形沉頭孔的孔， 敕薄的箔作為底下的墊。在第ΙΑ、IB、1C、2和3圖中的實 施例係利用2οζ的銅，但其可為非常薄或甚至比2〇ζ更厚。 請參閱第2和3圖，三個次總成可被製備各為大約6〇mils 厚。被鑽設的通道可為直徑大約6mils。該沉頭孔可為直徑 大約lOmils。在各次總成或内的捕捉墊可為大約1〇mils。在 s亥疊層中的對抵塾可為直徑大約12mils。各次總成具有一或 更多個印刷貫孔(PTH)可有一大約1 〇 : 1的縱橫比。此等造 形可針對每一次總成來製造。若有三個次總成被附接而造 成一大約180mils厚的板，則該整體的縱橫比係約為3〇: i。 特別是在約6mils的孔中，其會難以鑽通貫穿大約18〇〇1以。 即若該板能被鑽孔，則其會十分難以首先金屬化一種籽層 於該孔的内部上，且然後在一PTH製程中來電鍍該種籽層。 高縱橫比的孔係譬如在稱為探針和載卡等廉價的測試 器具中是較佳及/或需要的。該等小直徑的孔符合該測試機 的間距要求。其相關的高層數會使該等器具非常難以製 成。一可相較的製法必須由二表面精確地鑽孔，並強制泵 17 201106826 抽無電和電解溶液穿過該等孔來製備該ΡΤΗβ該可相較的 製法會受制於鑽孔失準和不佳的產能。 综觀上述，且依據本發明的實施例，使用平行構建技 術來構建多層板的主要優點係如下： 1·依序構件板會有數倍的較多機會可能廢棄先前的步驟。 2. 平行構建會有較少的步驟來製造一板而容許該板被 更快數倍地製成。 3. 該板的較快製成可在製造原型時改善顧客的學習循 環時間。 4. 較快的製造時間容許板能依顧客的要求生產，而在 製造、組合和顧客處會有較少的產品貯放於架上。 5. 由於較少的步驟該整個製程會比一依序構建法產生 較少的廢棄和較高的品質，即使相同的設備和製程係被用 來製造該板。 6. —設備組製造一板的整體容量會增加。 7. 可能得與其它不相容的材料來製成混合材料組。 8. 可此將特定化的層併入該板中。 9 ·使用沉頭孔技術會製成用於次總成對次總成之墨接 點的抵接塾。該金属（或銅）包料係、與該樹脂/玻璃複合物齊 平，而能被Ί沉頭孔技術來製備，即以沉頭孔機械鑽孔 或以組0的機械鑽孔和雷射沉頭孔。此沉頭孔技術會製 成-更可義的-人總成内锻著貫孔，其會比以傳統電鍛包料 技術在掩埋該切成的各層中產生較少的彎曲應力。總 之依據本發明之一實施例使用如上所述的沉頭孔技術可 201106826 造成非常高縱橫比的孔，且所造成之層對層電路密度會比 傳統所能製成者更高。 雖本發明已連結某些實施例來被描述，但精習於該技 術者將會瞭解本發明並不限制於所述實施例，而相反地， 係欲予涵蓋包含於本發明的精神和範圍及其同等實質中的 各種修正變化。 【圖式簡單說明】 第ΙΑ、1B和1C圖示出依據本發明之一實施例之一可容 許一次總成被製備的詳細製程。 第2圖表示依據本發明之一實施例將三個次總成結合 在一起。 第3圖係為一墨接點之一詳圖乃示出該包料在第2圖之 該二次總成上皆係相對較“平”的。 第4A和4B圖示串包料之一雷射沉頭孔態樣，其係依據 本發明之一實施例被製成較“平”的以供次總成對次總成附接。 【主要元件符號說明】 100.. .次總成 100’…第二次總成 110，310…孔 120.. .第一側 130…沉頭孔 140.. .金屬材料 150.. .箔層 160…通道 170.. .層合黏劑 180.. .銅箔墊 200.. .印刷電路板 300.. .箔 194. Expand the allowable material table to include all materials currently used to build PCB 11 201106826. 5. Expand the allowable release material list to include release coated paper. 6. The channels may be made by electro-mechanical grinding or other suitable means of making such channels. / The present invention (4) The embodiment will now be described more fully with reference to the following. As the technique is scaled by the skilled person, it is contemplated that the described embodiments may be modified in a variety of ways* without exceeding the spirit or scope of the invention. Figures 1, 1B and 1C illustrate a detail to allow for one assembly to be prepared for the process. Here, the assembly will be made relatively "flat" for a combination of several substructures. The related art of making a relatively flat circuit board or a sub-component of the circuit board is disclosed in the No. 12/157 'G21 US patent application filed on June 5, 2008, which has been The same assignee of the present invention is assigned and its contents are hereby attached. More specifically, a method of fabricating at least a portion of a printed circuit board using a lamination process sequence in which a plurality of sub-assemblies are attached to each other in accordance with an embodiment of the present invention will be referred to FIGS. 1A, (1), and (1). Figure to illustrate. As shown in Figure 1A, a first assembly will be processed. The first assembly 1 includes a plurality of circuit layers. Here, in Fig. 1A, one or more of the holes 110 and the like each having a first diameter and a first depth are formed by one of the first sides 120 of the first assembly 100. Here, the holes 110 are formed by mechanical drilling, but the invention is not limited thereby. Furthermore, as shown in FIG. 1A, one or more counterbore holes 130 and the like may be formed, each having a second diameter greater than the first diameter, and - the second depth being from the first subassembly 100 The first side 120 of the nose is shorter than the first depth. In one embodiment, 12 201106826 the first diameter is about 6 mils (mil) and the second diameter is about 1 milils. Thus, as also shown in Figure 1, a counterbore 130 is formed at a location corresponding to a corresponding aperture 110. Further, although it is shown in Fig. 1 that the counterbore holes 130 are formed after the holes 1 are formed, the present invention is not limited thereby. That is, in another embodiment of the present invention, the counterbore holes 13 can be formed before the holes 100 are formed. In the first diagram, the holes 110 and counterbore holes 130 are metallized with a metal material 140. In this regard, in one embodiment, the holes u and the counterbore 130 are metallized by electrolyzing the holes 11 and the counterbore 13 to electrically close the holes 110 and counterbore holes 130. . The electrolytic plating of the holes no and the counterbore 13 可 may include electrolytic copper to plate the holes 11 and the counterbore 13 〇, and the holes and counterbore are closed by copper plating. Moreover, as shown in FIG. 1 , a solid metal foil layer 15 is previously laminated on the first side 丨 2 该 of the first sub-assembly 10 as the outermost layer of the first sub-assembly. 'The name will be engraved or flattened and removed by the first side 120 of the first assembly. A -35 adhesive (viscous film) i 7 〇嗣 will be applied to the first side 12 of the first assembly (10). - A protective film (release film) will be applied to the adhesive. Herein, the protective film (or Mylar sheet) is shown to be interposed between the protective film and the first assembly to form a layered adhesive (or prepreg or bonding layer). The assembly. However, the clarified film is not limited to Mylar (polyester film) sheet and can be made of any suitable material, such as polyester, oriented polypropylene, polyethylene, polyethylene, high density polyethylene, polyethylene naphthalene, Pacothane, polymethylpentene, or a compound thereof. Further, 13 201106826 In the ic diagram, one or more channels 160 are formed in the viscous adhesive 170 and the positions correspond to the counterbore holes 130 and the holes 11 分别, respectively. Here, in FIG. 1C, the channel (or microchannel) 160 is formed by laser drilling. However, the invention is not limited thereby. Further, as shown in Fig. 1C, a conductive paste (conductive ink) is filled in the channel 160 formed in the viscous adhesive 170. : Finally 'As shown in Figures 1C, 2 and 3, the final printed circuit board (biting a final sub-assembly) will be removed by removing the protective film (see figure...) The second assembly is formed by laminating (see Figures 2 and 3). That is, as shown in the second spear 3, the '5 hai first assembly 100' is placed such that the viscous adhesive 17 〇 is between the two sub-assemblies 1 〇〇 and 1 〇〇 ' The final printed circuit board 200 is then cured (see Figure 2). Here, the final printed circuit board 2 is formed such that the respective channels 160 are also positioned corresponding to a plurality of copper foil pads located in the first sub-assembly 10 (ie, the etching shown in FIG. 1A). At least one of the conductors 180. Moreover, in one embodiment, the second subassembly (7) is formed in a manner substantially similar to that used to form the first subassembly. Here, the printed circuit board 2A shown in Fig. 2 includes a plurality of circuit layers. The conductive paste in the channels 160 and the metal material 140 in the counterbore holes 13 and 11 are electrically connected to the plurality of copper foils 180 located in the first assembly 1〇〇. In the second assembly, a plurality of copper foil pads (for example, etched conductors) and the like. Accordingly, in view of the above, a printed circuit board having 2-axis interconnects (e.g., the holes u, countersinks 130, and/or microchannels 160) is provided, and the complex At eliminates a microchannel-plated Need, and/or eliminate the need for a flattened surface of 201106826 with a convex body that can be made with - or two wide loops, and / or it can have a carrier-to-carrier (or sub-total The attachment of the paired sub-assembly has a conductive path or the like 'each of which is filled with a conductive material along the z-axis (for example, a conductive paste). Moreover, in an embodiment, the metal material (or metal) 140 in the at least one hole 110 is secured by a metal material (or metal) 140 in a corresponding counterbore 13 与 and the at least hole 110 It is wrong. In a real example, and as shown in FIG. 3, the countersunk hole 130 of the first assembly is configured to be 10 〇 to the second assembly, and the other corresponds to The counterbore is opposite and increases - the contact surface area. In an embodiment, the first and second sub-assemblies 100 and 100' are attached as follows: the first and second sub-assemblies are aligned with each other; and the curing The layered adhesive 17 is applied to the assembly 100 once to laminate the first and second sub-assemblies 100 and 100' to each other. That is, looking at the above, the attachment of the plurality of sub-assemblies may include: aligning at least one counterbore 130 and at least another counterbore 130 to face each other 'at filling the conductive paste via at least one The channels 160 are electrically coupled to each other; and the layered adhesive 170 is cured on at least one of the sub-assemblies (eg, the first assembly 10 0) to laminate the at least one sub-assembly to another Assembly (eg, the second assembly 100'). In one embodiment, each of the sub-assemblies forming the circuit board 200 includes a substrate, at least one foil (or copper foil pad) on the substrate, and a prepreg on the substrate. And covering at least one foil pad, wherein at least one of the holes 110 is formed by drilling the at least one hole so that its position corresponds to the at least one pad, and at least one of the counterbore holes is at least drilled A counterbore 15 201106826 is formed with its position corresponding to the at least one foil pad. In one embodiment, the drilling of the at least one hole 110 includes drilling the at least one hole 110 ′ completely through the prepreg and the at least one hole and the drilling of the at least one counterbore 13 包括 includes The at least one counterbore 130 is drilled at least partially throughout and only partially through the at least one box. In one embodiment, the drilling of the at least one hole includes at least a portion of the at least one hole 110 through which the prepreg, the at least one box, and the substrate are drilled, and the at least one sink The drilling of the head hole 13A includes drilling the at least one counterbore hole 130 at least partially through the prepreg. As shown, Figure 2 represents that the three sub-assemblies are connected as previously described, i.e., attached at the PTH with ink contacts. Figure 3 is a detailed view of the ink contacts showing that the packages on the secondary assembly are each relatively "flat". Figures 4 and 4B illustrate a laser countersunk hole pattern of a package that is made ''flat'' for the secondary assembly to be attached to the secondary assembly. In Figures 1A, 1B and 1C, a counterbore in accordance with an embodiment of the present invention is shown as being mechanically made, but the invention is not so limited. In another embodiment, see also In the case of the eight-and four-dimensional map, for example, the counterbore may be formed by imaging an opening around the through-hole and then removing the surrounding material by laser. That is, as shown in Figures 4A and 4B, In an embodiment of the present invention, before the at least one hole 31〇 is drilled, the method further comprises: laminating a solid metal foil layer (foil) 3 to the first of the at least one of the sub-assemblies On the side, as the outermost layer of the at least one sub-assembly; and selectively removing a portion of the solid metal foil layer 3 而 in correspondence with the at least one hole 310 and the at least one corresponding counterbore 330 Forming a clearance. The formation of the at least one 16 201106826 hole 310 can include drilling the at least one hole 31 在 at the clearance, and the at least one counterbore Forming the 3 3 0 may include drilling the at least one head hole 330 at the clearance. Selectively removing a portion of the solid metal foil layer 3 来 to form the clearance system may include removing the solid metal The portion of the foil layer 3 is formed to have a diameter substantially the same as the diameter of the at least one corresponding counterbore 330. If a c〇2 laser is used, for example, at the eighth, The copper foil crucible (or the etched conductor) 18〇 shown in Figures 2 and 3 will prevent further penetration. It may be preferred to have a smaller diameter hole with a non-circular counterbore hole. A thin foil is used as the underlying pad. The embodiments in Figures IB, 1C, 2 and 3 utilize 2 ζ of copper, but it can be very thin or even thicker than 2 。. See page 2 And three diagrams, three sub-assemblies can be prepared to each of about 6 mils thick. The drilled channel can be about 6 mils in diameter. The counterbore can be about 10 mils in diameter. Capture in each assembly or within The pad may be approximately 1 mils. The pair of ridges in the s-lamination may be approximately 12 mils in diameter. Each assembly has one or more printed through-holes (PTH) There may be an aspect ratio of about 1 〇: 1. These shapes can be made for each assembly. If three sub-assemblies are attached to create a plate that is about 180 mils thick, the overall aspect ratio is approximately 3〇: i. Especially in a hole of about 6mils, it will be difficult to drill through about 18〇〇1. Even if the plate can be drilled, it will be very difficult to first metallize a seed layer in the hole. The seed layer is then electroplated in a PTH process. High aspect ratio pore systems are preferred and/or desirable in inexpensive test equipment such as probes and carrier cards. Small diameter holes meet the spacing requirements of the tester. The associated high number of layers makes these devices very difficult to manufacture. A comparable method must accurately drill the two surfaces and force the pump 17 201106826 to pump the electroless and electrolytic solution through the holes to prepare the ΡΤΗβ. The comparable method is subject to borehole misalignment and poor Capacity. Looking at the above, and in accordance with an embodiment of the present invention, the main advantages of using a parallel construction technique to construct a multi-layer board are as follows: 1. The sequential component board will have several times more chances to discard the previous steps. 2. Parallel construction has fewer steps to make a board and allows the board to be made several times faster. 3. The faster manufacturing of the board improves the customer's learning cycle time when making prototypes. 4. Faster manufacturing times allow the board to be produced to the customer's requirements, while fewer products are placed on the rack at the manufacturing, assembly and customer locations. 5. The entire process will produce less waste and higher quality than a sequential construction process due to fewer steps, even if the same equipment and process are used to make the board. 6. — The overall capacity of a board for manufacturing a device will increase. 7. It is possible to make a mixture of materials with other incompatible materials. 8. The specific layer can be incorporated into the panel. 9 • The use of countersink technology creates abutment for the secondary assembly's ink contacts. The metal (or copper) encapsulation system is flush with the resin/glass composite and can be prepared by a countersunk head hole technique, ie mechanical drilling with countersunk holes or mechanical drilling and laser with group 0 Spigot. This countersinking technique will result in a more plausible-forging of the manhole, which will produce less bending stress in the layers that are buried by the conventional electric forging technique. In general, the countersinking technique described above can be used in accordance with an embodiment of the present invention to create very high aspect ratio holes, and the resulting layer-to-layer circuit density can be higher than conventionally produced. While the present invention has been described in connection with the embodiments of the present invention, it is understood that the invention is not intended to And various amendments in its equivalent. BRIEF DESCRIPTION OF THE DRAWINGS FIGS. 1B and 1C illustrate a detailed process in which one assembly can be prepared in accordance with one embodiment of the present invention. Figure 2 illustrates the joining of three sub-assemblies in accordance with one embodiment of the present invention. Figure 3 is a detailed view of one of the ink contacts showing that the package is relatively "flat" in the secondary assembly of Figure 2. 4A and 4B illustrate a laser counterbore pattern of one of the string materials, which is made "flat" in accordance with an embodiment of the present invention for attachment of the sub-assembly to the sub-assembly. [Main component symbol description] 100.. .Secondary assembly 100'...second assembly 110,310...hole 120... first side 130... countersunk hole 140.. metallic material 150.. foil layer 160...channel 170.. .Laminating adhesive 180.. Copper foil pad 200.. Printed circuit board 300.. foil 19