201101284 六、發明說明： 【發明所屬之技術領域】 ’係指一 本發明係相關於一種啟動時序保護電路，更明確地說 種用於閘極驅動電路之啟動時序保護電路。 【先前技術】 Ο 〇 請參考第1圖。第1圖為先前技術之液晶顯示器之示立圖 液晶顯不10包含一電源電路12、一閘極驅動電路μ、、 、一源極驅 動電路16及一顯示面板18。電源電路12接收輸入電壓Vcc，並據 以產生資料驅動電壓Vs、閘極低電壓Vgl及閘極高電壓 GH 0 1¾ 驅動電路14電性連接於電源電路12。閘極驅動電路14用來接收閘 極低電壓VGL及閘極高電壓Vgh，以產生閘極控制訊號&。源極^ 動電路16電性連接於電源電路12 ’用來接收資料驅動電壓％，以 產生資料驅動訊號Ss。 s 顯示面板18包含複數條資料線(DataUne)、複數健直於資料 線的掃描線(Gate Οηφχ及複數個触f g體(Thin胞τ聰丨敝， TFT)。更明確地說，顯示面板18中每—f料線與掃描線的交接處 均電性連接有-薄膜電晶體。每—_電晶體係對應於一像素 (pixel) ’亦_膜電晶難以矩_方式分佈於顯示硫18上。其 201101284 中’源極驅動電路16電性連接於顯示面板18中每一資料線，而 極驅動電路14電性連接於顯示面板18中每—掃描線。也就是說: 顯不面板18中每-資料線係藉由資料驅動訊號Ss驅動，而顯示面 板18每-掃摇線係由閘極控制峨&驅動。_言之，源極 電路16及閘極驅動電路M控制顯示面板18中薄膜電晶體的導 以顯示晝面。 通’ 請參考第2圖。第2圖為閘極驅動電路I4啟動時之正常電壓 波形圖。液晶顯7F器1〇開機時，輸入電壓Vcc達到穩定，接著問極 低電壓VGL達到-低準位(舉例來說，閘極低電龄GL從原本〇伏特 下降至·6伏特），使閘極驅動電路丨4關顯示面板18之所有掃描、 線’以預防開機雜訊。之後’再啟制極高電壓VGH翻—高準位 (舉例來說’閘極高電壓VGH從原本〇伏特上升至18伏特），以開啟 顯示面板18並驅動其掃描線。因此，在正常操作下，液晶顯示器 10開機之電壓時序為：Vcc—VQI^ v%。201101284 VI. Description of the Invention: [Technical Field of the Invention] The present invention relates to a startup timing protection circuit, and more particularly to a startup timing protection circuit for a gate driving circuit. [Prior Art] Ο 〇 Please refer to Figure 1. 1 is a schematic view of a prior art liquid crystal display. The liquid crystal display 10 includes a power supply circuit 12, a gate drive circuit μ, a source drive circuit 16, and a display panel 18. The power supply circuit 12 receives the input voltage Vcc and generates a data driving voltage Vs, a gate low voltage Vgl, and a gate high voltage GH 0 13⁄4. The driving circuit 14 is electrically connected to the power supply circuit 12. The gate drive circuit 14 is configured to receive the gate low voltage VGL and the gate high voltage Vgh to generate a gate control signal & The source circuit 16 is electrically connected to the power circuit 12' for receiving the data driving voltage % to generate the data driving signal Ss. The display panel 18 includes a plurality of data lines (DataUne), a plurality of scan lines that are straightforward to the data lines (Gate Οηφχ, and a plurality of touch fg bodies (Thin cells, TFT). More specifically, the display panel 18 A junction of each of the f-line and the scan line is electrically connected with a thin film transistor. Each -_ electro-optic system corresponds to a pixel (also) _ membrane electron crystal is difficult to modally distributed on the display sulfur 18 The source drive circuit 16 is electrically connected to each of the data lines in the display panel 18, and the pole drive circuit 14 is electrically connected to each of the scan lines in the display panel 18. That is: the display panel 18 Each data line is driven by the data driving signal Ss, and the display panel 18 is driven by the gate control 峨 & the source circuit 16 and the gate driving circuit M control the display panel 18 The middle film transistor guides the surface to show the surface. Refer to Figure 2. Figure 2 shows the normal voltage waveform when the gate drive circuit I4 is started. When the liquid crystal display 7F is turned on, the input voltage Vcc is stable. And then ask the very low voltage VGL to reach the low level (for example, The extremely low battery age GL drops from the original volts to 6 volts, so that the gate drive circuit 丨4 closes all scans and lines of the display panel 18 to prevent boot noise. Then 'restarts the very high voltage VGH turn- The high level (for example, 'gate high voltage VGH rises from the original volt to 18 volts) to turn on the display panel 18 and drive its scan line. Therefore, under normal operation, the voltage timing of the liquid crystal display 10 is: Vcc—VQI^ v%.
G 然而，先前技術之閘極驅動電路14並無任何偵測電壓時序之機 制。當電源電路i2將閘極低電壓Vgl及閘極高電壓—傳輸到間 極驅動電路14之順序並非如上述時’則有可能在開機的階段時，問 極驅動電路14所輸出的閘極驅動訊號Sg，把顯示面板18開啟而將 先前殘留的晝面顯示出來’造成雜訊。另外，不正常的開機電壓時 序會使液晶顯示器10於開機的瞬間，造成間極驅動電路M動作不 ，正確。如此’液晶顯示器1〇可能無法啟動，甚至損害間極驅動電路 201101284 14 〇 【發明内容】 人一本發_提供-獄_序賴魏。該啟树序保護電路包 3 -比較ϋ ’用來伽卜閘極低輕是否達到—第—預設準位，包 含一第-輸人端’用來接收該閘極低賴；—第二輪人=，用^ Ο 〇 考?Γ以及一輸出端，用來根據該閘極繼及該閘 少考碰之比較結果，輸出—_低電壓準 電Γ位判斷電路，用來接收一輸入電壓，並根據一輸入參考電t 斷訊m端，細輪増準位判 電鮮位判斷訊號；以及較’用來接收該閘極低 輪出端，該邏輯閘針對該輸入電壓準 判斷訊號與制極低·準粉電壓丰位 閑之該輸出端輸出-間極料愚進订邏輯運异，以於該邏輯 於該邏齡以及一閘極低雙::卿峨;-開關，電性連接 並將其傳輸至-咖動：輸出端’用來接收娜低電壓， 另提供—種啟動電壓時序之方法。該方法包含接收一閘 :低Ζ以及一閘極高電壓;輸出該閘極低電壓至一閘極驅動電 路，^和-開極參考電壓比較，偵測該間極低電壓是否達到一第 Μ以產生第—控制訊號；接收-輸人電壓；藉由和一 201101284 輸入料比較，_該輸人賴衫相1二預設準位，以 訊號;根據該第一控制訊號與該第二控制訊號，輸 出該閘極阿電壓至該閘極驅動電路。 【實施方式】 在^書及後續的中請專利範圍當中使用了某些詞彙來指稱特 ❹ 2 π。所屬領域巾具有通常知識者應可理解，製造商可能會用 。的名詞來射同樣的元件。本綱書及後續 =名稱的差異來作為區別元件的方式，而是以元件在=: 二::的基準。在通篇說明書及後續的請求項當中所提及的 匕s」係為-式_語’故應解釋成「包含但不限 〇 右文中描H裝置電性連接於―第二裝置，職表 :==該第二裝置’或透過其他裝置或連接手段間接 因此， 驅動電路， 本發明之目的在於提供—具有啟動時序保護電路之閑極 用來確保液晶顯示關機之電壓時序符合規範。 凊參考第3圖。第3圖係為說明本發明之液晶顯示器3〇 :。液晶顯包含一電源電路32、一間極驅動電㈣、二: 時序保護電路33、一源極驅動電路36及-顯示面板38。當液曰曰 201101284 顯不器30開機時’電源電路32接收輸入電壓I，並據以產生資 料驅動電壓Vs、閘極低電壓I及閑極高電壓—。啟動時序保護 電路33電性連接於電源電路32與閘極驅動電路％之間，同時並接 收輸入電壓Vcc。啟動時序保護電路33係用來確保閘極低電壓Vgl 及閘極四電壓VGH之正確時序。閘極驅動電路％用來從啟動時序 保濩電路33接收正確啟動時序之閘極低電壓I及問極高電麗 VGH，以產生’控制訊號Sg。源極驅動電路％電性連接於電源電 〇路32 ’用來接收資料驅動電壓力，以產生資料驅動訊號心。顯示 面板38電性連接於閘極驅動電路34與源極驅動電路％。顯示面板 38根據所接收關極控舰號&與龍赌訊號&，顯示晝面。 明參考第4圖。第4圖為本發明之啟動時序保護電路％之示意 圖。啟動時序保護電路33包含一閘極參考電壓源33卜一比較器。 332、-及開333、-輸入電壓準位判斷電路334、一開關335以及 -輸出端〇GL。閘極參考領源331係提供一接近於〇伏特之負電 〇壓(舉例來說，-0.5伏特)的閘極參考電壓。比較器说包含一第一輸 入端、-第二輸人端’以及—輸出端。間極低電壓I輸入至比較 益332之-第-輸入端，同時並藉由輸出端〇沉輸入至間極驅動電 路34 ;閘極參考電壓源331係輸入閘極參考電壓至比較器幻2之一 第二輸入端。比較器332用來比較閘極參考電壓與閘極低電壓， 並據以產生_低電鮮位满城Sgl。舉例來說，#閘極低電 壓VGL為0伏特時，閘極低電壓Vgl高於閘極參考電壓 鮮位判斷訊號Sgl為邏輯「〇」（低電位）；當間極低龍I下降 201101284 2伏特時’ _低電壓VGL低於閑極參考電 判斷訊號SGL為邏輯n」(高電位)。 低電壓準位 輸入電群位判斷電路334用來接收輸入麵& 參考電壓，以產生—輸入電鮮位判斷訊號&。舉鄉說， 5又雨入參考龍為2伏特；當輸入輕~為 ^ Ο =办輸人賴雜觸峨Sgg騎輯「Q」（低電 I為5伏特時(高於輸入參她），輸入 :入 W電位）。及閉333包含一第一輸入端 入：及-輸出端。及間333之第一輸入端電性連接於輸入第;： 位判斷電路334,用來接收輸入電醉位判斷 = 電性連接於比較H 332德屮嫂田心 弟一輸入知 之輸出端，用來接收閉極低電壓準位判斷訊 號广。及閘333係對輸入電壓準位判斷訊號&與閘極低電 Ο 賊，當輸々_娜峨 斷碱SGL皆為邏輯％ (高電位)時，及閉㈣出邏輯 電位)之_高電醉__號^。 ^ ^ 33湖來接收閑極高電壓I，同時並電性連接於及閘 =“。開_係_ 333所輸出之閘極高電 ==所控制。舉例來說，當間極高電壓準位判斷訊號Sgh為 ‘ s」為時’開關335為不導通;當閘極高電壓準位判斷 5fl號SGH為邏輯「1 (高電位)時 电仅辦開關335導通。當開關奶導通 201101284 時’閘極高電壓VGH便能經由開關335傳送至閘極驅動電路34。 更進一步地說，只有在開關335為導通之狀態時，閘極高電壓 VGH才能經由開關335傳送至閘極驅動電路34 ;只有當閘極高電壓 準位判斷汛號sGH為邏輯「1」（高電位)時，開關335才會導^ ; 口、 有在輸入電壓準位判斷訊號Scc與閘極低電壓準位判斷訊號^ f 為邏輯「1」（高電位)時，及閘333才會輸出邏輯「丨」（高電位)之閘 極高電壓準位判斷訊號Sgh ;只有當閘極低電壓Vgl下降為伏^ 〇時’比較器332才會據以輸出邏輯「！」（高電位)之閘極低電壓準位 判斷訊號sGL。因此’經由雌時序倾電路33之保護，閘極驅動 電路34-定會先接收達到低準位之閘極低電壓I，接著才會接收 達到高準位之閘極高電壓VGH。 θ 〇 請參考第頂，第5圖係為說明本發明之啟動時序保護電路^ 之操作流程圖。啟動時序保護電路33係根據下列步驟進行動作： 步驟51 :液晶顯示器3G開機，輸人電壓％。輸人至電源電路μ 與輸入電壓準位判斷電路334 ; 步驟521源電路32產生_低麵4及難高錢ν .啟 動時序保護電路33藉由輸出端〜將鬧極低電壓^輸 入到閘極驅動電路34 ; 步驟 源331 ’偵測閘極低電壓是 則進行步驟54;若否，則回到 53 .比較器332根據參考電壓 否達到一低準位；若是， 步驟52 ; 201101284 步驟54:比較器332輸出邏輯「丨」（高電位），以使及閘333輸出 邏輯「1」（高電位）’進而導通開關332 ; ❹ 步驟55 .經由開關332將閘極高電壓Vgh輸入到閘極驅動電路料。 當液晶顯示器4G開機後’輸人電M Vce同時輸人至電源電路％與 輸入電壓準位判斷電路334。輸入電壓準位判斷電路334根據輸入 電麼Vcc之準位’用來產生—輸人電壓準位判斷訊號^。電源電 路32根據輸人電塵Vcc產生閉極低電壓I及閉極高電麼I。閑 極低電壓vGL及閘極高電壓Vgh分別被傳送至時序保護電路33之 比較器332以及開關切。接著，時序保護電路％會先藉由輸出端 〇GL將閘極低電塵VGL傳輸到間極驅動電路34。比較器说根據夾 考電壓請來偵測閘極低電壓4是否達到一低準位。當間極低 達到該低準位，比較器332輸出邏輯「】」_立)之閉極 斑，位崎訊號Sgl。及開333對輸人賴準位判斷訊 ❾ 辟位·簡^妨及料。當駄縣準位判斷 低《準位判斷訊號S0L皆為邏輯「丨」(高電位)時斷 當閘極高二位)：極_準位判斷訊號S°H。 藉由利用_高電壓準位;==315輸人至__電路34。 傳送__路=::=;=I 低電壓\娜高電4VGH之時序t=^。33可喻制閉極 4上所述’本發明所提供之敬動時序保護電路可以有效地確保 201101284 液晶顯示器開機之電壓時序符合規範，提供使用者極大的便利。 以上所述僅為本發明之較佳實施例，凡依本發明 所做之均等變化與修飾1顧本發明之涵絲圍。〗範圍 【圖式簡單說明】 第1圖极前技術之液晶顯示器之示意圖。 2圖為閘極驅動電路啟動時之正常電墨之波形圖。 3圖係為說明本發明之液晶顯示器之示意圖。 第4圖為本發明之啟㈣序保護電路之示意圖。 _係為說明本㈣之啟鱗序賴之操作流程圓。 【主要元件符號說明】 10、30 12、32 14、34 16、36 18 ' 38 33 331 332 〇 液晶顯示器 電源電路 閘極驅動電路 源極驅動電路 顯示面板 啟動時序保護電路 參考電壓源 比較器 12 201101284 333 及閘 334 輸入電壓準位判斷電路 335 開關 51 〜55 步驟 〇GL 輸出端 Sec 輸入電壓準位判斷訊號 Sgh 閘極高電壓準位判斷訊號 Sgl 閘極低電壓準位判斷訊號 Sg 閘極控制訊號 Ss 資料驅動訊號 Vs 資料驅動電壓 Vcc 輸入電壓 Vgh 閘極高電壓 V〇l 閘極低電壓 ❹ 13G However, prior art gate drive circuit 14 does not have any mechanism for detecting voltage timing. When the power supply circuit i2 transmits the gate low voltage Vgl and the gate high voltage - the order of transmission to the intermediate driving circuit 14 is not as described above, it is possible that the gate driving of the polarity driving circuit 14 is driven at the time of starting up. The signal Sg turns on the display panel 18 to display the previously remaining side surface to cause noise. In addition, the abnormal power-on voltage timing causes the liquid crystal display 10 to be turned on at the moment of power-on, causing the inter-pole drive circuit M to operate incorrectly. Thus, the liquid crystal display may not be able to start, or even damage the inter-polar drive circuit. 201101284 14 〇 [Summary] One person sends a _ _ _ _ _ _ wei Wei. The start-up sequence protection circuit package 3 - compare ϋ 'used to gaps the gate low light or not - the first preset level, including a first-input terminal' for receiving the gate low; The wheel person =, using ^ Ο 〇 Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Voltage, and according to an input reference electric power t, the m end, the thin wheel 増 position is judged by the fresh bit judgment signal; and the 'corresponding to the gate low wheel end, the logic gate judges the signal for the input voltage The output of the output is extremely low, and the output of the quasi-powder voltage is abrupt. The logic is different from the logic, so that the logic is at the age of the logic and the low is a low:: Qing 峨; - switch, electricity Sexually connect and transmit to the - coffee: the output 'is used to receive the low voltage, and the other is a way to start the voltage timing. The method includes receiving a gate: a low gate and a gate high voltage; outputting the gate low voltage to a gate driving circuit, comparing the ^ and - open reference voltages, and detecting whether the extremely low voltage reaches a first level To generate a first control signal; to receive-transfer voltage; by comparing with a 201101284 input material, the input signal is at a predetermined level, and the signal is received; according to the first control signal and the second control The signal outputs the gate voltage to the gate drive circuit. [Embodiment] Some words are used in the patent and the subsequent patents to refer to the special ❹ 2 π. The field towel has the usual knowledge that should be understood by the manufacturer and may be used by the manufacturer. The noun to shoot the same component. This specification and subsequent = name differences are used as a means of distinguishing components, but with components on the basis of =: two::. The 匕s mentioned in the entire specification and subsequent claims are - _ 语 语 语 语 语 语 语 语 语 语 语 语 语 语 语 语 语 语 语 语 语 语 语 语 语 语 语:== The second device' or indirectly through other devices or connection means, therefore, the driving circuit, the object of the present invention is to provide a voltage step with a start-time protection circuit for ensuring that the liquid crystal display is turned off in accordance with the specification. Figure 3 is a diagram showing the liquid crystal display of the present invention. The liquid crystal display includes a power supply circuit 32, a pole drive circuit (4), a second: a timing protection circuit 33, a source drive circuit 36, and a display. Panel 38. When the liquid 曰曰 201101284 display device 30 is turned on, the power supply circuit 32 receives the input voltage I, and accordingly generates the data driving voltage Vs, the gate low voltage I, and the idle high voltage. The startup timing protection circuit 33 is powered. It is connected between the power supply circuit 32 and the gate drive circuit %, and receives the input voltage Vcc. The start timing protection circuit 33 is used to ensure the correct timing of the gate low voltage Vgl and the gate four voltage VGH. The dynamic circuit % is used to receive the gate low voltage I and the high voltage VGH of the correct start timing from the startup timing protection circuit 33 to generate the 'control signal Sg. The source drive circuit is electrically connected to the power supply circuit. 32' is used to receive the data driving voltage force to generate the data driving signal center. The display panel 38 is electrically connected to the gate driving circuit 34 and the source driving circuit %. The display panel 38 is based on the received gate control number & The dragon gambling signal & display shows the face. See Figure 4 for a diagram. Figure 4 is a schematic diagram of the start timing protection circuit % of the present invention. The start timing protection circuit 33 includes a gate reference voltage source 33 and a comparator. - and - 333, - input voltage level determining circuit 334, a switch 335 and - output terminal 〇 GL. The gate reference source 331 provides a negative power 接近 close to 〇 volts (for example, -0.5 volts) a gate reference voltage. The comparator includes a first input terminal, a second input terminal, and an output terminal. The interpolar low voltage I is input to the -first input terminal of the comparator 332, and by Output sinking input to the interpole drive The gate reference voltage source 331 is an input gate reference voltage to a second input terminal of the comparator phantom 2. The comparator 332 is used to compare the gate reference voltage with the gate low voltage, and accordingly generate _ low power For example, when the gate low voltage VGL is 0 volts, the gate low voltage Vgl is higher than the gate reference voltage fresh signal Sgl is logic "〇" (low potential); When Dragon I drops 201101284 2 volts' _ low voltage VGL is lower than the idle reference power judgment signal SGL is logic n" (high potential). The low voltage level input power group judging circuit 334 is configured to receive the input surface & reference voltage to generate an input electric field judging signal & The township said, 5 rain into the reference dragon is 2 volts; when the input is light ~ for ^ Ο = to lose people to touch the Sgg riding series "Q" (low power I is 5 volts (higher than the input) , input: into the W potential). And the closing 333 includes a first input terminal: and - an output terminal. The first input end of the 333 is electrically connected to the input; the bit judging circuit 334 is configured to receive the input electric drunk bit judgment = electrically connected to the output of the H 332 屮嫂田心弟一 input knowledge, for receiving The closed-pole low-voltage level has a wide signal. Gate 333 is the input voltage level judgment signal & and the gate is low Ο thief, when the input 峨 峨 峨 碱 碱 S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S S Electric drunk __ number ^. ^ ^ 33 Lake to receive the idle high voltage I, and electrically connected to the gate = ". Open _ system _ 333 output gate high power == controlled. For example, when the interpolar high voltage level When the judgment signal Sgh is 's', the switch 335 is non-conducting; when the gate high voltage level determines that the SGH of the 5fl number is logic "1 (high potential), only the switch 335 is turned on. When the switch milk is turned on 201101284' The gate high voltage VGH can be transmitted to the gate driving circuit 34 via the switch 335. Further, the gate high voltage VGH can be transmitted to the gate driving circuit 34 via the switch 335 only when the switch 335 is in the on state; Only when the gate high voltage level judges that the slogan sGH is logic "1" (high potential), the switch 335 will conduct the control; the port has the input voltage level judgment signal Scc and the gate low voltage level judgment signal. When ^ f is logic "1" (high potential), Gate 333 will output the logic "丨" (high potential) gate high voltage level judgment signal Sgh; only when the gate low voltage Vgl falls to volts ^ 〇 When the comparator 332 outputs the logic "!" (high potential), the gate is low. Level judgment signal sGL. Therefore, by the protection of the female timing circuit 33, the gate driving circuit 34 will first receive the gate low voltage I which reaches the low level, and then receive the gate high voltage VGH which reaches the high level. θ 〇 Please refer to the top, and FIG. 5 is a flow chart for explaining the operation of the startup timing protection circuit of the present invention. The startup timing protection circuit 33 operates according to the following steps: Step 51: The liquid crystal display 3G is powered on, and the input voltage is %. Input to power supply circuit μ and input voltage level determining circuit 334; Step 521 source circuit 32 generates _low side 4 and hard high ν. The start timing protection circuit 33 inputs the low voltage ^ to the gate through the output terminal The pole drive circuit 34; the step source 331 'detects the gate low voltage to proceed to step 54; if not, returns to 53. The comparator 332 reaches a low level according to the reference voltage; if yes, step 52; 201101284 step 54 The comparator 332 outputs a logic "丨" (high potential) to cause the AND gate 333 to output a logic "1" (high potential)' to turn on the switch 332; ❹ Step 55. Input the gate high voltage Vgh to the gate via the switch 332 Extreme drive circuit material. When the liquid crystal display 4G is turned on, the input power M Vce is simultaneously input to the power supply circuit % and the input voltage level determining circuit 334. The input voltage level judging circuit 334 is used to generate the input voltage level judging signal ^ according to the level of the input voltage Vcc. The power supply circuit 32 generates a closed low voltage I and a closed high power I according to the input electric dust Vcc. The idle low voltage vGL and the gate high voltage Vgh are respectively transferred to the comparator 332 of the timing protection circuit 33 and switched. Then, the timing protection circuit % first transmits the gate low electric dust VGL to the inter-pole driving circuit 34 through the output terminal 〇GL. The comparator says to check if the gate low voltage 4 reaches a low level based on the clamp voltage. When the low level reaches the low level, the comparator 332 outputs a closed-pole spot of logic "]"_立), which is the position Sgl. And open 333 pairs of people to rely on the level of judgment ❾ 位 · · 简 简 简 。 。 。. When the Jixian level is judged to be low, the “leveling judgment signal S0L is all logic “丨” (high potential) when the gate is high (the high level is two): the pole _ level judgment signal S°H. By using the _ high voltage level; == 315 is input to the __ circuit 34. Transfer __路=::=;=I Low voltage\Na Gao 4VGH timing t=^. 33 can be used to make the closed pole 4 described above. The tampering timing protection circuit provided by the present invention can effectively ensure that the voltage timing of the 201101284 liquid crystal display is in compliance with the specifications, and provides great convenience for the user. The above is only the preferred embodiment of the present invention, and the equivalent variation and modification of the invention are based on the hanbunding of the present invention. 〗 Scope [Simple description of the diagram] Figure 1 is a schematic diagram of the liquid crystal display of the front-end technology. 2 is a waveform diagram of the normal ink when the gate drive circuit is started. 3 is a schematic view showing a liquid crystal display of the present invention. Figure 4 is a schematic diagram of the (4) sequence protection circuit of the present invention. _ is the operational flow circle that explains the sequence of this (4). [Main component symbol description] 10, 30 12, 32 14, 34 16, 36 18 ' 38 33 331 332 〇 LCD power supply circuit gate drive circuit source drive circuit display panel start timing protection circuit reference voltage source comparator 12 201101284 333 and gate 334 input voltage level judgment circuit 335 switch 51 ~ 55 step 〇 GL output terminal Sec input voltage level determination signal Sgh gate high voltage level determination signal Sgl gate low voltage level determination signal Sg gate control signal Ss data drive signal Vs data drive voltage Vcc input voltage Vgh gate high voltage V〇l gate low voltage ❹ 13