201044163 ' 六、發明說明： • 【發明所屬之技術領域】 本發明是有關於一種週邊元件互連快速插槽之測試系 統，且特別是有關於一種週邊元件互連快速插槽之測試系 統及測試方法。 【先前技術】· 週邊元件互連快速介面是一種廣為使用的電腦資料傳 〇 輸介面。在市面常見的主機板上，往往都設置有這樣的介 面，以進行資料的傳輸。然而製造廠商在週邊元件互連快 速介面的測試上，對於主機板跟具有週邊元件互連快速介 面的功能卡，如網路卡、顯示卡或音效卡，須要分別進行 測試，而無法同時對主機板及功能卡進行雙向的測試。並 且，在對功能卡進行測試時，如欲更換功能卡，必須要先 切斷主機板的電源，才可進行更換的動作，以避免系統產 生嚴重的硬體錯誤。這樣的測試流程，是十分費時且不便 Ο 的。 因此，如何設計一個新的週邊元件互連快速插槽之測 試系統及測試方法，能夠同時對主機板及功能卡進行測 試，且提供一個在不須切斷主機板電源即可更換功能卡以 繼續進行測試的機制，乃為此一業界亟待解決的問題。 【發明内容】 因此，本發明之一態樣是在提供一種週邊元件互連快 速插槽之測試系統，包含：週邊元件互連快速接腳介面、 201044163 週邊元件互連快速插槽介 板；週邊元件互連快逮插接腳/面用以連接主機 組用以藉由週邊元件互用以連接待測板;處理模 牛互連决速插槽"面使主機板及待測板間進 Ο ❾ ίί插二組，用以於待測板連接於週邊元件互連 槽介面時，供應或切斷㈣板之電源，俾提供熱插 槽4=另:=供：:=互連快速插 =之:試系統’係包含週邊元件互連快速接腳 連接主機板以及待測 ，巧主機板進行主機板測試程序；供應待測板電源 tit測試程序切換至對應主機板之資料傳輸模式；根 _貝料傳輸模式，糟由週邊元件互連快速接腳介面及 =牛，連快速插槽介面使主機板及待測板間進行待 喊裎序；以及提供待測板熱插拔作用，俾於待測板測j 畢後，於主機板不斷電時，切斷待測板之電源， 疋 除待測板。 、罝接移 應用本發明之優點係在於藉由主機板測試程序及 板測試程序，可使用同一個測試系統對主機板及待測1測 進行測試，並提供熱插拔機制，在不須對主機板進行 201044163 而 的情形下，直接更換待測板以進行其他待測板之測試 輕易地達到上述之目的。 【實施方式】 Ο %參知'第1圖，係為本發明之一實施例之週邊元件互 連决速插槽之測H统1Q之方塊圖。測試系統1❽包含： =邊元件互連快速接腳介面議、週邊元件互連快速插槽 ”面1〇2、處理模、组104、資料傳輸模址1〇6以及電源模 108。週邊元件互連快速接腳介面1〇〇用以連接主機板以， 而週邊元件互連快㈣槽介面搬肖叫接制板14。項 注意的是，主機板12實質上亦包含主機板週邊元件互連 連插槽介面12G ’㈣測板14上亦包含待測板週邊元件互 連快速接腳介面14G。因此，測試系統1G的週邊元件 快速接腳介面⑽係連齡機板12的主機板週航件互連 2插槽介面m，而測試系統㈣週邊元件互連快速插 =二面102係連接待測板14的待測板週邊元件互連快速接 …請同時參照第2圖。第2圖係為本發明之一實施 j忒系統10、主機板12及待測板14接合之立體圖。本 =例中’測試系、统ίο係為一測試板，在連接主機板u 待測板14後，係成為三層式的結構。 請繼續參照第1圖。處理模組104用以藉由週邊 =快速接腳介面議進行對主機板12之主機板測試程 序。主機板測試程序實質上包含連接測試、匯流排寬 试、匯流排速度測試以及電源測試。連接測試係用以：定 6 201044163 、j式系’先l〇之週邊元件互連快速接腳介面WO與主機板 =之主機板週邊元件互連快速插槽介面120已經建立了實 質的連接。H流排寬度職及匯流排速度測試用以測試出 主機板12之主機板週邊元件互連快速插槽介面120的傳輪 頻寬以，傳輸速度。而電源測試則用以測試主機板之電 源供應是否正常。上述的測試，均是對於主機板12之主機 板，邊元件互連快速插槽介面12()上的各腳位進行的必要201044163 ' VI. Description of the invention: • Technical field to which the invention pertains The present invention relates to a test system for interconnecting fast slots of peripheral components, and in particular to a test system and test for a peripheral component interconnecting quick slot method. [Prior Art] · Peripheral Component Interconnect Fast Interface is a widely used computer data transmission interface. In the common motherboards on the market, such interfaces are often provided for data transmission. However, in the test of the fast interface of the peripheral component interconnection, the manufacturer needs to test the function card of the motherboard and the quick interface of the peripheral component interconnect, such as the network card, the display card or the sound card, and cannot simultaneously test the host. The board and function card are tested in both directions. Moreover, when testing a function card, if you want to replace the function card, you must first cut off the power of the motherboard before you can replace it to avoid serious hardware errors. This kind of testing process is very time consuming and inconvenient. Therefore, how to design a new peripheral component interconnect fast slot test system and test method, can test the motherboard and function card at the same time, and provide a replacement function card to continue without powering off the motherboard The mechanism for testing is an urgent problem to be solved in the industry. SUMMARY OF THE INVENTION Accordingly, one aspect of the present invention is to provide a test system for peripheral component interconnect fast slots, including: peripheral component interconnect fast pin interface, 201044163 peripheral component interconnect fast slot interface; periphery Component interconnection fast catching pin/face is used to connect the host group for connecting the board to be tested by peripheral components; processing the module interconnect speed slot" surface to make the board and the board to be tested Ο ❾ ίί Insert two groups to supply or cut off the power of the (four) board when the board to be tested is connected to the peripheral component interconnect slot interface. 俾Provide the hot slot 4=Additional:=For::=Interconnect Quick Plug =: The test system consists of peripheral components interconnecting fast-connected motherboards and the test board, and the motherboard is tested by the motherboard; the supply test board power test is switched to the corresponding host board data transfer mode; _Bei material transmission mode, the peripheral device interconnects the fast pin interface and = cow, even the fast slot interface allows the motherboard and the board to be tested to be called; and provides the hot plugging function of the board to be tested, 俾After the test of the board to be tested, When the plate continues to power off the power of the test plates, except that the test piece goods plate. The advantage of the present invention is that the motherboard test program and the board test program can be used to test the motherboard and the test to be tested using the same test system, and provide a hot plug mechanism. In the case where the motherboard performs 201044163, directly replacing the board to be tested for testing other boards to be tested can easily achieve the above purpose. [Embodiment] FIG. 1 is a block diagram of a measurement system of a peripheral component interconnecting speed slot according to an embodiment of the present invention. The test system 1❽ includes: = edge component interconnect fast pin interface, peripheral component interconnect fast slot "face 1 〇 2, processing mode, group 104, data transfer module address 1 〇 6 and power mode 108. peripheral components The quick-connect interface 1 is used to connect the motherboard, and the peripheral components are interconnected to the fast (four) slot interface. The main board 12 also includes the peripheral components of the motherboard. The slot interface 12G '(4) the test board 14 also includes the peripheral component interconnect quick-connect interface 14G of the board to be tested. Therefore, the peripheral component quick-connect interface of the test system 1G (10) is the motherboard peripheral of the serial board 12 Interconnect the 2-slot interface m, and the test system (4) peripheral components interconnect fast plug = two-sided 102-series connected to the board to be tested 14 peripheral components interconnect fast connection... Please also refer to Figure 2. Figure 2 A perspective view of the implementation of the j忒 system 10, the motherboard 12 and the board to be tested 14 is implemented in one embodiment of the present invention. In the example, the test system and the system are a test board, and after connecting the motherboard u to the board 14 to be tested, It is a three-layer structure. Please continue to refer to Figure 1. Processing mode The 104 is used to test the motherboard of the motherboard 12 by using the peripheral=quick pin interface. The motherboard test program essentially includes a connection test, a busbar width test, a busbar speed test, and a power test. To: 6 201044163, j-type system 'first l〇 peripheral component interconnect fast pin interface WO and motherboard = motherboard peripheral component interconnect fast slot interface 120 has established a substantial connection. H flow row width The job and bus speed test is used to test the transmission bandwidth of the peripheral component of the motherboard 12 to interconnect the fast slot interface 120, and the power test is used to test whether the power supply of the motherboard is normal. The above tests are necessary for the motherboard of the motherboard 12, and the components on the fast slot interface 12() of the side components are interconnected.
測試’以確保*論是資料傳輸或是電源的供應都是 作的。 咬 其他實施例中，為因應其他的功能，亦可由使用 者在設定職純1G時，增加對系辭觀料、資料傳 輸壓力、燒錄以及遠端喚醒等功能的測試， 各聊位的測試程序更加完整。其中系統管理匯流排= 用以對主機板12上的其他已知位址之模組進行測試料 傳輸壓力測試係用以測試在連續且大量的資料傳輪後，主 機板週邊元件互連快速插槽介面12Q是否仍能正常工。 測試系統1G於—實施例中更包含串列式電氣式可 讀記憶體11G，燒錄測試㈣以對串列式電氣式 ^ "賣°己隐體UG進行燒錄動作的測試。而遠端唤醒測t式則a 用以測試透過網路封包（未繪示）來對域板12進行^ 動作的測試。 浥仃奐醒 資料傳輸模組1〇6用以切換於不同之資料傳 俾根據主機板_程序提供㈣主機板n之資料傳^ 式。於一實施例中，資料傳輸模式係可包含Genlx^、、 Genlx8、Genlxl6、Gen2x4、Gen2x8 及。於前述 7 201044163 -之主機板測試程序完成後，處理模組104即可得知主機板 "週邊兀件互連快速插槽介面12G之資料傳輸速度及寬度， 而可進步使資料傳輸模組106切換至對應主機板12的主 機板週邊70件互連快速插槽介面12〇之資料傳輸模式。在 確疋貝料傳輸模式後，測試系統10即可進一步藉由週邊元 件互連快速接腳介自1〇〇 &週邊元件互連快速插槽介面 102，使主機板12及待測板14間，進行待測板測試程序。 待測板測試程序包含系統管理匯流排測試、燒錄測 Ο試、匯流排寬度測試、匯流排速度測試以及待測板功能測 試。其中匯流排寬度及匯流排速度測試係用以測試出待測 板週邊元件互連快速接腳介面14G的資料傳輸寬度及速 度。系統管理匯流排測試係用以對待測板14上的其他已知 位址之模組進行測試。待測板14於一實施例中亦可包含串 歹j式電氣式可抹除唯讀記憶體（未綠示），燒錄測試即用以 對待測板Μ上的串列式電氣式可抹除唯讀記憶體進行燒 錄動作的測試。待測板之功能實質上係因應不同之待測板 〇 *有不同的功能測試4例來說，待測板i 4可為顯 音效卡或網路卡。因此，待測板功能測試可因應上述之不 ^種=進行顯示測試、音效播放測試或網路傳輸測試 !=二，用以進行待測板測試程序之測試資料則 由主機板14經由職祕1G _邊元件互連快速接 面、資料傳輸模組1〇6以及週邊元件互連快速插 =專:至祕14。而待測板測試程序產生之測‘ 果14H糸由待測板14經由週邊元件互連快速插 102、資料傳輸模組廳以及週邊元件互連快速接ς 201044163 - 104傳輸至主機板12 ° - 電源模組108用以於待測板14連接於週邊元件互連快 速插槽介面102時’供應或切斷待測板14之電源1〇1，俾 提供熱插拔作用。因此，在主機板12維持電源的情況下， 藉由電源模組108的設置’係可直接切斷待測板14的電源 而移除待測板，ϋ再更換後對下一個待測板進行測試。這 樣的設計方式’將可避免一般在主機板未切斷電源時，直 接移除待測板時造成的嚴重硬體錯誤。與以往必須關閉主 Q 機板電源才能進行其他待測板的測試流程相較，將是省時 省力的一項優勢。 第3圖係為本發明之另一實施例之週邊元件互連快速 插槽之測試方法之流程圖。請參照第3圖，週邊元件互連 快速插槽之測試方法包含下列步驟：於步驟301，提供週 邊元件互連快速插槽之測試系統，包含週邊元件互連快速 接腳介面以及週邊元件互連快速插槽介面，分別用以連接 主機板以及待測板。接著於步驟302，對主機板進行主機 ❹ 板測試程序。於步驟303，供應待測板電源。須注意的是， 步驟303並非限制於步驟3〇2後進行，而可以在待測板連 接上測試系統的週邊元件互連快速插槽後，直接開始供應 電源。接著於步驟304，根據主機板測試程序切換至對應 主機板之資料傳輸模式。根據資料傳輸模式，可進行步驟 305 ’藉由週邊元件互連快速接腳介面及週邊元件互連快速 插槽介面使主機板及待測板間進行待測板測試程序；最後 於步驟306 ’測試系統提供待測板熱插拔作用，俾於待測 板測試完畢後’於主機板不斷電時，切斷待測板之電源， 201044163 - 以直接移除待測板。 . 貞用本發明之優㈣在於藉由主機板測試程序及待測 板測試程序’可使用同一個測試系統對主機板及待測板均 進行測4 ’並提供熱插拔機制，在不須對主機板進行斷電 的情形下，直接更換待測板以進行其他待測板之測試。 雖然本發明已以實施方式揭露如上，然其並非用以限 定本發明，任何熟習此技藝者，在不脫離本發明之精神和 範圍内，當可作各種之更動與潤飾，因此本發明之保護範 0 圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 為讓本發明之上述和其他目的、特徵、優點與實施例 能更明顯易懂，所附圖式之說明如下： 第1圖係為本發明之一實施例之週邊元件互連快速插 槽之測試系統之方塊圖； Ο 、第2圖係為本發明之-實施例之，祕、主機板及 待測板接合之立體圖；以及 第3圖係為本發明之另-實施例之週邊元件互連 插槽之測試方法之流程圖。 、 100:週邊元件互連快速接腳 介面 【主要元件符號說明】 1〇 :測試系統 101 ·電源 102 :週邊元件互連快速插槽1〇4 :處理模組 介面 106 :資料傳輪模組 201044163 * 产 108:電源模組 110 :串列式電氣式可抹除唯 b 12:主機板 讀記憶體 120 :主機板週邊元件互連快121 :測試資料 速插槽介面 14:待測板 140 :待測板週邊元件互連快141 :測試結果 速接腳介面Test 'to ensure that the data transmission or the supply of power is done. In other embodiments, in order to respond to other functions, the user may also test the functions of the system, the data transmission pressure, the burning, and the remote wake-up when setting the job 1G. The program is more complete. The system management bus bar = used to test the module of other known addresses on the motherboard 12. The test pressure transmission test is used to test the quick insertion of the peripheral components of the motherboard after a continuous and large amount of data transfer. Whether the slot interface 12Q can still work normally. The test system 1G further includes a tandem electrical readable memory 11G in the embodiment, and a burn test (4) to test the burn-in operation of the tandem electrical type "selling the hidden UG. The remote wake-up test t is used to test the operation of the domain board 12 through a network packet (not shown). The data transmission module 1〇6 is used to switch to different data transmissions. According to the motherboard_program, (4) the data transmission mode of the motherboard n is provided. In an embodiment, the data transmission mode may include Genlx^, Genlx8, Genlxl6, Gen2x4, Gen2x8, and the like. After the above-mentioned 7 201044163 - the motherboard test program is completed, the processing module 104 can know the data transmission speed and width of the motherboard " peripherals interconnecting the fast slot interface 12G, and can improve the data transmission module. 106 switches to a data transmission mode of 70 pieces of interconnected fast slot interface 12 of the motherboard corresponding to the motherboard 12. After confirming the batting transmission mode, the test system 10 can further interconnect the fast slot interface 102 through the peripheral components interconnecting fast pins from the peripheral components to enable the motherboard 12 and the board to be tested 14 During the test procedure of the board to be tested. The test procedure for the test board includes the system management bus test, the burn test, the bus width test, the bus speed test, and the test function of the board to be tested. The busbar width and busbar speed test is used to test the data transmission width and speed of the component-connected quick-connect interface 14G of the peripheral component to be tested. The system management bus test is used to test modules of other known addresses on the test board 14. The device under test 14 can also include a series of electrically erasable read-only memory (not shown in green) in an embodiment, and the burn test is used for the tandem electric smeared on the test board. Except for the read-only memory for the burning test. The function of the board to be tested is basically different depending on the board to be tested. * There are 4 different functional tests. For example, the board to be tested i 4 can be a sound card or a network card. Therefore, the function test of the test board can be performed according to the above-mentioned type = display test, sound play test or network transmission test! = 2, the test data for the test procedure of the test board is carried out by the motherboard 14 1G _ side component interconnection fast junction, data transmission module 1 〇 6 and peripheral component interconnection quick insertion = special: to secret 14. The test results generated by the test board test result are 14H糸 transmitted from the board under test 14 via the peripheral components, the quick plug 102, the data transmission module hall and the peripheral components interconnected quickly. 201044163 - 104 transmitted to the motherboard 12 ° - The power module 108 is used to supply or cut off the power supply 1〇1 of the board 14 to be tested when the board to be tested 14 is connected to the peripheral component interconnecting the fast slot interface 102, and provides hot plugging. Therefore, in the case that the power supply of the motherboard 12 is maintained, the device to be tested can be directly cut off by the setting of the power module 108, and the board to be tested is removed, and then replaced with the next board to be tested. test. This design method will avoid serious hardware errors caused by the direct removal of the board to be tested when the motherboard is not powered off. It will save time and effort compared to the previous test process in which the main Q board must be powered off for other boards to be tested. Figure 3 is a flow chart showing a method of testing a peripheral component interconnect fast slot of another embodiment of the present invention. Referring to FIG. 3, the test method of the peripheral component interconnection fast slot includes the following steps: In step 301, a test system for peripheral component interconnection fast slot is provided, including a peripheral component interconnection fast pin interface and peripheral component interconnection. A quick slot interface for connecting the motherboard to the board to be tested. Next, in step 302, a host board test procedure is performed on the motherboard. In step 303, the power supply of the device to be tested is supplied. It should be noted that step 303 is not limited to after step 3〇2, and the power supply can be directly started after the peripheral components of the test system are connected to the fast slot on the board to be tested. Then in step 304, according to the motherboard test program, the data transfer mode to the corresponding motherboard is switched. According to the data transmission mode, step 305' can be performed by using a peripheral component interconnect fast pin interface and a peripheral component interconnect fast slot interface to perform a test procedure for the test board between the motherboard and the board to be tested; finally, in step 306 'test The system provides the hot plugging function of the board to be tested. After the board is tested, the power of the board to be tested is cut off when the board is powered off, 201044163 - to directly remove the board to be tested. The advantage of the present invention is that the motherboard test program and the test board test program can use the same test system to test both the motherboard and the board to be tested and provide a hot swap mechanism. In the case of powering off the motherboard, directly replace the board to be tested for other boards to be tested. Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and the present invention can be modified and modified without departing from the spirit and scope of the present invention. Fan 0 is subject to the definition of the patent application scope attached. BRIEF DESCRIPTION OF THE DRAWINGS The above and other objects, features, advantages and embodiments of the present invention will become more <RTIgt; A block diagram of a test system for interconnecting a fast slot; 第, FIG. 2 is a perspective view of the embodiment of the present invention, a combination of a secret, a motherboard, and a board to be tested; and FIG. 3 is another embodiment of the present invention - A flow chart of a test method for a peripheral component interconnect slot of an embodiment. , 100: peripheral component interconnection fast pin interface [main component symbol description] 1〇: test system 101 · power supply 102: peripheral component interconnection fast slot 1〇4: processing module interface 106: data transmission wheel module 201044163 * Product 108: Power Module 110: Tandem Electrical Erasable Only b 12: Motherboard Read Memory 120: Main Board Peripheral Component Interconnect Fast 121: Test Data Speed Slot Interface 14: Test Board 140: The peripheral components of the board to be tested are interconnected quickly. 141: Test result.
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