2〇1〇4311i 六、發明說明： 【發明所屬之技術領域】 本發明係有關一種在以半添加式電鍍法製造C〇F(Xhip 〇n Film，覆晶薄膜）薄膜載帶（carrier tape)等印刷線路 基板時使用之半添加式電鍍法用硫酸系鍍銅液、及使用該 鐘銅液之印刷線路基板之製造方法。 【先前技術】 形成有由絕緣膜、接著劑層及導電性金屬所構成之線 路圖案的三層結構之TAB(Tape Automated Bonding，捲帶 式自動接合）帶’或於絕緣膜上直接形成有由導電性金屬箱 所構成之線路圖案的兩層結構之C0F帶等印刷線路板之輸 出側外部導線及輸入側外部導線，例如是藉由各向異性導 電薄膜（ACF ’ Anisotropic Conductive Film)與液晶面板 或剛性印刷線路板之電路部進行電連接。 近年來’隨著液晶晝面之高精細化也推展驅動IC晶片 之金凸塊（bump)之細間距化，於是C0F等IC安裝用印刷線 路板中，也逐漸必須形成將内部導線間距縮小至2〇以出以 下之細線化電路，且也將達成15/zm間距。 以往，為了形成如此經細線化之印刷線路板，而考慮 必須使所使用之導電性金屬箔薄片化。當欲藉由蝕刻來: 成例如10# m以下之線寬、線路間隔在1〇//m以下之電路 牯，右做為導體之導電性金屬箔（例如，電解銅箔）之厚度 不小於線寬（例如成為5" m以下），則有無法製作成所需之 經細線化之線寬（例如線寬做成6#m以上）之問題。 4 321752 201043111 然而，若Cu等導電性金屬羯之厚度做成5 // m以下 時，則藉由異相性導電薄膜（A CF)進行連接之可靠性會顯著 ' 降低。推測其原因為，相對於如Cu箔之導電性金屬箔之厚 度或間距，異相性導電接著劑中所含之導電性粒子大小為 較大及成為黏合劑之接著劑薄片厚度為較厚而引起機械性 的限制。 然而，近年來，藉由半添加式（Semi-Additive)電鍍法 D 形成超細間距線路圖案之技術進步，因此即使Cu等導體厚 度厚達8 // m，也可藉由此技術形成20 # m間距以下之線路 圖案。 如此之半添加式電鍍法係於絕緣層上形成基底層，接 著於其上形成與線路圖案相反之阻劑圖案後，進行電鍍 銅，然後將阻劑剝離而將基底層去除，而形成線路圖案者。 在如此之以半添加式電鍍法進行電鍍之步驟中，使用 硫酸銅系電鍍液成為主流，電鍍法已知有直流電鍍法、PC 〇 (定電流）電鍍法、PPR(週期性逆電流）電鍍法等，從電鍍液 之管理容易度等之觀點來看，直流電鍍法成為主流。 如此之半添加式電鍍法係，與將銅箔圖案化之方法相 比，有線路圖案之表面之平坦性會降低之疑慮，且若精密 地觀察超細間距之線路圖案，則朝線路之寬度方向切割而 成之剖面，表面會有朝上形成突出狀之傾向。 在此，在半添加式電鑛法中’考慮到使線路圖案平坦 化之習知技術係有下述者。 例如：在專利文獻1中揭示藉由半添加式電鐘法，在 5 321752 201043111 以電嫂阻劑所構成之通孔焊墊（v i a 1 and pad)部分及/或 線路電路部分藉由酸性電鍍銅來填充銅而形成線路電路 時，進行逆電解而使線路電路表面平坦化之技術，但畢竟 也僅為關於通孔焊墊部分平坦化之技術。 此外，在專利文獻2中係揭示藉由PPR電鍍將導體圖 案形成比所需厚度更厚後，藉由研磨將表面多餘的電鍍層 切削，而得到平坦的圖案之技術。 專利文獻3係有關製造平面線圈者，其係揭示藉由PPR 電鍍來減少電鍍厚度之不均的技術。 · 如此，在習知技術中，並無可解決在藉由半添加式電 鍍法來形成超細間距之線路圖案時，線路之寬度方向之剖 面之表面形成突出狀之問題點之技術。 〔專利文獻1〕日本特開2005-146328號公報 〔專利文獻2〕日本特開2002-246744號公報 〔專利文獻3〕日本特開2006-203013號公報 【發明内容】 (發明欲解決的課題） 本發明係有鑒於上述之事實，以提供一種可以半添加 式電鍍法製造線路之半添加式電鍍法用硫酸系鍍銅液，而 該線路即使作為超細間距之線路，寬度方向的剖面（橫剖面） 表面也為平坦者；以及以提供使用該鍍銅液之印刷線路基 板之製造方法為目的。 (解決課題的手段） 本發明之第1態樣係一種半添加式電鍍法用硫酸系鍍 6 321752 201043111 銅液，係用於半添加式電鍍法之硫酸系鍍銅液，其包含選 ► 自 3-窥基-1-丙橫酸（3-mercapto-l-propanesulfonic acid)或雙（3-石黃基丙基）二硫醚（bis(3-sul fopropyl) disulfide)之中至少一種、具有環狀構造之四級銨鹽聚合 物、及氯，並且銅濃度為23至55g/L，硫酸濃度為50至 250g/L。 在如此之第1態樣中，由於具有預定之浴組成之銅電 0 鍍液，故若使用於以半添加式電鍍法進行之電鍍時，則可 形成縱剖面及橫剖面之表面為平坦的線路。 本發明之第2態樣係如第1態樣之半添加式電鍍法用 硫酸系鍍銅液，其中，前述3-巯基-1-丙磺酸及/或雙（3-磺基丙基）二硫_之濃度合計為8至12mg/L。 在如此之第2態樣中，由於添加劑在預定之濃度範圍 内，故可更確實地形成表面為平坦的線路。 本發明之第3態樣係如第1態樣或第2態樣之半添加 C)式電鍍法用硫酸系鍍銅液，其中，具有前述環狀構造之四 級铵鹽聚合物之濃度係35至85mg/L。 在如此之第3態樣中，由於在預定濃度範圍内含有添 加劑，故可更確實地形成表面為平坦的線路。 本發明之第4態樣係如第1態樣至第3態樣中任一態 樣之半添加式電鍍法用硫酸系鍍銅液，其中，具有前述環 狀構造之四級銨鹽聚合物係氯化二烯丙基二曱基銨（DDAC) 聚合物。 在如此之第4態樣中，由於含有氯化二烯丙基二曱基 7 321752 201043111 銨聚合物做為具有環狀構造之四級銨鹽聚合物，故可更確 實地形成表面為平坦的線路。 本發明之第5態樣係如第4態樣之半添加式電鍍法用 硫酸系鍍銅液，其中，前述氣化二烯丙基二曱基銨聚合物 係混合不同分子量者而成者。 在如此之第5態樣中，可更安定地形成平坦的線路。 本發明之第6態樣係如第1態樣至第5態樣中任一態 樣之半添加式電鍍法用硫酸系鍍銅液，其中，前述氯之濃 度為30至55mg/L。 在如此之第6態樣中，由於氣濃度在預定範圍内，故 可更確實地形成表面為平坦的線路。 本發明之第7態樣係一種印刷線路基板之製造方法， 係於絕緣基材之表面形成具導電性之基底層，並於該基底 層之表面形成光阻層後，於該光阻層使預定之圖案進行曝 光•顯影而進行圖案化，藉此使前述基底層形成露出之凹 部，並於此凹部之基底層上形成鍍銅層，然後，將經圖案 化之光阻層剝離，接著，藉由光阻層之剝離而除去已露出 之基底層並形成線路圖案者，其特徵為前述鍍銅層之形成 係使用第1態樣至第6態樣中任一態樣之半添加式電鍍法 用硫酸系鍍銅液，在浴溫為15至30°C、電流密度為10A /dm2以下之電鍍條件下進行。 在如此之第7態樣中，因使用具有預定之浴組成之鍍 銅液，在預定之電鍍條件下進行半添加式電鍍法之電鍍， 而可製造具有橫剖面之表面為平坦的線路之印刷線路基 8 321752 201043111 板。 本發明之第8 造方法，j：中，樣係如第7態樣之印刷線路基板之製 在如此I第塊電流密度定為5碟下。 而可更確實地樣中，因電流密度定在財範圍内， 板。 、4具有表面為平坦的線路之印刷線路基 【實施方式】 ❹ Ο 造方法了㈣本發明之—實施形態之印刷線路基板之製 製造由—實施形g之相關印刷線路基板之 — P刷線路基板之C0F薄膜載帶。 …：1圖所示之本實施形態之⑽薄膜載帶1，於由聚 醯亞胺層所構成之絕缕波i於由t 土材1 〇上，形成具有由導體#戶斤槿 成期望圖案之線路圖案20而成者，線路圖案；。，一 般#”、備有做為端子之内部導線雇、薦 20C、20D之線路。於rm? + 久外冲¥線 、C〇F溥膜載帶1之絕緣基材1〇之嘗 度方向兩側，-般形成切 於 徐了線路圖案2〇 n〇ie)2，於 之内邵導線20A、20B及外部導線2〇c、 D°、’係以被覆線路圖案20之方式設置有防銲 潜d。 在此’一面泉昭圖 路基板之製造方法Λ ’―面具體說明f 1圖之印刷線 製造^法的㈣之—料形1之_線路基板之 “ 的各步驟中之基㈣面之例子®。 321752 9 201043111 如第2圖（a)、（b)所示，在本實施形態之印刷線路基 板之製造方法中，於絕緣基材10之至少一表面形成由導電 性金屬薄層所構成之種晶層21。在此，絕緣基材10只要 為由絕緣性樹脂所構成之板、薄膜、薄片、預浸體等，一 般做為絕緣基材使用者就可以而無特別限定。惟，為了以 捲盤至捲盤（reel to reel)方式連續地製造本發明之印刷 線路基板，此絕緣基材10期望具有可撓性，此外，在製造 印刷線路基板之步驟中，因有時會與酸性溶液或是鹼性溶 液接觸，所以此絕緣基材10宜為耐藥品性優良者，並且因 有時會暴露於高溫中，所以此絕緣基材10宜為耐熱性優良 者。此外，因使用此絕緣基材10藉由電鍍步驟製造線路圖 案，所以此絕緣基材10宜為不會因與水接觸而發生改質或 變形者。從如此之觀點來看，本發明中所使用之絕緣基板 10以使用具耐熱性之合成樹脂薄膜為佳，特別是以使用聚 醯亞胺薄膜、聚醯胺醯亞胺薄膜、聚酯樹脂薄膜、氟樹脂 薄膜、液晶聚合物樹脂薄膜等，製造印刷線路基板時一般 使用之樹脂薄膜為佳，此等之中尤以耐熱性、耐藥品性、 耐水性等特性優良的聚醯亞胺薄膜為特佳。 此外，在本發明中，絕緣基材10無須是如上述之薄膜 狀，也可為例如由纖維狀物與環氧樹脂等複合體所構成之 板狀的絕緣基材。 在本發明中，在如上述之絕緣基材10中，除了齒輪孔 2以外，也可依需要而形成裝置孔、彎曲用狹缝、定位孔 等所需的貫通孔。此等貫通孔可藉由衝孔法、雷射穿孔法 10 321752 201043111 等而形成。 ; 在本實施形態中，如上述，於絕緣基材ίο之至少一面 :形成由導電性金屬薄層所構成之種晶層21。此種晶層21 係於其表面藉由電鍍來積層金屬層時做為電極之層，通常 可藉由鎳、鉻、銅、鐵、鎳-鉻合金、Ni-Zn、Ni-Cr-Zn等 金屬或含有該等金屬之合金來形成。如此之種晶層21之形 成法只要使如上述之導電性金屬於絕緣基材10之表面析 0 出之方法就可以，而無特別限制，以藉由濺鍍法形成較有 利。藉由濺鍍法形成種晶層21，藉此所濺鍍之金屬或合金 緊緊嵌入絕緣基材10之表面，而使絕緣基材10與所濺鍍 之種晶層21堅固地接合。因此，在製造本發明之印刷線路 基板時，無須於絕緣基材10與種晶層21之間設置接著劑 〇 此外，種晶層21之平均厚度通常在10至1000A之範 圍内，且以在50至30 0A之範圍内為佳。 ❹ 在本實施形態中，種晶層21係使用鎳-鉻合金而形成。 在如此形成種晶層21後，如第2圖（c)所示，以於此 種晶層21之表面形成銅薄膜層22並與種晶層21 —起做為 基底層2 3為佳。在本發明中，此銅薄膜層2 2例如以經由 進行濺鍍來形成為佳。惟，此銅薄膜層22並不限定濺鍍 法，也可以真空蒸鍍法、無電解電鍍法等各種方法形成， 當製作藉由濺鍍法所形成之銅薄膜層時，可形成接合力良 好且強度高的銅金屬電路。此銅薄膜層22係以銅做為主成 分之層，在不損害此層之特性之範圍内，也可含有銅以外 11 321752 201043111 之金屬。此銅薄膜層之平均厚度通常在〇. 01至5#m之範 圍内，且以0. 1至3# m之範圍内為佳。經由以如此之平均 厚度形成銅薄膜層22，即可提高與藉由半添加式電鍍法形 成此銅薄膜層22之表面銅層的親和性。 如上述進行而於種晶層21上形成銅薄膜層22做為基 底層23後，雖也可直接轉移至下個步驟，但由於銅薄膜層 22之表面有時形成氧化膜等，故宜在硫酸、鹽酸等強酸下 將銅薄膜層22之表面進行短時間酸洗後，再轉移至下個步 驟。 在本實施形態中，在形成銅薄膜層22後，如第2圖（d) 所示’於此銅薄膜層22之表面全面形成由感光性樹月旨所構 成之光阻層3卜形成此光阻層31之樹脂具有照光部分為 硬化而在顯影液中不會溶解之負型、與照光部分為在顯影 財溶解之正型’但在本發明中可使用任—型之感光性樹 脂。此外’不僅可使用液狀，也可將乾薄膜等薄膜狀阻劑 積層後使用。在本實施形態中係積層負型之乾薄膜阻劑做 為光阻層31。 在此，光阻層31之厚度成為與所欲形成之線路圖案 之兩度大致相_厚度為佳，例如：光阻層3ι之厚产 為5至20以m，且以7至15#m為佳。 又 接著，於光阻層31之表面，如第2圖（6)所示，配 ^成所期望之圖案之光罩32後，從光單％之上方照 =阻層31感光，接著經由顯像’將形成線路電路之部分 、感光性樹脂去除而形成阻劑圖案3弘如第2圖（〇所八刀 321752 12 201043111 上述第2圖（c)中所形成之銅薄膜層22在如此形成之阻劑 ; 圖案33之凹部33A之底部露出。 接著，在本實施形態中，於使銅薄膜層22露出之狀態 下，將此基板移至裝滿預定之半添加式電鍍法用硫酸系鍍 銅液之鍍銅浴中，以銅薄膜層22做為一電極並在與設置於 電鍍浴之另一電極之間施加電鍍電壓，在浴溫為室溫、電 流密度為ΙΟΑ/dm2以下、較佳為5A/dm2以下之條件下進 0 行電鍍，而於銅薄膜層22之表面形成鍍銅層24(第2圖 (g))。 由於如此藉由使用預定之半添加式電艘法用硫酸系鍍 銅液形成鍍銅層24，故鍍銅層24之表面為平坦，特別是 以30# m以下之間距、較佳為20# m以下之間距所形成之 線路寬度方向剖面（橫剖面）之表面不會形成突出狀而可製 作成平坦的線路。再者，半添加式電鍍法用硫酸系鍍銅液 之浴組成係如後述。 〇 如此之鍍銅層24之厚度，以做成與阻劑圖案33之厚 度相同程度，較佳為有些許薄者為佳。其原因為，可順利 地進行之後的阻劑圖案33之剝離。 在本實施形態中，如第2圖（h)所示，在形成鍍銅層 24後，將阻劑圖案33去除。此阻劑圖案33之去除可使用 鹼性洗淨液、有機溶劑等，以使用鹼性洗淨液將阻劑圖案 層33去除為佳。其原因為，鹼性洗淨液不會對構成本發明 之印刷線路基板之材料造成不良影響，且也不會產生有機 〉谷劑洛散專所造成之壞境污染。驗性洗淨液可舉例如.胺 13 321752 201043111 系之剝離液（RS-081，荏原電產公司製）。 接著，如第2圖（i)所示，將由除去阻劑圖案33而露 出之區域的銅薄膜層22及位於其下方之種晶層21所構成 之基底層23加以去除。具體而言，使用可溶解基底層23 的蝕刻液，特別是不會對所形成之線路電路造成不良影響 的軟性蝕刻液予以溶解去除。此外，種晶層21雖在本實施 形態中是由例如Ni-Cr所形成，但可經由使其與含有強酸 之水溶液接觸而去除。為了將種晶層21去除’經由組合使 用鹽酸水溶液之處理，及使用硫酸/鹽酸混合水溶液之處 理，並分別進行1至5次、較佳進行2至4次’即可幾乎 完全將在未形成線路圖案之絕緣基材10表面露出之種晶 層21去除。再者，上述之藉由酸水溶液之處理可將一次的 處理時間設定成1至30秒鐘，較佳為設定成5至30秒鐘 來進行。 再者，在如此進行去除種晶層21之處理後，雖也可將 此印刷線路基板進行水洗後直接使用，但當種晶層21係如 前述藉由濺鍍法形成時，於絕緣基材10之表面會殘留Ni 或Cr等金屬，以使如此之殘留金屬成為鈍化為佳。此鈍化 處理以使用例如調整成鹼性之含有如過錳酸鹽的氧化性物 質之水溶液為佳。經由如此進行處理，即使殘留極微量之 導電性金屬，也不會因此等殘留金屬而使印刷線路基板之 特性產生變動。 再者，在如此阻劑圖案33之去除部的基底層23之去 除步驟中，為了不會對鍍銅層24之表面造成不良影響，可 14 321752 201043111 j 在去除阻劑圖案33前，於鍍銅層24之表面設置其他金屬 * 電鍍層。如此之金屬電鑛層可舉例如：鑛金層、鍍錫層、 : 鍍鎳層、鍍銀層、鍍鈀層、鍍銲錫層及無鉛鍍銲錫層等金 屬電鍍層；或是形成此等金屬電鍍層之金屬中含有其他金 屬之金屬合金電鍍層，若考慮到在基底層23之去除步驟中 之影響、與之後之電子零件等之安裝時，以鍍金層為佳。 此外，於如此進行而已形成線路圖案20之印刷線路基 0 板之表面，可以形成上述之防銲層3而製作成C0F薄膜載 帶1。 在此，說明上述之預定之半添加式電鍍法用硫酸系鍍 銅液之組成。 如此之半添加式電鍍法用硫酸系鍍銅液係包含選自.3-巯基-1-丙磺酸（在本案中以後稱為「MPS」）或雙（3-磺基丙 基）二硫醚（在本案中以後稱為「SPS」）中至少一種、具有 環狀構造之四級銨鹽聚合物、及氯，並且銅濃度為23至 〇 55g/L，而以25至40g/L為佳，硫酸濃度為50至250g /L、較佳為80至220g/L者。經由使用如此組成之電鍍 液，即可高效率地藉由半添加式電鐘法進行線路形成，且 所形成之線路不會燒斷或形狀異常，而成為表面平坦者。 在此，銅濃度及硫酸濃度係最適於藉由半添加式電鍍 法進行電鍍者，若脫離上述之範圍，則電流效率降·低，或 是所形成之線路發生燒斷或形狀異常，或是線路之橫剖面 之表面變圓，任何一者皆為不佳。 此外，半添加式電鍍法用硫酸系鍍銅液係必須有選自 15 321752 201043111 MPS或SPS中至少一種、具有環狀構造之四級銨鹽聚合物、 及氣之3成分存在者，缺少任何一成分皆無法充分發揮上 述之效果。 本發明之半添加式電鍍法用硫酸系鍍銅液中的MPS及 /或SPS之濃度以8至12mg/L為佳。若MPS及/或SPS 之濃度小於上述之範圍時，則電流效率有降低之傾向，另 一方面，若大於上述之範圍時，則線路之橫剖面之表面有 變圓之傾向，而不佳。 再者，本發明中之MPS或SPS是指也包含各自之鹽的 意思，濃度之記載值係做為鈉鹽之3-酼基-1-丙磺酸鈉（在 本案中以後稱為「MPS-Na」）之換算值。而且，MPS係在本 發明之半添加式電鍍法用硫酸系鍍銅液中會聚合成二聚物 而形成SPS構造者。因此，MPS或SPS之濃度，係指除了 MPS單體或MPS-Na等鹽類以外，也包含添加做為SPS者及 添加於電解液中做為MPS後聚合成SPS等之改質物之濃 度。此外，前述硫酸系銅電解液中具有環狀構造之四級銨 鹽聚合物之濃度係35至85mg/L，且以40至80mg/L為 佳。 在此，具有環狀構造之四級銨鹽聚合物可使用各種化 合物，若考慮到上述之效果時，則以使用氯化二烯丙基二 曱基銨（以下稱為「DDAC」）聚合物最佳。DDAC係在形成聚 合物構造時會形成環狀構造者，環狀構造之一部分係由四 級銨之氮原子所構成。而且，在DDAC聚合物中存有前述環 狀構造為5員環或6員環者等複數形態，由於實際之聚合 16 321752 201043111 物會依據合成條件而成為此等之任何一種或是混合物，故 ‘ 在此，以此等聚合物中之形成5員環構造之化合物做為代 、表，例如’作為氣化物離子對離子，而DDAC聚合物係指 DDAC為形成二聚物以上之聚合物構造者。 在此’期望使線路之剖面的表面成為平坦者，DDAC聚 合物之聚合度宜為數目平均分子量300至10000,而以1〇〇〇 至3000為佳，更佳是1200左右。 ζ) 此外’以混合不同分子量之DDAC使用為佳。特別是， 藉由將數目平均分子量900至3000者、與5〇〇〇至9000者 混合，即可安定地進行平坦化。 再者’ DDAC聚合物之數目平均分子量係藉由下述測定 方法所得之值。換言之，使樣品溶解於溶劑中，並在下述 所示之條件下’藉由凝膠滲透層析法（GPC)進行測定。偵測 器係使用多角度雷射光散射光度計（MALS)。「第2維里係數 (virial coefficient)x濃度」之值係假設為〇m〇i/g，折 〇射率濃度變化（dn/dc)計算用之標準樣品係使用聚環氧乙 烷（SRM1924 NIST)。 〔GPC測定條件〕 管柱：TSKgel α -4000、a -2500( φ 7· 8mmx30cm)，東 曹有限公司製 溶劑：水系··曱醇=50 : 50(體1積比）…·‘2〇1〇4311i VI. Description of the Invention: [Technical Field of the Invention] The present invention relates to a carrier tape for manufacturing a C〇F (Xhip 〇n Film) film by a semi-additive plating method. A method of producing a printed wiring board using a sulfuric acid-based copper plating solution for semi-additive plating using a printed circuit board, and a printed wiring board using the same. [Prior Art] A TAB (Tape Automated Bonding) tape having a three-layer structure in which a wiring pattern composed of an insulating film, an adhesive layer, and a conductive metal is formed or directly formed on the insulating film An output side external lead wire and an input side external lead of a printed wiring board such as a COF strip having a two-layer structure composed of a conductive metal box, for example, an anisotropic conductive film (ACF 'Anisotropic Conductive Film) and a liquid crystal panel Or the circuit portion of the rigid printed wiring board is electrically connected. In recent years, with the high definition of the liquid crystal surface, the fine pitch of the gold bumps that drive the IC chips has been promoted. Therefore, in the printed wiring boards for IC mounting such as C0F, it is necessary to gradually reduce the internal conductor pitch to The following thin line circuit is used, and a 15/zm pitch will also be achieved. Conventionally, in order to form such a thinned printed wiring board, it is considered that the conductive metal foil to be used must be thinned. When it is desired to etch into: for example, a line width of 10# m or less and a circuit spacing of 1 〇//m or less, the thickness of the conductive metal foil (for example, electrolytic copper foil) which is a conductor as a conductor is not less than When the line width (for example, 5 or less) is used, there is a problem that the required thinned line width (for example, the line width is 6 #m or more) cannot be produced. 4 321752 201043111 However, when the thickness of the conductive metal such as Cu is 5 // m or less, the reliability of connection by the heterogeneous conductive film (A CF) is remarkably lowered. It is presumed that the reason is that the thickness of the conductive particles contained in the heterogeneous conductive adhesive is large relative to the thickness or the pitch of the conductive metal foil such as the Cu foil, and the thickness of the adhesive sheet which becomes the adhesive is thick. Mechanical limitations. However, in recent years, technological progress has been made to form an ultra-fine pitch wiring pattern by a semi-additive plating method D, so that even if the thickness of a conductor such as Cu is as thick as 8 // m, 20 # can be formed by this technique. Line pattern below the m pitch. Such a semi-additive plating method forms a base layer on the insulating layer, and then forms a resist pattern opposite thereto on the insulating layer, performs copper plating, and then peels off the resist to remove the underlying layer to form a wiring pattern. By. In the step of electroplating by the semi-additive plating method, a copper sulfate-based plating solution is used as a mainstream, and a plating method, a PC 〇 (constant current) plating method, and a PPR (periodic reverse current) plating are known. The DC plating method has become the mainstream from the viewpoint of ease of management of the plating solution, and the like. Such a semi-additive plating method has a problem that the flatness of the surface of the line pattern is lowered as compared with the method of patterning the copper foil, and if the line pattern of the ultrafine pitch is closely observed, the width of the line is made. The cross section of the direction is cut, and the surface tends to protrude upward. Here, the conventional technique for flattening the line pattern in the semi-additive type ore method is as follows. For example, Patent Document 1 discloses that a via 1 and pad portion and/or a line circuit portion which are formed of an electric damper at 5 321 752 201043111 by a semi-added electric clock method are subjected to acid plating. When copper is used to fill copper to form a line circuit, reverse electrolysis is performed to flatten the surface of the line circuit, but it is only a technique for flattening the portion of the via pad. Further, Patent Document 2 discloses a technique in which a conductor pattern is formed thicker than a desired thickness by PPR plating, and a plating layer which is excessive in surface is cut by grinding to obtain a flat pattern. Patent Document 3 relates to a method of manufacturing a planar coil, which discloses a technique for reducing the unevenness of plating thickness by PPR plating. As described above, in the prior art, there is no problem in solving the problem that the surface of the cross section of the line in the width direction forms a protruding shape when the ultra-fine pitch wiring pattern is formed by the semi-additive plating method. [Patent Document 1] JP-A-2005-146328 (Patent Document 2) JP-A-2002-246744 (Patent Document 3) JP-A-2006-203013 SUMMARY OF INVENTION [Problems to be Solved by the Invention] The present invention has been made in view of the above-mentioned facts, and provides a sulfuric acid-based copper plating solution for a semi-additive plating method capable of manufacturing a line by a semi-additive plating method, and the line is a cross section in the width direction even as an ultrafine pitch line. The surface of the cross-section is also flat; and the manufacturing method of the printed wiring board using the copper plating liquid is provided. (Means for Solving the Problem) The first aspect of the present invention is a semi-additive plating method using sulfuric acid-based plating 6 321752 201043111 copper liquid, which is a sulfuric acid-based copper plating solution for semi-additive plating, which includes selection At least one of 3-mercapto-l-propanesulfonic acid or bis(3-sul fopropyl) disulfide A quaternary ammonium salt polymer having a cyclic structure, and chlorine, and having a copper concentration of 23 to 55 g/L and a sulfuric acid concentration of 50 to 250 g/L. In such a first aspect, since the copper electroplating solution having a predetermined bath composition is used, if it is used for electroplating by a semi-additive plating method, the surface of the longitudinal section and the cross section can be formed to be flat. line. The second aspect of the present invention is a sulfuric acid-based copper plating solution for a semi-additive plating method according to the first aspect, wherein the 3-mercapto-1-propanesulfonic acid and/or bis(3-sulfopropyl) The concentration of disulfide is 8 to 12 mg/L in total. In such a second aspect, since the additive is within a predetermined concentration range, a line having a flat surface can be formed more surely. The third aspect of the present invention is a sulfuric acid-based copper plating solution for a plating method according to the first aspect or the second aspect, wherein the concentration of the quaternary ammonium salt polymer having the cyclic structure is 35 to 85 mg/L. In the third aspect as described above, since the additive is contained in the predetermined concentration range, the wiring having a flat surface can be formed more surely. The fourth aspect of the present invention is a sulfuric acid-based copper plating solution for a semi-additive plating method according to any one of the first aspect to the third aspect, wherein the quaternary ammonium salt polymer having the above-mentioned cyclic structure A polymer of diallyldimethylammonium chloride (DDAC). In such a fourth aspect, since the ammonium diallyl chloride 7 321752 201043111 ammonium polymer is used as the quaternary ammonium salt polymer having a cyclic structure, the surface can be more surely formed to be flat. line. According to a fifth aspect of the present invention, there is provided a sulfuric acid-based copper plating solution for a semi-additive plating method according to the fourth aspect, wherein the vaporized diallyldimethylammonium halide polymer is a mixture of different molecular weights. In such a fifth aspect, a flat line can be formed more stably. The sixth aspect of the present invention is a sulfuric acid-based copper plating solution for a semi-additive plating method according to any one of the first aspect to the fifth aspect, wherein the chlorine concentration is 30 to 55 mg/L. In such a sixth aspect, since the gas concentration is within a predetermined range, a line having a flat surface can be formed more surely. According to a seventh aspect of the present invention, in a method of manufacturing a printed circuit board, a conductive base layer is formed on a surface of an insulating substrate, and a photoresist layer is formed on a surface of the base layer, and then the photoresist layer is formed on the surface of the base layer. The predetermined pattern is subjected to exposure and development for patterning, whereby the underlying layer is formed into an exposed concave portion, and a copper plating layer is formed on the underlying layer of the concave portion, and then the patterned photoresist layer is peeled off, and then, The exposed underlying layer is removed by stripping of the photoresist layer to form a wiring pattern, and the copper plating layer is formed by using a semi-additive plating method in any one of the first aspect to the sixth aspect. The method uses a sulfuric acid-based copper plating solution under the plating conditions of a bath temperature of 15 to 30 ° C and a current density of 10 A /dm 2 or less. In such a seventh aspect, by using a copper plating liquid having a predetermined bath composition, electroplating by semi-additive plating is performed under predetermined plating conditions, and printing of a line having a flat cross section can be manufactured. Line base 8 321752 201043111 board. According to the eighth method of the present invention, in the j:, the printed circuit board of the seventh aspect is manufactured such that the current density of the first block is set to 5 discs. But in a more realistic way, because the current density is set within the financial range, the board. (4) A printed circuit board having a surface having a flat surface. [Embodiment] The method for manufacturing a printed circuit board according to the present invention is the manufacture of a printed circuit board of the type - P brush line The C0F film carrier of the substrate. The film carrier 1 of the (10) embodiment of the present invention shown in Fig. 1 is formed on the surface of the earth material 1 by the layer of the polyimide layer, and is formed by the conductor # The pattern of the pattern of the pattern 20 is formed by a line pattern; , General #", equipped with internal wiring for the terminal, recommended 20C, 20D line. In rm? + long-term rushing ¥ line, C〇F 溥 film carrier tape 1 insulation substrate 1 〇 taste direction On both sides, the formation of the line pattern 2〇n〇ie2 is generally formed, and the inner wires 20A, 20B and the outer wires 2〇c, D°, 'are disposed in the manner of covering the line pattern 20 Soldering potential d. Here, the manufacturing method of the 'one side spring Zhaotu road substrate' is described in detail in the steps of the "printing line manufacturing method of the f1 drawing" (d) Example of the face®. 321752 9 201043111 As shown in Fig. 2 (a) and (b), in the method of manufacturing a printed wiring board of the present embodiment, at least one surface of the insulating base material 10 is formed of a thin layer of a conductive metal. Crystal layer 21. Here, the insulating base material 10 is not particularly limited as long as it is a plate, a film, a sheet, a prepreg or the like made of an insulating resin, and is generally used as an insulating substrate. However, in order to continuously manufacture the printed wiring board of the present invention in a reel to reel manner, the insulating base material 10 is desirably flexible, and in the step of manufacturing a printed wiring board, sometimes Since it is in contact with an acidic solution or an alkaline solution, the insulating base material 10 is preferably excellent in chemical resistance, and since it is sometimes exposed to a high temperature, the insulating base material 10 is preferably excellent in heat resistance. Further, since the wiring pattern is manufactured by the plating step using the insulating substrate 10, the insulating substrate 10 is preferably not modified or deformed by contact with water. From such a viewpoint, the insulating substrate 10 used in the present invention is preferably a heat-resistant synthetic resin film, particularly a polyimide film, a polyimide film, or a polyester resin film. A fluororesin film, a liquid crystal polymer resin film, or the like is preferably a resin film generally used for producing a printed wiring board. Among these, a polyimide film having excellent properties such as heat resistance, chemical resistance, and water resistance is preferable. Very good. Further, in the present invention, the insulating base material 10 does not need to be in the form of a film as described above, and may be a plate-shaped insulating base material composed of, for example, a composite of a fibrous material and an epoxy resin. In the present invention, in the insulating base material 10 as described above, in addition to the gear hole 2, a through hole required for the device hole, the slit for bending, the positioning hole, and the like may be formed as needed. These through holes can be formed by punching, laser perforation 10 321752 201043111, and the like. In the present embodiment, as described above, the seed layer 21 composed of the conductive metal thin layer is formed on at least one side of the insulating substrate ίο. The crystal layer 21 is used as a layer of electrodes when the surface thereof is laminated by electroplating, and is usually made of nickel, chromium, copper, iron, nickel-chromium alloy, Ni-Zn, Ni-Cr-Zn, etc. A metal or an alloy containing the metals is formed. The seed layer 21 is formed by a method in which the conductive metal as described above is deposited on the surface of the insulating substrate 10, and is not particularly limited, and is preferably formed by sputtering. The seed layer 21 is formed by sputtering, whereby the sputtered metal or alloy is tightly embedded on the surface of the insulating substrate 10, and the insulating substrate 10 is firmly bonded to the sputtered seed layer 21. Therefore, in the manufacture of the printed wiring substrate of the present invention, it is not necessary to provide an adhesive between the insulating substrate 10 and the seed layer 21. Further, the average thickness of the seed layer 21 is usually in the range of 10 to 1000 A, and It is preferably in the range of 50 to 30 0A. In the present embodiment, the seed layer 21 is formed using a nickel-chromium alloy. After the seed layer 21 is formed as described above, as shown in Fig. 2(c), it is preferable to form the copper thin film layer 22 on the surface of the seed layer 21 and to form the base layer 23 together with the seed layer 21. In the present invention, the copper thin film layer 2 2 is preferably formed, for example, by sputtering. However, the copper thin film layer 22 is not limited to a sputtering method, and may be formed by various methods such as a vacuum deposition method or an electroless plating method. When a copper thin film layer formed by a sputtering method is formed, a bonding strength can be formed. And high strength copper metal circuit. The copper thin film layer 22 is made of copper as a main component, and may contain a metal other than copper 11 321752 201043111 without impairing the characteristics of the layer. The average thickness of the copper film layer is usually in the range of 0.1 to 5 #m, and preferably in the range of 0.1 to 3 #m. By forming the copper thin film layer 22 in such an average thickness, the affinity with the surface copper layer of the copper thin film layer 22 formed by the semi-additive plating method can be improved. After the copper thin film layer 22 is formed on the seed layer 21 as the underlayer 23 as described above, it may be directly transferred to the next step. However, since an oxide film or the like is sometimes formed on the surface of the copper thin film layer 22, it is preferable to The surface of the copper thin film layer 22 is pickled for a short time under a strong acid such as sulfuric acid or hydrochloric acid, and then transferred to the next step. In the present embodiment, after the copper thin film layer 22 is formed, as shown in FIG. 2(d), a photoresist layer 3 composed of a photosensitive tree layer is formed on the surface of the copper thin film layer 22. The resin of the photoresist layer 31 has a negative type in which the illuminating portion is hardened and does not dissolve in the developing solution, and the illuminating portion is a positive type which dissolves in the developing material. However, any type of photosensitive resin can be used in the present invention. Further, it is possible to use not only a liquid but also a film-like resist such as a dry film. In the present embodiment, a dry film resist of a negative type is laminated as the photoresist layer 31. Here, the thickness of the photoresist layer 31 is preferably substantially the same as the thickness of the line pattern to be formed. For example, the thickness of the photoresist layer 3 is 5 to 20 m, and 7 to 15 #m. It is better. Further, on the surface of the photoresist layer 31, as shown in Fig. 2 (6), after the photomask 32 having the desired pattern is placed, the resist layer 31 is illuminated from above the light sheet, and then the light is resisted. The copper thin film layer 22 formed in the above-mentioned second figure (c) is formed in such a manner as to form a resist pattern by removing a portion of the line circuit and removing the photosensitive resin. The resist is exposed; the bottom of the recess 33A of the pattern 33 is exposed. Next, in the present embodiment, the substrate is moved to a state where the copper thin film layer 22 is exposed, and the substrate is transferred to a predetermined semi-additive plating method using sulfuric acid plating. In the copper plating bath of the copper liquid, the copper film layer 22 is used as an electrode and a plating voltage is applied between the electrode and the other electrode provided in the plating bath, and the bath temperature is room temperature, and the current density is ΙΟΑ/dm2 or less. Preferably, the plating is performed in a row of 5 A/dm 2 or less, and a copper plating layer 24 is formed on the surface of the copper thin film layer 22 (Fig. 2 (g)). Thus, by using the predetermined semi-added electric boat method The sulfuric acid-based copper plating solution forms the copper plating layer 24, so the surface of the copper plating layer 24 is flat, especially 30# m The surface of the line width direction (cross section) formed by the lower distance, preferably 20# m or less, is not formed into a protruding shape, and can be formed into a flat line. Further, the semi-additive plating method uses a sulfuric acid system. The composition of the bath of the copper plating solution is as follows. The thickness of the copper plating layer 24 is preferably the same as the thickness of the resist pattern 33, preferably a somewhat thinner one. The reason is that the copper plating layer can be smoothly formed. In the present embodiment, as shown in Fig. 2(h), after the copper plating layer 24 is formed, the resist pattern 33 is removed. The removal of the resist pattern 33 can be used. It is preferable to remove the resist pattern layer 33 using an alkaline cleaning solution, such as an alkaline cleaning solution, an organic solvent, etc., because the alkaline cleaning liquid does not cause defects to the material constituting the printed wiring board of the present invention. The effect is not caused by the environmental pollution caused by the organic granules. The accommodating cleaning liquid can be, for example, a stripping solution of amine 13 321752 201043111 (RS-081, manufactured by Ebara Electric Co., Ltd.). Next, as shown in Fig. 2(i), the resist will be removed. The copper thin film layer 22 in the exposed region of the case 33 and the underlying layer 23 composed of the seed layer 21 located thereunder are removed. Specifically, an etchant which dissolves the underlying layer 23 is used, in particular, it is not formed. The soft etching liquid which is adversely affected by the line circuit is dissolved and removed. Further, although the seed layer 21 is formed of, for example, Ni-Cr in the present embodiment, it can be removed by contact with an aqueous solution containing a strong acid. The seed layer 21 is removed by a treatment using a combined aqueous hydrochloric acid solution and a treatment using a mixed aqueous solution of sulfuric acid/hydrochloric acid, and is carried out 1 to 5 times, preferably 2 to 4 times, respectively, so that the line is almost completely formed. The seed layer 21 exposed on the surface of the insulating substrate 10 of the pattern is removed. Further, the treatment by the aqueous acid solution described above can be carried out by setting the treatment time of one time to 1 to 30 seconds, preferably 5 to 30 seconds. Furthermore, after the process of removing the seed layer 21 is performed as described above, the printed circuit board may be directly washed after being washed with water, but when the seed layer 21 is formed by sputtering as described above, the insulating substrate is used. A metal such as Ni or Cr may remain on the surface of 10 to make such residual metal passivation. This passivation treatment is preferably carried out using, for example, an aqueous solution containing an oxidizing substance such as permanganate adjusted to be alkaline. By performing the treatment as described above, even if a very small amount of the conductive metal remains, the characteristics of the printed wiring board are not changed by the residual metal. Furthermore, in the removal step of the base layer 23 of the removal portion of the resist pattern 33, in order not to adversely affect the surface of the copper plating layer 24, it may be 14 321752 201043111 j before the resist pattern 33 is removed. The surface of the copper layer 24 is provided with other metal* plating layers. Such a metal electric ore layer may, for example, be a gold plating layer, a tin plating layer, a nickel plating layer, a silver plating layer, a palladium plating layer, a solder plating layer, and a lead-free solder plating layer; or forming such a metal; The metal of the electroplated layer contains a metal alloy plating layer of another metal, and in consideration of the influence in the removal step of the underlayer 23 and the subsequent mounting of electronic parts and the like, a gold plating layer is preferred. Further, on the surface of the printed wiring substrate 0 on which the wiring pattern 20 is formed in this manner, the above-described solder resist layer 3 can be formed to form the COF film carrier tape 1. Here, the composition of the sulfuric acid-based copper plating solution for the predetermined semi-additive plating method described above will be described. The sulfuric acid-based copper plating solution for such a semi-additive plating method comprises a compound selected from the group consisting of .3-mercapto-1-propanesulfonic acid (hereinafter referred to as "MPS" in the present case) or bis(3-sulfopropyl)disulfide. At least one of an ether (hereinafter referred to as "SPS" in the present case), a quaternary ammonium salt polymer having a cyclic structure, and chlorine, and having a copper concentration of 23 to 55 g/L, and 25 to 40 g/L. Preferably, the concentration of sulfuric acid is from 50 to 250 g / L, preferably from 80 to 220 g / L. By using the plating solution thus composed, the line formation can be efficiently performed by the semi-added electric clock method, and the formed line is not blown or abnormal in shape, and becomes a flat surface. Here, the copper concentration and the sulfuric acid concentration are most suitable for electroplating by a semi-additive plating method. If the range is out of the above range, the current efficiency is lowered or lowered, or the formed line is blown or abnormally shaped, or The surface of the cross section of the line is rounded, and either one is not good. In addition, the sulfuric acid-based copper plating solution for the semi-additive plating method must have at least one selected from the group consisting of 15 321752 201043111 MPS or SPS, a quaternary ammonium salt polymer having a cyclic structure, and a gas-containing 3 component. None of the ingredients can fully exert the above effects. The concentration of MPS and/or SPS in the sulfuric acid-based copper plating solution for the semi-additive plating method of the present invention is preferably 8 to 12 mg/L. If the concentration of MPS and/or SPS is less than the above range, the current efficiency tends to decrease. On the other hand, if it is larger than the above range, the surface of the cross section of the line tends to become rounded, which is not preferable. Further, in the present invention, MPS or SPS means that each salt is also contained, and the stated value of the concentration is sodium 3-mercapto-1-propanesulfonate as a sodium salt (hereinafter referred to as "MPS" in the present case. Conversion value of -Na"). Further, MPS is polymerized into a dimer in a sulfuric acid-based copper plating solution for a semi-additive plating method of the present invention to form an SPS structure. Therefore, the concentration of MPS or SPS refers to a concentration of a modified substance such as an MPS monomer or an MPS-Na, which is added as an SPS and added to an electrolyte as an MPS and then polymerized into SPS. Further, the concentration of the quaternary ammonium salt polymer having a cyclic structure in the sulfuric acid-based copper electrolytic solution is 35 to 85 mg/L, and preferably 40 to 80 mg/L. Here, various compounds can be used for the quaternary ammonium salt polymer having a cyclic structure, and in consideration of the above effects, a polymer of diallyldimethylammonium chloride (hereinafter referred to as "DDAC") is used. optimal. The DDAC system forms a ring structure when forming a polymer structure, and a part of the ring structure is composed of a quaternary ammonium nitrogen atom. Further, in the DDAC polymer, a plurality of forms such as a 5-membered ring or a 6-membered ring are present, and since the actual polymerization 16 321752 201043111 is formed into any one or a mixture according to the synthesis conditions, Here, a compound having a 5-membered ring structure in such a polymer is used as a substitute, for example, 'as a vapor ion ion pair ion, and a DDAC polymer means a DDAC is a polymer structure forming a dimer or more. By. Here, the surface of the cross section of the line is desirably flat, and the degree of polymerization of the DDAC polymer is preferably a number average molecular weight of 300 to 10,000, more preferably 1 Torr to 3,000, still more preferably 1200 or so. ζ) In addition, it is better to use DDACs with different molecular weights. In particular, by mixing a number average molecular weight of 900 to 3,000 with 5 Å to 9000, the planarization can be stably performed. Further, the number average molecular weight of the 'DDAC polymer is a value obtained by the following measurement method. In other words, the sample was dissolved in a solvent and measured by gel permeation chromatography (GPC) under the conditions shown below. The detector uses a multi-angle laser light scattering photometer (MALS). The value of the "2nd virial coefficient x concentration" is assumed to be 〇m〇i/g, and the standard sample used for the calculation of the 〇/ 〇 浓度 浓度 density (dn/dc) is polyethylene oxide (SRM1924). NIST). [GPC measurement conditions] Column: TSKgel α -4000, a -2500 (φ 7· 8 mm x 30 cm), manufactured by Tosoh Co., Ltd. Solvent: water system · sterol = 50: 50 (body 1 product ratio)...·
流速：0. 504mL/min 溫度：23°C±2°C 偵測器：MALS(DAWN-EOS 型），Wyatt Technology 17 321752 201043111 波長：690nm 而且，此DDAC聚合物之濃度係35至85mg/L，且以 40至80mg/L為佳。DDAC聚合物之在硫酸系銅電解液中之 濃度小於上述範圍時，則電流密度有降低之傾向，另一方 面，若大於上述範圍時，則有難以得到表面為平坦的線路 之傾向，而不佳。 此外，半添加式電鍍法用硫酸系鍍銅液中之氣濃度係 30至55mg/L，且以35至50mg/L為佳。若此氣濃度脫離 上述範圍時，則過大或過小皆有電流密度會降低之傾向， 而不佳。再者，在此，氣濃度係也包含源自DDAC之氯者。 如上述，最重要的是半添加式電鍍法用硫酸系鍍銅液 中之MPS或SPS、DDAC聚合物與氯之成分平衡，若此等量 上之平衡脫離上述範圍時，則結果為無法有效率地製造表 面平坦的線路。 於是，使用此半添加式電鍍法用硫酸系鍍銅液以半添 加式電鑛法形成線路時，以在液溫為室溫，例如15至3 0 °C、較佳為15至25°C，電流密度為ΙΟΑ/dm2以下，較佳 為5A/dm2以下，進行電解而形成線路為佳。再者，當然可 依需要而使電解步驟成為複數階段、或是亦可以採用脈衝 電解或PR電解。 當如此使用本發明之半添加式電鍍法用硫酸系鍍銅液 形成線路時，可高效率地形成線路，且不會發生線路之燒 斷或形狀異常，而可發揮線路之橫剖面之表面為平坦之效 果。此外，特別是，當使用預定組成之半添加式電鍍法用 18 321752 201043111 硫酸系鍍銅液時，可發揮可得到耐折斷性優良的線路之效 果0 (實施例） 其次’列舉本發明之貫施例更詳細地說明本發明，但 本發明並不受此等所限定。 (測試例A) 使用SPS濃度定為l〇mg/L、DDAC濃度為40mg/L且Flow rate: 0. 504 mL/min Temperature: 23 ° C ± 2 ° C Detector: MALS (DAWN-EOS type), Wyatt Technology 17 321752 201043111 Wavelength: 690 nm Moreover, the concentration of this DDAC polymer is 35 to 85 mg / L It is preferably 40 to 80 mg/L. When the concentration of the DDAC polymer in the sulfuric acid-based copper electrolytic solution is less than the above range, the current density tends to decrease. On the other hand, when the concentration is larger than the above range, it is difficult to obtain a line having a flat surface, and good. Further, the gas concentration in the sulfuric acid-based copper plating solution for the semi-additive plating method is 30 to 55 mg/L, and preferably 35 to 50 mg/L. If the gas concentration is out of the above range, the current density tends to decrease if it is too large or too small, which is not preferable. Furthermore, here, the gas concentration system also includes chlorine derived from DDAC. As described above, the most important thing is that the semi-additive plating method balances the components of MPS, SPS, and DDAC in the sulfuric acid-based copper plating solution with chlorine. If the balance of these amounts deviates from the above range, the result is impossible. Efficiently manufacture a flat surface. Then, when the route is formed by the semi-additive electrowinning method using the semi-additive plating method, the liquid temperature is room temperature, for example, 15 to 30 ° C, preferably 15 to 25 ° C. The current density is ΙΟΑ/dm 2 or less, preferably 5 A/dm 2 or less, and electrolysis is performed to form a wiring. Further, it is of course possible to make the electrolysis step into a plurality of stages as needed, or it is also possible to employ pulse electrolysis or PR electrolysis. When the wiring is formed by the sulfuric acid-based copper plating solution using the semi-additive plating method of the present invention, the wiring can be formed efficiently, and the circuit can be prevented from being blown or abnormally shaped, and the surface of the cross section of the line can be utilized. Flat effect. Further, in particular, when a copper plating solution of 18321752 201043111 sulfuric acid type is used for the semi-additive plating method having a predetermined composition, the effect of obtaining a circuit excellent in fracture resistance can be exhibited. (Examples) Next, the present invention will be described. The present invention is described in more detail by way of examples, but the invention is not limited thereto. (Test Example A) The SPS concentration was set to 10 mg/L, and the DDAC concentration was 40 mg/L.
❹ 使硫酸濃度與銅濃度如下述表1所示變化之組成的半添加半 Add half of the composition of the sulfuric acid concentration and copper concentration as shown in Table 1 below.
式電鍍法用硫酸系鑛銅液’在液溫為2CTC、電流密度為5A /dm2進行電鍍7. 7分鐘，而形成8“ m厚之鍍銅層。在此， 氯濃度為38mg/L。此外，在陽極係使用於Ti材被覆氧化 姻而成之不溶性陽極’為了防止添加劑被產生之氧氣分解 而使用陽離子交換膜。再者’ SPS係使用雙（3__項基丙基） 二硫醚（旭化學工業（股）製）’ DDAC係使用數目平均分子量 1220之DDAC聚合物。 %鍍對象係在糟由濺鍍法於聚醯亞胺薄膜（Kapt 卵-C，DU P0NT_T0RAY公司製）形成25〇A厚之膜 =3㈣厚之Cu膜後’於厚度一之阻劑膜形成心 切、線路寬度15/zm之線路_者，結果，藉由半添 式電鍍法製造具有30#m間距、線 ' 圖案之測試_線路基板。—^之線: 果如=各測試Tfr電流效率並且觀察剖面形狀，’ 所示。③㈣藉由（實_厚/理論膜厚 _)計算，如表1之—此外，剖面形^ 321752 19 201043111 面中央部之高度與端部之高度之差值求出在觀察剖面時呈 現圓形部分之厚度（高度），結果如表1之下段所示。再者， 當剖面凸部為0//m時，係指表面為平坦而無法觀察到圓形 之意。此外，溶解不良而不適於做為電鍍液者係無法進行 電鍍，且發生燒斷者進行電鍍之結果不良，不進行之後的 測定。 由表1之結果得知，測試例A3、A4及A8之組成係銅 完全不溶解，而不適合做為電鍍液。此外，得知測試例A1、 A5、A9及A13係鍍銅表面顯著地發生燒斷和形狀異常，而 無法形成良好的鐘銅。此外，得知測試例A12及A2、A6係 線路之剖面表面變圓，而做為線路為不佳。另一方面，得 知測試例A16、A17、A18、A19及A20雖線路之剖面形狀良 好，但電流效率降低，而無法有效率地進行電鍍。 結果，電流效率為90%以上而良好、呈現圓形之部分 之厚度小至1 /zm以下者，係測試例A7、A10、All、A14、 A15,且銅濃度為25至40g/L，硫酸濃度為80至220g/L， 可知為佳者。 20 321752 201043111 [表1] 硫酸》辰度 硫酸銅濃度 75g/L (Cu ： 19.Ig/L) 100g/L (Cu ： 25.5g/L) 150g/L (Cu ： 38. 2g/L) 200g/L (Cu : 51.Og/L) 250g/L 測試例A1 燒灼 (異常析出） 測試例A2 101% 1. 4 /z m 測試例A3 無法溶解 測試例A4 無法溶解 200g/L 測試例A5 燒灼 (異常析出） 測試例A6 101% 1. 1 // m 測試例A7 98% 0. 5 /z m 測試例A8 無法溶解 150g/L 測試例A9 燒灼感 測試例A10 100% 0. 6 // m 測試例All 98% 0. 5 β m 測試例A12 98% 1. 1 β m 100g/L 測試例A13 燒灼感 測試例A14 96% 0. 5 " m 測試例A15 96% 0. 5 // m 測試例A16 78% 0. 6 /1 Jn 50g/L 測試例A17 71% 0 ^ m 測試例A18 65% 0 Αί ni 測試例A19 71% 0仁m 測試例A20 69% 0 μ mIn the electroplating method, a sulfuric acid-based ore-bearing copper liquid was electroplated at a liquid temperature of 2 CTC and a current density of 5 A/dm 2 for 7. 7 minutes to form a copper plating layer of 8 μm thick. Here, the chlorine concentration was 38 mg/L. In addition, the anode is used in an insoluble anode made of a Ti-coated oxidized oxidized anode. In order to prevent the decomposition of oxygen generated by the additive, a cation exchange membrane is used. Furthermore, the SPS system uses bis(3__ylpropyl)disulfide. (Asa Chemical Industry Co., Ltd.) 'DDAC is a DDAC polymer with a number average molecular weight of 1220. The % plating target is formed by sputtering on a polyimide film (Kapt egg-C, manufactured by DU P0NT_T0RAY). 25 〇 A thick film = 3 (four) thick Cu film 'after the thickness of the resist film to form a heart-cut, line width 15 / zm line _, the result, by the semi-additive plating method with 30#m spacing, Line 'pattern test _ circuit substrate. - ^ line: If = test Tfr current efficiency and observe the cross-sectional shape, 'shown. 3 (four) by (real_thickness / theoretical film thickness _) calculated, as shown in Table 1 - In addition, the profile height ^ 321752 19 201043111 the height of the center of the face and the height of the end The difference is obtained as the thickness (height) of the circular portion when the section is observed. The results are shown in the lower part of Table 1. Furthermore, when the section convex portion is 0/m, the surface of the finger is flat and cannot be observed. In addition, it is not suitable for electroplating, and it is not suitable for electroplating, and the result of electroplating is poor, and the subsequent measurement is not performed. The results of Table 1 show that the test example The composition of A3, A4 and A8 is completely insoluble and is not suitable as a plating solution. In addition, it is known that the copper plating surfaces of test cases A1, A5, A9 and A13 are significantly blown and abnormal in shape, and cannot be formed well. In addition, it is known that the cross-sectional surface of the test examples A12 and A2, A6 lines is rounded, and the circuit is not good. On the other hand, the test cases A16, A17, A18, A19 and A20 are known. The cross-sectional shape is good, but the current efficiency is lowered, and the plating cannot be performed efficiently. As a result, the current efficiency is 90% or more, and the thickness of the portion exhibiting a circular shape is as small as 1 /zm or less, and the test examples are A7 and A10. , All, A14, A15, and copper concentration is 2 5 to 40 g / L, sulfuric acid concentration of 80 to 220 g / L, is known as good. 20 321752 201043111 [Table 1] sulfuric acid "Certain copper sulfate concentration of 75g / L (Cu: 19.Ig / L) 100g / L ( Cu: 25.5 g/L) 150 g/L (Cu: 38. 2 g/L) 200 g/L (Cu: 51.Og/L) 250 g/L Test Example A1 Cauterization (abnormal precipitation) Test Example A2 101% 1. 4 /zm Test Example A3 Insoluble test Example A4 Insoluble 200g/L Test case A5 Burning (abnormal precipitation) Test case A6 101% 1. 1 // m Test case A7 98% 0. 5 /zm Test case A8 Insoluble 150g /L Test Example A9 Burning sensation test example A10 100% 0. 6 // m Test example All 98% 0. 5 β m Test example A12 98% 1. 1 β m 100g/L Test example A13 Burning sensation test example A14 96 % 0. 5 " m Test example A15 96% 0. 5 // m Test case A16 78% 0. 6 /1 Jn 50g/L Test case A17 71% 0 ^ m Test case A18 65% 0 Αί ni Test case A19 71% 0 kernel m test case A20 69% 0 μ m
(測試例B) 除了使用硫酸濃度定為100g/L、銅濃度以硫酸銅濃 度定為150g/L(Cu : 38. 2g/L)，使SPS濃度及DDAC濃度 如下述表2所示變化之組成半添加式電鍍法用硫酸系鍍銅 液以外，其餘與測試例A同樣實施。 由表2之結果得知，SPS濃度為20mg/L之測試例B3、 B6、B9、B12及B15之組成，任一者皆線路剖面之表面形 狀變圓形，而無法形成表面為平坦的線路，此外，SPS濃 度為5mg/L之測試例Bl、B4、B7、B10及B13雖線路形狀 21 321752 201043111 比較良好，但電流效率降低，而無法有效率地進行鍍銅， SPS濃度為10mg/L之測試例B8及B11係電流效率未降 低，已知可形成表面為平坦的線路。由此得知，SPS濃度 以8至12mg/L之範圍為佳。 此外，得知DDAC濃度為10mg/L之測試例B5雖線路 形狀比較良好，但電流效率降低，而無法有效率地進行鍍 銅，DDAC之濃度為40mg/L、80mg/L之測試例B8、B11 係電流效率未降低，已知可形成表面為平坦的線路。再者， 若DDAC濃度增加至超過80mg/L時，則電流效率有降低之 傾向。 並且，得知氣漢度為18mg/ L之測試例B1、B2、及氯 濃度為58mg/L之測試例B13、B14雖線路形狀比較良好， 但電流效率降低，而無法有效率地進行鍍銅，氯濃度為38mg /L之測試例B8及氯濃度為46mg/L之測試例B11係電流 效率未降低，已知可形成表面為平坦的線路。由此得知， 氣濃度以在35至5Omg/L之範圍為佳。 22 321752 201043111 [表2] 氯濃度 DDAC濃度 SPS濃度 5mg/L 1Omg/L 20rag/L 18mg/L 40mg/L 測試例B1 64% 0. 8 仁 m 測試例B2 79% 1 . 1 /2 m 測試例B3 98% 1. 4// m 32rag/L lOmg/L 測試例B4 83% 0· 6 /z m 測試例B5 86% 0. 5 ^ m 測試例B6 98% 1. 1 # m 38mg/L 40mg/L 測試例B7 89% 0· 6 # m 測試例B8 100¾ 0. 8 β m 測試例B9 98% 1. 2m 46mg/L 80mg/L 測試例BIO 81% 0. 3 ^ m 測試例Bll 100¾ 0. 6 ^ in 測試例B12 103% 1. 1 y m 58mg/L 40mg/L 測試例B13 78% 0. 6 /z m 測試例B14 90% 0. 5 /z m 測試例B15 103% 1. 2 ^ m(Test Example B) The SPS concentration and the DDAC concentration were changed as shown in Table 2 below except that the sulfuric acid concentration was set to 100 g/L and the copper concentration was set to 150 g/L (Cu: 38.2 g/L). The composition of the semi-additive plating method was the same as that of Test Example A except that the sulfuric acid-based copper plating solution was used. From the results of Table 2, the composition of Test Examples B3, B6, B9, B12, and B15 having an SPS concentration of 20 mg/L was used, and the surface shape of the line profile was rounded, and the surface having a flat surface could not be formed. In addition, the test examples B1, B4, B7, B10, and B13 with an SPS concentration of 5 mg/L were relatively good in line shape 21 321752 201043111, but the current efficiency was lowered, and copper plating could not be efficiently performed, and the SPS concentration was 10 mg/L. In Test Examples B8 and B11, the current efficiency was not lowered, and it was known that a circuit having a flat surface was formed. From this, it is known that the SPS concentration is preferably in the range of 8 to 12 mg/L. Further, in Test Example B5 in which the DDAC concentration was 10 mg/L, although the line shape was relatively good, the current efficiency was lowered, and copper plating could not be efficiently performed, and the concentration of DDAC was 40 mg/L and 80 mg/L. The B11 system current efficiency is not lowered, and it is known that a circuit having a flat surface can be formed. Further, if the DDAC concentration is increased to more than 80 mg/L, the current efficiency tends to decrease. Further, in Test Examples B1 and B2 in which the gas is 18 mg/L, and Test Examples B13 and B14 in which the chlorine concentration was 58 mg/L, although the wiring shape was relatively good, the current efficiency was lowered, and copper plating could not be efficiently performed. In Test Example B8 having a chlorine concentration of 38 mg/L and Test Example B11 having a chlorine concentration of 46 mg/L, the current efficiency was not lowered, and it was known that a circuit having a flat surface was formed. From this, it is understood that the gas concentration is preferably in the range of 35 to 50 mg/L. 22 321752 201043111 [Table 2] Chlorine concentration DDAC concentration SPS concentration 5mg/L 1Omg/L 20rag/L 18mg/L 40mg/L Test case B1 64% 0. 8 Ren m Test case B2 79% 1 . 1 /2 m Test Example B3 98% 1. 4// m 32rag/L lOmg/L Test Example B4 83% 0· 6 /zm Test Example B5 86% 0. 5 ^ m Test Example B6 98% 1. 1 # m 38mg/L 40mg /L Test Example B7 89% 0· 6 # m Test Example B8 1003⁄4 0. 8 β m Test Example B9 98% 1. 2m 46mg/L 80mg/L Test Case BIO 81% 0. 3 ^ m Test Case Bll 1003⁄4 0 6 ^ in Test case B12 103% 1. 1 ym 58mg/L 40mg/L Test case B13 78% 0. 6 /zm Test case B14 90% 0. 5 /zm Test case B15 103% 1. 2 ^ m
(實施例1至4) 〇 以與測試例A6、A7、A14及A15同樣地形成之線路做 為實施例1至4，按照下述測試該等線路之耐折斷性。 耐折斷性測試係以R 0. 8mm、載重100g進行Μ IT耐折 斷測試（ASTMD2176)後，測定折斷發生之次數。 再者，為了比較，也同樣地對於使用市售之己内酯與 銅層之積層薄膜（S’ PERFLEX，住友金屬鑛山公司製，商品 名）藉由減去式（subtractive)電鐘法形成線路之樣品進行 对折斷性測試。 (實施例1) 23 321752 201043111 於厚度35//in之聚醯亞胺薄膜之前處理侧表面以250A 之厚度將Ni-Cr(20重量％ )濺鍍而形成種晶層。並且於此 種晶層之表面以之厚度鍍銅而形成銅薄膜層。接 著，使用積層機於銅薄膜層側表面黏貼厚度為之負 型乾薄膜阻劑（旭化成公司製）。 接著，使用配置有由描繪有20//m間距至460 //m間距 範圍且寬度為10至230//m之線路所構成之線路圖案的玻 璃光罩之曝光裝置（USHIO電機（股）製），以180mJ/cm2進 行紫外線曝光。 曝光後，以1%碳酸鈉水溶液進行顯影並將未曝光部 分溶解，而形成各間距之光阻圖案。 於如此形成由感光性樹脂所形成之阻劑圖案之基材帶 上，使用具有表3實施例1的組成之半添加式電鍍法用硫 酸系鍍銅液，以液溫22°C、電流密度5A/dm2電鍍7. 7分 鐘，而形成8//m厚度之鍍銅層。再者，在陽極係使用於 T i材被覆氧化銦而成之不溶性陽極。 接著，將形成有鍍銅層之樣品於以2-胺基乙醇做為主 成分之50°C剝離液中浸潰30秒鐘後，將阻劑圖案剝離。 接著，以硫酸及過氧化氫蝕刻液進行處理，藉由全面蝕刻 將基材上之〇. m厚之銅薄膜層去除。接著，以55°C之9 %鹽酸溶液處理13秒後，不進行水洗即直接以55°C之13 %硫酸及13%鹽酸之混合溶液處理13秒鐘將Ni-Cr層溶 解而形成各間距之線路圖案。20/zm間距之線路的厚度為8 μ m 〇 24 321752 201043111 (實施例2至4) . 除了使用表3實施例2至4之組成電鍍液以外，其餘 與實施例1同樣進行，而形成線路圖案。 如此形成之實施例1至4及比較例1之線路ΜIT对折 性測試結果如表3所示。結果得知，耐折斷性在硫酸濃度 為100g/L左右、銅濃度為38. 2g/L左右特別地顯著上 升。由此得知，若考慮到摻配誤差和浴組成變化時，則以 硫酸濃度為90至110g/L、銅濃度為35至45g/L之浴組 ^ 成為特佳。 [表3](Examples 1 to 4) 线路 The lines formed in the same manner as in Test Examples A6, A7, A14 and A15 were used as Examples 1 to 4, and the fracture resistance of the lines was tested as follows. The fracture resistance test was performed after the IT resistance test (ASTMD 2176) was carried out at R 0. 8 mm and a load of 100 g, and the number of occurrences of breakage was measured. In addition, for comparison, a laminate film (S' PERFLEX, manufactured by Sumitomo Metal Mining Co., Ltd., which is commercially available), which is commercially available, is formed by a subtractive electric clock method. Samples of the line were tested for breaking. (Example 1) 23 321752 201043111 Ni-Cr (20% by weight) was sputtered to a thickness of 250 A on a side surface of a polyethylene/imide film having a thickness of 35//in to form a seed layer. Further, the surface of the crystal layer is plated with copper to form a copper thin film layer. Then, a negative-type dry film resist (manufactured by Asahi Kasei Co., Ltd.) was attached to the side surface of the copper film layer by using a laminator. Next, an exposure apparatus (USHIO Motor Co., Ltd.) equipped with a glass mask having a line pattern formed by a line having a range of 20//m pitch to 460 //m pitch and a width of 10 to 230//m is used. ), ultraviolet exposure was performed at 180 mJ/cm 2 . After the exposure, development was carried out with a 1% aqueous sodium carbonate solution, and the unexposed portions were dissolved to form resist patterns of respective pitches. On the substrate tape on which the resist pattern formed of the photosensitive resin was formed in this manner, a sulfuric acid-based copper plating solution having a composition having the composition of Example 1 of Table 3 was used, at a liquid temperature of 22 ° C and a current density. 5A/dm2 was electroplated for 7. 7 minutes to form a copper plating layer having a thickness of 8/m. Further, in the anode, an insoluble anode in which the Ti material is coated with indium oxide is used. Next, the sample in which the copper plating layer was formed was immersed in a 50 °C stripping solution containing 2-aminoethanol as a main component for 30 seconds, and then the resist pattern was peeled off. Next, it is treated with sulfuric acid and a hydrogen peroxide etching solution, and the copper film layer of 〇.m thick on the substrate is removed by overall etching. Then, after treating with a 9 % hydrochloric acid solution at 55 ° C for 13 seconds, the mixture was treated with a mixed solution of 13% sulfuric acid and 13% hydrochloric acid at 55 ° C for 13 seconds without water washing to dissolve the Ni-Cr layer to form respective intervals. The line pattern. The thickness of the 20/zm pitch line was 8 μm 〇24 321752 201043111 (Examples 2 to 4). The same procedure as in Example 1 was carried out except that the composition plating solutions of Examples 2 to 4 of Table 3 were used to form a line. pattern. The results of the line Μ IT folding test of Examples 1 to 4 and Comparative Example 1 thus formed are shown in Table 3. As a result, it was found that the fracture resistance was particularly markedly increased at a sulfuric acid concentration of about 100 g/L and a copper concentration of about 38.2 g/L. From this, it is found that the bath group having a sulfuric acid concentration of 90 to 110 g/L and a copper concentration of 35 to 45 g/L is particularly preferable in consideration of the blending error and the bath composition change. [table 3]
Cu (g/L) 硫酸 (g/L) 氯 (mg/L) DDAC (mg/L) SPS (mg/L) 電流效率 剖面凸部 MIT (次） 實施例1 (A15) 38. 2 100 30 40 10 96% 0. 5 /z m 99 實施例2 (A14) 38. 2 100 30 80 10 96% 0. 5 /z m 62 實施例3 (A7) 38. 2 200 30 40 10 98¾ 0. 5 # m 67 實施例4 (A6) 25. 5 200 30 40 10 100% 1. 1 jcz m 62 比較例1 — — — — — 0 y ra 70 (實施例5至8) 測試例B8及B11之浴組成中使浴溫度（液溫）定為25 °C，與上述之實施例同樣地實施時（以該等做為實施例5及 25 321752 201043111 6)之電流效率及線路之剖面形狀同樣地進行測定。結果如 表4所示。 此外，於測試例B8及Bl 1中，再分別添加數目平均分 子量7250之DDAC聚合物lOppm之浴組成，在浴溫度25°C 同樣地實施（以該等做為實施例7及8)，並同樣地測定電 流效率及線路之剖面形狀。結果也如表4所示。 結果得知，在測試例B8及B11之浴組成浴溫度定為 25°C之實施例5及6，係線路剖面之表面形狀為稍微呈現 圓形，但添加數目平均分子量7250之DDAC聚合物lOppm 之實施例7及8，雖是電流效率稱微降低，但剖面形狀大 幅改善，可知線路剖面之表面形成幾乎為平坦。換言之， 得知添加微量的高分子量之DDAC聚合物係具有改善提高 浴溫度時之線路剖面形狀之效果。 [表4] 氣濃度 SPS濃度 DDAC 數目平均分子量 1220 DDAC 數目平均分子量 7250 電流效率 剖面凸部 實施例5 38mg/L lOmg/L 40mg/L — 99. 5% 1.43 # m 實施例6 46mg/L 1Omg/L 80mg/L 一 100. 0% 1 . 5 // m 實施例7 38mg/L 1Omg/L 40mg/L 10mg/L 91. 0% 0. 6 // in 實施例8 46mg/L 1Omg/L 80mg/L 10mg/L 93. 3% 0. 68 // m 26 321752 201043111 Λ 【圖式簡單說明】 •第1圖表示以本發明之一實施形態之印刷線路基板之 -製造方法製得之印刷線路基板之一例的概略平面圖。 第2圖（a)至（i)說明本發明之一實施形態之印刷線路 基板之製造方法之各步驟之剖面圖。 【主要元件符號說明】 1 C0F薄膜載帶（印刷線路基板） 2 齒輪孔 3 防銲層 10 絕緣基材 11 強化材 20 線路圖案 20A、 20B内部導線 20C、 20D外部導線 21 種晶層 22 銅薄膜層 23 基底層 24 鑛銅層 31 光阻層 32 光罩 33 阻劑圖案 33A 凹部 〇 27 321752Cu (g/L) sulfuric acid (g/L) chlorine (mg/L) DDAC (mg/L) SPS (mg/L) Current efficiency profile convex MIT (times) Example 1 (A15) 38. 2 100 30 40 10 96% 0. 5 /zm 99 Example 2 (A14) 38. 2 100 30 80 10 96% 0. 5 /zm 62 Example 3 (A7) 38. 2 200 30 40 10 983⁄4 0. 5 # m 67 Example 4 (A6) 25. 5 200 30 40 10 100% 1. 1 jcz m 62 Comparative Example 1 — — — — — 0 y ra 70 (Examples 5 to 8) In the bath compositions of Test Examples B8 and B11 The bath temperature (liquid temperature) was set to 25 ° C, and the current efficiency and the cross-sectional shape of the line were measured in the same manner as in the above-described examples (these examples were used as Examples 5 and 25 321752 201043111 6). The results are shown in Table 4. Further, in Test Examples B8 and Bl 1, a bath composition of 10 ppm of DDAC polymer having an average molecular weight of 7250 was separately added, and the same was carried out at a bath temperature of 25 ° C (these were used as Examples 7 and 8), and The current efficiency and the cross-sectional shape of the line were measured in the same manner. The results are also shown in Table 4. As a result, it was found that in the examples 5 and 6 in which the bath compositions of the test examples B8 and B11 were set to a bath temperature of 25 ° C, the surface shape of the line profile was slightly rounded, but the DDAC polymer having a number average molecular weight of 7250 was added at 10 ppm. In Examples 7 and 8, although the current efficiency was slightly lowered, the cross-sectional shape was greatly improved, and it was found that the surface of the line profile was almost flat. In other words, it has been found that the addition of a trace amount of a high molecular weight DDAC polymer has an effect of improving the cross-sectional shape of the line at the time of raising the bath temperature. [Table 4] Gas concentration SPS concentration DDAC Number average molecular weight 1220 DDAC Number average molecular weight 7250 Current efficiency profile convex portion Example 5 38 mg/L lOmg/L 40 mg/L - 99. 5% 1.43 # m Example 6 46 mg/L 1Omg /L 80 mg / L - 100. 0% 1 . 5 / m Example 7 38 mg / L 1Omg / L 40mg / L 10mg / L 91. 0% 0. 6 / / in Example 8 46mg / L 1Omg / L 80 mg/L 10 mg/L 93. 3% 0. 68 // m 26 321752 201043111 Λ [Simplified description of the drawings] Fig. 1 shows a printing method produced by the method of manufacturing a printed circuit board according to an embodiment of the present invention. A schematic plan view of an example of a circuit board. Fig. 2 (a) to (i) are cross-sectional views showing respective steps of a method of manufacturing a printed wiring board according to an embodiment of the present invention. [Main component symbol description] 1 C0F film carrier tape (printed circuit substrate) 2 Gear hole 3 Solder mask 10 Insulation substrate 11 Reinforced material 20 Line pattern 20A, 20B Internal lead 20C, 20D External lead 21 Seed layer 22 Copper film Layer 23 Base layer 24 Mineral copper layer 31 Photoresist layer 32 Photomask 33 Resistive pattern 33A Concave 〇 27 321752