201042897 六、發明說明： 【發明所屬之技術領域】 本發明係涉及一種諧振轉換裝置，特別係指一種具 同步整流功能的諧振轉換裝置及其同步整流電路。 【先前技術】 諸振轉換裝置是應用在電源產品上，而為了提高譜 振轉換裝置的效率，通常會搭配輸出端同步整流電路來設 計。並且’針對同步整流電路的驅動效果之好壞是會直接 影響諧振轉換裝置的功率轉換效率，甚至影響在輕載或空 載時的穩定性。 而目前較常看見的譜振轉換裝置，大多是採用二極 體來做為同步整流電路，如第一圖所示，為習知技術半橋 LLC譜振轉換裝置的電路示意圖。諧振轉換裝置包括： 一半橋轉換電路91、一諧振電路(Res〇nantCircuit)92、一 電路93及-輸出電路94。其中，半橋轉換電路 的5二:開：電晶體Q1及第二開關電晶體Q 2所組成 ^接於一電壓源*及諧振電路92之 一開關™^ Γf Φ及第二開關電晶體Φ是依據 疋進步包含一變壓器Tr，计b达 路，其中變壓器Tr 為一 LLC架構之譜振電 第二整流二極體SD2, 繞組，並連接輪出電分別對應連接於第一繞組及第 4。如此一來，便可藉由 第二繞組；而LLC架構二圈是具有-第-繞組及-(由變_ T^ —次側線=振電感Lr、一激磁電感 成。同步整流電路93則H ^供)及一諧振電容Ci*所組 ----- 疋包含一第—整流二極體SD1及 次 201042897 側第一開關電晶體Q1及第二開關電晶體Q2的交互運 作，而將能量由一次側傳送至二次侧。 Ο201042897 VI. Description of the Invention: [Technical Field] The present invention relates to a resonance conversion device, and more particularly to a resonance conversion device having a synchronous rectification function and a synchronous rectification circuit thereof. [Prior Art] The vibration conversion device is applied to a power supply product, and in order to improve the efficiency of the spectral conversion device, it is usually designed with an output synchronous rectification circuit. And the driving effect of the synchronous rectification circuit directly affects the power conversion efficiency of the resonant converter, and even affects the stability at light load or no load. At present, most of the spectral conversion devices that are commonly seen use a diode as a synchronous rectification circuit. As shown in the first figure, it is a circuit diagram of a conventional half-bridge LLC spectral conversion device. The resonant converter includes: a half bridge switching circuit 91, a resonant circuit 92, a circuit 93, and an output circuit 94. Wherein, the half bridge conversion circuit 5: open: the transistor Q1 and the second switch transistor Q 2 are connected to a voltage source * and a resonant circuit 92 switch TM^ Γf Φ and the second switch transistor Φ According to the progress, the transformer Tr is included, and the transformer Tr is a spectrally vibrating second rectifying diode SD2 of an LLC architecture, and the windings are connected to the first winding and the fourth . In this way, the second winding can be used; and the second circle of the LLC structure has a -th-winding and - (by the variable _T^ - the secondary side line = the vibration inductance Lr, a magnetizing inductance. The synchronous rectification circuit 93 is H ^Supply) and a resonant capacitor Ci*----- 疋 contains a first-rectifier diode SD1 and the next 201042897 side of the first switching transistor Q1 and the second switching transistor Q2 interaction, and the energy Transfer from the primary side to the secondary side. Ο
但是由於同步整流電路使用二極體的設計會導致較 高的導通損失(Conduction loss)，因此目前更已發展出採 用整流電晶體格配閘極驅動晶片的設計來取代整流二極 體。請參考第二圖，為習知技術同步整流電路中整流電晶 體與驅動晶片的電路連接示意圖。其中，以實際上的同步 整流電路93，來講，第一整流電晶體SR1及第二整流電 晶體SR2是用來取代原本第一整流二極體SD1及第二整 流二極體SD2 ,並且分別再搭配連接一驅動晶片1(：，以 接叉驅動晶片1C的驅動。而在第二圖中僅以一個驅動晶 f ic來代表說明驅動晶片IC與第一整流電晶體sri(或 第二整流電晶體SR2)之間的架構關係。其中，第一整漭 電晶體SR1及第二整流電晶體SR2是為金屬氧化半$ 場效應電晶體(M0SFET)。驅動晶片IC透過檢測第—敕 流電晶體SR1(或第二整流電晶體SR2)的漏源電壓(v& 來間接進行檢測電流’以依據所檢測的電壓信號來產生 關斷驅動信號SR1—D(或SR2_D)，而控制第—㈣/日 體SR1(或第二整流電晶體SR2)導通或截止。”L电曰曰 然而，由於金屬氧化半導體場效應電晶體的 ίΪίΪ板上電路走線的引線寄生電感(W 1及 汾s驅動晶片Ic檢測電流的結果，於是驅動晶片Ic ^ 生的驅動信號SR1_D(或SR2—D)便可能因而產生接 斷的現象’讓諧振轉換裝置的同步整流效果:胃 響諧振轉換裝置的轉換效率。 各進而影 請再參考第三圖，為習知技術半橋LLC譜振轉換装 201042897 置的運作波形圖。透過第三圖可以進—步清楚 譜振 裝置在搭配整流電晶體及驅動晶片時的^ 制^中，由於半橋LLC諧振轉換裝置的前 j+週期之狀具有雜性，目以 期 來舉例說明。 ⑴十週期 假設半橋LLC諧振轉換裝置上的元件都為理 況’而依據時間點來區分不同的狀態之分析如下：心狀However, since the design of the synchronous rectification circuit using the diode results in a higher conduction loss, a design using a rectifying transistor with a gate driver chip has been developed to replace the rectifying diode. Please refer to the second figure for the circuit connection diagram of the rectifying transistor and the driving chip in the synchronous rectifier circuit of the prior art. In the actual synchronous rectification circuit 93, the first rectifying transistor SR1 and the second rectifying transistor SR2 are used to replace the original first rectifying diode SD1 and the second rectifying diode SD2, respectively. Then, a driving wafer 1 is connected (:, the driving of the wafer 1C is driven by a fork. In the second figure, only one driving crystal f ic is used to represent the driving wafer IC and the first rectifying transistor sri (or the second rectification). The architectural relationship between the transistors SR2), wherein the first integral transistor SR1 and the second rectifier transistor SR2 are metal oxide half-field effect transistors (MOSFETs). The driving chip IC transmits the first-stage turbulence. The drain-source voltage of the crystal SR1 (or the second rectifying transistor SR2) (v& indirectly detects the current' to generate the off-drive signal SR1_D (or SR2_D) according to the detected voltage signal, and controls the - (4) /The body SR1 (or the second rectifying transistor SR2) is turned on or off."L 曰曰 However, due to the metal oxide semiconductor field effect transistor, the lead parasitic inductance of the circuit trace on the board (W 1 and 汾s drive) The result of the chip Ic detecting the current, The driving signal SR1_D (or SR2 - D) of the driving chip Ic ^ may cause a disconnection phenomenon. "The synchronous rectification effect of the resonance conversion device: the conversion efficiency of the gastric resonance conversion device. The figure is an operation waveform diagram of the conventional technology half-bridge LLC spectrum conversion device 201042897. Through the third figure, it can be further clarified that the spectrum device is matched with the rectifier transistor and the driving chip, because of the half bridge The first j+ period of the LLC resonant converter is heterogeneous, and the purpose is to illustrate. (1) The ten-cycle assumes that the components on the half-bridge LLC resonant converter are all in the same state. The analysis of the different states according to the time point is as follows: : heart shape
Pi = (=1) ·時間tG為—個譜振週期重新開始的時 =。而在此狀'4下的第-開關電晶體Q i及第二開關^曰 體Q2皆截止，並且諧振電流(iLr)先流經 ^ Q/的結電容(圖未示)，直至第-開關電晶體Φ:】;0; 電流ω再流經第—開_日體切的 Μ二、體圖未不）。其中，譜振電流(D是以近似正弦 式慢慢增加，而激磁電感上的電流(U以線性形 二=而另，方面，由於變壓器Tr二次側的電壓传號 二ϊ 2二整流電晶體sr2開始導通，，因而。 口電感之電壓被輸出電壓ν_所箝制，所以 € s μ t振電流 (^會大於激磁電感上的電流(iLm)，而 ^體SR2的電流(lsR2)。最後，當時間為 ^ G會控制第—開關電晶體Q1在零電壓條件下導通。 道“（U) ·在此狀態下，除了第一開關電晶體Q】 01疋的、f二，電流(iLr)是會直接流經第一開關電晶體 ，:通道而持續增加之外，其餘元件的運作大致能 (=u)時相同。但是，由於先前提過，金屬氧化半導體； j Μ电晶體的封裝電感及電路板上電路走線的引線寄生 201042897 電感（Lol及LCJ2)會影響驅動晶片IC：檢測電流 此在到達時間1 私爪〜、、、0果’ Η 與塑而描舒2 則，驅動晶片1C即可能因檢測電流的 ^ " 段時間T即關斷驅動信號SR2 D，带成由 ::，體SR2的本體二極體來軸= i。而產生較高的導通損失，並且降低同步整流效 的雷4 3達時間t2時’譜振電流(lLr)會與激磁電感上 經第等’所以變壓器ΤΓ無能量轉移，且流 & L电日日體SR2的電流(isR2)將會下降到零。 Ο 〇 狀態(t2〜t3):此狀態下的第一開關電晶體Q1持續導 而由於此時譜振電流大於零且等於激磁電感上的 二Lm)’變壓器^視為開路而無能量轉移，激磁電感 二，將不會被輪出電壓v〇m箝制住，所以激磁電感將 :^、諧振電感Lr與諧振電容Cr之諧振。而在此狀態結 、即控制第一開關電晶體Q1在零電壓條件下截止。 由以上"兒明可知，目前在諧振轉換裝置中，隨然已 曰利用整流f晶體來輯同步整流的設計，但是其中驅動 :=透過檢測整流電晶體的漏源電壓來間接檢測電流的 °又°十方式，會使得同步整流驅動無法獲得較佳的效果，並 且在效率方面仍有進一步改善的空間。 【發明内容】 有鑑於此，本發明所要解決的技術問題在於，在驅 動控制方面，除了能直接檢測流經整流電晶體的電流之 外更進一步要導入變壓器一次側的開關信號來進行判斷 運异，進而根據運算結果來驅動整流電晶體。 為了解決上述問題，根據本發明所提出之一方案， 提供一種諧振轉換裝置，包括：一諧振電路、一橋式轉換 電路及一同步整流電路。其中，諧振電路是包含一變壓 7 201042897 器，橋式轉換電路是連接於變壓器的一次側，並且依據一 開關信號來進行啟閉運作。而同步整流電路進一步包含： 二整流電晶體及二驅動電路。其中1二整流電晶體是分 別連接變壓器的二次側線圈的一第一繞組及一第二繞 組，而該二驅動電路則是對應連接該二整流電晶體的通 ^並且刀別產生一驅動彳s號來驅動所連接的整流電晶 體。其中，該二驅動電路是分別檢測流經所連接的整流電 晶體的電流而產生一檢測信號，並且依據變壓器一次侧之 橋式轉換電路的開關信號及檢測信號來產生驅動信號。 為了％決上述問題，根據本發明所提出之另一方 案，提供一種同步整流電路，其是應用於一諧振轉換裝 ，，並連接於諧振轉換裝置的一變壓器的二次側線圈，變 壓器的一次側是連接一橋式轉換電路，而同步整流電路包 ^ —正/爪電晶體及二驅動電路。其中，該二整流電晶體 是分別連接變壓器的二次側線圈的一第一繞組及一第二 繞組、，而該二驅動電路是對應連接該二整流電晶體的通 道，並且分別產生一驅動信號來驅動所連接的整流電晶 /、中η亥—驅動電路是分別檢測流經所連接的整流電 二體的電流而產生一檢測信號，並且依據橋式轉換電路的 開關彳°號及檢測信號來產生該驅動信號。 $此，本發明可達到的功效在於，可有效地提高輕 一或二載時的穩定性、改善同步整流驅動的效果，進而接 尚諧振轉換裝置的效率。 处、以上之概述與接下來的詳細說明及附圖，皆是為了 月匕進一步說明本發明為達成預定目的所採取之方式、 及功效^ ^ 而有關本發明的其他目的及優點，將在後續的說 201042897 明及圖式中加以闡述。 【實施方式】 本發明是利用整流電晶體來做為諧振轉換裝置中的 同步正^IL之用，而在整流電晶體的閘極端驅動控制的部 分，則是利用直接檢測流經整流電晶體之電流的信號，以 及麦壓态一次侧的開關信號來加以運算，以產生驅動信號 來達到驅動整流電晶體的作用。其中在整流電晶體的設計 上，例如是可採用N通道金屬氧化半導體場效應電晶體 (N Channel MOSFET)或其他適用的電晶體來設計。 〇 請參考第四圖，為本發明諧振轉換裝置的實施例方 塊圖。本實施例提供一種諧振轉換裝置，其包括：一譜振 電路11、一橋式轉換電路12、一同步整流電路13及一輸 出電路14。並且針對諳振轉換裝置的實施例電路方面， 則清一併再參考苐五圖及第六圖’為本發明半橋LLC譜 振轉換裝置及其驅動電路的實施例電路示意圖。 譜振電路11是包含一變壓器Tr’並且如第五圖所示 的是為一 LLC架構之諧振電路11。其中，LLC架構是由 ❹ 一譜振電感Lr、一激磁電感（由變壓器Tr的一次側線圈提 供)及一諧振電容Cr所組成。而變壓器Tr的二次侧線圈 是具有一第一繞組及一第二繞組。當然，諧振電路u在 實際設計上亦可是採用LC架構的方式來設計。 橋式轉換電路12是連接於變壓器Tr的一次側，用來 連接一電壓源Vin，並且依據一開關信號(HVG，LVG)來 進行啟閉運作。如第五圖所示’橋式轉換電路12是例如 以對稱半橋轉換電路來設計，其包括：一第一開關電晶體 Q1及一第二開關電晶體Q2。其中’弟一開關電晶體qi 是接收開關信號(HVG)的控制，而第二開關電晶體q2是 201042897 fn !^r#U(LVG)^^ J ^ LVG) 二二互補信，。而熟悉該項技術者應可了解， 此；非為太與2，可疋设計為全橋轉換電路之態樣，在 此亚非為本實施例所限制。 同步整流電路13進—牛七人 — SR1、一第二整流電晶體進J包第含:-第-整流電晶體 第二驅動電路聰。其巾路測及—Pi = (=1) • Time tG is the time when the spectral period restarts. In this case, the first-switching transistor Q i and the second switching transistor Q2 are both turned off, and the resonant current (iLr) first flows through the junction capacitance of the Q Q/ (not shown) until the first - The switching transistor Φ:]; 0; the current ω flows through the first-on-day tangential cut, and the body map is not. Among them, the spectral current (D is slowly increased in an approximately sinusoidal manner, and the current on the magnetizing inductance (U is linearly shaped by two = and the other, due to the voltage of the secondary side of the transformer Tr. The crystal sr2 starts to conduct, and thus the voltage of the port inductance is clamped by the output voltage ν_, so the current of s μ t (^ will be greater than the current on the magnetizing inductance (iLm), and the current of the body SR2 (lsR2). Finally, when the time is ^ G, the first switching transistor Q1 is turned on under zero voltage. The track "(U) · In this state, except for the first switching transistor Q] 01疋, f 二, current ( iLr) will flow directly through the first switching transistor: the channel continues to increase, and the rest of the components operate roughly the same (=u). However, due to the metal oxide semiconductor previously mentioned; j Μ transistor Package inductors and lead traces on circuit traces on the board 201042897 Inductors (Lol and LCJ2) affect the drive chip IC: Detect current at arrival time 1 private claws ~, ,, 0 fruit ' Η and plastic and smudge 2 Driving wafer 1C may be due to the detection of current ^ " segment time T Turn off the drive signal SR2 D, the band is :::, the body diode of the body SR2 takes the axis = i. It produces a higher conduction loss, and reduces the synchronous rectification efficiency of the thunder 4 3 time t2 'spectral current (lLr) will go to the magneto-inductance with the first 'thus transformer ΤΓ no energy transfer, and the flow & L electric day and body SR2 current (isR2) will drop to zero. Ο 〇 state (t2~t3): this The first switching transistor Q1 in the state continues to conduct, and since the spectral current is greater than zero and equal to two Lm on the magnetizing inductance, the transformer ^ is regarded as an open circuit without energy transfer, and the magnetizing inductance 2 will not be rotated. The voltage v〇m is clamped, so the magnetizing inductance will: ^, the resonant inductor Lr and the resonant capacitor Cr resonate. In this state, the first switching transistor Q1 is controlled to be cut off under zero voltage conditions. It is clear that at present, in the resonant converter, the rectified f crystal is used to synchronize the rectification design, but the drive: = indirectly detects the current through the detection of the drain-source voltage of the rectifying transistor. Will make the synchronous rectification drive not get better The present invention has a space for further improvement in terms of efficiency. SUMMARY OF THE INVENTION In view of the above, the technical problem to be solved by the present invention is that, in terms of driving control, in addition to directly detecting the current flowing through the rectifying transistor, further In order to solve the above problem, in accordance with one aspect of the present invention, a resonant switching device is provided, which includes: a resonant circuit, A bridge conversion circuit and a synchronous rectification circuit, wherein the resonance circuit comprises a transformer 7 201042897, the bridge conversion circuit is connected to the primary side of the transformer, and is opened and closed according to a switching signal. The synchronous rectification circuit further comprises: a rectifying transistor and a second driving circuit. The two rectifying transistors are respectively connected to a first winding and a second winding of the secondary side coil of the transformer, and the two driving circuits are corresponding to the connection of the two rectifying transistors, and the knives generate a driving 彳The s number drives the connected rectifying transistor. The two driving circuits respectively detect a current flowing through the connected rectifying transistor to generate a detection signal, and generate a driving signal according to a switching signal and a detection signal of the bridge conversion circuit on the primary side of the transformer. In order to solve the above problems, according to another aspect of the present invention, a synchronous rectification circuit is provided, which is applied to a resonant converter, and is connected to a secondary side coil of a transformer of the resonant converter, once of the transformer The side is connected to a bridge conversion circuit, and the synchronous rectification circuit includes a positive/claw transistor and a second drive circuit. Wherein, the two rectifying transistors are respectively connected to a first winding and a second winding of the secondary side coil of the transformer, and the two driving circuits are corresponding to the channels connecting the two rectifying transistors, and respectively generate a driving signal To drive the connected rectifying electric crystal /, η 亥 - drive circuit is to detect the current flowing through the connected rectifying electric body respectively to generate a detection signal, and according to the switch 彳 ° number of the bridge conversion circuit and the detection signal To generate the drive signal. In view of the above, the achievable effect of the present invention is that the stability at the time of light or two loads can be effectively improved, the effect of synchronous rectification driving can be improved, and the efficiency of the resonance conversion device can be improved. The above summary, the following detailed description and the accompanying drawings are intended to further illustrate the manner and the advantages of the present invention for achieving the intended purpose, and other objects and advantages of the present invention will be It is stated in 201042897 and in the drawings. [Embodiment] The present invention utilizes a rectifying transistor as a synchronous positive electrode in a resonant converter device, and a portion of a gate terminal driving control of a rectifying transistor is directly detected by a rectifying transistor. The signal of the current, and the switching signal of the primary side of the wheat pressure state, are operated to generate a driving signal to drive the rectifying transistor. Among them, in the design of the rectifying transistor, for example, an N-channel metal oxide semiconductor field effect transistor (N Channel MOSFET) or other suitable transistor can be used. 〇 Please refer to the fourth figure, which is a block diagram of an embodiment of the resonant converter of the present invention. The embodiment provides a resonant converter device comprising: a spectral oscillator circuit 11, a bridge converter circuit 12, a synchronous rectifier circuit 13, and an output circuit 14. For the circuit of the embodiment of the resonant converter, reference is made to the fifth and sixth diagrams of the present invention as a circuit diagram of an embodiment of the half-bridge LLC spectral converter and its driving circuit. The spectral circuit 11 is a transformer circuit Tr' and as shown in the fifth figure is a resonant circuit 11 of a LLC architecture. Among them, the LLC architecture is composed of a spectral oscillator Lr, a magnetizing inductance (provided by the primary side coil of the transformer Tr) and a resonant capacitor Cr. The secondary side coil of the transformer Tr has a first winding and a second winding. Of course, the resonant circuit u can also be designed in the actual design by using an LC architecture. The bridge conversion circuit 12 is connected to the primary side of the transformer Tr for connecting a voltage source Vin and performing an opening and closing operation according to a switching signal (HVG, LVG). The bridge conversion circuit 12 is designed, for example, as a symmetric half bridge conversion circuit, and includes a first switching transistor Q1 and a second switching transistor Q2. Wherein the brother-switching transistor qi is the control of the receiving switch signal (HVG), and the second switching transistor q2 is the 201042897 fn !^r#U(LVG)^^ J ^ LVG) two-two complementary letter. Those who are familiar with the technology should be able to understand this; non-Tai and 2, can be designed as a full-bridge conversion circuit, which is limited by this embodiment. Synchronous rectification circuit 13 - Nine seven people - SR1, a second rectifying transistor into the J package contains: - the first rectifying transistor The second driving circuit Cong. Its towel road test and -
整流電晶體SR2是分別_ SR1 H 第-⑽笛-二於變壓器ΤΓ的二次侧線圈的 並且連接於輸出電路14,以輸出 ^ —負載15。而第—驅動電路DIU及第 -一驅動電路DR2是分別斜處、由 j對應連接於第一整流電晶體SR1 及弟-整k電晶體SR2的通道，以分別產生—驅動信號 (ϋΛ 1R2—D)來驅動所連接的第—整流電晶體SR1 及苐-b以晶體SR2。值得—提的是，第—驅動電路 腿及第二驅動電路DR2錢作時，是檢測各自所連接 ^弟j流電晶體SR1及第二整流電晶體肥的流經電 =而來產卜檢測信號(SR1_S及SR2—s)，並且再依據變 壓益Tr -次側的開關信號(LVg，hvg)以及檢測信號 (SR1_S及SR2_S)來產生驅動信號(SR1—D及肥―d)。 而由第四圖及第五圖的架構上來看，熟悉該項技術 者應可以了解諧振轉換裳置的運作原理，也就是當變麼哭The rectifying transistor SR2 is a secondary side coil of _SR1 H-(10) flute-two of the transformer 分别, respectively, and is connected to the output circuit 14 to output ^-load 15. The first driving circuit DIU and the first driving circuit DR2 are respectively inclined, and are connected to the first rectifying transistor SR1 and the di-k transistor SR2 by j, respectively, to generate a driving signal (ϋΛ 1R2— D) to drive the connected first-rectifying transistors SR1 and 苐-b to the crystal SR2. It is worth mentioning that when the first driving circuit leg and the second driving circuit DR2 are used for money, it is detected that the respective connected J-flow transistor SR1 and the second rectifying transistor fertilizer flow through the electricity= The signals (SR1_S and SR2-s) are further generated based on the switching signals (LVg, hvg) and the detection signals (SR1_S and SR2_S) of the transformer Tr-secondary side (SR1_D and fertilizer-d). From the perspective of the architecture of the fourth and fifth diagrams, those familiar with the technology should be able to understand the operation principle of the resonant conversion skirt, that is, when it changes
Tr -次側的第-開關電晶體Q1接收到開關信號(hvg)而 導通時，相對的是由二次側的第二整流電晶體证2及第 二驅動電路DR2純㈣作；狀，才由二次側的第一 整流電晶體SR1及第1動電路麗來進行運作，如此 達成交互運作的關係。 10 201042897 間曰=外、由於諧振轉換裝置的前半週期與後半週期之 』’廿有對輪性，因此以下的說明就僅以前半週期來舉例 (HVG)，於餘'轉縣置在前半週期是產生開關信號 而第，於是就以第二驅動電路DR2的相關符號來代表， DR2六圖所示的驅動電路便可假設是第二驅動電路 Ο Ο SR2。’ ΓΓί生驅動信號(SR2-D)來驅動第二整流電晶體 半遇湘一提的是，第六圖中括號内的符號是代表後 相^符^收開關信號(LVG)時，第一驅動電路DR1對照的 由二圖驅動電路的架構可知，第二驅動電路聰 處理單元路13卜—隔離變壓器132及—運算 其中，電流檢測電路131進一步含一 直==、：箝位電路(包含一第一二極體D1及- 二:極體m)位電路（包含—復位電阻R1及-第 互感器CT的—次側線圈是串聯連接於第1 流電晶體SR2的通道，以檢測流經 互感器CT的極體D1的正端是連接電流 人側線圈的正極端，第__技M m :是連接直流電源Dc的正端，而直界-:負 連接電流互感器err δα _ ^ 电原dc的負端是When the Tr-secondary first-switching transistor Q1 receives the switching signal (hvg) and is turned on, the second rectifying transistor certificate 2 and the second driving circuit DR2 of the secondary side are relatively pure (four); The operation is performed by the first rectifying transistor SR1 and the first moving circuit MN on the secondary side, thus achieving an interactive operation relationship. 10 201042897 曰 = outside, because the first half cycle and the second half cycle of the resonant converter have a round-robin, the following description is only the previous half cycle (HVG), and Yu's county is placed in the first half cycle. The switch signal is generated first, and thus is represented by the relevant symbol of the second drive circuit DR2, and the drive circuit shown in the six diagram of DR2 can be assumed to be the second drive circuit Ο Ο SR2. ' ΓΓίsheng drive signal (SR2-D) to drive the second rectifying transistor half-occupied is that the symbol in parentheses in the sixth figure is the first sign of the rear-receiving switch signal (LVG), the first The structure of the driving circuit DR1 is compared with the structure of the driving circuit of the two figures. The second driving circuit is the processing unit 13 and the isolation transformer 132 and the operation. The current detecting circuit 131 further includes a constant==, : clamping circuit (including one The first diodes D1 and -2: the polar body m) bit circuit (including the reset resistor R1 and the -the second transformer of the transformer CT) are connected in series to the channel of the first current crystal SR2 to detect the flow through The positive terminal of the pole body D1 of the transformer CT is the positive terminal connected to the current side coil of the current, the first __Mm is the positive terminal connected to the DC power source Dc, and the straight-bound: - negative connection current transformer err δα _ ^ The negative end of the electrogen dc is
的第二二_2的=:=端。復位電路中 圈的負、極端，第二-接電流錢器CT二次側線 的一端，而復位電;^體二，f是連接負位電阻R1 的二次側線圈的正極端。、端疋連接電流互感器CT 如此一來，當電流互感器（了的一次側有電流時，電 11 201042897 流互感器c τ的二次側透過箝位電路而將能量傳遞至直流 電源DC。而當電流互感器CT的一次侧沒有電流時，電 流互感器CT的二次側則透過復位電路來進行復位。於 是，在此一運作原理下，電流檢測電路131即可藉由第二 二極體D2及復位電阻R1之接點來提供實際電流經狀況 的檢測信號。 隔離變壓器132的一次側是用來檢測屬於變壓器Tr 一次側的開關信號(HVG)，而隔離變壓器132的二次側則 可產生一同步開關信號(HVG_S)，藉以讓屬於變壓器Tr 二次側的第二驅動電路DR2得以接收到同步開關信號 (HVG_S)，而不會有延遲的情形。 運算處理單元133則是進一步包含：一單穩態觸發 器1331、一或閘1332、一及閘1333及一驅動器1334。 其中，單穩態觸發器1331的輸入端是連接隔離變壓器132 的二次側，以接收同步開關信號(HVG_S)，並且產生一脈 衝信號；或閘1332的一輸入端是連接單穩態觸發器1331 的輸出端，以接收脈衝信號，而或閘1332的另一輸入端 是連接電流檢測電路131，以接收檢測信號(SR2_S);及 閘1333的一輸入端是連接隔離變壓器132的二次侧，以 接收同步開關信號(HVG_S)，及閘1333的另一輸入端則 是連接或閘1332的一輸出端；最後，驅動器1334是連接 及閘1333的一輸出端，以依據及閘1333所輸出的信號來 產生驅動信號(SR2_D)。 而在上述中，本實施例將單穩態觸發器1331與電流 檢測電路131透過或閘1332來運算的設計，可以一併對 照第七A圖，為本發明驅動信號的第一實施例波形產生 12 201042897 示意圖。在輕載或空載時，電流檢測電路131中的電流互 感器CT所輪出的檢測信號(SR2_S)容易受到檢測電流反 流的影響，使得檢測信號(SR2_S)的驅動上升緣會抖動不 固定’而容易引起震盪。於是，透過本實施例的設計，當 單穩態觸發器1331接收到同步開關信號(HVG_S)的上升 緣時’單穩態觸發器1331隨即會產生脈衝信號。如此一 來’單穩態觸發器1331的脈衝信號便能與電流檢測電路 131的檢測信號(HVG—S)進行“或，，邏輯運算，藉以確保 第二驅動電路DR2能產生第七A圖中的驅動信號之波 〇 形，使整個諧振轉換裝置較為穩定。 補充說明的是，單穩態觸發器1331在設計上可以透 過其中電阻(Rd)及電容(Cd)來調整所輸出的脈衝信號之 寬度，也就是如第七A圖中所示的最小導通時間（tw)。而 較佳的調整是不要超過實際的最大開關頻率(fs)，以在輕 載或空載時穩定即可’對此本實施例並無加以限制。 此外，本實施例進一步將或閘1332的輸出端與同步 開關js 7虎(HVG—S)透過及閘1333來運算的設計，則可以 〇 —併對照第七B圖，為本發明驅動信號的第二實施例波 形產生示意圖。在開關頻率(fs)是大於譜振頻率(fr)的狀況 下，電流檢測電路131中的電流互感器CT進行復位往往 需要一段時間，而如第七B圖中所示的檢測信號會有所 延遲才下降，如此將會影響效率且不安全。而為了避免因 電流互感器CT的復位延遲，而使得或閘1332的輸出相 對延遲，以致於影響驅動信號(SR2—D)關斷時間，透過本 實施例之設計，便可將或閘1332的輪出端與同步開關俨 號(HVG-S)進行“及，，邏輯運算，以在同步開關信^ 13 201042897 (HVG—S)下降時’即能確保第二驅動電路dr2產生如第 七B圖中的驅動信號之波形而及時關斷。 驅動器1334是接收及閘1333的輪出信號，並且用 來產生驅動第二整流電晶體SR2的驅動信號(SR2 D)。里 中，驅，器1334在設計上可因應控制上的需求而進一^ 加以運算處理之後才來輸出，例如：將及閘Η%的輸出 k號進行反向處理之後才輸出。對此，在本實施例中也無 加以限制。 最後，熟悉該項技術者應可以了解，本實施例中的 運算處理單it 133除了可以是採用上述的電路架構來設 S十之外’在可以達到上述的效果的前提下更可以其他的電 路態樣來實現，甚至是以單晶片控制器的方式來達成亦無 不可。 綜上所述，本發明依據上面所述的諧振轉換裝置的 設計架構來運作，其所產生的相關波形可參考第八圖，為 本發明諧振轉換裝置的實施例運作波形圖。其中所^的二 動信號(SR2_D及SR1_D)之波形即能有效地進行;步^ 流驅動，以確保可靠的開啟及關斷。藉此，可以提言二玉 或空載時的穩定性、改善同步整流驅動的效果，進 諧振轉換裝置的效率。 之洋細說 所有範圍 藝者在本 蓋在以下 惟，以上所述，僅為本發明的具體實施例 明及圖式而已，並非用以限制本發明，本發明之 應以下述之申請專利範圍為準，任何熟悉該項技 發明之領域内，可輕易思及之變化或修飾皆可涵 本案所界定之專利範圍。 【圖式簡單說明】 第一圖係習知技術半橋LLC諧振轉換裝置的齋一 龟路示意 14 201042897 圖； 第二圖係習知技術同步整流電路中整流電晶體與驅動晶 片的電路連接示意圖； 第三圖係習知技術半橋LLC諧振轉換裝置的運作波形 圖； 第四圖係本發明諧振轉換裝置的實施例方塊圖； 第五圖係半橋LLC諧振轉換裝置的實施例電路示意圖； 第六圖係本發明驅動電路的實施例電路示意圖；The second two_2 === end. The negative and extreme poles of the loop in the reset circuit, and the second-connected end of the secondary side line of the current calculator CT, and the reset power; ^ body 2, f is the positive terminal of the secondary side coil connected to the negative resistance R1. In this way, when the current transformer has a current on the primary side, the secondary side of the current transformer 11 τ transmits the energy to the DC power supply DC through the clamp circuit. When there is no current on the primary side of the current transformer CT, the secondary side of the current transformer CT is reset by the reset circuit. Thus, under this operating principle, the current detecting circuit 131 can be used by the second diode The contact between the body D2 and the reset resistor R1 provides a detection signal of the actual current passing condition. The primary side of the isolating transformer 132 is for detecting the switching signal (HVG) belonging to the primary side of the transformer Tr, and the secondary side of the isolating transformer 132 is A synchronous switching signal (HVG_S) can be generated to allow the second driving circuit DR2 belonging to the secondary side of the transformer Tr to receive the synchronous switching signal (HVG_S) without delay. The arithmetic processing unit 133 further includes A monostable flip-flop 1331, a sluice gate 1332, a sluice gate 1333, and a driver 1334. The input end of the monostable flip-flop 1331 is connected to the isolation transformer 132 twice. Side to receive the synchronous switch signal (HVG_S) and generate a pulse signal; or an input of the gate 1332 is connected to the output of the monoflop 1331 to receive the pulse signal, or the other input of the gate 1332 Is connected to the current detecting circuit 131 to receive the detection signal (SR2_S); and an input of the gate 1333 is connected to the secondary side of the isolation transformer 132 to receive the synchronous switching signal (HVG_S), and the other input of the gate 1333 Is an output of the connection or gate 1332; finally, the driver 1334 is an output of the connection and gate 1333 to generate a drive signal (SR2_D) according to the signal output by the gate 1333. In the above, the embodiment will The design of the monostable flip-flop 1331 and the current detecting circuit 131 through the gate 1332 can be compared with the seventh embodiment A, which is a schematic diagram of the waveform generation 12 201042897 of the first embodiment of the driving signal of the present invention. At the time of loading, the detection signal (SR2_S) rotated by the current transformer CT in the current detecting circuit 131 is easily affected by the reverse current of the detection current, so that the driving rising edge of the detection signal (SR2_S) is not solid. Therefore, with the design of this embodiment, when the one-shot 1331 receives the rising edge of the synchronous switching signal (HVG_S), the monoflop 1331 will generate a pulse signal. The pulse signal of the 'monoflop 1331 can be ORed with the detection signal (HVG_S) of the current detecting circuit 131 to ensure that the second driving circuit DR2 can generate the driving in the seventh picture A. The wave shape of the signal makes the entire resonant converter more stable. In addition, the monostable flip-flop 1331 is designed to adjust the width of the output pulse signal through the resistor (Rd) and the capacitor (Cd), that is, the minimum on-time as shown in FIG. (tw). The preferred adjustment is not to exceed the actual maximum switching frequency (fs) to be stable at light or no load. This embodiment is not limited. In addition, in this embodiment, the design of the output of the gate 1332 and the synchronous switch js 7 (HVG-S) and the gate 1333 are further calculated, and the driving signal of the present invention can be compared with the seventh diagram. The waveform of the second embodiment is generated. In the case where the switching frequency (fs) is greater than the spectral frequency (fr), it is often necessary to reset the current transformer CT in the current detecting circuit 131, and the detection signal as shown in FIG. The delay is reduced, which will affect efficiency and is not safe. In order to avoid the delay of the output of the gate 1332 due to the reset delay of the current transformer CT, so as to affect the turn-off time of the drive signal (SR2 - D), the design of the embodiment can be used to turn the gate 1332 The round-out terminal and the synchronous switch nickname (HVG-S) perform "and, logical operation to decrease when the synchronous switch signal ^ 13 201042897 (HVG - S) is lowered" to ensure that the second drive circuit dr2 generates as the seventh B The waveform of the driving signal in the figure is turned off in time. The driver 1334 is a turn-off signal of the receiving and gate 1333, and is used to generate a driving signal (SR2 D) for driving the second rectifying transistor SR2. It can be output after the operation is processed according to the requirements of the control. For example, the output k of the gate % is reverse processed and then output. For this, it is not used in this embodiment. Finally, those skilled in the art should be able to understand that the arithmetic processing unit 133 in this embodiment may be configured to use the above-mentioned circuit architecture to set S10. Electricity The road surface is realized, even in the form of a single-chip controller. In summary, the present invention operates according to the design structure of the above-described resonant converter, and the related waveforms generated can be referred to Figure 8 is a waveform diagram of the operation of the embodiment of the resonant converter of the present invention, wherein the waveforms of the two-path signals (SR2_D and SR1_D) can be effectively performed; the flow is driven to ensure reliable opening and closing. By this, it is possible to mention the stability of the two jade or no-load, improve the effect of the synchronous rectification drive, and the efficiency of the resonant converter. The details of the range of artists in this cover are as follows, above, only The present invention is not intended to limit the scope of the present invention, and the present invention is intended to be within the scope of the following claims. Modifications can be covered by the scope of the patent as defined in this case. [Simple description of the diagram] The first diagram is a schematic diagram of the conventional one-bridge LLC resonant conversion device. A schematic diagram of a circuit connection between a rectifying transistor and a driving chip in a conventional synchronous rectification circuit; a third diagram is an operational waveform diagram of a conventional half-bridge LLC resonant converter; and a fourth diagram is a block diagram of an embodiment of the resonant converter of the present invention The fifth figure is a circuit diagram of an embodiment of a half-bridge LLC resonant conversion device; the sixth figure is a circuit diagram of an embodiment of the driving circuit of the present invention;
第七A圖係本發明驅動信號的第一實施例波形產生示意 圖； 第七B圖係本發明驅動信號的第二實施例波形產生示意 圖；及 第八圖係本發明諧振轉換裝置的實施例運作波形圖。 【主要元件符號說明】 [習知技術] 91半橋轉換電路 92諧振電路 93，93’ 同步整流電路 94輸出電路7A is a schematic diagram showing the waveform generation of the first embodiment of the driving signal of the present invention; FIG. 7B is a schematic diagram showing the waveform generation of the second embodiment of the driving signal of the present invention; and the eighth embodiment is an operation of the embodiment of the resonant switching device of the present invention. Waveform diagram. [Major component symbol description] [Prior art] 91 half-bridge conversion circuit 92 resonance circuit 93, 93' synchronous rectification circuit 94 output circuit
Cr諧振電容 Q2第二開關電晶體 SD2第二整流二極體 SR2第二整流電晶體 HVG、LVG開關信號 1C驅動晶片 Lr諧振電感 Q1第一開關電晶體 SD1第一整流二極體 SR1第一整流電晶體 SRI D、SR2 D驅動信號Cr resonant capacitor Q2 second switching transistor SD2 second rectifying diode SR2 second rectifying transistor HVG, LVG switching signal 1C driving chip Lr resonant inductor Q1 first switching transistor SD1 first rectifying diode SR1 first rectification Transistor SRI D, SR2 D drive signal
Tr變壓器 Vin電壓源 15 201042897Tr transformer Vin voltage source 15 201042897
Vout輸出電壓 [本發明] 11諧振電路 13同步整流電路 131電流檢測電路 133運算處理單元 1331單穩態觸發器 1333及閘 14輸出電路 CT電流互感器 Cr諧振電容 D1第一二極體 DC直流電源 DR1第一驅動電路 HVG、LVG開關信號 HVG_S、LVG_S同步開關信號 Lr譜振電感 Q1第一開關電晶體 R1復位電阻 SR1第一整流電晶體 SR1_D、SR2_D驅動信號 SR1_S、SR2_S檢測信號 Tr變壓器 Vin電壓源 Vout輸出電壓 12橋式轉換電路 132隔離變壓器 1332或閘 1334驅動器 15負載 D2第二二極體 DR2第二驅動電路 Q2第二開關電晶體 SR2第二整流電晶體 16Vout output voltage [invention] 11 resonant circuit 13 synchronous rectification circuit 131 current detecting circuit 133 arithmetic processing unit 1331 monostable flip-flop 1333 and gate 14 output circuit CT current transformer Cr resonant capacitor D1 first diode DC power supply DR1 first drive circuit HVG, LVG switch signal HVG_S, LVG_S synchronous switch signal Lr spectral oscillator Q1 first switch transistor R1 reset resistor SR1 first rectifier transistor SR1_D, SR2_D drive signal SR1_S, SR2_S detection signal Tr transformer Vin voltage source Vout output voltage 12 bridge conversion circuit 132 isolation transformer 1332 or gate 1334 driver 15 load D2 second diode DR2 second drive circuit Q2 second switch transistor SR2 second rectifier transistor 16