201039316 六、發明說明： 【發明所屬之技術領威】 本發明係有關於顯不器的技術’尤其是有關於畫素電 路。 【先前技術】 第la圖係為習知的畫素電路。畫素電路100a代表的 是最典型的基本畫素電路架構圖’其中至少包含一第一開 關Ml，一第一電容器C1以及一發光單元110。該第一開 〇 關Ml的閘極受到一掃描訊號Vscan的控制。當該掃描訊 號VSCAN開啟該第一開關Ml時，該第一開關Ml將資料訊 號VdATA從該第一開關Ml的源極傳導至第一端點VI，使 第一電容器C1充電至該資料訊號VdATA的電壓。藉此，該 發光單元110可根據該資料訊號VDATA的量值而發出對應 的光線。 該發光單元110的實際架構已有許多現成的技術，最 典型的架構包含一薄膜電晶體M3和一發光二極體D1。該 © 薄膜電晶體M3的閘極受到資料訊號VDATa的控制，進而 產生對應的電流。該發光二極體D1耦接該薄膜電晶體 M3 ’受到該電流的驅動而發光。 在一般的顯示器中，每隔1/60秒第一開關Ml會被掃 描訊號VSCAN開啟一段短暫的時間，而其餘的時間第一開 關Ml則是關閉的。在第一開關mi被開啟的期間，該第一 電容器ci被充電至資料訊號Vdata的位準。而在第一開關 M1被關閉的期間’第一開關.Ml的作用如用一電阻，如第 lb圖所示的等效電路。 201039316 第lb圖係為第一開關Ml關閉的期間，所形成的等效 電路。在第lb圖中，第一開關Ml被掃描訊號VSCAN關閉， 而形成等效的第一電阻R1。該第一電阻R1與第一電容器 C1形成一種RC電路，在掃描訊號乂％_關閉的期間缓慢 放電，產生一漏電流Ileak，致使第一端點VI的電壓隨時 間逐漸下降。此一現象會影響發光單元110的發光程度， 進而使顯示器的晝質受到影響。 為了減少漏電流Ileak 5傳統的解決方法可能包含提南 O RC常數，例如增加第一電容器C1的電容值。然而此法會 造成充電速度減慢，反而引發效能問題。若是加寬第一開 關Ml的寬度來加速充電，反而會使第一開關Ml等效的第 一電阻R1下降，對整體的效能改善並無幫助。 另一種傳統方法是不改變第一電容器C1，但是加長第 一開關Ml的長度，使等效的第一電阻R1變大，進而提高 RC常數。這個方法的缺點可能使第一開關Ml無法有效的 被掃描訊號VSCAN開啟。除此之外，資料訊號VDATA的值 ❹ 會隨著時間變動，而漏電流 Ileak 也會隨著資料訊號 Vdata 變動，結果導致驅動發光單元110的第一端點VI不穩定。 有鑑於此，一種防止漏電的機制是有待開發的。 【發明内容】 有鑑於此，本發明提出一種晝素電路，以多電容的組 合方式來減低漏電問題。首先，一第一開關根據一掃描訊 號將一資料訊號傳送至一第一端點。一第二開關根據該掃 描訊號將該資料訊號傳送至一第二端點。一發光單元耦接 至該第二端點，根據該第二端點之電壓而發光。一第一電 4 201039316 容器，耦接該第二端點和一參考電壓源之間，一第二電容 器，耦接該第一端點和該第二端點之間，而一第三電容器， 耦接該第一端點和該參考電壓源之間。 【實施方式】 第2圖係為本發明實施例之一的晝素電路。在晝素電 路200中，最主要的改良是使用了三個電容器，C卜C2和 C3。這三個電容器的總面積可與第la圖中習知的第一電容 器C1大致相同，只是拆成三個串聯的結構。除了原有的第 〇 一開關Ml之外，並額外增加了 一個第二開關M2,以輔助 控制該三個電容器的充放電。 具體地說，第一開關Ml可根據一掃描訊號VSCAN將一 資料訊號VDATA傳送至一第一端點V；l。而第二開關M2跨 接在第一端點VI和第二端點V2之間，在該掃描訊號VSCAN 開啟該第二開關M2時，該第二開關M2將該資料訊號 Vdata傳送至第二端點V2。藉此，發光單元110可受到該 第二端點V2之電壓驅動而發光。 〇 該發光單元110的實施方式可以參考各種傳統的方 式。舉例來說，發光單元110至少包含一薄膜電晶體M3 及一發光二極體D1。該薄膜電晶體M3的閘極耦接該第二 端點V2，而汲極耦接一供應電壓VDD。該發光二極體D1 的正端耦接該薄膜電晶體M3之源極，而負端接地。當薄 膜電晶體M3受到第二端點V2的啟動而在源極產生電流 時，電流便驅動發光二極體D1而發光。該發光二極體D1 可以是一種有機發光二極體（OLED)或聚合物發光二極體 . (PLED)。第一開關Ml和第二開關M2可用NMOS實作。 5 201039316 本發月適用於任何以充放電為基礎運作原理的晝素電路， 例如液晶顯示器或電__ 如第2圖戶斤+ ^ 汀不’弟一電容器C1係耦接該第二端點V2 和一參考電壓泝】 至雜112之間，第二電容器C2係耦接該第一 端點V1和該第-*山 山 乐一鳊點V2之間，而第三電容器C3耦接該 f端點V1和該參考電壓源112之間。更具體地說，該 、第=^關Ml的閘極連接該掃描訊號VSCAN，汲極連接該資 料訊號Vdata，而源極連接該第一端點V1。當該掃描訊號 ySCAN開啟該第一開關謝時，該第一開關M1將該資料訊 號VDATA傳導致該第一端點V卜該第二開關M2的閉極連 接該掃描訊號vseAN ’〉及極連接該第—端點v卜而源極連 接該第二端點V2。當崎描織VSGAN開啟該第二關關 M2時，該第二開關M2將該第-端點VI與該第二端點v2 連通。 ” 第2圖中所提到的參考電壓源112,可以是一地線，也 Ο 可以是供應錢VDD。參考電_的值可以進—步根據充 電速度的需求而彈性調整。 因此該晝素電路200的行為可分為兩個階段來說明。 第一個階段是充電顧’該掃插訊號VS⑽電壓上升，使 該第-開g Ml和該第二開關M2肖時開啟。第二個階段是 維持期間’該掃描訊號V s e A N轉下降，使該第—又⑷ 和第二開關M2關閉。 第3a圖係為第2圖在充電期間之等效電路。在充電期 間’第一開關Ml和第二開關M2被開啟，因此第 爲 Ml和第二開關M2躲極至源祕徑可視為短路，使等效 6 201039316 電路形成第3a圖的情形。貧料訊號 Vdata 被傳導至第一端 點VI和第二端點V2，使第三電容器C3和第一電容器C1 同時被充電至大致等於資料訊號VDATA的位準。由於此時 第一端點VI和第二端點V2的電壓位準相等，因此第二電 容器C2之中並無儲存電荷。在本實施例中，可將該第一電 容器C1與該第三電容器C3之電容量設計為大致相等，因 此充電至資料訊號VDATA位準的時間也大致相等。同時， 發光單元110也隨著受到第二端點V2的電壓位準驅動而 〇 發光。 第3b圖係為第2圖在維持期間之等效電路。在維持期 間，第一開關Ml和第二開關M2關閉。第一開關Ml和第 二開關M2可視為很大的電阻。因第一端點與第二端點相 較於第一端點與資料線有較小之跨壓，因此跨接在第一端 點VI和第二端點V2之間的第二開關M2可視為斷路，因 此第一端點VI和第二端點V2之間可視為只有跨接一第二 電容器C2。第一開關Ml視為等效電阻第一電阻R1，而漏 ® 電流便是透過第一電阻R1流出或流入。 第3b圖在第一端點的等效電容可以表達為下式： Ceq=C3+(C1// C2) 雖然漏電流I LEAK 仍然會透過第一電阻R1而產生，但 是第一端點VI上的電壓變化量和第二端點V2上的電壓變 化量會有如下關係式： AV2=AV1 · C2/( C1+ C2) (1) 換句話說，只要C2/(C1+C2)夠小，漏電流ILEAK對第 二端點V2的影響可以有效的降低。透過適當的選擇第一 201039316 電合:C1和第二電容器C2的值’當該掃描訊號VSCAN關 閉該第二開關Ml和該第二開關M2時，該第一電容器C1 透過該帛開關Ml漏電的程度可以遠小於該第三電容器 C3透過該第1關Ml漏電的程度。 第43圖係為掃插訊號VSCAN開啟時的儲電量變化。在 第a圖中 h轴代表時間，而縱軸各別代表第一電容器 C1^第二電容器C2和第三電容器C3的儲電量。該第一電 “ C1中儲存的電量隨著每一次掃描週期而不同，本實施 〇例中假設是從零開始充㈣例來說明。在掃描 開：第一開關M1和第二開關Μ]後，第-電容器C1;: 逐漸充電（或放電）祖邻铐V 便破 第-雷玄器貝科訊號V〇ata的位準。同樣的， 逐漸被充電至資料訊號％-的位準。第 電“和第三電容器。3的電容值可以是 可以視需要而調整成特定比值。所 、 電容器。的充電時間未必相同，可二=里C1和第三 般來說’第三電容器C3比第一電 近第但二- M1，所以儲電量可能上升得較早。至於第電 儲電量，其實取決於第-端點V1和裳：器C2的 差。由於第一端點V1和第二端點 ^7^ V2的電壓 號VDATA的位準，所以第二電容哭·後皆趨近於資料訊 至零。當第4a圖的充電階段結束^ 2的儲電量會逐漸下降 第一開關M i及第二開關 ^描=虎下降， 圖的情形。 _1#耗_成第41) 第4b圖係為第—開關M1 電量變化。如前所述，當第一開關時的儲 . 夂第一開關M2關閉 8 201039316 時，等效電路形成如第3b圖所示的情形。漏電流經由第一 電阻R1逐漸的流出（或流入），因此第三電容器C3的儲 電量會有逐漸下降（或上升）的情形。根據上述公式（1)， 第二端點V2的電壓變化會小於第一端點VI的電壓變化， 所以第一電容器C1的儲電量雖然也會逐漸下降（或上 升），但是變化的幅度（斜率）會比第三電容器C3的變化 幅度還緩和。藉此，本發明的晝素電路便可達成減緩漏電 流的效果。至於第二電容器C2的儲電量變化，則是取決於 〇 第一端點VI和第二端點V2的電壓差。由於第一端點VI 和第二端點V2的變化量不同，因此第一端點VI和第二端 點V2的差異會逐漸拉大，致使第二電容器C2中的儲電量 也隨之上升。 在實際設計積體電路佈局的時候，第一電容器C1、第 二電容器C2和第三電容器C3之間的比例可以是透過面積 的比例來決定的。然而為了維持晝素的開口率，第一電容 器C1、第二電容器C2和第三電容器C3的總面積可以等 ^ 於傳統晝素的電容面積，因此電容成本不會增加。值得一 提的是，在充電階段，資料訊號vDATA只針對第一電容器 C1和第三電容器C3充電而不影響第二電容器C2，因此充 電速度可以比傳統的晝素電路再快一些。 第5圖係為發光單元的另一實施例。該發光單元110’ 可用來取代第2圖中的發光單元110。其中薄膜電晶體M3 的閘極耦接該第二端點V2,而源極耦接一地線。該發光二 極體D1的負端耦接該薄膜電晶體M3之汲極，而正端連接· 到供應電壓VDD。當薄膜電晶體M3受到第二端點V2的 201039316 啟動而在源極產生電流時，該電流便驅動發光二極體 而發光。 θ “彳本發明以較佳實施例說明如上’但可以理解的201039316 VI. Description of the Invention: [Technology Leading to the Invention] The present invention relates to a technology for a display device, particularly regarding a pixel circuit. [Prior Art] The first figure is a conventional pixel circuit. The pixel circuit 100a represents the most typical basic pixel circuit diagram, which includes at least a first switch M1, a first capacitor C1 and a light emitting unit 110. The gate of the first opening M1 is controlled by a scanning signal Vscan. When the scan signal VSCAN turns on the first switch M1, the first switch M1 conducts the data signal VdATA from the source of the first switch M1 to the first terminal VI, and charges the first capacitor C1 to the data signal VdATA. Voltage. Thereby, the light emitting unit 110 can emit corresponding light according to the magnitude of the data signal VDATA. The actual architecture of the illumination unit 110 has many existing technologies. The most typical architecture includes a thin film transistor M3 and a light emitting diode D1. The gate of the © thin film transistor M3 is controlled by the data signal VDATa to generate a corresponding current. The light-emitting diode D1 is coupled to the thin film transistor M3' to be driven by the current to emit light. In a typical display, the first switch M1 is turned on by the scan signal VSCAN for a short period of time every 1/60 second, while the first switch M1 is turned off for the rest of the time. While the first switch mi is turned on, the first capacitor ci is charged to the level of the data signal Vdata. While the first switch M1 is turned off, the first switch .M1 functions as a resistor, such as the equivalent circuit shown in FIG. 201039316 Figure lb shows the equivalent circuit formed during the period when the first switch M1 is turned off. In the figure lb, the first switch M1 is turned off by the scan signal VSCAN to form an equivalent first resistor R1. The first resistor R1 forms an RC circuit with the first capacitor C1, and slowly discharges during the scanning signal 乂%_OFF to generate a leakage current Ileak, so that the voltage of the first terminal VI gradually decreases. This phenomenon affects the degree of illumination of the light-emitting unit 110, which in turn affects the quality of the display. In order to reduce the leakage current, the conventional solution of Ileak 5 may include a booster O RC constant, such as increasing the capacitance of the first capacitor C1. However, this method will cause the charging speed to slow down, which will cause performance problems. If the width of the first switch M1 is widened to speed up the charging, the equivalent first resistor R1 of the first switch M1 is lowered, which does not contribute to the overall performance improvement. Another conventional method is to not change the first capacitor C1, but lengthen the length of the first switch M1 to make the equivalent first resistor R1 larger, thereby increasing the RC constant. A disadvantage of this method may be that the first switch M1 cannot be effectively turned on by the scanning signal VSCAN. In addition, the value of the data signal VDATA will change with time, and the leakage current Ileak will also change with the data signal Vdata, resulting in instability of the first terminal VI of the driving light-emitting unit 110. In view of this, a mechanism for preventing leakage is yet to be developed. SUMMARY OF THE INVENTION In view of the above, the present invention provides a halogen circuit that reduces the leakage problem by a combination of multiple capacitors. First, a first switch transmits a data signal to a first endpoint based on a scan signal. A second switch transmits the data signal to a second endpoint based on the scan signal. An illumination unit is coupled to the second end, and emits light according to a voltage of the second end. a first capacitor 4 201039316, coupled between the second terminal and a reference voltage source, a second capacitor coupled between the first terminal and the second terminal, and a third capacitor, The first terminal is coupled between the first voltage source and the reference voltage source. [Embodiment] FIG. 2 is a pixel circuit of one embodiment of the present invention. In the halogen circuit 200, the most important improvement is the use of three capacitors, CBu C2 and C3. The total area of the three capacitors can be substantially the same as the conventional first capacitor C1 of Fig. la, except that it is split into three series connected structures. In addition to the original first switch M1, a second switch M2 is additionally added to assist in controlling the charge and discharge of the three capacitors. Specifically, the first switch M1 can transmit a data signal VDATA to a first terminal V; l according to a scan signal VSCAN. The second switch M2 is connected between the first end point VI and the second end point V2. When the scanning signal VSCAN turns on the second switch M2, the second switch M2 transmits the data signal Vdata to the second end. Point V2. Thereby, the light emitting unit 110 can be driven to emit light by the voltage of the second end point V2.实施 Embodiments of the lighting unit 110 can be referred to various conventional methods. For example, the light emitting unit 110 includes at least one thin film transistor M3 and one light emitting diode D1. The gate of the thin film transistor M3 is coupled to the second terminal V2, and the drain is coupled to a supply voltage VDD. The positive terminal of the LED D1 is coupled to the source of the thin film transistor M3, and the negative terminal is grounded. When the thin film transistor M3 is activated by the second terminal terminal V2 and generates a current at the source, the current drives the light-emitting diode D1 to emit light. The light emitting diode D1 may be an organic light emitting diode (OLED) or a polymer light emitting diode (PLED). The first switch M1 and the second switch M2 can be implemented by NMOS. 5 201039316 This month applies to any pixel circuit based on the principle of charge and discharge, such as liquid crystal display or electricity __ as shown in Figure 2 + ^ 汀不弟弟一 capacitor C1 is coupled to the second end The second capacitor C2 is coupled between the first end point V1 and the first edge of the V2, and the third capacitor C3 is coupled to the f. Between the endpoint V1 and the reference voltage source 112. More specifically, the gate of the first gate M1 is connected to the scan signal VSCAN, the drain is connected to the data signal Vdata, and the source is connected to the first terminal V1. When the scan signal ySCAN turns on the first switch, the first switch M1 transmits the data signal VDATA to cause the first terminal V to be closed to the second switch M2 to connect the scan signal vse AN '> and the pole connection The first end point is connected to the second end point V2. When the second weaving VSGAN opens the second switch M2, the second switch M2 connects the first end point VI with the second end point v2. The reference voltage source 112 mentioned in Fig. 2 may be a ground line, or may be a supply of money VDD. The value of the reference power_ can be adjusted in accordance with the demand of the charging speed. The behavior of the circuit 200 can be described in two stages. The first stage is charging the voltage of the sweep signal VS (10), so that the first-opening M M1 and the second switch M2 are turned on. During the sustain period, the scan signal Vse AN is turned down, so that the first-and-fourth (4) and the second switch M2 are turned off. Figure 3a is the equivalent circuit of Figure 2 during charging. During the charging, the first switch M1 And the second switch M2 is turned on, so the first M1 and the second switch M2 can be regarded as a short circuit, so that the equivalent 6 201039316 circuit forms the 3a picture. The poor signal Vdata is transmitted to the first end Point VI and second terminal V2, so that the third capacitor C3 and the first capacitor C1 are simultaneously charged to a level substantially equal to the data signal VDATA. Since the voltage level of the first terminal VI and the second terminal V2 at this time Equal, so no charge is stored in the second capacitor C2. In this embodiment, the capacitances of the first capacitor C1 and the third capacitor C3 can be designed to be substantially equal, so that the time of charging to the data signal VDATA level is also substantially equal. At the same time, the light-emitting unit 110 is also subjected to The voltage level of the second terminal V2 is driven to emit light. Fig. 3b is an equivalent circuit of the second figure during the sustain period. During the sustain period, the first switch M1 and the second switch M2 are turned off. The first switch M1 and The second switch M2 can be regarded as a large resistance. Since the first end point and the second end point have a smaller cross-pressure than the first end point and the data line, the first end point VI and the second end are connected. The second switch M2 between the terminals V2 can be regarded as an open circuit, so that the first terminal VI and the second end point V2 can be regarded as only connecting a second capacitor C2. The first switch M1 is regarded as the equivalent resistance first. Resistor R1, and the drain current flows out or flows through the first resistor R1. The equivalent capacitance at the first end point of Figure 3b can be expressed as: Ceq=C3+(C1// C2) Although the leakage current I LEAK Still generated by the first resistor R1, but the amount of voltage change at the first terminal VI and The amount of voltage change on the two terminals V2 has the following relationship: AV2=AV1 · C2/( C1+ C2) (1) In other words, as long as C2/(C1+C2) is small enough, the leakage current ILEAK is opposite to the second end. The influence of the point V2 can be effectively reduced. By the appropriate selection of the first 201039316, the value of the C1 and the second capacitor C2 is 'when the scan signal VSCAN turns off the second switch M1 and the second switch M2, the first The degree of leakage of the capacitor C1 through the 帛 switch M1 can be much smaller than the extent to which the third capacitor C3 leaks through the first switch M1. Figure 43 shows the change in the amount of stored electricity when the sweep signal VSCAN is turned on. In Fig. a, the h axis represents time, and the vertical axis represents the storage amount of the first capacitor C1^the second capacitor C2 and the third capacitor C3. The amount of electric energy stored in the first electric "C1 varies with each scanning cycle. In the present embodiment, it is assumed that charging is performed from zero (four). After scanning: first switch M1 and second switch Μ] , the first capacitor C1;: Gradually charge (or discharge) the ancestral 铐V will break the level of the first - Lei Xuan device Beca signal V〇ata. Similarly, gradually charged to the level of the data signal %-. Electric "and third capacitor. The capacitance value of 3 can be adjusted to a specific ratio as needed. , capacitors. The charging time may not be the same, but the second capacitor C3 is closer to the first power but the second - M1, so the power storage may rise earlier. As for the amount of stored electricity, it depends on the difference between the first end point V1 and the first end point C1. Due to the level of the voltage value VDATA of the first terminal V1 and the second terminal ^7^V2, the second capacitor is close to the data to zero after crying. When the charging phase of Figure 4a ends, the stored power of the ^2 will gradually decrease. The first switch M i and the second switch ^ depict the tiger drop, the situation of the figure. _1#耗_成第41) Figure 4b is the first switch M1 power change. As described above, when the first switch M2 of the first switch is turned off 8 201039316, the equivalent circuit forms a situation as shown in Fig. 3b. The leakage current gradually flows out (or flows in) through the first resistor R1, so that the storage capacity of the third capacitor C3 gradually decreases (or rises). According to the above formula (1), the voltage change of the second terminal V2 is smaller than the voltage change of the first terminal VI, so the storage capacity of the first capacitor C1 will gradually decrease (or rise), but the magnitude of the change (slope) ) will be more moderate than the third capacitor C3. Thereby, the halogen circuit of the present invention can achieve the effect of reducing leakage current. As for the change in the amount of stored electricity of the second capacitor C2, it depends on the voltage difference between the first terminal VI and the second terminal V2. Since the amount of change of the first end point VI and the second end point V2 is different, the difference between the first end point VI and the second end point V2 is gradually increased, so that the amount of stored electricity in the second capacitor C2 also rises. When the integrated circuit layout is actually designed, the ratio between the first capacitor C1, the second capacitor C2, and the third capacitor C3 may be determined by the ratio of the transmission area. However, in order to maintain the aperture ratio of the pixel, the total area of the first capacitor C1, the second capacitor C2, and the third capacitor C3 can be equal to the capacitance area of the conventional pixel, so the capacitance cost does not increase. It is worth mentioning that during the charging phase, the data signal vDATA is only charged for the first capacitor C1 and the third capacitor C3 without affecting the second capacitor C2, so the charging speed can be faster than the conventional halogen circuit. Fig. 5 is another embodiment of the light emitting unit. The light emitting unit 110' can be used in place of the light emitting unit 110 in Fig. 2. The gate of the thin film transistor M3 is coupled to the second terminal V2, and the source is coupled to a ground. The negative terminal of the LED D1 is coupled to the drain of the thin film transistor M3, and the positive terminal is connected to the supply voltage VDD. When the thin film transistor M3 is activated by the 201039316 of the second terminal V2 to generate a current at the source, the current drives the light emitting diode to emit light. θ "The present invention is described above with respect to preferred embodiments, but can be understood
It:::圍未必如此限定。相對的，任何基於相同 範圍内：Γ技術者為顯而易見的改良皆在本發明涵蓋 此專利要求範圍必須以最廣義的方式解讀。It::: is not necessarily so limited. In contrast, any modifications based on the same scope are obvious to those skilled in the art. The scope of the patent claims must be interpreted in the broadest sense.
10 201039316 【圖式簡單說明】 第la圖係為習知的晝素電路； 第lb圖係為第la圖的等效電路； 第2圖係為本發明實施例之一的晝素電路； 第3a圖及3b圖係為第2圖之等效電路； 第4a圖係為掃描訊號VSCAN開啟時的儲電量變化；以 及 第4b圖係為掃描訊號V SCAN 關閉時的儲電量變化；以 Ο 及 第5圖係為發光單元的另一實施例。 【主要元件符號說明】 100a，100b, 200 晝素電路 110，110’發光單元 112參考電壓源 Ml第一開關 ❹ M2第二開關 M3薄膜電晶體 C1第一電容器 C2第二電容器 C3第三電容器 D1發光二極體 R1第一等效電阻 Vdata資料訊號 VsCAN 掃描訊號 20103931610 201039316 [Simple description of the drawing] The first drawing is a conventional halogen circuit; the lb is an equivalent circuit of the first drawing; the second drawing is a halogen circuit of one embodiment of the present invention; 3a and 3b are the equivalent circuits of Fig. 2; Fig. 4a is the change of the stored electricity when the scanning signal VSCAN is turned on; and Fig. 4b is the change of the stored electricity when the scanning signal V SCAN is turned off; Fig. 5 is another embodiment of the light emitting unit. [Main component symbol description] 100a, 100b, 200 昼 circuit 110, 110' illuminating unit 112 reference voltage source M1 first switch ❹ M2 second switch M3 thin film transistor C1 first capacitor C2 second capacitor C3 third capacitor D1 Light-emitting diode R1 first equivalent resistance Vdata data signal VsCAN scanning signal 201039316
Ileak漏電流 VI第一端點 V2第二端點 VDD供應電壓 VI第一端點 V2第二端點 Ο ❹Ileak leakage current VI first end V2 second end VDD supply voltage VI first end point V2 second end point Ο ❹