CN114120910A - Pixel compensation driving circuit and display panel - Google Patents

Pixel compensation driving circuit and display panel Download PDF

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Publication number
CN114120910A
CN114120910A CN202111520924.0A CN202111520924A CN114120910A CN 114120910 A CN114120910 A CN 114120910A CN 202111520924 A CN202111520924 A CN 202111520924A CN 114120910 A CN114120910 A CN 114120910A
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thin film
film transistor
node
potential
module
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Chinese (zh)
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金爽
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Priority to CN202111520924.0A priority Critical patent/CN114120910A/en
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275Details of drivers for data electrodes
    • G09G3/3291Details of drivers for data electrodes in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements

Abstract

The invention provides a pixel compensation driving circuit and a display panel, wherein the anode potential of an organic light emitting diode is set as an initial value in a non-light-emitting stage through a potential holding module and is not influenced by the potential change of the output end of a driving module, so that when the threshold voltage of the driving module is detected in the non-light-emitting stage, the potential of the output end of the driving module is not limited by the starting voltage which is necessarily smaller than the organic light emitting diode in order to ensure that the organic light emitting diode does not emit light, the range of the threshold voltage of the driving module capable of compensating is expanded, the range of the threshold voltage which can be compensated by the pixel compensation driving circuit in the light-emitting stage is wider, and the pixel compensation driving circuit is stronger in applicability.

Description

Pixel compensation driving circuit and display panel
Technical Field
The invention relates to the technical field of display, in particular to a pixel compensation driving circuit and a display panel.
Background
An Organic Light-Emitting Diode (OLED) belongs to a current-type Organic Light-Emitting device, and emits Light by injecting and recombining carriers, and the Light-Emitting intensity is in direct proportion to the injected current.
In the OLED display panel, each pixel includes an organic light emitting diode and a pixel driving circuit for driving the organic light emitting diode. In the pixel driving circuit, the current flowing through the driving transistor has a formula I ═ K (Vgs-Vth)2, where K is the intrinsic conductivity factor of the driving transistor, Vgs is the potential difference between the gate and the source of the driving transistor, and Vth is the threshold voltage of the driving transistor, and thus it can be seen that the current flowing through the driving transistor, i.e., the current for driving the organic light emitting diode to emit light, is related to the threshold voltage of the driving transistor. However, at present, due to non-uniform manufacturing process of the display panel, the threshold voltages of the driving transistors may be different, resulting in non-uniform display brightness; in addition, as the display panel is used, the transistors may be aged and varied, so that the threshold voltage of each transistor may shift, and the aging degree of each driving transistor may be different, so that the threshold voltage of each driving transistor may shift differently, which may also cause unstable and non-uniform display brightness.
In view of the above problems, a pixel compensation driving circuit is generally used to detect the threshold voltage of a driving transistor by detecting the source voltage of the driving transistor, so as to compensate the threshold voltage of the driving transistor, and the driving current flowing through the organic light emitting diode is independent of the threshold voltage of the driving transistor. However, in the conventional pixel compensation driving circuit, the organic light emitting diode is coupled between the source of the driving transistor and the constant voltage low potential, and when the threshold voltage of the driving transistor is detected in the non-light emitting stage, in order to avoid the light emission of the organic light emitting diode, it is necessary to ensure that the source potential of the driving transistor is lower than the turn-on voltage of the organic light emitting diode, and the source potential of the driving transistor includes the threshold voltage, so that the threshold voltage range that the circuit can compensate is narrow, and the applicability is poor.
Disclosure of Invention
In order to solve the above problem, an embodiment of the present invention provides a pixel compensation driving circuit, including: the device comprises a driving module, a data writing module, a resetting module, a light emitting control module, a potential holding module, a first capacitor and a second capacitor; wherein the content of the first and second substances,
the control end of the driving module is connected with the first node, the input end of the driving module is connected with the second node, and the output end of the driving module is connected with the third node;
the control end of the reset module is connected with a reset signal line, the input end of the reset module is connected with a reset potential end, and the output end of the reset module is connected with the second node;
the control end of the data writing module is connected with a scanning signal line, the input end of the data writing module is connected with a data signal line, and the output end of the data writing module is connected with the first node;
the control end of the light emitting control module is connected with the first light emitting signal wire, the input end of the light emitting control module is connected with the constant voltage high potential end, and the output end of the light emitting control module is connected with the third node;
the control end of the potential holding module is connected with the reset signal line and the second light-emitting signal line, the input end of the potential holding module is connected with the reset potential end and the second node, and the output end of the potential holding module is connected with a fourth node;
the first capacitor is coupled between the first node and the second node, and the second capacitor is coupled between the second node and the high potential terminal of the constant voltage.
In some embodiments, the driving module includes a first thin film transistor, a gate of the first thin film transistor is connected to the first node, a source of the first thin film transistor is connected to the second node, and a drain of the first thin film transistor is connected to the third node.
In some embodiments, the reset module includes a second thin film transistor, a gate of the second thin film transistor is connected to the reset signal line, a source of the second thin film transistor is connected to the reset potential terminal, and a drain of the second thin film transistor is connected to the second node.
In some embodiments, the data writing module includes a third thin film transistor, a gate of the third thin film transistor is connected to the scan signal line, a source of the third thin film transistor is connected to the data signal line, and a drain of the third thin film transistor is connected to the first node.
In some embodiments, the light emission control module includes a fourth thin film transistor, a gate of which is connected to the first light emission signal line, a source of which is connected to the constant high potential terminal, and a drain of which is connected to the third node.
In some embodiments, the potential holding module includes a fifth thin film transistor and a sixth thin film transistor; wherein the content of the first and second substances,
a gate of the fifth thin film transistor is connected to the reset signal line, a source of the fifth thin film transistor is connected to the reset potential terminal, and a drain of the fifth thin film transistor is connected to the fourth node;
a gate of the sixth thin film transistor is connected to the second light emitting signal line, a source of the sixth thin film transistor is connected to the second node, and a drain of the sixth thin film transistor is connected to the fourth node.
In some embodiments, the pixel compensation driving circuit includes a non-emission period including a first period, a second period, and a third period;
in the first period, the fourth thin film transistor and the sixth thin film transistor are closed, the second thin film transistor, the third thin film transistor and the fifth thin film transistor are opened, and the first thin film transistor is opened from closed;
in the second period, the second thin film transistor, the fifth thin film transistor and the sixth thin film transistor are turned off, the third thin film transistor and the fourth thin film transistor are turned on, and the first thin film transistor is turned from on to off;
in the third period, the second thin film transistor, the fourth thin film transistor, the fifth thin film transistor and the sixth thin film transistor are turned off, the third thin film transistor is turned on, and the first thin film transistor is turned on from off.
In some embodiments, the pixel compensation driving circuit further comprises a light emission phase comprising a fourth period;
in the fourth period, the second, third, and fifth thin film transistors are turned off, and the first, fourth, and sixth thin film transistors are turned on.
In some embodiments, in the first period, the potential of the first node is a reference potential Vref provided by the data signal line, and the potential of the second node is a potential Vini of the reset potential terminal;
in the second period, the potential of the first node is the reference potential Vref, and the potential of the second node is the difference between the reference potential Vref and the threshold voltage Vth of the first thin film transistor;
in the third period, the potential of the first node is a data voltage Vdata provided by the data signal line, and the potential of the second node is acquired according to the threshold voltage Vth of the first thin film transistor, the reference potential Vref, the data voltage Vdata, and capacitance values of the first capacitor and the second capacitor;
in the fourth period, the potential of the first node is obtained according to the potential VDD of the constant-voltage high-potential end, the threshold voltage Vth of the first thin film transistor, the reference potential Vref, the data voltage Vdata, and capacitance values of the first capacitor and the second capacitor, and the potential of the second node is the potential VDD of the constant-voltage high-potential end.
In addition, the pixel compensation driving circuit also provides a display panel, wherein each pixel unit of the display panel comprises an organic light-emitting diode and the pixel compensation driving circuit; wherein the organic light emitting diode is coupled between the fourth node of the pixel compensation driving circuit and the constant voltage low potential terminal, so that the pixel compensation driving circuit is used for driving the organic light emitting diode to emit light.
In the 6T2C pixel compensation driving circuit and the display panel provided in the embodiments of the present invention, the potential holding module is provided to enable the anode potential of the organic light emitting diode to be set as an initial value in the non-light emitting stage, and is not affected by the potential variation of the output terminal of the driving module, so that when the threshold voltage of the driving module is detected in the non-light emitting stage, the potential of the output terminal of the driving module is not limited to be smaller than the turn-on voltage of the organic light emitting diode in order to ensure that the organic light emitting diode does not emit light, thereby expanding the range of the threshold voltage of the driving module capable of compensation, and enabling the range of the threshold voltage that the pixel compensation driving circuit can compensate in the light emitting stage to be wider, and the pixel compensation driving circuit has stronger applicability.
Drawings
The technical solution and other advantages of the present invention will become apparent from the following detailed description of specific embodiments of the present invention, which is to be read in connection with the accompanying drawings.
Fig. 1 is a schematic structural diagram of a pixel compensation driving circuit provided in the prior art;
FIG. 2 is a timing diagram of a pixel compensation driving circuit provided in the prior art;
fig. 3 is a schematic structural diagram of a pixel compensation driving circuit according to an embodiment of the invention;
FIG. 4 is a timing diagram of a pixel compensation driving circuit according to an embodiment of the present invention;
FIG. 5 is a state diagram of a pixel compensation driving circuit according to an embodiment of the present invention during a first period;
FIG. 6 is a state diagram of the pixel compensation driving circuit in a second period according to the embodiment of the present invention;
FIG. 7 is a state diagram of the pixel compensation driving circuit in a third period according to the embodiment of the present invention;
fig. 8 is a state diagram of the pixel compensation driving circuit provided in the embodiment of the invention in a fourth period.
Detailed Description
The technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that, in all embodiments of the present invention, in order to distinguish the other two ends of each module except the control end, one end is referred to as an input end, and the other end is referred to as an output end, because the output end and the input end of each module are symmetrical, the input end and the output end thereof are interchangeable.
In addition, in all embodiments of the present invention, two poles other than the gate of the transistor are distinguished, one of the two poles is called a source, and the other pole is called a drain. Since the source and drain of a transistor are symmetrical, the source and drain are interchangeable. The form of the figure provides that the middle end of the transistor is a grid, the signal input end is a source, and the signal output end is a drain. In addition, the transistors used in all embodiments of the present application may include both P-type and/or N-type transistors, wherein the P-type transistor is turned on when the gate is at a low potential and turned off when the gate is at a high potential; the N-type transistor is turned on when the grid is at a high potential and turned off when the grid is at a low potential.
Fig. 1 is a schematic structural diagram of a pixel compensation driving circuit provided in the prior art, fig. 2 is a timing diagram of the pixel compensation driving circuit provided in the prior art, and in combination with fig. 1 and fig. 2, the 4T2C pixel compensation driving circuit is composed of a driving transistor T10, switching transistors T20 and T30, and storage capacitors C10 and C20. The pixel compensation driving circuit supplies a reference voltage Vref to the gate of the driving transistor T10 from the Data signal line Data during a period T1, supplies a potential Vini to the source of the driving transistor T10 from the reset potential terminal, and then charges the source potential of the driving transistor T10 from the constant voltage high potential terminal VDD during a period T2 to turn the driving transistor T10 from on to off until the source potential of the driving transistor T10 is ef vtvth which is the threshold voltage of the driving transistor T10, thereby detecting the threshold voltage Vth of the driving transistor T10 by the source potential of the driving transistor T10, but in the period T2, in order to prevent the organic light emitting diode OLED from emitting light during a non-emitting period, the source potential of the driving transistor T10 is raised from Vini to Vtef Vth, which requires the source potential of the driving transistor T10 to be lower than the on voltage Voled of the organic light emitting diode OLED, that is, Vref-Vth < Voled, and therefore Vth > Vref-Voed, where Vref is supplied from the Data signal line Data, is generally 0 at a minimum, and therefore the negative range of the threshold voltage Vth that can be compensated by the pixel compensation driving circuit is small, i.e., the range of the threshold voltage that can be compensated by the pixel compensation driving circuit is limited.
In view of the above, an embodiment of the present invention provides a pixel compensation driving circuit, and fig. 3 is a schematic structural diagram of the pixel compensation driving circuit according to the embodiment of the present invention, as shown in fig. 3, the pixel compensation driving circuit includes: the driving circuit comprises a driving module 100, a data writing module 300, a resetting module 200, a light emitting control module, a potential holding module 500, a first capacitor and a second capacitor; wherein the content of the first and second substances,
the control end of the driving module 100 is connected to the first node G, the input end is connected to the second node S, and the output end is connected to the third node D;
the control end of the reset module 200 is connected with a reset signal line Init, the input end is connected with a reset potential end Vini, and the output end is connected with a second node S;
the control end of the Data writing module 300 is connected to the Scan signal line Scan, the input end is connected to the Data signal line Data, and the output end is connected to the first node G;
the light emitting control module 400 has a control end connected to the first light emitting signal line EM1, an input end connected to the constant voltage high potential end VDD, and an output end connected to the third node D;
the control end of the potential holding module 500 is connected to the reset signal line Init and the second light emitting signal line EM2, the input end is connected to the reset potential end Vini and the second node S, and the output end is connected to the fourth node P;
the first capacitor C1 is coupled between the first node G and the second node S, and the second capacitor C2 is coupled between the second node S and the constant voltage high potential terminal VDD.
In the 6T2C pixel compensation driving circuit provided in the embodiment of the present invention, the potential holding module 500 is provided to set the anode potential of the organic light emitting diode to the initial value in the non-light emitting stage, and is not affected by the potential change of the output terminal of the driving module 100, so that when the threshold voltage of the driving module is detected in the non-light emitting stage, the potential of the output terminal of the driving module 100 is not limited to be smaller than the turn-on voltage of the organic light emitting diode in order to ensure that the organic light emitting diode does not emit light, thereby expanding the range of the threshold voltage of the driving module capable of compensation, and the pixel compensation driving circuit has a wider range of the threshold voltage capable of compensation in the light emitting stage, and has strong applicability.
In some embodiments, the driving module 100 includes a first thin film transistor T1, a gate of the first thin film transistor T1 is connected to the first node G, a source of the first thin film transistor T1 is connected to the second node S, and a drain of the first thin film transistor T1 is connected to the third node D.
In some embodiments, the reset module 200 includes a second thin film transistor T2, a gate of the second thin film transistor T2 is connected to the reset signal line Init, a source of the second thin film transistor T2 is connected to the reset potential terminal, and a drain of the second thin film transistor T2 is connected to the second node S.
In some embodiments, the Data writing module 300 includes a third thin film transistor T3, a gate of the third thin film transistor T3 is connected to the Scan signal line Scan, a source of the third thin film transistor T3 is connected to the Data signal line Data, and a drain of the third thin film transistor T3 is connected to the first node G.
In some embodiments, the light emitting control module 400 includes a fourth thin film transistor T4, a gate of the fourth thin film transistor T4 is connected to the first light emitting signal line EM1, a source of the fourth thin film transistor T4 is connected to the constant high potential terminal VDD, and a drain of the fourth thin film transistor T4 is connected to the third node D.
In some embodiments, the potential holding module 500 includes a fifth thin film transistor T5 and a sixth thin film transistor T6; a gate of the fifth thin film transistor T5 is connected to the reset signal line Init, a source of the fifth thin film transistor T5 is connected to the reset potential terminal Vini, and a drain of the fifth thin film transistor T5 is connected to the fourth node P; a gate of the sixth thin film transistor T6 is connected to the second light emitting signal line EM2, a source of the sixth thin film transistor T6 is connected to the second node S, and a drain of the sixth thin film transistor T6 is connected to the fourth node P.
Based on the above embodiments, fig. 4 is a timing diagram of a pixel compensation driving circuit according to an embodiment of the invention, and as shown in fig. 3 and fig. 4, the pixel compensation driving circuit includes a non-emitting period a, where the non-emitting period a includes a first period t1, a second period t2, and a third period t 3;
in the first period T1, the fourth thin film transistor T4 and the sixth thin film transistor T6 are turned off, the second thin film transistor T2, the third thin film transistor T3 and the fifth thin film transistor T5 are turned on, and the first thin film transistor T1 is turned on from off;
in the second period T2, the second thin film transistor T2, the fifth thin film transistor T5 and the sixth thin film transistor T6 are turned off, the third thin film transistor T3 and the fourth thin film transistor T4 are turned on, and the first thin film transistor T1 is turned off from on;
in the third period T3, the second, fourth, fifth, and sixth thin film transistors T2, T4, T5, and T6 are turned off, the third thin film transistor T3 is turned on, and the first thin film transistor T1 is turned from off to on.
Further, as shown in fig. 3 and fig. 4, the pixel compensation driving circuit further includes a light-emitting phase B, where the light-emitting phase B includes a fourth time period t 4;
in the fourth period T4, the second, third, and fifth thin film transistors T2, T3, and T5 are turned off, and the first, fourth, and sixth thin film transistors T1, T4, and T6 are turned on.
In the first time period t1, the potential of the first node G is the reference potential Vref provided by the Data signal line Data, and the potential of the second node S is the potential Vini of the reset potential terminal;
in the second period T2, the potential of the first node G is the reference potential Vref, and the potential of the second node S is the difference between the reference potential Vref and the threshold voltage Vth of the first thin film transistor T1;
in the third period T3, the potential of the first node G is the Data voltage Vdata provided by the Data signal line Data, and the potential of the second node S is obtained according to the threshold voltage Vth of the first thin film transistor T1, the reference potential Vref, the Data voltage Vdata, and the capacitance values of the first capacitor C1 and the second capacitor C2;
in the fourth period T4, the potential of the first node G is obtained according to the potential VDD of the constant voltage high potential terminal VDD, the threshold voltage Vth of the first thin film transistor T1, the reference potential Vref, the data voltage Vdata, and the capacitance values of the first capacitor C1 and the second capacitor C2, and the potential of the second node S is the potential VDD of the constant voltage high potential terminal.
Based on the above embodiments, fig. 5-8 are state diagrams of the pixel compensation driving circuit provided by the embodiment of the invention in the first time period t1, the second time period t2, the third time period t3 and the fourth time period t4, respectively, and the detailed operation process of the pixel compensation driving circuit is as follows, in conjunction with fig. 3-8:
as shown in fig. 4 and 5, during the first period T1, the first and second light emitting signal lines EM1 and EM2 are at a low level, and the fourth and sixth thin film transistors T4 and T6 are turned off; the reset signal line Iint and the Scan signal line Scan are at a high level, turning on the second thin film transistor T2, the third thin film transistor T3, and the fifth thin film transistor T5; the Data signal line Data supplies a reference potential Vref to the first node G, the potential Vini of the reset potential terminal is placed at the second node S and the fourth node P, and the second capacitor C2 is charged.
At this time, the potential difference between the first node G and the second node S, i.e., the gate-source potential difference Vgs of the first thin film transistor T1 is Vref-Vini > Vth, which is the threshold voltage of the first thin film transistor T1, so that the first thin film transistor T1 is turned on.
As shown in conjunction with fig. 4 and 6, in the second period T2, the reset signal line Iint and the second light emitting signal line EM2 are at a low level, turning off the fourth thin film transistor T4, the fifth thin film transistor T5, and the sixth thin film transistor T6; the Scan signal line Scan is at a high level, so that the third thin film transistor T3 is turned on, and the Data signal line Data continuously provides the reference potential Vref to the first node G; the first light-emitting signal line EM1 is at a high level, turning on the fourth thin film transistor T4; the source of the first thin film transistor T1 is charged by the high potential terminal VDD of the constant voltage, so that the source potential of the first thin film transistor T1 rises from Vini to Vref-Vth until the first thin film transistor T1 is turned off.
As shown in conjunction with fig. 4 and 7, in the third period T3, the reset signal line Iint, the first light emitting signal line EM1, and the second light emitting signal line EM2 are at a low level, turning off the second thin film transistor T2, the fourth thin film transistor T4, the fifth thin film transistor T5, and the sixth thin film transistor T6; the Scan signal line Scan is at a high level, so that the third thin film transistor T3 is turned on, and the Data signal line Data supplies the Data voltage Vdata to the first node G, thereby increasing the potential of the first node G, and turning on the first thin film transistor T1.
Specifically, according to the law of conservation of charge based on the closed surface, as in fig. 7 and 8, in the closed surface 100 formed by the lower plate of the first capacitor C1 and the lower plate of the second capacitor C2 connected to the second node S, there is no element for storing charge, and no conductive path passes through, then the total charge stored in the lower plates of the first capacitor C1 and the second capacitor C2 in the closed surface 100 does not change. Specifically, in the second period t2, the lower plate of the first capacitor C1 and the lower plate of the second capacitor C2 store the total charge Q ═ C1-Vth ═ C2; in the third period t3, the lower plate of the first capacitor C1 and the lower plate of the second capacitor C2 store the total charge Q ═ v-VDD) × C1+ (Vs-Vdata) × C2, Vs is the potential of the second node S in the third period t 3. Obtained from Q ═ Q': since (Vref-Vth-VDD) × C1-Vth × C2 is (Vs-VDD) × C1+ (Vs-Vdata) × C2, Vs ═ Vref-Vth + (Vdata-Vref) × C2/(C1+ C2), in the third period T3, the gate-source potential difference Vgs of the first thin-film transistor T1 is Vdata-Vref + Vth- (Vdata-Vref) × C2/(C1+ C2) ═ vdvref) × C1/(C1+ C2) + Vth.
At this time, the gate-source potential difference Vgs of the first thin film transistor T1 is greater than Vth, and the first thin film transistor T1 is turned on.
As shown in fig. 4 and 8, in the fourth period T4, the reset signal line Iint, the Scan signal line Scan, and the first light emitting signal line EM1 are at a low level, turning off the second thin film transistor T2, the third thin film transistor T3, and the fifth thin film transistor T5; the first light-emitting signal line EM1 and the second light-emitting signal line EM2 are at a high level, so that the fourth thin film transistor T4 and the sixth thin film transistor T6 are turned on, the constant voltage high potential VDD drives the organic light-emitting diode OLED to emit light through the fourth thin film transistor T4, the first thin film transistor T1 and the sixth thin film transistor T6, at this time, under the coupling effect of the second capacitor C2, the gate-source potential difference Vgs of the first thin film transistor T1 is kept to be (Vdata-Vref) × C1/(C1+ C2) + Vth, that is, the potential of the second node S is VDD, and the potential of the first node G is VDD + (Vdata-Vref) × C1/(C1+ C2) + Vth.
Therefore, according to the current flowing through the organic light emitting diode T1, i.e., the current of the organic light emitting diode OLED, it is: k (Vgs-Vth)2 ═ K [ K (Vdata-Vref) × C1/(C1+ C2) + Vth-Vth ] 2 ═ v [ Vdata-Vref) × C1/(C1+ C2 ] 2, and thus it can be known that the current flowing through the organic light emitting diode OLED is not related to the threshold voltage of the first thin film transistor T1, and therefore the pixel compensation driving circuit can solve the problem of instability of the current flowing through the organic light emitting diode OLED due to non-uniform and unstable driving of the threshold voltage Vth of the driving thin film transistor, so that the light emission luminance of the organic light emitting diode OLED is uniform and stable, thereby improving the display effect of the display screen.
In summary, in the pixel compensation driving circuit provided by the embodiment of the invention, by providing the fifth thin film transistor T5 and the sixth thin film transistor T6 of the potential holding module 500, wherein the fifth thin film transistor T5 is used to set the potential of the fourth node P, i.e. the anode of the organic light emitting diode OLED, to the potential Vini of the reset potential terminal in the first period T1, and the sixth thin film transistor T6 is turned off in both the first period T1 and the second period T2, so that the potential of the anode of the organic light emitting diode OLED is kept to Vini in the second period T2, without being affected by the potential variation of the second node S, i.e. the source of the first thin film transistor T1, i.e. in the second period T2, the potential of the source of the first thin film transistor T1 does not need to be lower than the turn-on voltage Voled of the organic light emitting diode OLED, i.e. the threshold voltage of the first thin film transistor T1 does not need to be greater than-Voled Vref, therefore, the negative range of the threshold voltage Vth which can be compensated by the pixel compensation driving circuit is expanded, so that the range of the threshold voltage Vth which can be compensated by the pixel compensation driving circuit is wider, and the adaptability is stronger.
Based on the foregoing embodiments, an embodiment of the present invention further provides a display panel, where each pixel unit of the display panel includes an organic light emitting diode and the pixel compensation driving circuit as described above; the organic light emitting diode OLED is coupled between the fourth node P of the pixel compensation driving circuit and the constant voltage low potential terminal VSS, so that the pixel compensation driving circuit is used for driving the organic light emitting diode OLED to emit light. The display panel has the same structure and beneficial effects as the pixel compensation driving circuit provided by the above embodiments, and since the structure and beneficial effects of the pixel compensation driving circuit have been described in detail in the above embodiments, the details are not repeated here.
In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
The above description of the embodiments is only for helping understanding the technical solution of the present invention and its core idea; those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.

Claims (10)

1. A pixel compensation driving circuit, comprising: the device comprises a driving module, a data writing module, a resetting module, a light emitting control module, a potential holding module, a first capacitor and a second capacitor; wherein the content of the first and second substances,
the control end of the driving module is connected with the first node, the input end of the driving module is connected with the second node, and the output end of the driving module is connected with the third node;
the control end of the reset module is connected with a reset signal line, the input end of the reset module is connected with a reset potential end, and the output end of the reset module is connected with the second node;
the control end of the data writing module is connected with a scanning signal line, the input end of the data writing module is connected with a data signal line, and the output end of the data writing module is connected with the first node;
the control end of the light emitting control module is connected with the first light emitting signal wire, the input end of the light emitting control module is connected with the constant voltage high potential end, and the output end of the light emitting control module is connected with the third node;
the control end of the potential holding module is connected with the reset signal line and the second light-emitting signal line, the input end of the potential holding module is connected with the reset potential end and the second node, and the output end of the potential holding module is connected with a fourth node;
the first capacitor is coupled between the first node and the second node, and the second capacitor is coupled between the second node and the high potential terminal of the constant voltage.
2. The pixel compensation driver circuit of claim 1, wherein the driver module comprises a first thin film transistor having a gate connected to the first node, a source connected to the second node, and a drain connected to the third node.
3. The pixel compensation driving circuit according to claim 1, wherein the reset module comprises a second thin film transistor, a gate of the second thin film transistor is connected to the reset signal line, a source of the second thin film transistor is connected to the reset potential terminal, and a drain of the second thin film transistor is connected to the second node.
4. The pixel compensation driving circuit according to claim 1, wherein the data writing module comprises a third thin film transistor, a gate of the third thin film transistor is connected to the scan signal line, a source of the third thin film transistor is connected to the data signal line, and a drain of the third thin film transistor is connected to the first node.
5. The pixel compensation driving circuit according to claim 1, wherein the light emission control module includes a fourth thin film transistor, a gate of the fourth thin film transistor is connected to the first light emission signal line, a source of the fourth thin film transistor is connected to the constant high potential terminal, and a drain of the fourth thin film transistor is connected to the third node.
6. The pixel compensation driving circuit according to claim 1, wherein the potential holding block includes a fifth thin film transistor and a sixth thin film transistor; wherein the content of the first and second substances,
a gate of the fifth thin film transistor is connected to the reset signal line, a source of the fifth thin film transistor is connected to the reset potential terminal, and a drain of the fifth thin film transistor is connected to the fourth node;
a gate of the sixth thin film transistor is connected to the second light emitting signal line, a source of the sixth thin film transistor is connected to the second node, and a drain of the sixth thin film transistor is connected to the fourth node.
7. The pixel compensation driving circuit according to claim 1, comprising a non-emission period including a first period, a second period, and a third period;
in the first period, the fourth thin film transistor and the sixth thin film transistor are closed, the second thin film transistor, the third thin film transistor and the fifth thin film transistor are opened, and the first thin film transistor is opened from closed;
in the second period, the second thin film transistor, the fifth thin film transistor and the sixth thin film transistor are turned off, the third thin film transistor and the fourth thin film transistor are turned on, and the first thin film transistor is turned from on to off;
in the third period, the second thin film transistor, the fourth thin film transistor, the fifth thin film transistor and the sixth thin film transistor are turned off, the third thin film transistor is turned on, and the first thin film transistor is turned on from off.
8. The pixel compensation driving circuit of claim 7, further comprising a light emission phase, the light emission phase comprising a fourth period;
in the fourth period, the second, third, and fifth thin film transistors are turned off, and the first, fourth, and sixth thin film transistors are turned on.
9. The pixel compensation driver circuit of claim 8,
in the first period, the potential of the first node is a reference potential Vref provided by the data signal line, and the potential of the second node is a potential Vini of the reset potential terminal;
in the second period, the potential of the first node is the reference potential Vref, and the potential of the second node is the difference between the reference potential Vref and the threshold voltage Vth of the first thin film transistor;
in the third period, the potential of the first node is a data voltage Vdata provided by the data signal line, and the potential of the second node is acquired according to the threshold voltage Vth of the first thin film transistor, the reference potential Vref, the data voltage Vdata, and capacitance values of the first capacitor and the second capacitor;
in the fourth period, the potential of the first node is obtained according to the potential VDD of the constant-voltage high-potential end, the threshold voltage Vth of the first thin film transistor, the reference potential Vref, the data voltage Vdata, and capacitance values of the first capacitor and the second capacitor, and the potential of the second node is the potential VDD of the constant-voltage high-potential end.
10. A display panel, wherein each pixel of the display panel comprises an organic light emitting diode and the pixel compensation driving circuit according to any one of claims 1 to 9; wherein the content of the first and second substances,
the organic light emitting diode is coupled between the fourth node of the pixel compensation driving circuit and the constant voltage low potential end, so that the pixel compensation driving circuit is used for driving the organic light emitting diode to emit light.
CN202111520924.0A 2021-12-13 2021-12-13 Pixel compensation driving circuit and display panel Pending CN114120910A (en)

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Application publication date: 20220301