201029220 六、發明說明： 【發明所屬之技術領域】 錄ιϊΐϋί、關於-種發光二極體及其製造方法，尤其係關於-種"有反糖値抗躺電極的發光二嫌及其製造方法。、 【先前技術】 要性 中;極擊Ds ’ iightemittingdi，的重 °在各應用層面上皆可發現發光二極體_， 斜於、^式電話的通訊設細及其他^子裝置等方面。近年來， 顯示器、光學储存器、照明、醫療器材而言，^ = ❸ ^及-η辦編纖《，喝陳 然而’此種電極配置以及藍f石基板的非導電性 ^作造成極大的_。例如，f要在p型半導體層上形成半透明 接Γ钱低自發先二極艘=== 體有戶=裝_作過程中所產生的熱量無法藉由Ϊ 此’f知半導體結構的限制包含：⑴ 置操作過程中累積。 與電絕緣體，因此熱量會於裝 201029220 田Pi電極以及η型電極被施力口順向電壓(f〇rward 可導通發光二極體’而電流會從p型電極流向活化層。由 於傳，p-GaN_層的電醇高，因鱗致餘散佈(_加 ΓΓΐΐί應不佳。又’由於P型半導體層與反射金屬層之間的 附著性較差’所以經常會引起剝落的問題。 【發明内容】 瘳 ❿ 為了克服上述問題，本發明之一實施樣態為提供一種具有反 ^低阻抗觀雜之發光二極翻製造方法，包含下列步驟： 在基底上沉積一或多層n型羾族氮化物半導體層，其中此一 層η型m族氮化物半導體層具有第一表面以及第二表面；在此— ^多層η寵錢化物半導體層的第—表面上沉積—或多層職 氮化物活化層；在-或多層m族氮化物活化層上沉積— 型in族氮化物半導體；在—或多層p觀魏化物半導體層上形 ^原位(in-situ)形成層；以及在原位形成層上沉積一或多層反射金 屬層。此製造方法更包含：在-或多層反射金屬層上沉積一或多 層金屬層；移除基底；以及在n型皿族氮化物半導體層的第二表 面上形成一或多層η型電極。此外，吾人可藉由光電化學(pEC， photoelectrochemical)氧化與蝕刻處理，而使η型皿族氮化物半 體層的第二表面具有無次序(n〇n_〇rdered)蝕紋型態以 光二極體的光取出效率。 本發明之3-實施樣態為提供—種具有反射與低阻抗 極之發光二極_製造方法，包含下财驟：在基底上 1 ΐί化物半導體層’其中此—或多層n型m族氮化物 +¥體層具有第-表面以及第二表面；在此—或多層n型 化物半導體層的第-表面上沉積—或多層麵I化物活化層；、 或夕層n[族氮化物活化層上沉積一或多層p型冚族氮化物半 P _族I化物半導體層上形成原位形成層；形 成複數個賴’以界定出-或多個台面；在台面的原位 方沉積一或多層反射金屬層；沉積一或多層非導電層，以覆蓋各 201029220 部分:非導電層’以露出反射金屬層的表面。 此裝&方法更u3·沉積一或多層金屬層，以 二 攻 溝渠；移除基底；以及在n型H!族氮化物半 面1 形成-或多層η娜。此外，吾人可藉由 型態，以增加發光二極體的光取出效率。八有…、人序蝕紋 本發明之又另-實祕態為提供—種 電極之發光二極_製造方法，包含下 ===觸 或多層η型ΙΠ族氮化物半導體層，其中此一或多之 物半導體層具有第-表誠及第二表面；在 型 t ; 化層上沉積—或多層p型職氮化物半 一或多層反射金屬個 巧以界疋出-或多個台面；沉積一或多層非導電層，以覆蓋 if方部分的料電層，以露岐射金屬層的表面。 積一或多層金屬層，以覆蓋台面並且填滿 底；以及在η觀族氮化物半導體層的第二表面上 H-或多層η型雜。此外，吾人可藉由光魏學氧化與 ίϊ’，=ηΓΞΐ氮化物半導體層的第二表面具有無次序餘 型態，以增加發光二極體的光取出效率。 ㉟’ ίί明之ϋ實施樣態為提供一 _族氮化物發光二極 :^ ί層η型賴氮化物半導體層，具有第一表面以 丰莫㈣^弟表面上’―或多層ΡΜΠΙ族氮化物 在—或多層瓜族氮化物活化層上；原位形成層， ΐ成在—或多層p型m族氮化物半導體層上；以及一 ί，ίϊί屬層’設置在原位形成層上。此發*二極體更包含： 二ί工ίί層，設置在反射金屬層上；以及—或多層η型電極， 口又n^LIH族氮化物半導體層的第二表面上。η型職兔化物半 201029220 導體層的第二表面可經過光電化學氧化與钱刻處理，而具有無次 序蝕紋型態。 ..... 本發明之其他目的與優點可藉由隨後之詳細說明及隨附之申 請專利範圍而更顯明白。 【實施方式】 圖1A至圖1H顯示用以說明依照本發明之一實施例之發光二 極體製造程序的概略橫剖面圖。 圖1A顯示在基底1的上方沉積具有第一表面3a以及第二表 面3b的η型ΙΠ族氮化物半導體層3，在n型皿族氮化物半導體層 3的第一表面3a上沉積一或多層π族氮化物活化層5，然後在一 或多層Η族氮化物活化層5上沉積p型冚族氮化物半導體層7。上 述磊晶結構(即η型皿族氮化物半導體層3、诅族氮化物活化層5、 以及ρ型瓜族氮化物半導體層7)可藉由例如金屬有機化學氣相沉 ❹ 積(MOCVD ’ metal-organic chemical vapor deposition)、分子束磊晶 (MBE ’ molecular beam epitaxy)或氣相磊晶(vpE，vap〇r phase epitaxy)等等的技術來進行沉積。基底丨可為例如藍寶石、碳化矽、 石夕、氧化鋅、氣化紹或石申化鎵等等的材料。n型瓜族氣化物半導體 層3 了包3下列至少其中之—：n_GaN層、n-InGaN、n_Al(}aN或 n-A1InGaN層。P型班族氮化物半導體層7包含下列至少其中之 « 、p_AlGaN、p-AlGalnN、p-InGaN、以及 p-AIN。瓜族 氮化物活化層5可為inGaN/GaN層、趣⑽/滿咖層、或 么l^aN^aNf。雖然在圖式中僅顯示一層n型瓜族氮化物半導 道μ/; I θ㈣111族氮化物半導體層7,但n型m族氮化物半 ^體層3以及P麵魏化物半導體層7在實際上可具有多層結 f 在P型11族氮化物半導體層7上形成原位(in_situ) 形成層。原位形成層9可包含下列至少其中之一：鎮 、碳(C)、石綱、以及破㈣。原位 办成層崎成時間係介於約5秒與約3〇〇秒之間，以及形成溫 201029220 與約ll(Krc之間。原位形成層9亦可藉由例如 ^有機化學氣相沉積(MOCVD)、分子束蠢晶_£)或氣 (VPE)等等的技術來進行沉積。 ’、 圖1C顯示在圖1B的結構中形成複數個溝渠n，以界定出 ^個台面(meSa)12，藉以將® 1B的結構劃分成複數個區域 過下列其巾—種方式加以形成：丨1式_、反應性離子钮 ，reactlve ion etching)、雷射、切鋸、或喷射水刀法。或者， 溝渠11可藉由聚合物(例如：光阻)或硬遮罩(例如：二 化矽、鋁)加以形成。 虱 笼望齡在界定心面12之後’藉由級、或塗佈與烘培 ίί的3法在台面12之原位形成層9的上方沉積反射金屬層13。 然後’藉由蒸鑛或塗佈技術，例如電子束(e_beam)、熱級_ c〇ater)、濺鍍、或化學氣相沉積等方式沉積非導電層i5，以覆蓋 台面12。然後，藉由光阻施加、曝光、以及蝕刻步 分，非導電層15，_出反射金麟13的表面。反射金屬于層^ % lii下列至少射之_ :銀、金、㉝、或其合金。雖然在圖式 中僅顯不一層反射金屬層13以及一層非導電層15,但實際上吾人 可沉積多層的反射金屬層13以及非導電層15。此外，在本發二之 另實施例中，台面12的形成時機可在反射金屬層13形成之後。 再者，在>儿積反射金屬層13之後，吾人可執行回火處理，以增加 反射金屬層13與原位形成層9之間的附著性。回火處理的 ，約2贼至約_。依照圖1A至圖1D所示 氣成的發光二極體可應用在薄膜型發光二極體(thin mm LED)或 晶型發光二極體(flip Chip LED)。在應用方面，薄膜型發夯-炻栌 除了可設置在金屬層(無圖示)上，還可設置在非金屬^~圖極示體 上，例如設置在Si、施、Ge、SiC、或GaP等等的非=層圖上丁。) 在本發明之另一實施例中，可如圖1E所示，接著在圖1D的 結構上沉積晶種層17。晶種層17可包含下列其中之一：銅、鎢、 金、鎳、鉻、鈀、鉑或其合金。晶種層17可用以促進後續在圖m 之結構上所執行的電鑛製程。然而，假使吾人利用無電電鐘製程、 201029220 濺鍍或磁濺鍍製程來取代電鍍製程時，可不在圖ID的鉍槿卜、、π祛 晶種層Π。晶種層17可藉由下列其中一種方式加以 相沉積(CVD ’ chemical vapor deposition)、金屬有機化學氣相沉藉 (MOCVD) ^ ^ physical vapor deposition) ^ ^ 層沉積(ALD，atomic layer deposition)、或蒸鍍。接著，如圖1F所 示，在圖1E的結構上沉積金屬層19，以覆蓋台面12並且填滿溝 渠11。雖然圖式僅顯示一層金屬層19，但金屬層19可且有單 或多層結構。金屬層19可包含下列其中之一:二錄:;有:層 絡、銘、辞、或其合金。金屬層19可藉由下列方式加以沉積：減 鍍、物理氣相沉積、化學氣相沉積、電漿增強化學氣相沉積 (PE(^VD，plasma enhanced chemical vapor deposition)、蒸鑛-電子 束、蒸鍍_離子束沉積、電沉積、無電沉積、電聚喷塗恤_啊力、 喷墨沉積(injetdeposition)。接著，如圖1G所示，移除基底j而露 出η型Π族氮化物半導體層3的第二表面孙。吾人 刻技術、化學雜技術、彳b學顧研紐術、或雷糊除^0， laser lift-off)技術來進行基底〗的移除。最後，如圖1H所示， 型腿氮化物半導體層3的第二表面3b上形成η型電極21 型 電極21具有單層或多層結構。極21的單層或多層結構可包 ❹ 含下列其中之鎳、鉻、麵、金、鈦、组、氮化组、銅、錫、 ^鶴、錮，、紹、銀、或其組合。吾人可藉由下财法形成η型 電極21 .蒸鑛、滅鑛、電鍵、無電電鑛、塗佈、或印刷。此外， 在形成η型電極21之前’於約2Gt至約15此的溫度下，以例如 鹽酸至少其中之―_性液體型皿族氮化物半 導體層3的表面進行清理’藉以移除位於此表面上的殘餘金屬， 例如丙_及7或異丙醇等等的有機溶劑來移除此表面上 的油脂或其他污染物。 矣反射金屬層13之前，吾人可對原位形成層9的 p側_電阻’即吾人可纽度範圍為約 C至4 15GC的'U況下，藉由酸性或驗性液體來執行此清理步 驟’以移除位於原位形成層9之表面上的氧化物，例如Ga2〇j 201029220 等.，藉以降y侧接觸電阻。此酸性紐可為魏、顧 $^、?^?^?^至少其巾之—；而此雜液體可為氨 水以及過氧i水衫其巾之—。在使用上述 如丙_或異丙醇等等的有:容= 原位形成層9之表面上的油脂或其他污染物。 化物ίϊ俨極體的光取出’吾人可將n型1^族氮 弟二表面3b進行粗糙化，以使第二表面3b形 成無\序(non-ordered)蝕紋型態。此種粗糙化可藉由光 (PEC ’ photodectrochemical)氧化與蝕刻處理而達成。 _ 照本發明之—實施例的光電化學氧化無刻設備 fo。^電化學氧化無刻設備100包含：照明系统11〇 =放140中的載台150上，且藉== Φ 使發光一極體晶圓50完全浸入電解質溶液系統130 照 11G以及電偏壓系統12G，以執行光電化學 統11G可具有介於可見光與紫外光光譜 -TS 土、長範圍。在本發明之實施例中，照明系統110為具有從 1見2佈至紫外光之波長範圍的Xe或Hg弧光燈。電偏屢系統 ❿ 〇可用以施加電偏壓，並且將電壓值控制在_5V與+5V之間，以 化學氧化與_處理的進行。電解f溶齡統130可包 與酸性溶液或驗性溶㈣組合，其中氧化劑可包含 τ 2 2〇8其中之一或其組合；酸性溶液可包含h2S04、HF、 HC1、HsPO4、KN〇3、以及 CH3C〇〇h 驗性溶液可包含K0H、Na0H、以及姻观其中 鬥顯錢本發明之—實施例之已織化之發光二極體晶 刀巧略橫剖面圖。如圖3所示，在發光二極體晶圓％ 二匕學氧化與姓刻處理之後，η型瓜族氮化物半導體層3 的第二表面3b可呈現出無次序蝕紋型態。 ，者，相較於與反射金屬層接合的習知p_GaN，由於本發明 之發光二極體係使用包含例如鎂(Mg)、鋅(Zn)、銘(A1)、銅㈣、 201029220 ^(Ga)、碳(C)、矽(Si)、以及鈹(Be)至少其中之一的原位形成層， 吾人可改善反射金屬層與p型羾族氮化物半導體層之間的附 者性以及接觸電阻。 ，1顯示在不同回火條件下，習知p_GaN(結構A)以及本發明 層（結構B)的剝離測試結果，此結果可顯示出習知 ί二二!，)以及本發明之原位形成層(結構B)分別與反射金屬 性。表1之結構A係藉由以下程序而形成:在於其 412对晶圓上’直接以電子束將Ag級在此蟲晶 ❹^結構6储由以下程序而職：在於其上具 955 C 圓上，藉由金屬有機化學氣相沉積法，以 原位形成/ 件’於聽1結構的P_GaN層上崎鎂跑） 進行清理^接二2 =過氧硫酸以及鹽酸對原位形成層的表面 行清理，並且藉由^吏古用丙嗣以及異丙醇對原位形成層的表面進 金^層上而形成反射 利用切割器將反射金屬#的/面订逸剝離。剝離測試的方法為： 的剝離情形 表1201029220 VI. Description of the invention: [Technical field to which the invention pertains] Recording ιϊΐϋί, relating to a kind of light-emitting diode and a method for manufacturing the same, in particular, relating to a kind of light-emitting anti-sliding electrode and its manufacturing method . [Prior Art] Essentials; Extremely Ds ’ iightemittingdi, the weight of the light-emitting diodes can be found at various application levels, the communication settings of the oblique, ^-type telephones and other devices. In recent years, in the case of displays, optical storage, lighting, and medical equipment, ^ = ❸ ^ and - η 编 编 " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " " _. For example, f must form a translucent junction on the p-type semiconductor layer. The low-spontaneous first-pole vessel === body-to-home = the heat generated during the process cannot be relied on. Contains: (1) Accumulated during the operation. With the electrical insulator, the heat will be applied to the 201029220 field Pi electrode and the n-type electrode is applied to the forward voltage (f〇rward can conduct the light-emitting diode' and the current will flow from the p-type electrode to the active layer. The GaN_ layer has a high electric alcohol, and the scaly is scattered (the ΓΓΐΐ ΓΓΐΐ ΓΓΐΐ should not be good. Moreover, 'the adhesion between the P-type semiconductor layer and the reflective metal layer is poor' often causes peeling problems. In order to overcome the above problems, an embodiment of the present invention provides a method for manufacturing a light-emitting diode flip having a reverse impedance and a low impedance, comprising the steps of: depositing one or more layers of n-type steroid nitrogen on a substrate. a semiconductor layer, wherein the one-layer n-type nitride semiconductor layer has a first surface and a second surface; here - deposited on the first surface of the multilayer n-p-grain semiconductor layer - or a multi-layer nitride activation layer; Depositing a -type in-nitride semiconductor on the -or multi-layered m-nitride active layer; forming an in-situ layer on the - or multi-layered p-wintened semiconductor layer; and forming the layer in situ Deposition a multilayer reflective metal layer. The manufacturing method further comprises: depositing one or more metal layers on the - or multilayer reflective metal layer; removing the substrate; and forming one or more layers on the second surface of the n-type nitride semiconductor layer In addition, we can make the second surface of the n-type nitride nitride half layer have an unordered (n〇n_〇rdered) etched pattern by photoelectrochemical (pEC) oxidation and etching treatment. Light extraction efficiency of the photodiode. The 3-implementation aspect of the present invention provides a method for fabricating a light-emitting diode having a reflection and a low-impedance pole, comprising the following steps: 1 ΐ λ semiconductor layer on the substrate The — or multi-layer n-type m-nitride+¥ body layer has a first surface and a second surface; or—on the first surface of the multi-layer n-type semiconductor layer—or a multi-layered surface activation layer; or Forming an in-situ formation layer on the layer n[the group nitride active layer is deposited on one or more p-type lanthanide nitride semi-P-group I semiconductor layers; forming a plurality of layers to define - or a plurality of mesas; In situ deposition a multilayer reflective metal layer; depositing one or more non-conductive layers to cover each of the 201029220 portions: a non-conductive layer 'to expose the surface of the reflective metal layer. The device & method further deposits one or more metal layers to the second trench ; removing the substrate; and forming - or multi-layer η Na in the n-type H! family nitride half face 1. In addition, we can use the pattern to increase the light extraction efficiency of the light-emitting diode. A further embodiment of the present invention provides a light-emitting diode of a type of electrode, comprising a lower===touch or a plurality of n-type bismuth nitride semiconductor layers, wherein the one or more semiconductor layers have The first surface and the second surface; deposited on the type of layer; or a plurality of p-type nitrides, one or more layers of reflective metal, and one or more mesas; one or more layers of non-conductive layer To cover the surface of the if-side portion of the electrical layer to expose the surface of the metal layer. One or more metal layers are deposited to cover the mesas and fill the bottom; and H- or a plurality of n-type impurities on the second surface of the n-type nitride semiconductor layer. In addition, the second surface of the nitride semiconductor layer can have an unordered residual state by optically oxidizing and φϊ, and the second surface of the nitride semiconductor layer can increase the light extraction efficiency of the light emitting diode. 35' ί ϋ ϋ ϋ 为 为 为 为 为 为 为 为 为 为 为 为 为 为 为 为 为 提供 提供 提供 提供 提供 提供 提供 : : : : : : : : : : : : : : : : : : : : : : : : : : On- or a multi-layered citrate nitride-activated layer; a layer formed in-situ on the - or multi-layer p-type m-type nitride semiconductor layer; and a ί, ί ϊ layer disposed on the in-situ layer. The emitter diode further comprises: a layer disposed on the reflective metal layer; and - or a plurality of layers of the n-type electrode, the second surface of the n^LIH-group nitride semiconductor layer. Η-type rabbit compound half 201029220 The second surface of the conductor layer can be photoelectrochemically oxidized and etched, and has a non-order etched pattern. Other objects and advantages of the present invention will become apparent from the following detailed description and appended claims. [Embodiment] Figs. 1A to 1H are schematic cross-sectional views for explaining a manufacturing procedure of a light emitting diode according to an embodiment of the present invention. 1A shows that an n-type lanthanum nitride semiconductor layer 3 having a first surface 3a and a second surface 3b is deposited over the substrate 1, and one or more layers are deposited on the first surface 3a of the n-type family nitride semiconductor layer 3. The p-type nitride-activated layer 5 is then deposited on one or more of the lanthanum nitride-activated layers 5 to deposit a p-type lanthanum nitride semiconductor layer 7. The above epitaxial structure (i.e., the n-type dish nitride semiconductor layer 3, the lanthanum nitride active layer 5, and the p-type quaternary nitride semiconductor layer 7) can be formed by, for example, metal organic chemical vapor deposition (MOCVD). Metal-organic chemical vapor deposition, MBE 'molecular beam epitaxy or vapor phase epitaxy (vpE, vap〇r phase epitaxy) and the like are used for deposition. The substrate 丨 may be a material such as sapphire, tantalum carbide, shi shi, zinc oxide, gasification or sillimanite. The n-type guar vaporized semiconductor layer 3 has at least one of the following: an n-GaN layer, an n-InGaN, an n_Al(}aN or an n-A1InGaN layer. The P-type nitride semiconductor layer 7 includes at least one of the following « , p_AlGaN, p-AlGalnN, p-InGaN, and p-AIN. The quaternary nitride activation layer 5 may be an inGaN/GaN layer, a fun (10)/full-ca layer, or a l^aN^aNf. Only one layer of n-type cuban nitride semi-channel μ/; I θ (tetra) group 111 nitride semiconductor layer 7 is shown, but the n-type m-nitride semiconductor layer 3 and the P-faced derivative semiconductor layer 7 may actually have a multi-layer junction. f forming an in-situ formation layer on the P-type Group 11 nitride semiconductor layer 7. The in-situ formation layer 9 may comprise at least one of the following: town, carbon (C), stone, and broken (four). The layering time is between about 5 seconds and about 3 seconds, and the formation temperature is between 201029220 and about ll (Krc. The in-situ layer 9 can also be formed by, for example, organic chemical vapor deposition ( [CVD] MOCVD), molecular beam crystallization, or gas (VPE), etc., and FIG. 1C shows the formation of a plurality of trenches n in the structure of FIG. 1B to define ^ mesa 12, in order to divide the structure of the ® 1B into a plurality of areas by the following methods: 丨1 type, reactive ion button, laser, cutting saw, Or spray water knife method. Alternatively, the trench 11 may be formed by a polymer (e.g., photoresist) or a hard mask (e.g., germanium, aluminum).虱 Cage age after defining the core surface 12 The reflective metal layer 13 is deposited over the in-situ formation layer 9 of the mesa 12 by leveling, or by coating and baking. The non-conductive layer i5 is then deposited by steaming or coating techniques, such as electron beam (e_beam), thermal grading, or chemical vapor deposition to cover the mesas 12. Then, the non-conductive layer 15, _ reflects the surface of the Jinlin 13 by the photoresist application, exposure, and etching steps. The reflective metal is at least _: silver, gold, 33, or an alloy thereof. Although only one reflective metal layer 13 and one non-conductive layer 15 are shown in the drawings, in practice, a plurality of reflective metal layers 13 and non-conductive layers 15 may be deposited. Further, in another embodiment of the present invention, the timing of forming the mesas 12 may be after the formation of the reflective metal layer 13. Further, after > reflecting the metal layer 13, the tempering treatment can be performed to increase the adhesion between the reflective metal layer 13 and the in-situ formation layer 9. Tempered, about 2 thieves to about _. The gas-emitting diode according to Figs. 1A to 1D can be applied to a thin film type light emitting diode (thin mm LED) or a crystal form light emitting diode (flip chip LED). In terms of application, the film-type hairpin-炻栌 can be disposed on a metal layer (not shown), and can also be disposed on a non-metal electrode, such as Si, Shi, Ge, SiC, or The non-layer map of GaP and so on. In another embodiment of the invention, as shown in Figure 1E, a seed layer 17 is then deposited over the structure of Figure 1D. The seed layer 17 may comprise one of the following: copper, tungsten, gold, nickel, chromium, palladium, platinum or alloys thereof. The seed layer 17 can be used to facilitate subsequent electrowinning processes performed on the structure of Figure m. However, if we use the electroless clock process, 201029220 sputtering or magnetic sputtering process instead of the electroplating process, it is not in the figure ID, π祛 seed layer. The seed layer 17 can be deposited by one of the following methods: CVD (chemical vapor deposition), metal organic chemical vapor deposition (MOCVD), and ALD (atomic layer deposition). Or evaporation. Next, as shown in Fig. 1F, a metal layer 19 is deposited on the structure of Fig. 1E to cover the mesas 12 and fill the trenches 11. Although the drawing shows only one metal layer 19, the metal layer 19 may have a single or multi-layer structure. The metal layer 19 may comprise one of the following: two records:; a layer: a layer, an inscription, or an alloy thereof. The metal layer 19 can be deposited by the following methods: deplating, physical vapor deposition, chemical vapor deposition, plasma enhanced chemical vapor deposition (PE), vaporization-electron beam, Evaporation_ion beam deposition, electrodeposition, electroless deposition, electropolymerization, inkjet deposition, and then, as shown in FIG. 1G, the substrate j is removed to expose the n-type bismuth nitride semiconductor. The second surface of layer 3 is Sun. I engraved the technique, the chemical technique, the 学b study, or the laser lift-off technique to remove the substrate. Finally, as shown in Fig. 1H, the n-type electrode 21-type electrode 21 is formed on the second surface 3b of the leg nitride semiconductor layer 3 to have a single layer or a multilayer structure. The single or multi-layer structure of the pole 21 may comprise nickel, chromium, face, gold, titanium, group, nitride group, copper, tin, crane, ruthenium, samarium, silver, or a combination thereof. We can form the n-type electrode 21 by distillation of the next method. Steaming, ore, electric, electroless ore, coating, or printing. Further, before the formation of the n-type electrode 21, at a temperature of about 2 Gt to about 15 Å, for example, at least a surface of the liquid-type dish nitride semiconductor layer 3 of the liquid-type liquid-type nitride semiconductor layer 3 is cleaned, so that the surface is removed. A residual metal, such as an organic solvent such as C- and 7 or isopropanol, removes grease or other contaminants from the surface. Before the ruthenium reflective metal layer 13, we can perform this cleaning by acid or an inert liquid on the p-side resistance of the in-situ formation layer 9, that is, the U-degree range of about C to 4 15 GC. The step 'to remove the oxide on the surface of the in-situ formation layer 9, such as Ga2〇j 201029220, etc., thereby lowering the y-side contact resistance. The acidity can be Wei, Gu $^, ?^?^?^ at least its towel--; and the miscellaneous liquid can be ammonia and peroxy-i-shirt. In the use of the above, such as propylene or isopropanol, etc., there is a grease or other contaminant on the surface of the layer 9 formed in situ. Light extraction of the ϊ俨 ϊ俨 ’ ’ 吾 吾 吾 吾 吾 吾 吾 吾 吾 吾 吾 吾 吾 吾 吾 吾 吾 吾 吾 吾 吾 吾 吾 吾 吾 吾 吾 吾 吾 吾 吾 吾 吾 吾 吾 吾 吾 吾 吾 吾 吾 吾 吾 吾 吾 吾Such roughening can be achieved by light (PEC' photodectrochemical) oxidation and etching treatment. _ Photoelectrochemical oxidation-free device fo according to the embodiment of the invention. ^ Electrochemical oxidation etching apparatus 100 includes: illumination system 11 〇 = on the stage 150 in the discharge 140, and by using == Φ to completely immerse the light-emitting one-pole wafer 50 into the electrolyte solution system 130 according to 11G and the electric bias system 12G, to perform photoelectrochemical system 11G can have a spectrum of visible and ultraviolet light - TS soil, long range. In an embodiment of the invention, illumination system 110 is a Xe or Hg arc lamp having a wavelength range from 1 to 2 to ultraviolet light. The electric bias system 〇 can be used to apply an electrical bias and control the voltage between _5V and +5V for chemical oxidation and _ treatment. The electrolytic f-solute system 130 may be combined with an acidic solution or an experimental solution (IV), wherein the oxidizing agent may comprise one or a combination of τ 2 2〇8; the acidic solution may comprise h2S04, HF, HCl, HsPO4, KN〇3, And the CH3C〇〇h test solution may comprise K0H, Na0H, and a cross-sectional view of the woven light-emitting diode crystal cutter of the embodiment of the present invention. As shown in FIG. 3, after the % bismuth oxidation and the surname processing of the light-emitting diode wafer, the second surface 3b of the n-type quaternary nitride semiconductor layer 3 may exhibit an unordered etched pattern. Compared with the conventional p_GaN bonded to the reflective metal layer, the use of the light-emitting diode system of the present invention includes, for example, magnesium (Mg), zinc (Zn), Ming (A1), copper (four), 201029220 ^(Ga). In-situ formation of at least one of carbon (C), antimony (Si), and beryllium (Be), which improves the adhesion between the reflective metal layer and the p-type bismuth nitride semiconductor layer and the contact resistance . , 1 shows the peel test results of the conventional p_GaN (structure A) and the layer of the invention (structure B) under different tempering conditions, the result of which can show the conventional in-situ formation, and the in-situ formation of the present invention The layers (structure B) are respectively reflective metal. The structure A of Table 1 is formed by the following procedure: on its 412 pairs of wafers, the Ag-level is directly stored by the electron beam in the structure of the insect crystal structure by the following procedure: it has a 955 C circle On the surface of the in-situ layer formed by in-situ formation of the P_GaN layer of the P-GaN layer by metal organic chemical vapor deposition. The cleaning is performed, and the surface of the in-situ layer is formed on the gold layer by using propylene and isopropyl alcohol to form a reflection. The surface of the reflective metal # is peeled off by a cutter. The peel test method is: Peeling situation Table 1
附於反射金屬層的表面，然後撕下膠帶並且觀察反射金屬層表面 參 11 201029220 由表1的測試結果可知，相較於習知p_GaN，本發明之原位 形成層可對反射金屬層提供較佳的附著性。 ^然十發明已參考其示範實施例來進行說明，但本發明並不 限於這些示範實施例。具有此技術領域之通常知識者可瞭解在不 =開本發明之請求項所界定之精神與範圍的情形下，可進行各種 多改、變化、以及等效替代。因此，此種修改、變化、以及等效 替代皆屬於在本發明之請求項所界定的範圍内。 【圖式簡單說明】 鲁 在本發明之圖式中，以相同的參考符號表示相同的元件。 圖1A至圖1H顯示用以說明依照本發明之一實施例之發光二 極體製造程序的概略橫剖面圖； 、 圖2顯示依照本發明之一實施例的光電化氧化與蝕刻設 備；及 圖3顯不依照本發明之一實施例之已 二極體晶 圓的部分概略橫剖面圖。 【主要元件符號說明】 1基底 ® 3 η型HI族氮化物半導體層 3a第一表面 3b第二表面 5皿族氮化物活化層 7 P型皿族氮化物半導體層 9原位形成層 11溝渠 12台面 13反射金屬層 15非導電層 17晶種層 12 201029220 19金屬層 21 η型電極 50發光二極體晶圓 100 光電化學氧化與蝕刻設備 110 照明系統 120電偏壓系統 130 電解質溶液系統 140 容器 150 載台 160夹具 ❹Attached to the surface of the reflective metal layer, then tear off the tape and observe the surface of the reflective metal layer. 11 201029220 It can be seen from the test results of Table 1 that the in-situ layer of the present invention can provide a comparative layer to the reflective metal layer compared to the conventional p_GaN. Good adhesion. The invention has been described with reference to the exemplary embodiments thereof, but the invention is not limited to the exemplary embodiments. It will be apparent to those skilled in the art that various modifications, changes, and equivalents may be made without departing from the spirit and scope of the invention. Accordingly, such modifications, changes, and equivalents are intended to be within the scope of the claims. BRIEF DESCRIPTION OF THE DRAWINGS In the drawings of the present invention, the same elements are denoted by the same reference numerals. 1A-1H are schematic cross-sectional views showing a manufacturing procedure of a light emitting diode according to an embodiment of the present invention; and FIG. 2 is a view showing a photoelectric oxidation and etching apparatus according to an embodiment of the present invention; 3 shows a partial schematic cross-sectional view of a diode wafer in accordance with an embodiment of the present invention. [Main component symbol description] 1 substrate® 3 n-type HI-nitride semiconductor layer 3a first surface 3b second surface 5-cell nitride-activated layer 7 P-type nitride nitride semiconductor layer 9 in-situ layer 11 trench 12 Mesa 13 reflective metal layer 15 non-conductive layer 17 seed layer 12 201029220 19 metal layer 21 n-type electrode 50 light-emitting diode wafer 100 photoelectrochemical oxidation and etching apparatus 110 illumination system 120 electrical bias system 130 electrolyte solution system 140 container 150 stage 160 fixture❹