201028064 六、發明說明： 【發明所屬之技術領域】 本發明係有關於一種覆晶基板結構’且特別是有關於 一種改善覆晶基板變形之結構。 【先前技術】201028064 VI. Description of the Invention: [Technical Field] The present invention relates to a flip-chip substrate structure and, in particular, to a structure for improving deformation of a flip chip substrate. [Prior Art]
隨著電子產業的蓬勃發展’電子產品不斷地追求輕薄 短小，使得積體電路(Intergrated Circuit，1C)亦朝高積集度 (intergration)與微型化（miniaturization)發展，而提供呼多 主動與被動元件之電路板亦逐漸由傳統單層板演變成覆 晶（flip chip)多層板(雙面皆可與其他基板連接），俾於有限 的空間下’能提供更多可利用的電路佈線面積。 第1圖顯示一習知覆晶基板10〇的示意圖，此覆晶基 板100上具有上表面l〇〇a和下表面100b，於上表面上形 成上表面增層結構110，於下表面1〇〇b上形成下表面增 層結構120，由於增層線路結構之材料、結構、線路設^ 等不同，在生產過程中，受加熱或冷卻等製程影響，使覆 晶基板中各材料產生不同熱漲冷縮的現象，導致各層受力 不均而造成覆晶基板形成如圖la所示之向上彎曲或圖 lb所示的向下彎曲的結構。 口灣專利]S4333746提出一種印刷電路板板彎矯正條 結構，其可裝置於印刷電路板邊緣位置上，並可矯正或防 止印刷電路板彎曲的現象。習知解決基板彎曲的方法，另 外可選用低鱗脹係數之材料，以減少祕冷縮的現象。 然而，上4所提出之方法，實際應用時皆有其製程上 的困難’因此，業界亟需找到一種能改善覆晶基板變形的 9024-A51368-TW/097006 201028064 方法。 r 【發明内容】 本發明提供一種改善覆晶基板變形之結構，包括：提 供一覆晶基板，其中該覆晶基板上具有上表面與相反之下 表面；一對第一金屬線路層，形成於該上表面與該下表面 之上；一對介電層，形成於該對第一金屬線路層之上；一 對第二金屬線路層，形成於該對介電層之上；一對抗焊絕 緣層，形成於該對第二金屬線路層之上，其中位於該上表 ❹面、該下表面上方之兩抗焊絕緣層、兩第二金屬線路層或 兩介電層之厚度差至少約5 μιη。 本發明另外提供一種改善覆晶基板變形之結構，包括 提供一覆晶基板，其中該覆晶基板上具有上表面第一金屬 線路層與下表面第一金屬線路層；一上表面增層結構，形 成於該上表面金屬線路層之上，其中該上表面增層結構包 括一上表面介電層與一上表面第二金屬線路層；複數層下 表面增層結構，形成於該下表面第一金屬線路層之上，其 φ 中該下表面增層結構包括複數層下表面介電層與複數層 下表面第二金屬線路層；一抗焊絕緣層，形成於該上表面 增層結構與該下表面增層結構之最後一層之上。 為讓本發明之上述和其他目的、特徵、和優點能更明 顯易懂，下文特舉出較佳實施例，並配合所附圖式，作詳 細說明如下： 【實施方式】 以下將配合所附圖式詳細說明本發明實施例之改善 覆晶基板變形的方法。須注意的是，該些圖式均為簡化之 9024-Α51368-TW/097006 4 201028064 示意圖，以強調本發明之特徵，因此圖中之元件尺寸並非 完全依實際比例繪製。且本發明之實施例也可能包含圖中 未顯示之元件。 請參閱第2圖到第5圖，將詳細說明本發明中提供改 善覆晶基板變形的方法之實施例。請參閱第2圖，為一種 改善覆晶基板變形之結構，首先提供一覆晶基板2〇〇，此 覆晶基板200具有上表面2〇〇a與相反之下表面2〇卟，其 中覆晶基板200之核心材質包括紙質酚醛樹脂②叩打 phenolic resin)、複合環氧樹脂（c〇mp〇site印⑽力、聚亞酸 胺樹月曰（polyimide resin)或玻璃纖維（giass fiber)。此處需注 意的是，本發明之覆晶基板2〇〇包括核心板或多層板，所 謂核心板係指由上述核心材質組成之基板，而多層板係指 内部有多層線路結構，例如包括内部核心板，介電層，金 屬線路層等多層結構。另外，本發明之覆晶基板之形式並 不以此為限’其他覆晶基板之形式亦在本發明所保護的範 圍内。 於覆晶基板200之上表面200a與下表面200 b上形 參成一對第一金屬線路層201、202,其中第一金屬線路層 201、202包括銅、銘、錄、金或上述之組合，而形成第 一金屬線路層201、202之方法係使用錢艘（sputtering)、 壓合（laminate)或塗佈（coating)製程。接著於第一金屬線路 層201、202之上形成一對介電層203、204，其中介電 層203、204之材質包括環氧樹腊（epoxy resin)、雙馬來亞 醜胺-三氮雜苯樹脂（bismaleimide triacine，BT)、ABF 膜 (ajinomoto build-up film)、聚苯醚(poly phenylene oxide, PPE)或聚四氣乙稀（polytetrafluorethylene，PTFE)，而形成 5 9024-A51368-TW/097006 201028064 介電層203、204之方式例如利用物理方式（塗佈、熱壓合 等）。 ’ 接著，於介電層203、204之上形成一對第二金屬線 路層205、206，其中第二金屬線路層205、206包括銅、 鋁、鎳、金或上述之組合，而形成第二金屬線路層205、 206之方式’包括雷射鑽孔、去膠渣、無電極電鍍、電鍍、 影像轉移製程等，上述製程皆為此技藝人士所熟之，在此 不再贅述，此處需注意的是，第二金屬線路層205、206 中之線路電性連接至覆晶基板200之内部線路，在此為簡 _ 化說明，並未繪製出實際之線路。 之後’於第二金屬線路層205、206之上形成一對抗 焊絕緣層207、208’此抗焊絕緣層207、208例如為綠漆， 其作用在於保護内部的線路’避免内部線路被氧化，而本 發明之主要技術特徵在於兩抗焊絕緣層207、208之厚度 差至少約5 μπι。 Φ 由於覆晶基板200可能形成如第la圖所示之向上f 曲結構’為改善板向上彎曲之現象，本發明第2圖中，上 表面200a方向之抗焊絕緣層207之厚度dl大於下表面方 向200b之抗焊絕緣層208之厚度屯，且兩厚度之^至少 約5 μπι ’此技藝人士可依實際板彎之情況，對厚度差〔 行適當的調整’以改善覆晶基板200板彎的問題。=外， 當覆晶基板200向下彎曲時，亦可對兩抗焊絕緣層2〇7、’ 208之厚度作適當調整，其調整方向與上述相反，θ係將上 表面200a方向之抗焊絕緣層207之厚度^小於 200b方向之抗焊絕緣層208之厚度d2，间^ a、滅、面 度之差至少約5 μπι。 + 9024-Α513 68-TW/097006 201028064 再者，由於實際製備之覆晶基板各層結構組成不一， 加上實際製程之步驟非常繁瑣，為有效解決覆晶基板200 板彎的問題，因此’本發明實際應用時，需先利用對一組 測試組進行一系列實驗’確認覆晶基板之板彎方向與板彎 程度，再依板彎程度與方向，對覆晶基板各層做厚度之調 整，直到厚度調整能改善板彎問題後，再對整批覆晶基板 進行相同的製程，藉由此方法，能避免整批的覆晶基板因 為板彎問題而報廢，而大幅提高良率。 本發明之另一實施例，如第3圖所示，其中標號與第 ❹2圖相同者，代表相同之結構，在此不再贅述。當基板呈 現如第lb圖所示之向下彎曲時，形成於下表面2〇〇b方向 之第二金屬線路層206a之厚度d4大於形成於上表面2〇〇a 方向之第二金屬線路層205a之厚度d3，兩者厚度之差約 至少約5 μπι。同樣地，若覆晶基板200呈現如第ia圖向 上彎曲時，亦可對兩第二金屬線路層205a、206a之厚度 作適當調整’其調整方向與上述相反，使厚度d3大於厚 度d4。 φ 本發明另外之實施例，如第4圖所示，其中標號與第 2圖相同者，代表相同之結構，在此不再贅述。當基板呈 現如第lb圖所示之向下彎曲時，形成於下表面200b方向 之介電層204a之厚度d6大於形成於上表面200a方向之 介電層203a之厚度d5,兩者厚度之差至少約5 μπι。同樣 地，若覆晶基板200呈現如第la圖向上彎曲時，亦可對 厚度作相反之調整。 本發明之改善覆晶基板變形之方法，並不限於上述提 及對抗焊絕緣層207、208作厚度之調整，亦可對第二金 9024-A51368-TW/097006 7 201028064 屬，路層205、206或介電層2〇3、2〇4之厚度作調整，此 技藝人士，可針對製程需要與評估板情況，針=曰 板上各層之厚度作最佳化之調整。 本發明另外提供一種改善覆晶基板變形之結構，請參 見第5圖，其中標號與第2圖相同者，代表相同之結 在此不再贅述。當基板呈現如第lb圖所示之向下°彎曲 時，形成於上表面200a方向之上表面介電層2〇3與上表 面第一金屬線路層205，兩者合稱為上表面2〇〇a之增 結構510,而形成於下表面方向之下表面介電層曰綱 與下表面第二金屬線路層2G6合稱為下表面之A增層結 構520，此技藝人士，可依照覆晶基板2〇〇板彎之程度， 積於下表面增層結構之層數，於最後—層B增層結 構20之上形成一抗焊絕緣層2〇8。 由於覆晶基板2GG的下表面2()% 於上表面2GGa方向增層線路，因此=的增層線路夕 vi ^ m b ^ ^ 藉由不對稱的結構 以改善覆晶基板200向下彎曲的問題 ， 參 士，可針對製程需要與評估板彎情況， 者， 食人 數作最佳化之調整，並不限於固定的層‘對增層線路之層 另外’當覆晶基板200向上彎曲時^ 200a方向之增層結構的層數大於形成扒則形成於上表面 之增層結構的層數。 "下表面200b方向 本發明提供之改善覆晶基板變形 於： 夕支結構，其優點在 (1)利用調整介電層、金屬線路層 度，即可改善覆晶基板彎曲的問題，&二抗焊絕緣層之厚 術容易。 智攝作上比先前技 9024-A51368-TW/097006 8 201028064 (2)藉由不對稱結構之設計，同樣能改善覆晶基板彎 曲的問題，藉以提高封裝的良率。 雖然本發明已以數個較佳實施例揭露如上，然其並非 用以限定本發明，任何所屬技術領域中具有通常知識者， 在不脫離本發明之精神和範圍内，當可作任意之更動與潤 飾，因此本發明之保護範圍當視後附之申請專利範圍所界 定者為準。With the booming development of the electronics industry, electronic products are constantly pursuing lightness and thinness, which makes the integrated circuit (1C) also develop towards high-integration and miniaturization. The circuit board of the component has gradually evolved from a conventional single-layer board to a flip chip multi-layer board (both sides can be connected to other substrates), and it can provide more available circuit wiring area in a limited space. 1 is a schematic view showing a conventional flip-chip substrate 10 having an upper surface 10a and a lower surface 100b, and an upper surface buildup structure 110 formed on the upper surface. The lower surface build-up structure 120 is formed on the 〇b. Due to the different materials, structures, and circuit settings of the build-up line structure, in the production process, the materials in the flip-chip substrate generate different heats due to heating or cooling processes. The phenomenon of shrinkage and shrinkage causes the unevenness of the layers to cause the flip-chip substrate to form an upward curved shape as shown in FIG. 1a or a downwardly curved structure as shown in FIG. Bay Patent No. S4333746 proposes a printed circuit board bending correction strip structure which can be placed at the edge of the printed circuit board and which can correct or prevent the bending of the printed circuit board. Conventionally, a method of solving the bending of the substrate can be used, and a material having a low squash coefficient can be additionally used to reduce the phenomenon of secret shrinkage. However, the method proposed in the above 4 has its manufacturing difficulties in practical applications. Therefore, the industry needs to find a method for improving the deformation of the flip chip substrate by 9024-A51368-TW/097006 201028064. The present invention provides a structure for improving the deformation of a flip chip substrate, comprising: providing a flip chip substrate, wherein the flip chip substrate has an upper surface and an opposite lower surface; and a pair of first metal circuit layers are formed on Above the upper surface and the lower surface; a pair of dielectric layers formed on the pair of first metal circuit layers; a pair of second metal circuit layers formed on the pair of dielectric layers; a solder resist insulation a layer formed on the pair of second metal wiring layers, wherein the upper surface of the upper surface, the two solder resist layers above the lower surface, the two second metal wiring layers or the two dielectric layers have a thickness difference of at least about 5 Ιιη. The present invention further provides a structure for improving deformation of a flip chip substrate, comprising: providing a flip chip substrate having a first metal circuit layer on the upper surface and a first metal circuit layer on the lower surface; and an upper surface buildup structure, Formed on the upper surface metal circuit layer, wherein the upper surface buildup structure comprises an upper surface dielectric layer and an upper surface second metal circuit layer; a plurality of lower surface surface buildup structures formed on the lower surface first Above the metal circuit layer, the lower surface buildup structure of φ includes a plurality of lower surface dielectric layers and a plurality of lower surface second metal circuit layers; a solder resist insulating layer formed on the upper surface buildup structure and Above the last layer of the underlying layered structure. The above and other objects, features, and advantages of the present invention will become more <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; The drawings illustrate in detail a method of improving the deformation of a flip chip substrate in accordance with an embodiment of the present invention. It should be noted that these figures are simplified schematics of 9024-Α51368-TW/097006 4 201028064 to emphasize the features of the present invention, and thus the component sizes in the drawings are not drawn to full scale. Embodiments of the invention may also include elements not shown in the figures. Referring to Figures 2 through 5, an embodiment of a method for improving the deformation of a flip chip substrate in the present invention will be described in detail. Referring to FIG. 2, in order to improve the structure of the flip-chip substrate, a flip-chip substrate 2 is provided. The flip-chip substrate 200 has an upper surface 2〇〇a and an opposite lower surface 2〇卟, wherein the flip chip The core material of the substrate 200 includes paper phenolic resin 2, phenolic resin, composite epoxy resin, polyimide resin or giass fiber. It should be noted that the flip chip substrate 2 of the present invention includes a core board or a multi-layer board, the so-called core board refers to a substrate composed of the above core material, and the multi-layer board refers to a multi-layer circuit structure inside, for example, including an inner core board. The multilayer structure of the dielectric layer, the metal wiring layer, etc. Further, the form of the flip chip substrate of the present invention is not limited thereto, and the form of the other flip chip substrate is also within the scope of the present invention. The upper surface 200a and the lower surface 200b are formed into a pair of first metal wiring layers 201, 202, wherein the first metal wiring layers 201, 202 comprise copper, inscription, recording, gold or a combination thereof to form a first metal line The method of layers 201, 202 is a sputtering, laminating or coating process. A pair of dielectric layers 203, 204 are then formed over the first metal wiring layers 201, 202, wherein The materials of the dielectric layers 203 and 204 include epoxy resin, bismaleimide triacine (BT), abinomoto build-up film, polyphenylene ether. (poly phenylene oxide, PPE) or polytetrafluorethylene (PTFE), and forms 5 9024-A51368-TW/097006 201028064 dielectric layers 203, 204, for example, by physical means (coating, thermocompression, etc.) Next, a pair of second metal wiring layers 205, 206 are formed over the dielectric layers 203, 204, wherein the second metal wiring layers 205, 206 comprise copper, aluminum, nickel, gold or a combination thereof to form The method of the second metal circuit layer 205, 206 includes laser drilling, desmear, electroless plating, electroplating, image transfer process, etc., and the above processes are familiar to those skilled in the art, and will not be described here. It should be noted that the second metal circuit layer 205 The line in 206 is electrically connected to the internal circuit of the flip-chip substrate 200. Here, for the sake of simplicity, the actual circuit is not drawn. Then, a solder resist is formed on the second metal circuit layer 205, 206. The layers 207, 208' of the solder resist layers 207, 208 are, for example, green lacquers, which serve to protect the internal wiring 'to prevent internal lines from being oxidized, and the main technical feature of the present invention is the thickness of the two solder resist layers 207, 208. The difference is at least about 5 μπι. Φ Since the flip-chip substrate 200 may form an upward f-curve structure as shown in FIG. 1A to improve the upward bending of the plate, in the second embodiment of the present invention, the thickness dl of the solder resist insulating layer 207 in the direction of the upper surface 200a is larger than that. The thickness of the solder resist layer 208 in the surface direction 200b is 屯, and the thickness of the two layers is at least about 5 μm. The person skilled in the art can adjust the thickness difference according to the actual bending condition to improve the flip chip substrate 200. The problem of bending. When the flip chip substrate 200 is bent downward, the thicknesses of the two solder resist layers 2〇7 and '208 may be appropriately adjusted, and the adjustment direction is opposite to the above, and the θ is the anti-welding of the upper surface 200a direction. The thickness of the insulating layer 207 is less than the thickness d2 of the solder resist layer 208 in the direction of 200b, and the difference between the ab, the extinction and the face is at least about 5 μm. + 9024-Α513 68-TW/097006 201028064 Furthermore, since the actual composition of the flip-chip substrate is different, the actual process steps are very cumbersome, so as to effectively solve the problem of the flip-chip substrate 200 plate bending, In the actual application of the invention, it is necessary to carry out a series of experiments on a group of test groups to confirm the bending direction of the flip-chip substrate and the degree of bending of the plate, and then adjust the thickness of each layer of the flip-chip substrate according to the degree and direction of the plate bending until After the thickness adjustment can improve the plate bending problem, the same process can be performed on the entire batch of flip-chip substrates. By this method, the entire batch of flip-chip substrates can be avoided due to the plate bending problem, and the yield is greatly improved. Another embodiment of the present invention, as shown in Fig. 3, wherein the same reference numerals as in Fig. 2 denote the same structures, will not be described again. When the substrate is bent downward as shown in FIG. 1b, the thickness d4 of the second metal wiring layer 206a formed in the lower surface 2〇〇b direction is larger than the second metal wiring layer formed in the direction of the upper surface 2〇〇a The thickness d3 of 205a, the difference between the thicknesses of the two is about at least about 5 μm. Similarly, if the flip chip substrate 200 is bent upward as shown in Fig. ia, the thicknesses of the two second metal wiring layers 205a, 206a can be appropriately adjusted. The adjustment direction is opposite to the above, so that the thickness d3 is larger than the thickness d4. The other embodiment of the present invention, as shown in Fig. 4, wherein the same reference numerals as in Fig. 2 denote the same structures, will not be described again. When the substrate is bent downward as shown in FIG. 1b, the thickness d6 of the dielectric layer 204a formed in the direction of the lower surface 200b is larger than the thickness d5 of the dielectric layer 203a formed in the direction of the upper surface 200a, and the difference between the thicknesses At least about 5 μπι. Similarly, if the flip chip substrate 200 is bent upward as shown in Fig. 1, the thickness can be adjusted inversely. The method for improving the deformation of the flip-chip substrate of the present invention is not limited to the above-mentioned adjustment of the thickness of the anti-welding insulating layer 207, 208, and may also belong to the second gold 9024-A51368-TW/097006 7 201028064, the road layer 205, The thickness of the 206 or dielectric layers 2〇3, 2〇4 is adjusted, and the skilled person can optimize the thickness of each layer on the plate for the process requirements and the evaluation board. The present invention further provides a structure for improving the deformation of the flip-chip substrate. Please refer to Fig. 5, wherein the same reference numerals as in Fig. 2 denote the same knots and will not be described again. When the substrate is bent downward as shown in FIG. 1b, the surface dielectric layer 2〇3 and the upper surface first metal wiring layer 205 are formed in the upper surface 200a direction, which are collectively referred to as the upper surface 2〇. 〇a is added to structure 510, and surface dielectric layer 与 and lower surface second metal wiring layer 2G6 are collectively referred to as lower surface A build-up structure 520 formed under the lower surface direction, and the person skilled in the art can follow the flip chip The extent to which the substrate 2 is bent, the number of layers accumulated in the lower surface, and a solder resist insulating layer 2〇8 formed on the last layer B buildup structure 20. Since the lower surface 2()% of the flip-chip substrate 2GG is layered in the direction of the upper surface 2GGa, the build-up line of ==vi^mb^^ is improved by an asymmetric structure to improve the downward bending of the flip-chip substrate 200. , Senshi, can adjust the process requirements and evaluation board bending conditions, the number of people to optimize the adjustment, not limited to the fixed layer 'on the layer of the additional layer line' when the flip-chip substrate 200 is bent upwards ^ 200a The number of layers of the buildup structure in the direction is larger than the number of layers of the buildup structure formed on the upper surface. "The lower surface 200b direction The present invention provides the improvement of the flip-chip substrate deformation: the yoke structure, the advantages of which are (1) the use of adjusting the dielectric layer, the metal circuit layer degree, can improve the problem of the flip-chip substrate bending, & The thickness of the second solder resist layer is easy. Intelligent shooting is better than the previous technology. 9024-A51368-TW/097006 8 201028064 (2) The design of the asymmetric structure can also improve the bending of the flip-chip substrate, thereby improving the yield of the package. While the invention has been described above in terms of several preferred embodiments, it is not intended to limit the scope of the present invention, and it is possible to make any changes without departing from the spirit and scope of the invention. And the scope of the present invention is defined by the scope of the appended claims.
9024-A51368-TW/097006 201028064 【圖式簡單說明】 第la、lb圖為一系列剖面圖，用以說明覆‘基板變形 之結構。 第2〜5圖為一系列剖面圖，用以說明本發明四個實施 例。 【主要元件符號說明】 100〜覆晶基板， 100a〜上表面； φ 100b〜下表面； .110〜上表面增層結構； 120〜下表面增層結構； 200〜覆晶基板， 200a〜上表面； 200b〜下表面； 201〜上表面第一金屬線路層； 202〜下表面第一金屬線路層； ^ 203、203a、204、204,、204,，〜介電層； 205、205a、206、206’、206”〜第二金屬線路層； 207、208〜抗焊絕緣層； 510 ~上表面之增層結構； 520〜下表面之A增層結構； 520’〜下表面之B增層結構； 山、d2〜抗焊絕緣層之厚度； d3、d4〜第二金屬線路層之厚度； d5、d6〜介電層之厚度。 9024-A51368-TW/097006 109024-A51368-TW/097006 201028064 [Simple description of the drawings] The first and lb diagrams are a series of sectional views for explaining the structure of the slab deformation. Figures 2 through 5 are a series of cross-sectional views for illustrating four embodiments of the present invention. [Main component symbol description] 100~ flip chip substrate, 100a~ upper surface; φ 100b~ lower surface; .110~ upper surface buildup structure; 120~ lower surface buildup structure; 200~ flip chip substrate, 200a~ upper surface 200b~lower surface; 201~ upper surface first metal circuit layer; 202~lower surface first metal circuit layer; ^203, 203a, 204, 204, 204,,~ dielectric layer; 205, 205a, 206, 206', 206"~ second metal circuit layer; 207, 208~ solder resistive layer; 510 ~ buildup structure of upper surface; A buildup structure of 520~ lower surface; B buildup structure of 520'~ lower surface ; thickness of the mountain, d2 ~ solder resist layer; d3, d4 ~ thickness of the second metal circuit layer; d5, d6 ~ thickness of the dielectric layer. 9024-A51368-TW/097006 10