TW201013818A - Apparatus and method for manufacturing poly-si thin film - Google Patents
Apparatus and method for manufacturing poly-si thin film Download PDFInfo
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Abstract
Description
201013818 六、發明說明： 【發明所屬之技術領域】 剛本發_於—㈣造多裝置及方法，更特定 言之係關於藉由向基板供電以便產生焦耳熱的方式製造 多晶矽薄膜的裝置及方法。 【先前技術】 [0002] -般而言，非晶碎具有作為電荷栽子之電子的低遷移率 及一低孔徑比，且不適用於CM〇s製程。 另一方面，在多晶矽薄膜電晶體（m)中，可將向像素 提供影像信號所必霧·^職路資裝在基板上，例如用 在一像素TFT||:列中，但如此。 因此，在多晶珍TFT中，複與—驅_ 保持接觸，使得鱗雜板厚度可 減小。 由於在多晶矽TFT製程中可採用f LSI之微處理，微互連 部可能生成_。 it： ΓΓ :… 據此，由於發生於非晶矽TF；j|^y玫上安裝驅動ic並沒 有節距限制，像素縮小係數個像素可在一小 像素角内實現。 相較於使用非晶矽的TFT，使用多晶矽當作半導體層的 TFT具有高切換能力，且藉由自對準作用決定半導體層上 之通道位置，使得器件之尺寸縮小及CMOS技術之應用為 可行。 因此’多晶矽TFT已變成眾所矚目用於大型顯示器之一關 鍵器件’當作主動矩陣式平板顯示裝置（例如液晶顯示 裝置或有機發光二極體顯示裝置）之一像素開關器件及 098128430 表單編號A0101 第4頁/共39頁 nq8 201013818 内有一驅動器之玻璃上置晶片（C〇G)的實務使用。 製造此種多晶矽TFT之方法包含高溫法及低溫法。就高溫 法來說，必須使用一南成本材料譬如石英當作基板，這 不適合大型顯示器。 因此’頃已積極發展關於以低溫法大規模地將一非晶發 薄膜轉變成一多晶石夕薄膜之方法的研究。 在低溫形成多晶矽之方法的實例包含固相結晶化（SPC) 響 、金屬誘致結晶化（MIC)、金屬誘致側向結晶化（ΜΙΙχ )、準分子雷射結晶化（ELC)等方法。201013818 VI. Description of the Invention: [Technical Field] The present invention relates to a device and method for fabricating a polycrystalline germanium film by means of supplying power to a substrate to generate Joule heat. . [Prior Art] [0002] In general, amorphous chips have low mobility and a low aperture ratio of electrons as charge carriers, and are not suitable for the CM〇s process. On the other hand, in the polycrystalline germanium thin film transistor (m), it is possible to mount the image signal to the pixel on the substrate, for example, in a pixel TFT||: column, but this is the case. Therefore, in the polycrystalline TFT, the complex and the drive are kept in contact, so that the thickness of the scale can be reduced. Since micro-processing of f LSI can be employed in a polysilicon TFT process, the micro-interconnect may generate _. It: ΓΓ :... According to this, since the driving ic is mounted on the amorphous 矽 TF; j|^y rose without the pitch limitation, the pixel reduction factor pixels can be realized in a small pixel angle. Compared with TFTs using amorphous germanium, TFTs using polysilicon as a semiconductor layer have high switching capability, and the position of the channel on the semiconductor layer is determined by self-alignment, so that the size of the device is reduced and the application of CMOS technology is feasible. . Therefore, 'polycrystalline germanium TFT has become a key component for large-scale displays' as an active matrix flat panel display device (such as liquid crystal display device or organic light-emitting diode display device) pixel switching device and 098128430 form number A0101 Page 4 of 39 nq8 201013818 There is a practical use of the glass-on-chip (C〇G) of the driver. A method of manufacturing such a polycrystalline germanium TFT includes a high temperature method and a low temperature method. In the case of high temperature methods, a south cost material such as quartz must be used as the substrate, which is not suitable for large displays. Therefore, research on a method of converting an amorphous film into a polycrystalline film by a low temperature method has been actively developed. Examples of the method of forming polycrystalline germanium at a low temperature include solid phase crystallization (SPC), metal induced crystallization (MIC), metal induced lateral crystallization (ΜΙΙχ), and excimer laser crystallization (ELC).
I*使用具有 基板卜且生產率 SPC法可確保使用低成本設備獲得一致晶體品質，但由於 其需要一高結晶化溫度及 一相對較低熱變形溫度的 為低。 .... . ... ....... 依據SPC法’結晶作業通常可藉由使非晶珍在6〇〇它至 700°C退火約1至24小時的方式進行。 此外，由SPC法形成之多晶_麥鑊-肴薯!^||晶態變成結晶I* uses a substrate and productivity SPC method ensures consistent crystal quality with low cost equipment, but it requires a high crystallization temperature and a relatively low heat distortion temperature. .... . . . . . . The crystallization operation according to the SPC method can usually be carried out by annealing the amorphous layer at 6 Torr to 700 ° C for about 1 to 24 hours. In addition, the polycrystalline _Mike-sweet potato formed by the SPC method!^||
態之固相轉變的兩次晶體生裏· 辱得晶粒中會含有The solid phase transformation of the two crystals in the insults will contain
許多晶格缺陷。uG 這些因子降低製得多晶矽TFT之電子及電洞的遷移性性， 且提高閾電壓。 依據MIC法，結晶作業係在一低於spc法之結晶溫度的實 質較低溫度進行，因為非晶矽與一特定金屬保持接觸。 用於MIC法的金屬包含鎳（Ni)、鈀（Pd)、鈦（Ti) 、銘（A1)、銀（Ag)、金（Au)、鈷（Co)、銅（cu )、鐵（Fe)、及錳（Mn)，這些金屬每一者皆與非晶 矽反應’從而形成共晶相或矽化物相，且刺激低溫結晶 098128430 表單編號A0101 第5頁/共39頁 0983384716-0 201013818 作用。 但在一種製造多晶矽TFT的實務程序中，MIC法會因為該 等金屬而在通道中引發嚴重污染。 MILC法是MIC法的一種應用，其包含在一通道上形成一閘 電極取代沈積一金屬，在一自準直結構中於一源極和一 汲極上沈積一薄金屬以進行金屬誘致結晶作用，且朝該 通道誘發側向結晶作用。Many lattice defects. uG These factors reduce the mobility of electrons and holes in the polysilicon TFT and increase the threshold voltage. According to the MIC method, the crystallization operation is carried out at a substantially lower temperature than the crystallization temperature of the spc method because the amorphous ruthenium is kept in contact with a specific metal. The metal used in the MIC method includes nickel (Ni), palladium (Pd), titanium (Ti), indium (A1), silver (Ag), gold (Au), cobalt (Co), copper (cu), iron (Fe). And manganese (Mn), each of which reacts with amorphous yttrium to form a eutectic phase or a yttrium phase, and stimulates low temperature crystallization 098128430 Form No. A0101 Page 5 of 39 Page 0983384716-0 201013818 Function . However, in a practical procedure for fabricating polycrystalline germanium TFTs, the MIC method causes severe contamination in the channels due to the metals. The MILC method is an application of the MIC method, which comprises forming a gate electrode on a channel instead of depositing a metal, depositing a thin metal on a source and a drain in a self-collimating structure for metal induced crystallization, And lateral crystallization is induced toward the channel.
就此MILC法來說，主要使用Ni和Pd。已知由MILC法形成 之多晶矽的結晶性及場效遷移性優於由PSC法形成之多晶 石夕，但有一大漏電流》' 也就是說，儘管此種方法減W&MIC法·中發生之金屬污染， § 場輔助側向 其無法完食克服此問題。¢-在此同，時，'依據MILC法之改£， 結晶化（F ALC )方法》F ALC法具有一高結晶速率及一結 晶方向中之異向性，然此種方法也無法完全克服金屬污 染問題。 InfijiiectyaiFor this MILC method, Ni and Pd are mainly used. It is known that the crystallinity and field effect mobility of polycrystalline germanium formed by the MILC method is superior to that of polycrystalline silicon formed by the PSC method, but there is a large leakage current"', that is, although this method is subtracted from the W&MIC method. Occurrence of metal contamination, § Field assisted side to overcome this problem. ¢- At the same time, the 'F ALC method according to the change of the MILC method, F ALC method has a high crystallization rate and an anisotropy in a crystal direction, but this method cannot be completely overcome. Metal pollution problem. Infijiiectyai
以上所述結晶化方法，包含Ιίΐέ人亡灰FALC法，相較 於spc法皆有效地降低結晶ϋ。振是，這些方法全部需 要一長結晶時間，且都是金屬誘致結晶化方法。因此， 這些方法皆不免於金屬污染問題。 新近發展的ELC法解決金屬污染的問題，且能夠透過一低 溫程序在一玻璃基板上製造一多晶石夕薄膜。 也就是說，由低溫化學氣相沈積術（LPCVD)或電漿增強 化學氣相沈積術（PECVD)沈積的祚晶矽薄膜對於紫外光 範圍（又= 308 nm)具有極高吸收係數，該範圍係一準 分子雷射波長，使得非晶矽薄膜在一適當能量密度下輕 098128430 表單編號A0101 第6頁/共39頁 0983384716-0 201013818 易地溶化。 當利用準分子雷射使非晶石夕薄膜結晶化時，炫化及固化 作用皆在一段極短的時間内發生。就此而論，嚴格來說 ，ELC法並非一種低溫程序。 但在ELC法中，結晶作業包含熔化及固化，這些作用在— 受到準分子雷射重度影響的局部熔化區域中非常快迷地 進行。因此，多晶矽可在一段極短的時間（以幾十毫微 秒為單位）内形成而不損及基板。 Ο 也就是說，當一雷射施加於包含玻璃基板、絕緣層及非 晶矽薄膜之結構的母材料（非晶矽）一段極短時間時， 僅有非晶矽薄膜被選擇性地·今;丨熱、f因#發牟結晶作用 而不損及下伏玻璃基板。·\ν 無i :)每二命r:我 此外，在★液相變成導::相發具有一 更熱力學穩定的晶粒結構，且晶粒中之缺陷遠少於透過 固相結晶作用產生之多晶發。因此_’藉.由ELC法形成的多 晶矽具有優於由其他結晶4_幾1^111^物質的特性The above crystallization method, which comprises the LCίΐέ human ash FALC method, is effective in reducing crystallization enthalpy compared to the spc method. The vibration is that all of these methods require a long crystallization time and are all metal induced crystallization methods. Therefore, these methods are not immune to metal pollution problems. The newly developed ELC method solves the problem of metal contamination and is capable of fabricating a polycrystalline film on a glass substrate through a low temperature process. That is, a germanium film deposited by low temperature chemical vapor deposition (LPCVD) or plasma enhanced chemical vapor deposition (PECVD) has a very high absorption coefficient for the ultraviolet range (again = 308 nm), which is a range. A pseudo-molecular laser wavelength such that the amorphous germanium film is lighter at an appropriate energy density 098128430 Form No. A0101 Page 6 of 39 Page 0983384716-0 201013818 Easily melts. When amorphous lasers are used to crystallize amorphous Aussie films, both smearing and curing occur in a very short period of time. In this connection, strictly speaking, the ELC method is not a low temperature program. However, in the ELC method, the crystallization operation involves melting and solidification, and these effects are very fascinating in the localized melting region affected by the excimer laser. Therefore, the polysilicon can be formed in a very short period of time (in units of several tens of nanoseconds) without damaging the substrate. Ο In other words, when a laser is applied to a mother material (amorphous germanium) containing a glass substrate, an insulating layer, and an amorphous germanium film for a very short period of time, only the amorphous germanium film is selectively present. ; heat, f due to # 牟 crystallization does not damage the underlying glass substrate. · \ν 无 i :) Every second life r: In addition, in the liquid phase becomes:: The phase has a more thermodynamically stable grain structure, and the defects in the grains are much less than those produced by solid phase crystallization. Polycrystalline hair. Therefore, _’ borrows. The polycrystalline germanium formed by the ELC method has properties superior to those of other crystalline 4_1^111^ substances.
。 _ j Property 不過ELC法有一些關S性缺W:雷射系統施加之雷 射束之劑量不一致的問題’雷射處理有一造成粗晶粒之 雷射能量密度之最終有限處理面積的問題，及一大面積 中之照射殘跡（shot stain)的問題》 有限處理面積及照射殘跡導致構成多晶矽TFT之有源層的 多晶發薄膜之晶粒大小不一。此外，藉由從液相變成固 相之相變產生的多晶矽會加大體積，致使發生從晶粒邊 界生成處朝向一表面之嚴重突起作用》 此突起作用直接影響一欲在後續程序中形成之閘絕緣層 098128430 表單編號A0101 第7頁/共39頁 0983384716-0 201013818 ’且嚴重影響裝置之可靠度，包含因為多晶石夕與閘絕緣 層間之介面處的不一致平坦度導致絕緣擊穿電壓減低， 及熱載子應力。 為解決上述ELC法之不穩定性，一種新近發展的序列側向 固化（SLS)方法達成雷射能量密度之處理面積的穩定化. _ j Property However, the ELC method has some S-deficiencies. W: The problem of the inconsistent dose of the laser beam applied by the laser system. 'Laser processing has a problem of causing the final limited processing area of the laser energy density of the coarse grain, and The problem of the shot stain in a large area. The limited processing area and the irradiation residue cause the crystal grain size of the polycrystalline film constituting the active layer of the polycrystalline germanium TFT to be different. In addition, polycrystalline germanium produced by a phase change from a liquid phase to a solid phase increases the volume, causing a severe protrusion from the grain boundary formation toward a surface. This protrusion effect directly affects the formation of a subsequent process. Brake Insulation 098128430 Form No. A0101 Page 7 / Total 39 Page 0983384716-0 201013818 'And seriously affects the reliability of the device, including the insulation breakdown voltage due to inconsistent flatness at the interface between the polysilicon and the gate insulation , and hot carrier stress. In order to solve the instability of the above ELC method, a newly developed sequence lateral solidification (SLS) method achieves stabilization of the processing area of laser energy density.
但是，其未能克服照射殘跡及朝表面突起的問題。此外 ，考慮到快速發展的平板顯示器產業之當前趨勢，將雷 射用於使將來會有必要大量生產之1 mxl m或更大尺寸之 基板結晶化的程序仍有問題、 再者，用於ELC法和SLS法 的初期投資和維護。 因此，需要一種使非晶矽However, it failed to overcome the problem of illuminating the remnants and protruding toward the surface. In addition, in view of the current trend of the rapidly developing flat panel display industry, there are still problems in using lasers to crystallize substrates of 1 mxl or larger substrates which will be mass-produced in the future, and further, for ELC. Initial investment and maintenance of the law and the SLS method. Therefore, there is a need for an amorphous germanium
故需要高額 其要有雷 射結晶化方法的優點，亦即短處理時間、不損及下伏基 板、及因為高溫相變而幾乎沒有缺陷之高品質晶粒的產 製’但會克服雷射結晶化;戚:丨卩施加雷射束Therefore, it is necessary to have a high degree of laser crystallization method, that is, short processing time, no damage to the underlying substrate, and high-quality crystal grains with almost no defects due to high-temperature phase transition, but the laser is overcome. Crystallization; 戚: 丨卩 applied laser beam
之劑量之不一致性及依據4旆之漆理限制、以及高 成本設備之使用。 、： 特定言之，一種當前在次世代平板顯示器之應用中極受 矚目的主動矩陣式有機發光二極體被以一電流驅動方法 操作，而TFT-LCD係以一電壓駆動方法操作。 因此’大尺寸基板中之晶粒大小的一致性變成極為關鍵 的因子。為此之故，使用雷射經由ELC法或SLS法進行之 低溫結晶作業有其極限，此為平板顯示器產業當前面對 的問題。有鑑於此，不使用雷射而藉由低溫結晶化作用 098128430 製造高品質多晶發薄膜的新技術極受歡迎。 表單煸號A0101 第8頁/共39頁 0983384716-0 201013818 為解決習知方法的這些問題，發明人已在韓國專利申請 案第2005-73076號中揭示一種使梦薄膜退火的方法，其 藉由在一矽薄膜底下形成一傳導層並向該傳導層供電以 便引發焦耳加熱作用產生大量的热*藉此使非晶梦薄膜 結晶化、去除晶格缺陷、激活一按雜物及進行一熱氧化 程序。 ❹ [0003] 參 098128430 此種方法提供一多晶矽薄膜，其不引發玻璃基板之熱轉 變作用，幾乎沒有晶格缺陷，完全免於發生於由MIC法或 MILC法製造之多晶矽薄膜中的觸媒金屬污染，且沒有發 生於由ELC法製造之多晶1硬释寧中的>表面突起。 因此，為藉由鼻種創新的方矽薄膜’ 需要-種用於製造多晶㈣以將一基 板裝載到::-½¾位置:並向精確位置 供電。 【發明内容】 Ψ , 11 ,, 本發明關於一種用於製造多及方法用以 將一基板裝載到一棱確位^載基板上之極精Omce 確位置供電。 本發明亦關於一種利用藉由向一捧晶碎薄膜之一傳導薄 膜供電而產生之焦耳熱製造多晶梦薄膜的裝置及方法。 本發明之一觀點提出一種用於製造多晶矽薄膜的裝置， 其包含：一腔室；—安裝在該腔室之一下部部分中且包 含一非晶矽薄膜和一傳導薄膜的基板支撐件；及一安裝 在該腔室之一上部部分中且包含一用於向該傳導薄膜供 電之電源電極的電源供應器。其中該基板支撐件包含一 安裝在該腔室之下部部分中的UVW臺及一安裝在該UVw臺 0983384716-0 表單編號A0101 第9頁/共39頁 201013818 上的基板臺。 二電源供應器可進_步包含_安裝在該腔室之_上部部 刀中的電極移動單元，且該電源電極可被安裝在該電極 移動單元上。 二電極移動單元可包含—固定於該腔室之—上部部分的 ^ ，—耦接於該汽缸欲在—預定距離範圍内往復地運 作的、、务 〜咬 塞；及一被安裝為欲與該活塞連接的電極支架。 絲板臺可包含—設置在該謂臺之—上表面上的下支榜 臺及一與該下支撐臺連接欲在一預定距離範圍内往復 地運作的上支撐臺。 ..，， 預定距離 連接的基 該上支撐臺可包含一耦接 範圍内往復地運作的裝填 板支架。 本發明之另一觀點提出一種製造多晶碎薄膜之方法其 包含.利用一設置在一安裝在一腔室之一下部部分中的 基板臺下方之’臺使該該基板臺之-上部部分中且具有一傳導薄為矽薄膜的基板對 準而元成結晶作業準備；且利；ϋ由一安裝在該腔室之 上。卩部分中的電源電極與該傳導薄膜接觸以提供電力 而產生之焦耳熱使該非晶矽薄膜結晶化。 該電源電極可藉由設置在該基板之上部部分的該電源供 應器之操作被降下至該基板以與該基板發生接觸。 該基板臺可包含一電極支架，且該基板可被設置在該電 極支架之一上表面上。 該基板支架和該基板可藉由該基板臺之操作被朝該電源 電極舉升以與該電源電極發生接觸。 098128430 表單編號Α0101 第1〇頁/共39頁 〇( 201013818 【實施方式】 [0004] 以下詳細說明本發明之範例實施例。然本發明不侷限於 以下所述範例實施例，其可以多種類型施行。因此’這 些範例實施例係用來完成本發明之說明並向熟習此技藝 者完全告知本煢明之範圍。 第1圖是一依據本發明第一範例實施例之多晶矽薄膜的剖 .面圖。 參照第1圖，一依據本發明第—範例實施例用於製造多晶The inconsistency of the dose and the use of lacquering limits and the use of high cost equipment. In particular, an active matrix organic light-emitting diode that is currently attracting attention in the application of next-generation flat panel displays is operated in a current-driven manner, while TFT-LCD operates in a voltage-sampling method. Therefore, the uniformity of grain size in a large-sized substrate becomes an extremely critical factor. For this reason, the low temperature crystallization operation using lasers by the ELC method or the SLS method has its limit, which is a problem currently faced by the flat panel display industry. In view of this, a new technology for producing high-quality polycrystalline film by 129128430 without using laser and low-temperature crystallization is extremely popular. In order to solve these problems of the conventional method, the inventors have disclosed a method of annealing a dream film by the Korean Patent Application No. 2005-73076, which is disclosed by the Japanese Patent Application No. 2005-73076, the disclosure of which is incorporated herein by reference. Forming a conductive layer underneath a film and supplying power to the conductive layer to induce Joule heating to generate a large amount of heat* thereby crystallizing the amorphous dream film, removing lattice defects, activating a dopant, and performing a thermal oxidation program. ❹ [0003] 参098128430 This method provides a polycrystalline germanium film which does not induce thermal transition of the glass substrate, has almost no lattice defects, and is completely free of catalytic metal which occurs in the polycrystalline germanium film produced by the MIC method or the MILC method. It is contaminated and does not occur in the surface protrusion of polycrystalline 1 hard release produced by the ELC method. Therefore, it is necessary to fabricate polycrystalline (4) for the creation of polycrystalline (4) by the nose type innovation to load a substrate into the ::1⁄23⁄4 position: and supply power to the precise position. SUMMARY OF THE INVENTION The present invention relates to a very fine Omce position for powering a substrate and mounting it on a substrate. The present invention also relates to an apparatus and method for making a polycrystalline dream film using Joule heat generated by supplying a conductive film to a conductive film. One aspect of the present invention provides an apparatus for manufacturing a polycrystalline germanium film, comprising: a chamber; a substrate support member mounted in a lower portion of the chamber and including an amorphous germanium film and a conductive film; A power supply mounted in an upper portion of the chamber and including a power supply electrode for powering the conductive film. The substrate support member includes a UVW table mounted in a lower portion of the chamber and a substrate table mounted on the UVW table 0983384716-0 Form No. A0101 Page 9 of 39 201013818. The second power supply may further include an electrode moving unit mounted in the upper portion of the chamber, and the power electrode may be mounted on the electrode moving unit. The two-electrode moving unit may include an upper portion that is fixed to the chamber, coupled to the cylinder to be reciprocally operated within a predetermined distance range, and a bite plug; and one is installed to The electrode holder to which the piston is connected. The wire table may include a lower table disposed on the upper surface of the stage and an upper support table coupled to the lower support to reciprocately operate within a predetermined distance. ..,, Predetermined distance Connection base The upper support table may include a loading plate bracket that operates reciprocally within a coupling range. Another aspect of the present invention provides a method of fabricating a polycrystalline shredded film comprising: utilizing a 'station disposed below a substrate stage mounted in a lower portion of a chamber such that the substrate stage is in the upper portion And having a substrate that conducts a thin film of tantalum is aligned and prepared for crystallization work; and is mounted on the chamber by one. The Joule heat is caused by the power electrode in the crucible portion being in contact with the conductive film to supply electric power to cause the amorphous germanium film to crystallize. The power supply electrode can be lowered to the substrate to be brought into contact with the substrate by operation of the power supply device disposed at an upper portion of the substrate. The substrate stage may include an electrode holder, and the substrate may be disposed on an upper surface of the electrode holder. The substrate holder and the substrate are lifted toward the power supply electrode by the operation of the substrate stage to come into contact with the power supply electrode. 098128430 Form No. Α0101 Page 1 of 39 〇 (201013818 [Embodiment] [0004] Exemplary embodiments of the present invention are described in detail below. However, the present invention is not limited to the following exemplary embodiments, which can be implemented in various types. The present invention is intended to be illustrative of the present invention and is to be understood by those skilled in the art. FIG. 1 is a cross-sectional view of a polycrystalline silicon film in accordance with a first exemplary embodiment of the present invention. Referring to Figure 1, a method for fabricating polycrystalline according to a first exemplary embodiment of the present invention
098128430 矽薄膜的裝置100包含一腔室110、一安裝在腔室110之 一下部部分上的基板支撐件120、及一安裝在腔室110之 一上部部分上的電源供應筹_炉其成条乾备推件丨2 〇與 電源供應器130彼此相面對'丨 v 用於製造多晶矽薄膜的裝—安裝在 :乂- ^ 室110中的準直度檢象洋元14〇。 〜 腔室110提供一封閉處理空間以供製造多晶矽薄膜。 基板支擇件12 Q係一用於將準並固定在-精確位置以供製造多晶石夕 基板支樓件120可包含一安^蠢11〇之一下部部分上 的UVW臺121及一安裝在UVW臺121之一上部部分上的基板 臺 125。 其中，基板50被裝載到基板臺125上，且包含—非晶矽薄 膜和一傳導薄膜。 爾臺121錢水平解移及轉動設置在爾臺121上之基 板臺125以使基板臺125與設置在基板臺125上之基板5〇 在一精確位置對準。 基板臺125係安裝在謂臺121上，且包含—或多個被形 表單編號A0101 第11頁/共39百 K 0983384716-0 201013818 成為欲往上開放的抽吸孔126。 抽吸孔126經由—真空管線151麵接於-真空單元15〇， 且真二單元150經由真空管線151透過抽吸孔126提供真 空以吸引並固定基板5〇於基板臺125之—上表面。 電源供應H 13〇係—用於向輯準@定在基板支撐件i 2 〇 上之基板50之-傳導薄膜供電的器件。電源供應器⑽可 ，含安裝在腔室！ 1G之上部部分上的電極移動單元ΐ3ι及 安裝在電極移動單元131上的電源電極ι35〇 電極移動單元131包含一固定於腔室11〇之一上部部分的 汽缸丨32、一耦接於該汽缸132欲在一預定距離範圍内往 復地運作的活塞、及-經安1 卿雜，塞133的電極支 架134。電極支架】34可為一的平板。 電源電極135係安裂在電極乏考▲•面上其面 向基板支撐件120以向墓板5〇之傳導薄膜供電。 電源電極135經安裝以維持兩電極丨36和丨37間之一預定 距離，該二電極具有彼此由一電線161 電連接於一電源供應單元 電源供應單元16G透過電線ϋ電源電極供電以便向基 板50之傳導薄膜供電。 -準直度檢查單元14〇係—能夠從外界檢查基板支撐件 120與基板5G間之準直度的監測器件，且可被安裝在腔室 110之一内壁上。 另一選擇，準直度檢查單元140可被安裝在腔室11〇之任 意位置以監測基板支撐件丨2〇與基板5〇間之準直度。 準直度檢查單元140可在電源電極135與基板5〇發生接觸 以向基板50供電時監測基板5〇與電源電極135間之準直度 098128430 表單編號A0101 第12頁/共39頁 201013818 因此，準直度檢查單元140係經安裝用於監測預定位置馨 如基板50之角落以檢查準直度。 此外’準直度檢查單元140可監測結晶化程序之所有過程 以及基板支撐件120與基板5〇間之準直度和基板5〇與電溽 電極135間之準直度。The 098128430 矽 film device 100 includes a chamber 110, a substrate support 120 mounted on a lower portion of the chamber 110, and a power supply unit mounted on an upper portion of the chamber 110. The dry pusher 丨 2 〇 and the power supply 130 face each other '丨v is used to fabricate the polycrystalline silicon film package — the collimation detector Yang 14 安装 installed in the 乂-^ chamber 110. The chamber 110 provides a closed processing space for the fabrication of a polycrystalline silicon film. The substrate support member 12Q is used to fix the quasi-and-fixed position at the precise position for manufacturing the polycrystalline stone substrate support member 120, which may include a UVW table 121 on a lower portion of the chassis 11 and an installation. A substrate stage 125 on an upper portion of the UVW stage 121. The substrate 50 is loaded onto the substrate stage 125 and includes an amorphous film and a conductive film. The table 121 horizontally displaces and rotates the substrate stage 125 disposed on the stage 121 to align the substrate stage 125 with the substrate 5 disposed on the substrate stage 125 at a precise position. The substrate stage 125 is mounted on the counter stage 121, and includes - or a plurality of shaped forms No. A0101, page 11 / 39 yen K 0983384716-0 201013818 becomes the suction hole 126 to be opened upward. The suction hole 126 is surface-contacted to the vacuum unit 15A via a vacuum line 151, and the true two unit 150 provides vacuum through the suction hole 126 via the vacuum line 151 to attract and fix the substrate 5 to the upper surface of the substrate stage 125. The power supply H 13 is a device for supplying a conductive film to the substrate 50 which is set on the substrate support i 2 〇. The power supply (10) can be installed in the chamber! The electrode moving unit ΐ3ι on the upper portion of the 1G and the power electrode ι35 mounted on the electrode moving unit 131, the electrode moving unit 131 includes a cylinder bore 32 fixed to an upper portion of the chamber 11〇, and a cylinder coupled to the cylinder 132. A piston that is intended to reciprocately operate within a predetermined distance range, and an electrode holder 134 of the plug 133. The electrode holder 34 can be a flat plate. The power electrode 135 is ruptured on the surface of the electrode ▲ face to the substrate support member 120 to supply power to the conductive film of the tomb 5 。. The power supply electrode 135 is mounted to maintain a predetermined distance between the two electrodes 丨36 and the crucible 37, and the two electrodes are electrically connected to each other by a wire 161 to a power supply unit power supply unit 16G through the electric wire ϋ power supply electrode for supplying to the substrate 50. The conductive film is powered. The collimation inspection unit 14 is a monitoring device capable of checking the degree of collimation between the substrate support 120 and the substrate 5G from the outside, and can be mounted on the inner wall of one of the chambers 110. Alternatively, the collimation inspection unit 140 can be mounted at any location in the chamber 11 to monitor the degree of alignment between the substrate support 丨2〇 and the substrate 5. The collimation inspection unit 140 can monitor the collimation between the substrate 5A and the power supply electrode 135 when the power supply electrode 135 comes into contact with the substrate 5A to supply power to the substrate 50. 098128430 Form No. A0101 Page 12 of 39 201013818 Therefore, The collimation inspection unit 140 is installed to monitor a predetermined position such as a corner of the substrate 50 to check the collimation. Further, the 'collimation inspection unit 140 can monitor all processes of the crystallization process and the degree of collimation between the substrate support 120 and the substrate 5 and the degree of alignment between the substrate 5 and the electrode 135.
以下參照第2A至2F圖說明一種利用用於製造如第1圖所示 形成之多晶石夕薄膜的裝置製造多晶妙薄膜之方法。 首先，該多晶矽薄膜製造方法包含結晶作業之準備、結 晶作業及結晶作業之终止。Hereinafter, a method for producing a polycrystalline film using an apparatus for producing a polycrystalline film formed as shown in Fig. 1 will be described with reference to Figs. 2A to 2F. First, the method for producing a polycrystalline silicon film includes preparation for crystallization, crystallization, and termination of crystallization.
也就是說，結晶作業之準 下文。 如第2A圖所示，將一具有That is to say, the crystallization work is as follows. As shown in Figure 2A, one will have
25與基板50間之度檢查單元14〇 -…Office 基板50轉移到一腔室110内以被裝載到一基板臺125上。 然後，藉由一安裝在基板臺125底下的UVW臺121之操作 使基板臺125與被裝到基板甚覼“對準。 基板臺1 監測》 然後如第2B圊所示，一真空單元150透過一真空管線151 向一形成於基板臺125中的抽吸孔126提供真空。 因此，利用真空單元150提供之真空，基板5〇被固定到基 板臺125之一上表面上》 在經由上述過程完成結晶作業之準備後，在基板上進行 結晶作業。 如第2C圖所示，藉由一電源供應器130之操作將一電源電 極135往基板50下移以允許電源電極135與基板5〇之傳導 098128430 表單編號A0101 第13頁/共39頁 0983384716-0 201013818 薄膜發生接觸。 其中’當傳導薄膜未與電源電極135正確對準時，藉由 UVW臺121之操作使二者彼此對準。 傳導薄膜與電源電_之準直度由準直度檢查單元14〇監 測。 m 然後如第2D®所示’-電源供應單元16G透過-電線161 向電源電極135供電。 供予電源電極135之電力透過電源電極135施加於傳導薄 膜以便產生焦耳熱，使得非晶㈣膜利用焦耳熱結晶化 〇 I瞢曹議馨雜鑛議壤1釋_秦. 當結晶作業如上所述完成時0扣，載::基味以進行結晶作業 之終止V '夕：）Λ ί :‘ 在非晶矽薄膜已經結晶之後:;如:余2_Ε圖所示，電源供應 單元160切斷電力之施加，然後藉由電源供應器13〇之操 作將電源電極135舉升使之離開基板5〇 〇 然後如第2F圖所示，切斷_磐|^|^^4臺125中之抽 吸孔126的真空以釋放基板§§矣,變丨基板5〇朝腔室 110之外界卸載。如此完 晶作業。 第3圖是一依據本發明第二範例實施例用於製造多晶矽薄 膜之裝置的剖面圖。 參照第3圖，一依據本發明第二範例實施例用於製造多晶 矽薄膜的裝置300包含一腔室310、一安裝在腔室310之 一下部部分上的基板支撐件320、及一安裝在腔室310之 一上部部分上的電源供應器330。其中基板支撐件320面 向電源供應器330。 098128430 用於製造多晶矽薄膜的裝置300可進一步包含一安裝在腔 表單煸號Α0101 第14頁/共39頁 098; 201013818 室310中的準直度檢查單元34〇。 腔室310提供-封閉處理空間以供進行多晶發薄膜製程。 基板支撐件320係-用於將已裝載基板6()對準並固定在一 精確位置以供製造多晶石夕薄膜的器件。 基板支揮件32G可包含-安裝在腔室31Q之―下部部分中 的UVW臺321及-安裝在Uvw臺321上的基板臺奶。 其中，基板60被裝載到基板臺325上，且包含一非晶矽薄 膜和一傳導薄膜。 Ο UVW臺321能夠水平地平移及轉動設置在uvw臺321上之基 板臺325以使基板臺325與設置在基板臺325上之基板6〇 在一精確位置對準 基板臺3 2 5可包含一設置在ϋ τ·|撐臺3 2 6及 一耦接於下支撐臺3 2 6且能在定/距▲内往復地運 作的上支撐臺327 下支撐臺326創造一空間供上支撐臺327在一預定距離範 圍内往復地運作：…. f\ !The inspection unit 14 between the 25 and the substrate 50 is ... - the Office substrate 50 is transferred into a chamber 110 to be loaded onto a substrate stage 125. Then, the substrate stage 125 is "aligned with the substrate to be mounted" by the operation of the UVW stage 121 mounted under the substrate stage 125. Then, as shown in FIG. 2B, a vacuum unit 150 is transmitted through A vacuum line 151 supplies a vacuum to a suction hole 126 formed in the substrate stage 125. Therefore, by using the vacuum provided by the vacuum unit 150, the substrate 5 is fixed to the upper surface of one of the substrate stages 125" After the preparation of the crystallization operation, the crystallization operation is performed on the substrate. As shown in Fig. 2C, a power supply electrode 135 is moved downward toward the substrate 50 by operation of a power supply 130 to allow conduction of the power supply electrode 135 and the substrate 5 098128430 Form No. A0101 Page 13/39 Page 0983384716-0 201013818 The film is in contact. Where 'When the conductive film is not properly aligned with the power electrode 135, the UVW stage 121 is operated to align the two with each other. The power supply is collimated by the collimation check unit 14 m. Then, as shown in Fig. 2D®, the power supply unit 16G transmits power to the power supply electrode 135 through the electric wire 161. The power supply electrode 1 is supplied. The electric power of 35 is applied to the conductive film through the power electrode 135 to generate Joule heat, so that the amorphous (four) film is treated by Joule heat crystallization, and the crystallization is performed as described above. Buckle, load: base taste to terminate the crystallization operation V 'X: Λ ί : ' After the amorphous ruthenium film has been crystallized:; as shown in the remaining 2_ , diagram, the power supply unit 160 cuts off the application of electricity, Then, the power supply electrode 135 is lifted off the substrate 5 by the operation of the power supply 13A, and then the suction hole 126 in the table 125 is cut off as shown in FIG. 2F. The vacuum is applied to release the substrate, and the substrate 5 is unloaded toward the outer periphery of the chamber 110. This is a crystallizing operation. Fig. 3 is a cross-sectional view showing an apparatus for manufacturing a polycrystalline germanium film according to a second exemplary embodiment of the present invention. Referring to FIG. 3, an apparatus 300 for fabricating a polysilicon film according to a second exemplary embodiment of the present invention includes a chamber 310, a substrate support member 320 mounted on a lower portion of the chamber 310, and a chamber mounted thereon. A power supply 330 on an upper portion of one of the chambers 310. The board support 320 faces the power supply 330. 098128430 The apparatus 300 for manufacturing a polysilicon film may further include a collimation inspection unit 34 installed in the cavity form number Α0101, page 14/39 pages 098; 201013818 room 310. The chamber 310 provides a closed processing space for the polycrystalline film processing process. The substrate support 320 is used to align and fix the loaded substrate 6() at a precise location for manufacturing a polycrystalline film. Device. The substrate support member 32G may include a UVW stage 321 installed in a lower portion of the chamber 31Q and a substrate stage milk mounted on the Uvw stage 321. The substrate 60 is loaded onto the substrate stage 325 and includes an amorphous germanium film and a conductive film. The UVW stage 321 can horizontally translate and rotate the substrate stage 325 disposed on the uvw stage 321 to align the substrate stage 325 with the substrate 6 disposed on the substrate stage 325 at a precise position. The substrate stage 3 2 5 can include a The upper support table 326 is disposed on the ϋτ·| support 3 2 6 and an upper support table 327 coupled to the lower support table 3 2 6 and can reciprocately operate within a fixed/distance ▲ to create a space for the support table 327 Operates reciprocally within a predetermined distance: .... f\ !
上支播臺327可包含一耦接㊣下:¾务J〆26欲於一預定距 離範圍内往復地運作的裝邊器-32¾¼—與該裝填器327a 連接的基板支架327b。 、 基板支架327b可為一與裝填器327a整合的平板，且包含 一或多個被形成為欲往上開放的抽吸孔328。 抽吸孔328經由一真空管線351耦接於一真空單元350， 且真空單元350經由真空管線351向抽吸孔328提供真空 以吸引並固定基板60。 電源供應器330係一用於向經對準固定在基板支撐件32〇 上之基板60之一傳導薄膜供電的器件，且可包含一安裝 098128430 表單编號A0101 第15頁/共39頁 0983384716-0 201013818 在腔室310之上部部分中的電極支架331及一安裝在電極 支架331上的電源電極335。 電源電極335係安裝在電極支架331之一下表面上，其面 向基板支撐件320以向基板60之傳導薄膜供電。 電源電極335經安裝以維持兩電極336和337間之一預定 距離，該二電極具有彼此相異之極性，且經由一電線Μ! 電連接於一電源供應單元360。 電源供應單元360透過電線361向電源電極335供電ι乂便 向基板60之傳導薄膜供電。 一準直度檢查單元340係一用於從外界板查基板支稽件 320與基板間之準直度的監'，矜#，且年辞辦裝在腔室 310之一内壁上。 :j i* 另-選擇，準直度檢查單;室3 i 0之往 意位置以監測基板支撐件320與基板60間之準直度。 準直度檢查單元340亦可被安裝為沿著腔室31〇之内壁垂 直地運作以在電源電極基發_坐^觸以向基板6〇 供電時監淘基板60舆電源簡專直度。 準直度檢查單元340可被安裝為預定位置譬如基板6〇 之角落以檢查準直度。 此外，準直度檢查單元340可監測結晶化程序之所有過程 以及基板支樓件320與基板60間之準直度和基板6〇與電源 電極335間之準直度。 ’以下參照第4Α至4F圖說明一種利用如第3圖所示用於製造 多晶矽薄膜之裝置製造多晶矽薄膜的方法。 首先’該多晶碎薄膜製造方法包含結晶作業之準備、結 晶作業及結晶作業之終止。 098128430 表單編號A0101 第16頁/共39頁 0983384716-0 201013818 也就是說，結晶作業之準備為準備進行結晶作業，詳見 下文。 如第4A圖所示，將一具有一傳導薄膜和一非晶矽薄膜的 基板60轉移到一腔室3丨〇内並設置到一基板支架327b之 一上表面上。 然後’藉由一UVW臺321之操作使基板支架327b與基板60 對準。 m 基板支架327b與基板60間之準直度由一準直度檢查單元 3 4 0監測。 然後如第4B圖所示’一真空單元350透過一真空管線351 向一形成於基板支架3271)¾锋抽真空。 因此，利用真空單元350提声!板60被固定到基 板支架32 7b之土表面上。Y 7匕·_ 丨:‘ 在經由上述過程完成結晶作業之準備後·，在基板上進行 結晶作業。 如第4C圖所示，藉由一基^#€^5泛：^樣||基板支架The upper deck 327 can include an edge splicer 323b that is coupled to the loader 327a to be reciprocally operated within a predetermined distance range. The substrate holder 327b can be a flat plate integrated with the loader 327a and includes one or more suction holes 328 formed to open upward. The suction hole 328 is coupled to a vacuum unit 350 via a vacuum line 351, and the vacuum unit 350 provides a vacuum to the suction hole 328 via the vacuum line 351 to attract and fix the substrate 60. The power supply 330 is a device for supplying a conductive film to one of the substrates 60 that are aligned and fixed on the substrate support 32, and may include a mounting 098128430 Form No. A0101 Page 15 of 39 0983384716- 0 201013818 An electrode holder 331 in an upper portion of the chamber 310 and a power electrode 335 mounted on the electrode holder 331. The power supply electrode 335 is mounted on a lower surface of the electrode holder 331 which faces the substrate support member 320 to supply power to the conductive film of the substrate 60. The power supply electrode 335 is mounted to maintain a predetermined distance between the two electrodes 336 and 337 having mutually different polarities and electrically connected to a power supply unit 360 via a wire. The power supply unit 360 supplies power to the power supply electrode 335 via the electric wire 361 to supply power to the conductive film of the substrate 60. A collimation inspection unit 340 is for monitoring the degree of collimation between the substrate holder 320 and the substrate from the external panel, and is installed on one of the inner walls of the chamber 310. :j i* Another-select, collimation checklist; the position of chamber 3 i 0 to monitor the degree of collimation between the substrate support 320 and the substrate 60. The collimation inspection unit 340 can also be mounted to operate vertically along the inner wall of the chamber 31 to monitor the power of the substrate 60 when the power supply electrode is energized to supply power to the substrate 6A. The collimation inspection unit 340 can be installed at a predetermined position such as a corner of the substrate 6A to check the collimation. In addition, the collimation inspection unit 340 can monitor all processes of the crystallization process and the degree of collimation between the substrate support member 320 and the substrate 60 and the alignment between the substrate 6A and the power supply electrode 335. A method of manufacturing a polycrystalline germanium film using the apparatus for producing a polycrystalline germanium film as shown in Fig. 3 will be described below with reference to Figs. 4 to 4F. First, the method for producing a polycrystalline film includes the preparation of a crystallization operation, the crystallization operation, and the termination of the crystallization operation. 098128430 Form No. A0101 Page 16 of 39 0983384716-0 201013818 That is to say, the preparation of the crystallization operation is to prepare for crystallization, as described below. As shown in Fig. 4A, a substrate 60 having a conductive film and an amorphous germanium film is transferred into a chamber 3 and placed on an upper surface of a substrate holder 327b. Then, the substrate holder 327b is aligned with the substrate 60 by the operation of a UVW stage 321 . The degree of alignment between the substrate holder 327b and the substrate 60 is monitored by a collimation inspection unit 340. Then, as shown in Fig. 4B, a vacuum unit 350 is evacuated through a vacuum line 351 to a front surface formed on the substrate holder 3271. Therefore, the vacuum unit 350 is used to raise the sound! The plate 60 is fixed to the soil surface of the substrate holder 32 7b. Y 7匕·_ 丨: ' After the completion of the crystallization operation through the above process, the crystallization operation is performed on the substrate. As shown in Fig. 4C, by a base ^#€^5 pan: ^like||substrate bracket
327b往一電源電極3扣舉的基板60與電源 電極335發生接觸。 ’《jlfiot: 其中’若傳導薄膜與電源電極335未在—精確位置彼此對 準，藉由UVW臺321之操作使二者彼此對準。 傳導薄膜與電源電極335間之準直度由準直度檢查單元 340監測。 如第4D圖所示，-電源供應單元_透過—電線361向電 源電極335供電》 供予電源電極335之電力透過電源電極335施加於傳導薄 膜以產生焦耳熱’從而使非晶石夕薄膜結晶化 098128430 0983384716-0 表單編號A0101 第Π頁/共39頁 201013818 當結晶作業如上所述完成時，卸載已結晶基板以進行結 晶作業之終止。 在非晶矽薄膜結晶後，如第4E圖所示，電源供應單元36〇 切斷電力，然後藉由基板臺325之操作將基板支架327b降 下使得基板60離開電源電極335。 然後如第4F圖所示，切斷提供給形成於基板支架327b中 之抽吸孔328的真空以釋放基板60之固定，將基板6〇朝腔 室310之外界卸載，藉此完成薄膜之結晶作業。 儘管已就某些範例實施例說明本聋明’熟習此技藝者應 理解到可不脫離由以下申諳專利範面定義、之發明精神及The substrate 60, which is pulled by 327b to a power supply electrode 3, comes into contact with the power supply electrode 335. "jlfiot: where" if the conductive film and the power supply electrode 335 are not aligned with each other at precise positions, the UVW stage 321 operates to align the two with each other. The degree of collimation between the conductive film and the power supply electrode 335 is monitored by the collimation inspection unit 340. As shown in FIG. 4D, the power supply unit _ the power supply 335 supplies power to the power supply electrode 335. The power supplied to the power supply electrode 335 is applied to the conductive film through the power supply electrode 335 to generate Joule heat, thereby crystallizing the amorphous crystal film. 098128430 0983384716-0 Form No. A0101 Page / 39 Page 201013818 When the crystallization operation is completed as described above, the crystallized substrate is unloaded to terminate the crystallization operation. After the amorphous germanium film is crystallized, as shown in Fig. 4E, the power supply unit 36 turns off the power, and then the substrate holder 327b is lowered by the operation of the substrate stage 325 so that the substrate 60 leaves the power supply electrode 335. Then, as shown in FIG. 4F, the vacuum supplied to the suction holes 328 formed in the substrate holder 327b is cut to release the fixing of the substrate 60, and the substrate 6 is unloaded toward the outer boundary of the chamber 310, thereby completing the crystallization of the film. operation. Although the present invention has been described in terms of certain example embodiments, it should be understood by those skilled in the art that the invention may be
範圍針對樣式及細部做出 依據本發明，可利用藉由將二共.表—~彝晶矽薄膜和一傳 導薄碑痛基板裝載至一精4%尚載基板、亦 [0005] 即該傳導薄膜之一預定位置精確地供電的方式產生之焦 耳熱使非晶矽薄膜有效地或均勻地結晶化。因此，可利 用焦耳熱非常有:效地.製造從 【圖式簡單說明】 第1圖是一依據本發明第 面圖； 一丨範藤例之多晶石夕薄膜的剖 第2A至2F圖例示利用用於製造依據本發明第一範例實施 例之多晶矽薄膜的裝置製造多晶矽薄膜之方法； 第3圖是一依據本發明第二範例實施例用於製造多晶矽薄 膜之裝置的剖面圖； 第4 A至4 F圖例示利用依據本發明第二範例實施例用於製 造多晶矽薄膜之裝置製造多晶矽薄膜的方法。 098128430 表單編號A0101 第18頁/其39頁 201013818 Ο 【主要元件符號說明】 [0006] 50和60 :基板 [0007] 100和300 :用於製造多晶矽薄膜的裝置 [0008] 110和310 :腔室 [0009] 120 、 320 :基板支撐件 [0010] 121 、 321 :UVW 臺 [0011] 125和325 :基板臺 [0012] 126和328 :抽吸孔 [0013] 130和330 :電源供應器 [0014] 131 :電極移動單元 [0015] 132 :汽缸 [0016] 133 :活塞 [0017] 134和331 . i 裏.8 里 U1 fU # " I 奪遍 :電極支架 . . .. ，工'' 麗 1 i i ψ [0018] 135和335 :用於供電的電極 .， [0019] 136 、 137 :電極 [0020] 140和340 :準直度檢查單元 [0021] 150和350 :真空單元 [0022] 151和351 :真空管線 [0023] 160和360 :電源供應單元 [0024] 161 和361 :電線 表單編號A0101 第19頁/共39頁 098128430 0983384716-0 201013818 [0025] 326 :下支撐臺 [0026] 327:上支撐臺 [0027] 327a:裝填器 [0028] 327b :基板支架The scope is based on the present invention, and can be utilized by loading a common film and a conductive thin film substrate onto a fine 4% substrate, also [0005] The Joule heat generated by the manner in which one of the films is precisely supplied in a predetermined manner causes the amorphous germanium film to be crystallized efficiently or uniformly. Therefore, the use of Joule heat is very effective: manufacturing. [Simplified description of the drawing] Fig. 1 is a first drawing according to the present invention; a section 2A to 2F of the polycrystalline stone film of the Fanto example A method of fabricating a polycrystalline germanium film using a device for fabricating a polycrystalline germanium film according to a first exemplary embodiment of the present invention is exemplified; and FIG. 3 is a cross-sectional view of a device for fabricating a polycrystalline germanium film according to a second exemplary embodiment of the present invention; A to 4 F illustrate a method of manufacturing a polycrystalline germanium film using a device for fabricating a polycrystalline germanium film according to a second exemplary embodiment of the present invention. 098128430 Form No. A0101 Page 18/39 Page 201013818 Ο [Main Component Symbol Description] [0006] 50 and 60: Substrate [0007] 100 and 300: Devices for manufacturing polycrystalline germanium films [0008] 110 and 310: chambers 120, 320: substrate support [0010] 121, 321 : UVW table [0011] 125 and 325: substrate table [0012] 126 and 328: suction holes [0013] 130 and 330: power supply [0014 ] 131 : Electrode moving unit [0015] 132 : Cylinder [0016] 133 : Piston [0017] 134 and 331 . i 里 .8 里 U1 fU # " I 夺: Electrode holder . . . , ,工'' 1 ii ψ [0018] 135 and 335: electrodes for power supply. [0019] 136, 137: electrodes [0020] 140 and 340: collimation inspection unit [0021] 150 and 350: vacuum unit [0022] 151 And 351: vacuum line [0023] 160 and 360: power supply unit [0024] 161 and 361: wire form number A0101 page 19/39 page 098128430 0983384716-0 201013818 [0025] 326: lower support table [0026] 327 : Upper support table [0027] 327a: Loader [0028] 327b: Substrate holder
098128430 表單編號A0101 第20頁/共39頁 0983384716-0098128430 Form No. A0101 Page 20 of 39 0983384716-0
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| JPH1064981A (en) * | 1996-08-13 | 1998-03-06 | Fujitsu Ltd | Method for aligning wafer |
| KR100653263B1 (en) * | 2000-12-29 | 2006-12-01 | 엘지.필립스 엘시디 주식회사 | crystallization method of a silicon film |
| KR101275009B1 (en) * | 2006-06-09 | 2013-06-13 | 주식회사 엔씰텍 | Method of Preventing Generation of Arc During Rapid Annealing by Joule Heating |
| KR20080013460A (en) * | 2006-08-09 | 2008-02-13 | 삼성전자주식회사 | Apparatur for manuifacturing display panel |
-
2008
- 2008-08-26 KR KR20080083504A patent/KR101002014B1/en not_active IP Right Cessation
-
2009
- 2009-08-21 WO PCT/KR2009/004662 patent/WO2010024555A2/en active Application Filing
- 2009-08-24 TW TW98128430A patent/TW201013818A/en unknown
Also Published As
| Publication number | Publication date |
|---|---|
| KR20100024789A (en) | 2010-03-08 |
| WO2010024555A2 (en) | 2010-03-04 |
| WO2010024555A3 (en) | 2010-06-17 |
| KR101002014B1 (en) | 2010-12-16 |
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