JP2000208422A - Forming method of laminated film and thin film forming system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a stable laminated layer made of a semiconductor thin film and an insulating film, by reducing a defect in an interface with upper and lower insulating films when a good polycrystal semiconductor thin film is formed in a low temperature process. SOLUTION: When a laminated layer made up of a semiconductor thin film 15 and a lower insulating film 14 is formed on a substrate 11, the semiconductor thin film 15 is grown in a vacuum chamber in a chemical vapor growth (catalytic CVD) by using a catalyst. The insulating film 14 is, as an example, grown in a chemical vapor growth (plasma CVD) using plasma. In this case, the insulating film 14 and the semiconductor thin film 15 are formed continuously without breaking vacuum state.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a laminate in which a semiconductor thin film and an insulating film are stacked, and to a thin film manufacturing apparatus used for forming the laminate. In particular, the present invention relates to a technique for forming a semiconductor thin film by a chemical vapor deposition method using a catalyst.

[0002]

2. Description of the Related Art Semiconductor thin films are used for active layers of thin film transistors. Thin film transistors are widely used in liquid crystal displays, semiconductor integrated circuits, and the like. In particular, with the increase in size and definition of active matrix type liquid crystal displays, there is an urgent need to improve the performance of thin film transistors. The thin film transistor is formed using an amorphous silicon thin film or a polycrystalline silicon thin film as an active layer. The performance of the thin film transistor is superior when the polycrystalline silicon thin film is used as the active layer. Further, a technique for forming a polycrystalline silicon thin film by a low-temperature process is considered promising from the viewpoint of reducing manufacturing costs. In this low-temperature process, an amorphous silicon thin film is irradiated with an excimer laser beam, and once melted and crystallized, a polycrystalline silicon thin film is obtained at a relatively low temperature. By using this as an active layer, a thin film transistor with high mobility can be obtained. Nevertheless, the electron mobility of the thin film transistor obtained by this method is 7
It is about 0 to 150 cm ² / Vs. To incorporate the peripheral circuit having the advanced features as well TFT for pixel switching on the liquid crystal display is an important performance of the thin film transistor, in particular 300 cm ²
/ Vs or more is required. It has been difficult to achieve a mobility exceeding 300 cm ² / Vs by a conventional crystallization technique using laser annealing. this is,
This is because crystal defects are present at the grain boundaries and in the grains of the silicon crystal and at the interface between the silicon thin film and the gate insulating film even when the crystal is irradiated with excimer laser light and crystallized.

[0003]

A chemical vapor deposition method using a catalyst (catalyst C
VD method) has attracted attention.
No. 438. Catalytic CVD is used for 17
This is a technique in which a raw material gas is brought into contact with a metal catalyst at a temperature of 00 ° C. or higher to decompose the product and a product is deposited on a substrate to produce a semiconductor thin film. This catalytic CVD method can form polycrystalline silicon at a low substrate temperature of about 300 ° C. Catalyst CV
By using the method D, polycrystalline silicon with excellent film quality can be formed. However, the quality of the thin film transistor is not only a semiconductor thin film such as polycrystalline silicon, but also the quality of an insulating film in contact with the semiconductor film from above and below is an important control factor. If only polycrystalline silicon is formed by a catalytic CVD method, a high-performance thin film transistor cannot be obtained.
This is because, during the manufacturing process, an unstable natural oxide film is interposed at the interface where the semiconductor thin film made of polycrystalline silicon and the insulating film are in contact with each other, resulting in carrier trapping. The natural oxide film is formed by once exposing the substrate to the atmosphere between the semiconductor thin film forming process and the insulating film forming process.

[0004]

SUMMARY OF THE INVENTION In view of the above-mentioned problems of the prior art, the present invention reduces the defects at the interface with the insulating films located above and below it when forming a high-quality polycrystalline semiconductor thin film at a low temperature. It is another object of the present invention to provide a stable lamination of a semiconductor thin film and an insulating film. The following measures were taken to achieve this purpose. That is, the present invention relates to a method for forming a laminated film on a substrate, the method comprising forming a laminated film comprising a semiconductor thin film and an insulating film superposed on one or both surfaces thereof, wherein the semiconductor thin film is a chemical Formed by phase growth,
The insulating film is formed in a vacuum chamber, and the semiconductor thin film and the insulating film are formed continuously without breaking vacuum. Preferably, the insulating film is SiO ₂ , SiN, or SiON formed by chemical vapor deposition using a catalyst in a vacuum chamber, or a lamination thereof. Alternatively, the insulating film is SiO _{2 formed} by chemical vapor deposition using plasma in a vacuum chamber,
It is SiN or SiON or a lamination thereof. In some cases, the semiconductor thin film may be crystallized by irradiation with an energy beam. The present invention also provides a catalytic CVD chamber for forming a film by chemical vapor deposition using a catalyst, a plasma CVD chamber for forming a film by chemical vapor deposition using plasma, and a mechanism for connecting both chambers in an airtight manner. A thin film manufacturing apparatus for forming a laminate comprising a semiconductor thin film and an insulating film overlaid on one or both surfaces thereof on a substrate, wherein the semiconductor thin film is formed by chemical vapor deposition using a catalyst in a catalytic CVD chamber. The insulating film is formed by chemical vapor deposition using plasma in a plasma CVD chamber, and the semiconductor thin film and the insulating film are continuously formed without breaking vacuum. I do.

According to the present invention, catalytic CVD is used for forming a semiconductor thin film made of polycrystalline silicon or amorphous silicon.
When using the method, the insulating film and the semiconductor thin film that are in contact with one or both surfaces of the semiconductor thin film are continuously formed without breaking the vacuum, so that an incomplete layer such as a natural oxide film is sandwiched at the interface. Thus, a stacked structure required for the thin film transistor is formed. As a result, it is possible to eliminate the cause of generation of fixed charges and trapping of injected charges in an incomplete portion of the interface in the related art, and to form a highly reliable and high-performance thin film transistor. According to the present laminated film forming method and the present thin film manufacturing apparatus, a high-quality semiconductor thin film can be formed at a film forming stage by a catalytic CVD method, and additionally, an insulating film can be laminated without damage.

[0006]

Embodiments of the present invention will be described below in detail with reference to the drawings. 1 and 2 are process diagrams showing a method for manufacturing a thin film transistor employing the method for forming a laminated film according to the present invention. Basically, when a stack of a semiconductor thin film 15 and an insulating film 14 on one or both sides thereof is formed on the substrate 11, the semiconductor thin film 15 is formed by chemical vapor deposition (catalyst) using a catalyst in a vacuum chamber. The insulating film 14 is formed, for example, by chemical vapor deposition (plasma CVD) using plasma. At this time, the semiconductor thin film 15 and the insulating film 14 are continuously formed without breaking vacuum.

Hereinafter, a method of manufacturing a thin film transistor will be described in detail from step (a) of FIG. 1 to step (f) of FIG. First, as shown in FIG. 1A, an insulating substrate 11 made of non-alkali glass or the like is entirely formed by sputtering.
A metal film 12a having a thickness of 0 to 300 nm is deposited.
As the metal material, Mo, Al, Ta, W, Cu, and Cr can be used. Alternatively, an alloy of these metal elements may be used. When sputtering Mo, the conditions are as follows: Ar is supplied as a sputtering gas at a flow rate of 120 sccm, the pressure in the film formation chamber is set to 0.7 Pa, and the substrate heating temperature is set to 150 ° C.

Next, as shown in FIG. 1B, a resist is formed along the pattern of the gate wiring by photolithography (not shown). The metal film 12a is dry-etched using the patterned resist as a mask,
A tapered gate electrode 12 is formed. The dry etching conditions were as follows: SF ₆ / O ₂ mixed gas of 200
/ 300 sccm, and the pressure in the chamber is 2
The temperature was set to 0 Pa and the substrate heating temperature was set to 80 ° C.
After the dry etching, unnecessary resist is removed.

After that, as shown in FIG.
The gate nitride film (SiN) 13 by 50 to 100 nm
And a gate oxide film 14 (SiO ₂ )
Is formed in a thickness of 100 to 200 nm, and furthermore, a semiconductor thin film 15 made of polycrystalline silicon is continuously formed by catalytic CVD.
Is formed with a thickness of 30 to 80 nm. Plasma CV
The conditions for film formation of SiN by D are source gas SiH ₄ / NH
₃ / N ₂ was introduced at a flow rate of 200/1200/2000 sccm, the high-frequency power for plasma conversion was set to 1600 W, the internal pressure of the reactor was set to 266.7 Pa,
The film formation temperature of the substrate is set to 420 ° C. The conditions for forming the SiO ₂ film by plasma CVD are the mixed gas SiH ₄
/ N ₂ O is supplied to the reaction furnace at a flow rate of 100/7000 sccm, the high-frequency power for plasma conversion is set to 1560 W, the internal pressure of the reaction furnace is adjusted to 200 Pa, and the film forming temperature is set to 420 ° C. keep. After the gate oxide film 14 is formed in this manner, the substrate 11 is transferred from the plasma CVD chamber to the catalytic CVD chamber in a vacuum,
A semiconductor thin film 15 made of polycrystalline silicon is formed by using the D method. The gas type is 5/3 of a mixed gas of SiH ₄ / H _2.
The pressure in the chamber was 6.7 using a flow rate ratio of 00 sccm.
The pressure is set to Pa, the substrate temperature is set to 300 ° C., and the temperature of the metal catalyst in the chamber is set to 1600 ° C. to 1800 ° C. By this catalytic CVD, a semiconductor thin film 15 made of polycrystalline silicon is formed with a thickness of, for example, 30 to 80 nm. Thereafter, the process may proceed to the next step, or excimer laser annealing may be performed to further increase the grain size of the polycrystalline silicon formed by the catalytic CVD method. When excimer laser annealing is not performed, another insulating film can be formed on semiconductor thin film 15 continuously without breaking vacuum.

Subsequently, as shown in FIG. 2D, SiO ₂ is formed on the semiconductor thin film 15 to a thickness of 100 to 300 nm by plasma CVD. Plasma CVD at this time
The conditions for film formation of SiO ₂ by using the source gas SiH ₄ / N ₂
O was introduced into the reaction chamber at a flow rate of 100/7000 sccm, the high-frequency power was set to 1560 W, the chamber pressure was set to 200 Pa, and the film formation temperature was set to 420 ° C. Thereafter, the resist is patterned using the gate electrode 12 as a self-alignment mask by exposing from the back side of the substrate 11 using a photolithography method. Using this resist as a mask, buffered hydrofluoric acid
Etching of O ₂ is performed to process the stopper 16. As a result, the portion of the polycrystalline semiconductor thin film 15 located immediately below the stopper 16 is protected as the channel region CH. Using the stopper 16 as a mask, impurity ion doping is performed to form an LDD region. Further, after a resist pattern corresponding to the source S and the drain D is formed by photolithography, ion doping of impurities is performed using the resist pattern as a mask to form the source region S and the drain region D. Thereafter, irradiation with excimer laser light activates the ion-doped impurities to form a bottom-gate thin film transistor. Subsequently, the SiO ₂ and the semiconductor thin film 15 constituting the stopper 16 are patterned according to the shape of the element region of the thin film transistor.

As shown in FIG. 3E, S is formed by plasma CVD.
iO ₂ is deposited to a thickness of 50 to 200 nm to form an interlayer insulating film 18. Subsequently, as shown in FIG.
N is formed to a thickness of 100 to 500 nm by plasma CVD to form a passivation film 19. Thereafter, by performing annealing at 400 ° C. for about 1 hour in an annealing furnace, hydrogen atoms contained in the interlayer insulating film 18 are diffused into the semiconductor thin film 15, so-called hydrogenation is performed. It is sufficient to perform this annealing in a temperature range of 300 to 500 ° C. Thereafter, if necessary, a contact hole communicating with the source S and the drain D of the thin film transistor is opened, and a desired wiring electrode or pixel electrode is formed.

FIG. 3 is a schematic plan view showing a configuration example of a thin film manufacturing apparatus used in the method of forming a laminated film shown in FIG.
This apparatus can form a semiconductor thin film and an insulating film continuously without breaking vacuum. As shown in the figure, the present thin film manufacturing apparatus includes a load chamber 1a, an unload chamber 1b, a heating chamber 2, a cooling chamber 3, and a plasma CVD chamber 4a, 4 around a transfer chamber 0.
b and catalytic CVD chambers 4c and 4d are arranged via gate valves. A transfer unit including a rotary drive mechanism 5 and a telescopic holding arm 5a transfers a substrate to be processed between the chambers. When manufacturing the thin film transistor having the bottom gate structure shown in FIGS. 1 and 2, as a process sequence, first, the substrate is heated to, for example, 420 ° C. in the heating chamber 2. Next, in the plasma CVD chambers 4a and 4b, the substrate temperature is set to 420 ° C.
N, SiO ₂ or SiON is continuously formed by a plasma CVD method. Subsequently, the substrate is transferred in a vacuum via the transfer chamber 0, and the catalyst CVD chamber 4c or 4 is transferred.
At d, the substrate temperature is set to, for example, 300 ° C., and a semiconductor thin film made of polycrystalline silicon is formed by a catalytic CVD method. still,
In the case of manufacturing a thin film transistor having a top gate structure, the above-described process sequence is reversed. First, the substrate is heated to, for example, 300 ° C. in the heating chamber 2. Next, the substrate is transferred to a currently usable one of the catalytic CVD chambers 4c or 4d, and a semiconductor thin film made of polycrystalline silicon is formed by a catalytic CVD method at a substrate temperature of 300 ° C.
Subsequently, the substrate is transported through the transfer chamber 0, and the empty side of the plasma CVD chamber 4a or 4b is selected to form a gate insulating film by the plasma CVD method.

FIG. 4 is a schematic block diagram showing a specific example of the catalytic CVD chamber shown in FIG. In FIG. 4, reference numeral 71 denotes a reaction chamber. However, the portion of the gate valve for taking the substrate in and out is not shown. Reference numeral 73 denotes a catalyst, which is a heater such as tungsten. A source gas supply pipe 74 supplies a source gas. When forming polycrystalline silicon, the source gas is silane,
It is a mixed gas of a silane-based silane compound such as disilane and a gas of another substance such as hydrogen gas. 74 is a heater for heating the insulating substrate 11 to be processed. Reference numeral 76 denotes a power supply source for supplying power to the catalyst body 73. In such a configuration, the insulating substrate 11
Are heated by the heater 75 at a low temperature of, for example, about 300 ° C. The source gas is supplied to the source gas supply pipe 74. The source gas comes into contact with the catalyst body 73, and all or a part of the silicon compound in the source gas is decomposed by the contact to generate silicon (Si) seeds. The decomposed Si species and the undecomposed silicon compound and another substance gas (hydrogen gas or the like) move to the substrate 11. And
The seeds of Si are deposited on the surface of the insulating substrate 11 to generate a semiconductor thin film 15 made of polycrystalline silicon. By changing the composition of the source gas, an insulating film such as SiN, SiO ₂ or SiON can be deposited in addition to the semiconductor thin film 15 made of polycrystalline silicon. In this case, the semiconductor thin film and the insulating film can be continuously formed in the same chamber without breaking the vacuum.

FIG. 5 is a schematic block diagram showing a configuration example of a plasma CVD chamber incorporated in the thin film manufacturing apparatus shown in FIG. The plasma CVD chamber includes a reaction chamber 92 that can be evacuated, and houses therein an electrode 93 for applying a high frequency and a stage 94 on which the insulating substrate 11 to be processed is mounted. An introduction pipe 94 is connected to an upper part of the electrode 93 in a nozzle shape, and a desired reaction gas is introduced through a valve. A high frequency power supply 99 is connected to the introduction tube 94, and applies a high frequency to the electrode 93. On the other hand, the stage 94 is connected to the ground potential, and has therein a heater 9 for heating the insulating substrate 11.
5 is stored. The insulating substrate 11 to be processed is sent into the reaction chamber 92 via the gate valve 96. After the processing is completed, the insulating substrate 11 is taken out through the gate valve 96. Stage 9 stored in reaction chamber 92
The high frequency power supply 99 applies a high frequency to the upper plate electrode 93 while placing the insulating substrate 11 on the substrate 4 and supplying a desired reaction gas into the reaction chamber 92 from the nozzle-shaped electrode 93 facing the insulating substrate 11. Then, plasma is generated, and a desired insulating film is formed on the insulating substrate 11. In this case,
The stage 94 is heated by the heater 95 to keep the insulating substrate 11 at a predetermined temperature.

FIG. 6 is a process diagram showing another example of a method of manufacturing a thin film transistor employing the method of forming a laminated film according to the present invention. In particular, a thin film transistor having a top gate structure is manufactured. The thin film transistor is a semiconductor thin film 15,
It has a stacked structure including a gate insulating film 14 overlaid on one surface thereof and a gate electrode 12 overlaid on the semiconductor thin film 15 with the gate insulating film 14 interposed therebetween, and is formed on the insulating substrate 11. First, in a step (1), an amorphous or polycrystalline semiconductor thin film 15 is deposited on the insulating substrate 11. For example, a semiconductor thin film 15 made of polycrystalline silicon is
The film is formed with a thickness of 0 to 75 nm. Next, proceeding to the step (2), the gate insulating film 1 made of SiO ₂ , SiN or SiON is continuously formed on the semiconductor thin film 15 without breaking the vacuum.
4 is formed by plasma CVD. Then, step (3)
Then, the gate electrode 12 is formed on the gate insulating film 14. By implanting impurities into the semiconductor thin film 15 by self-alignment using the gate electrode 12 as a mask, a top gate thin film transistor can be obtained. Finally, in step (4), the semiconductor thin film 15 and the gate insulating film 14 are patterned according to the shape of the element region. The semiconductor thin film 15 patterned in an island shape is covered with an interlayer insulating film 18.

Finally, with reference to FIG. 7, an example of an active matrix type display device using a thin film transistor manufactured according to the present invention will be described. As shown, the display device has a flat panel structure including a pair of an insulating substrate 101 and a transparent substrate 102, and an electro-optical material 103 held between the two. As the electro-optical material 103,
For example, a liquid crystal material is used. On the lower insulating substrate 101, a pixel array section 104 and a drive circuit section are integrally formed. The driving circuit unit includes the vertical scanner 105 and the horizontal scanner 1
06. Incidentally, in addition to these scanners, a video driver and a timing generator can be integrated on the same substrate. A terminal 107 for external connection is formed at the upper end of the peripheral portion of the insulating substrate 101. The terminal unit 107 is connected to the vertical scanner 1 via a wiring 108.
05 and the horizontal scanner 106. A row-shaped gate wiring 109 and a column-shaped signal wiring 110 are formed in the pixel array unit 104. A pixel electrode 111 and a thin film transistor 112 for driving the pixel electrode 111 are formed at the intersection of the two wires. The gate electrode of the thin film transistor 112 is connected to the corresponding gate wiring 109, the drain electrode is connected to the corresponding pixel electrode 111, and the source electrode is connected to the corresponding signal wiring 110. Gate wiring 109
Is connected to the vertical scanner 105 while the signal wiring 110
Is connected to the horizontal scanner 106. Pixel electrode 111
The thin film transistor 112 for driving the switching and the thin film transistors included in the vertical scanner 105 and the horizontal scanner 106 are formed according to the present invention, and include a semiconductor thin film, a gate insulating film overlaid on one surface thereof, and a gate insulating film. And a gate electrode superposed on the semiconductor thin film. The semiconductor thin film is formed by chemical vapor deposition using a catalyst in a vacuum chamber, and the insulating film is also formed in the vacuum chamber. The semiconductor thin film and the insulating film are formed continuously without breaking vacuum.

[0017]

As described above, according to the present invention,
In a thin film transistor manufacturing process using a catalytic CVD method for forming a semiconductor thin film made of polycrystalline silicon or amorphous silicon, an insulating film to be laminated on one or both surfaces of the semiconductor thin film is continuously formed without breaking vacuum. By doing so, the cause of generation of fixed charges and the cause of trapping of injected charges can be eliminated, and a highly reliable and high performance thin film transistor can be formed.

[Brief description of the drawings]

FIG. 1 is a process diagram showing a method for manufacturing a thin film transistor employing a method for forming a laminated film according to the present invention.

FIG. 2 is a process chart of a method of manufacturing a thin film transistor employing a method of forming a laminated film according to the present invention.

FIG. 3 is a schematic plan view illustrating a configuration of a thin film manufacturing apparatus according to the present invention.

FIG. 4 is a schematic view showing a catalytic CVD chamber incorporated in the thin film manufacturing apparatus according to the present invention.

FIG. 5 is a schematic view showing an example of a plasma CVD chamber incorporated in the thin film manufacturing apparatus according to the present invention.

FIG. 6 is a process chart showing another example of a method of manufacturing a thin film transistor employing the method of forming a laminated film according to the present invention.

FIG. 7 is a schematic perspective view showing an active matrix display device using a thin film transistor manufactured according to the present invention.

[Explanation of symbols]

0: transfer chamber, 2: heating chamber, 4a: plasma CVD chamber, 4b: plasma CVD chamber, 4c: catalyst CVD chamber, 4d: catalyst CVD chamber, 11 ... Insulating substrate, 12 gate electrode, 13 gate nitride film,
14 gate oxide film, 15 semiconductor thin film, 71
... Reaction chamber, 73 ... Catalyst, 74 ... Source gas supply pipe, 75 ... Heater, 76 ... Power supply source

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification code FI Theme coat ゛ (Reference) H01L 21/31 H01L 21/31 C 21/316 21/316 X 29/786 29/78 617V 21/336 618A 627B 627G (72) Inventor Takeshi Urazono 6-7-35 Kita-Shinagawa, Shinagawa-ku, Tokyo Sony Corporation F-term (reference) 4K030 AA05 AA13 AA18 BA29 BB12 FA01 KA28 LA18 5F045 AA08 AB03 AB04 AB32 AB33 AB34 AC01 AC12 AC15 AD07 AD08 AE17 AE21 AF07 CA15 DC51 DP03 DP05 DQ17 HA18 HA25 5F058 BC02 BC08 BC11 BD01 BD04 BD10 BD15 BF07 BF23 BF29 BF30 BG01 BH01 BJ01 BJ03 5F110 AA19 BB01 CC01 CC08 DD02 EE02 FF03 FF03 FF03 FF03 FF04 GG44 HJ18 HM15 NN04 NN12 NN23 NN40 PP03 QQ01 QQ09 QQ12 QQ23

Claims (9)

[Claims] 1. A method for forming a laminated film on a substrate, the method comprising forming a laminated film comprising a semiconductor thin film and an insulating film superposed on one or both surfaces thereof, wherein the semiconductor thin film is formed in a vacuum chamber by a chemical vapor utilizing a catalyst. A method of forming a stacked film, comprising: forming a film by growing; forming the insulating film in a vacuum chamber; and forming the semiconductor thin film and the insulating film continuously without breaking vacuum. 2. The method according to claim 1, wherein the insulating film is formed of SiO ₂ , SiN formed by chemical vapor deposition using a catalyst in a vacuum chamber.
2. The method according to claim 1, wherein the layer is SiON or a laminate thereof. 3. The method according to claim 1, wherein the insulating film is formed of SiO ₂ , S formed by chemical vapor deposition using plasma in a vacuum chamber.
The method according to claim 1, wherein the method is iN or SiON or a lamination thereof. 4. The method according to claim 1, wherein the semiconductor thin film is crystallized by irradiation with an energy beam. 5. A catalyst CVD chamber for forming a film by chemical vapor deposition using a catalyst, a plasma CVD chamber for forming a film by chemical vapor deposition using plasma, and a mechanism for connecting both chambers in an airtight state. A thin film manufacturing apparatus for forming a laminate comprising a semiconductor thin film and an insulating film stacked on one or both surfaces thereof on a substrate, wherein the semiconductor thin film is formed by chemical vapor deposition using a catalyst in a catalytic CVD chamber. The insulating film is formed by chemical vapor deposition using plasma in a plasma CVD chamber, and the semiconductor thin film and the insulating film are continuously formed without breaking vacuum. Thin film manufacturing equipment. 6. A thin film transistor having a stacked structure including a semiconductor thin film, a gate insulating film overlaid on one surface thereof, and a gate electrode overlaid on the semiconductor thin film via the gate insulating film, wherein the semiconductor thin film is A film is formed by chemical vapor deposition using a catalyst in a vacuum chamber; the insulating film is formed in a vacuum chamber; and the semiconductor thin film and the insulating film are formed continuously without breaking vacuum. A thin film transistor characterized by the above-mentioned. 7. The thin film transistor according to claim 6, wherein a gate electrode is overlaid on the semiconductor thin film via a gate insulating film. 8. The thin film transistor according to claim 6, wherein a gate electrode is superposed below the semiconductor thin film via a gate insulating film. 9. A semiconductor device comprising: a pair of substrates joined to each other via a predetermined gap; and an electro-optical material held in the gap;
A counter electrode is formed on one substrate, a pixel electrode and a thin film transistor for driving the pixel electrode are formed on the other substrate, and the thin film transistor is formed with a semiconductor thin film and a gate electrode which is superposed on one surface thereof via a gate insulating film. The semiconductor thin film is formed by chemical vapor deposition using a catalyst in a vacuum chamber, the insulating film is formed in a vacuum chamber, and the semiconductor thin film and the insulating film are formed in a vacuum chamber. A display device characterized in that a film is continuously formed without breaking vacuum.