JP2009088106A - Semiconductor layer and semiconductor device using the same, and display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device and a display device of high quality of and high image quality through the use of a stable TFT having good characteristics which is attained, by forming a semiconductor thin film including a high quality of hydrogen-terminated polycrystalline Si film at a low temperature at a high manufacturing rate. <P>SOLUTION: A semiconductor layer 4 formed on an insulating substrate and containing Si, Ge, F and H is made of a polycrystalline SiGe film, formed by a reactive heat CVD process providing good crystallization, or a polycrystalline Si film has a laminated structure of a plurality of layers formed continuously, that is, a first layer 4a and a second layer 4b which are laminated on the first layer as an upper layer. Consequently, in the semiconductor layer 4, the H concentration of the second layer 4b, located at a surface side with respect to the insulating substrate 1, is set high. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention provides a semiconductor layer and a conductor device that can stably realize a thin film transistor having good characteristics by forming a semiconductor layer including a high-quality polycrystalline silicon film terminated with hydrogen at a low temperature and at a high speed. The present invention relates to a display device.

  As a thin film transistor applicable to an organic EL display device, a liquid crystal display device, and the like, there is a thin film transistor (TFT) using a semiconductor layer made of polycrystalline silicon (also expressed as polycrystalline Si or p-Si). Formation of a polycrystalline Si film usually requires a high-temperature film formation at a temperature higher than the thermal decomposition temperature of the source gas and about 600 ° C., or a high-temperature heat treatment process. However, in order to apply to a large-area display device or the like, since the display device or the like uses an inexpensive glass substrate having a low softening temperature, the polycrystalline Si film needs to be formed at a low temperature of 500 ° C. or lower. .

  As a method of forming a high-quality polycrystalline Si film at a low temperature, a method of applying laser annealing in which an amorphous Si film (a-Si) is irradiated with a laser to melt and crystallize has been proposed. However, in this case, a laser annealing facility and its process are newly required, resulting in high cost. In addition, laser maintenance is costly. Further, the area of the semiconductor film that can be crystallized at one time by laser irradiation is limited, and it has been difficult to form a uniform polycrystalline Si film over a large area.

As a method for forming a polycrystalline Si film at a low temperature without using a laser, for example, a plasma CVD method using SiH ₄ diluted with H ₂ , SiF ₄ or the like as a source gas is known. In the plasma CVD method, energy is applied to the source gas by inelastic collision with accelerated electrons in the plasma, and decomposition is performed through electron excitation, so that a polycrystalline film can be formed at a temperature lower than the thermal decomposition temperature. However, since the source gas is activated in the gas phase, it promotes the formation of crystal nuclei and causes an increase in crystal nucleus density, which makes it difficult in principle to improve both crystallinity and increase the crystal grain size. A good polycrystalline film cannot be obtained. In addition, since an initial layer having an amorphous structure is likely to be deposited and the crystallinity is lowered as the film is thin, this is a particular problem when a bottom gate type TFT structure in which a channel is formed on the substrate side is used.

In order to deal with the above-described problems of the plasma CVD method, a thermal CVD method (hereinafter referred to as reactive thermal CVD) using a compound containing hydrogen and a compound containing halogen has been proposed. In the reactive thermal CVD method, for example, by using a hydrogen atom (H) abstraction reaction from a silane compound by fluorine (F) in germanium halide (Ge) in a gas, polycrystalline SiGe is formed at a low temperature below the thermal decomposition temperature. Formation of a film and a polycrystalline Si film can be promoted. Further, the source gas can be efficiently activated only on the substrate surface without being activated in the gas phase. Thereby, it is possible to directly nucleate a large area without accompanying an amorphous structure, and to grow it into crystal grains, so that a good polycrystalline film can be obtained at a low temperature. For example, when Si ₂ H ₆ + GeF ₄ is used as the reaction gas, a polycrystalline SiGe film is formed, and when Si ₂ H ₆ + F ₂ is used, a polycrystalline Si film is formed, but Si ₂ H ₆ + GeF. _{Using 4} makes it easier to obtain good quality crystal nuclei at lower temperatures. As a report example of the polycrystalline SiGe film formed by the reactive thermal CVD method, for example, Non-Patent Document 1 can be cited.
J. Vac. Soc. Jpn. (Vacuum), Vol. 47, no. 9, p. 702-711 (2004)

In the reactive thermal CVD method, for example, a polycrystalline SiGe film or a polycrystalline Si film is formed by utilizing an H abstraction reaction from Si ₂ H ₆ by F in GeF ₄ or F ₂ , for example, so that the source gas is thermally decomposed. The film formation is promoted at a low temperature below the temperature. Therefore, as a feature of the polycrystalline Si film formed by reactive heat CVD, the film contains Ge, F, and H due to the source gas. Among these, most of H and F are discharged out of the system due to the formation of HF, so that the F concentration and H concentration remaining in the film are reduced in principle.

  On the other hand, in order to improve the characteristics of a TFT using a polycrystalline Si film as a semiconductor layer, a hydrogen termination process for terminating defects that become traps with hydrogen is essential. In the polycrystalline Si film formed by the reactive thermal CVD method, the hydrogen content is reduced in principle for the above-described reason, so that a large amount of hydrogen is required for the hydrogen termination treatment.

Commonly used hydrogen termination treatment methods are based on heat treatment in H ₂ gas or plasma H ₂ , or H diffusion from a passivation film containing hydrogen provided in a separate film. The process increase was inevitable. In any of the processing methods, since the distance between the H diffusion source and the polycrystalline Si film is large, particularly when a polycrystalline SiGe film or a polycrystalline Si film having a low hydrogen content is used. Does not provide a sufficient H concentration at the hydrogen end.

  In addition, since these hydrogen termination processes usually require high temperatures of 400 ° C. or higher, it is necessary to take measures against short-circuiting or disconnection of wiring due to generation of hillocks or voids due to heat treatment, contact failure due to thermal diffusion, and the like. There are limitations on wiring materials and structures, such as the use of refractory metal materials.

  On the other hand, as the formation temperature of the polycrystalline SiGe film and the polycrystalline Si film by the reactive thermal CVD method, for example, 450 ° C. is used, and a sufficiently low temperature can be realized from the viewpoint of using an inexpensive glass substrate. However, it was difficult to say from the viewpoint of reducing thermal damage to the wiring film located below the polycrystalline Si film. In addition, on the principle of efficiently activating the source gas on the substrate surface by the heat of the substrate, the formation rate of the polycrystalline SiGe film and the polycrystalline Si film by the reactive thermal CVD method is small, and it becomes smaller as the formation temperature is lowered. Therefore, from the viewpoint of improving the throughput, further lower temperature and higher speed film formation of the semiconductor layer has been required.

  The present invention stably realizes a TFT with good characteristics by forming a semiconductor thin film including a high-quality polycrystalline Si film terminated with hydrogen at a low temperature and high speed without increasing the number of processes. An object is to provide a semiconductor device and a display device with high image quality with high throughput and high yield.

  In order to achieve the above object, in the present invention, the H concentration in the semiconductor layer is increased on the surface side opposite to the insulating substrate side. In order to realize such a layer structure, the semiconductor layer is formed of a continuous layer of a plurality of layers, the first layer of which is a polycrystalline SiGe film or a polycrystalline Si film formed by a reactive thermal CVD method that provides good crystallinity. A laminated structure was formed with a film, and the H concentration in the semiconductor layer was higher on the surface side than on the insulating substrate side.

  Accordingly, even when a polycrystalline SiGe film or a polycrystalline Si film having a low hydrogen content formed by, for example, reactive thermal CVD is used on the first layer of the semiconductor layer having a stacked structure, that is, the substrate side, the semiconductor layer itself The H concentration necessary for hydrogen termination of the polycrystalline SiGe film or the polycrystalline Si film can be secured by supplying H from the upper layer constituting the surface, that is, the surface side opposite to the insulating substrate side. As described above, as a feature of the polycrystalline SiGe film or polycrystalline Si film formed by reactive thermal CVD, the film contains Ge or F derived from the source gas. Therefore, the semiconductor layer of the present invention is premised on containing Ge or F in the polycrystalline film constituting at least the first layer of the semiconductor layer, in addition to the constituent materials Si and H.

  Among the plurality of layers having different H concentrations constituting the semiconductor layer, the upper layer film located on the surface side is formed by a plasma CVD method such as a capacitive coupling method, an inductive coupling method, or a high density plasma method. By using these high hydrogen content Si film formation methods, it is possible to increase the H concentration in the semiconductor layer on the surface side with respect to the insulating substrate side. In this case, contrary to the H concentration, the Ge and F concentrations in the semiconductor layer are lower on the surface side than on the insulating substrate side.

  The H concentration in the upper layer film on the surface side can be arbitrarily adjusted to a high hydrogen content condition by optimizing film formation conditions such as reaction gas species, flow rate, gas pressure, power density, and substrate temperature. In addition, by applying the plasma CVD method, it is possible to realize film formation at a lower temperature and higher speed than the reactive heat CVD method for the upper layer film portion in the semiconductor layer.

  Moreover, the crystallinity of the upper layer film on the surface side in the semiconductor film can be arbitrarily changed by appropriately adjusting these film formation conditions. In the case of a top gate type TFT, a channel is formed on the surface side opposite to the insulating substrate side. Therefore, in order to improve the mobility of the TFT, it is necessary to use a semiconductor layer having good crystallinity on the surface side. is there. In this case, by using the first-layer polycrystalline Si film formed by the reactive thermal CVD method to obtain a good polycrystalline film as a seed crystal, the upper layer film is continuously formed under conditions that allow the formation of the polycrystalline Si film. A polycrystalline Si film having columnar crystal grains continuous from the insulating substrate side to the surface side can be formed. Thereby, even when the upper layer film is formed by the plasma CVD method, it is possible to continuously form a good polycrystalline Si film that cannot be obtained by the single film formation by the normal plasma CVD method.

  On the other hand, in the case of a bottom gate type TFT, a channel is formed on the side of the first-layer polycrystalline Si film formed by the reactive thermal CVD method located on the insulating substrate side. Therefore, the contribution of crystallinity on the surface side in the semiconductor layer is small. When it is desired to reduce the leakage current in the semiconductor layer and realize a TFT with good off-current characteristics, for example, it is possible to form an amorphous Si film as an upper layer film under conditions that allow continuous formation.

  Each concentration distribution in the film thickness direction of H, Ge, and F in the semiconductor layer, which is the gist of the present invention, can be evaluated by using a depth direction composition analysis method such as SIMS, for example. is there.

In the present invention, the H concentration in the semiconductor layer is 1 × 10 ¹⁸ cm ⁻³ or more and 2 × 10 ²⁰ cm ⁻³ or less on the insulating substrate side. On the other hand, the H concentration on the surface side is preferably 5 × 10 ²⁰ cm ⁻³ or more and 1 × 10 ²² cm ⁻³ or less from the viewpoint of supplying hydrogen necessary and sufficient for hydrogen termination.

  Also, from the viewpoint of low-temperature and high-speed film formation of the semiconductor layer, the thickness of the first-layer polycrystalline SiGe film or polycrystalline Si formed by reactive thermal CVD is made as thin as possible while ensuring crystallinity. There is a need to. In the present invention, the preferred film thickness is 5 nm or more and 40 nm or less.

  According to the present invention, the semiconductor layer is formed by continuous film formation of a plurality of layers including a polycrystalline film formed by a reactive thermal CVD method as a first layer, and the H concentration in the semiconductor layer is increased on the surface side. Thus, even when the reactive thermal CVD method for forming a low hydrogen-containing film is used, the H concentration necessary for defect termination can be ensured. Since a polycrystalline film having good crystallinity can be formed at a low temperature, it is possible to reduce the density of defect states at the interface between the semiconductor layer and the gate insulating film, high mobility, low threshold shift, and off current. In addition, a TFT having small and good characteristics can be provided stably.

Further, since hydrogen termination treatment can be performed simultaneously with the semiconductor film formation, it is not necessary to newly provide an H termination process step after the semiconductor film formation, and a high-temperature process for the H termination treatment is not necessary.
Further, by using a high-concentration H-containing CVD film, which can be easily formed at a lower temperature and at a higher speed, as a lamination condition, it is possible to shorten the time for substrate temperature rise and film formation, thereby improving the throughput accordingly. In addition, since it becomes possible to form a film at a lower temperature and at a higher speed, thermal damage to the lower wiring film can be reduced by that amount. Yield reduction factors such as contact failure due to short circuit, disconnection, or thermal diffusion can be avoided.

  In addition, the crystallinity of the upper layer film on the surface side in the semiconductor layer can be arbitrarily changed in accordance with the TFT structure to be applied. In the case of a top gate type TFT in which a channel is formed on the surface side, a plasma CVD method is performed using a first-layer polycrystalline Si film formed by a reactive thermal CVD method that can obtain a good polycrystalline film as a seed crystal. Even when the upper layer film is continuously formed under conditions that can be used to form a polycrystalline Si film, it is possible to form a good polycrystalline Si film on the surface side that cannot be obtained by single film formation by the plasma CVD method. it can. In the case of a bottom gate type TFT, a channel is formed on the side of the first-layer polycrystalline Si film formed by the reactive thermal CVD method. It is also possible to obtain a TFT with good off-current characteristics by reducing the leakage current.

  According to the present invention, by applying this semiconductor layer to a semiconductor device or a display device including a thin film transistor and a solar cell, a semiconductor device having a uniform and good characteristic over a large area is provided at a low cost and with a high yield. It becomes possible. For example, by applying a thin film transistor having a semiconductor layer of the present invention to an organic EL display device, a display device with high image quality and long life can be provided at low cost. In addition, when applied to a liquid crystal display device, a large-area, high-definition display device can be provided at low cost. Further, by applying to a driving circuit provided around these display devices, the cost can be further reduced.

  DESCRIPTION OF THE PREFERRED EMBODIMENTS The best mode for carrying out the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a cross-sectional view of an essential part for explaining an application example to a TFT constituting a pixel of a liquid crystal display device which is a first embodiment of a semiconductor layer of the present invention. It is principal part sectional drawing explaining the example of application to the top gate type TFT which is Example 1 of the semiconductor layer of this invention. First, an SiN film 2 and an SiO ₂ film 3 that are base layers are formed on an insulating substrate 1 that is preferably a glass substrate by a plasma CVD method, a sputtering method, or the like. In addition, as the semiconductor layer 4 of this embodiment, a first layer 4a made of a low-hydrogen-containing polycrystalline SiGe film formed by a reactive thermal CVD method capable of obtaining good crystallinity, and capacitive coupling type plasma CVD. A two-layer structure is formed with the upper layer film 4b made of high-hydrogen-containing polycrystalline Si continuously formed by the method. The H concentration in the semiconductor layer 4 was increased on the surface side with respect to the insulating substrate 1 side. Here, the thicknesses of the first layer 4a and the upper layer film 4b were 20 nm and 100 nm, respectively.

Next, the semiconductor layer 4 is processed into an island shape using photolithography. A gate insulating film 5 is formed on the semiconductor layer 4 processed into an island shape. As a material of the gate insulating film 5, SiO ₂ , SiN or the like can be used. These insulating films can be formed by PECVD or sputtering. Alternatively, plasma oxidation, photooxidation, or the like may be used in combination. In this example, a SiO ₂ film formed by a plasma CVD method using TEOS was used. The film thickness was 100 nm.

  Next, a gate electrode wiring film is formed on the gate insulating film 5. As a material for the gate electrode wiring film, Si, Ge or an alloy thereof, Nb, Mo, W, Ta, Cr, Ti, Fe, Ni, Co, or an alloy thereof, or a laminated film thereof may be used. it can. Furthermore, it is also possible to use a low resistance metal such as Al or Cu. These films can be formed by a sputtering method. In this embodiment, an Nb film is used and the film thickness is 200 nm. This gate electrode wiring film is processed into a pattern of the gate electrode wiring 6 by using photolithography. Thereafter, using the pattern of the gate electrode wiring 6 as a mask, P or B is implanted into part of the semiconductor layer 4 through the gate insulating film 5 by ion implantation to form contact regions 7 and 8.

Next, an SiO ₂ film or an SiN film is formed thereon as an interlayer insulating layer 9 by plasma CVD or sputtering, and then contact holes 10 and 11 are formed by photolithography. In this example, a SiO ₂ film formed by a plasma CVD method using TEOS was used, and the film thickness was 300 nm.

  Next, conductive films for the source electrode wiring 12 and the drain electrode wiring 13 are formed. As the conductive film material for the source electrode wiring 12 and the drain electrode wiring, metals such as Nb, Mo, W, Ta, Cr, Ti, Fe, Ni, Co, alloys thereof, and laminated films thereof can be used. . Furthermore, it is also possible to use a low resistance metal such as Al or Cu. These conductive films are formed by a sputtering method. In this embodiment, a Cr film is used and the film thickness is 200 nm. This is processed into a pattern of the source electrode wiring 12 and a pattern of the drain electrode wiring 13 by using a photolithography method.

  Next, a SiN film is formed as a protective insulating film 14 on the source electrode wiring 12 and the drain electrode wiring 13 by a plasma CVD method. The film thickness was 500 nm. Next, the contact hole 15 is formed using photolithography.

  Finally, a reflective metal film or a transparent conductive film is formed as an electrode material for the pixel electrode 16. As an electrode material for the pixel electrode 16, in this example, a Cr film was formed by a sputtering method, and the film thickness was 100 nm. ITO, IZO, ZnO, or the like can be used for the transparent conductive film. Next, the pixel electrode 16 is processed using photolithography. In the liquid crystal display device, the pixel electrode 16 is provided with a counter electrode (or a common electrode) disposed via liquid crystal. In the TN type, a counter electrode (common electrode) is provided on the inner surface of another insulating substrate. In the IPS type, a counter electrode (common electrode) adjacent to the pixel electrode 16 on the substrate provided with the TFT is formed.

  In the case of a top gate type TFT, a channel is formed on the surface side opposite to the insulating substrate 1 in the semiconductor layer 4 serving as the active layer. Therefore, in order to improve the mobility of the TFT, the semiconductor layer 4 is used. It is necessary to use a semiconductor layer having good crystallinity on the surface side. In the present embodiment, the first layer polycrystalline SiGe film 4a formed by the reactive thermal CVD method that can obtain a good polycrystalline film is used as a seed crystal, and the upper layer film 4b is formed under the condition that a polycrystalline Si film can be formed. A polycrystalline Si film having continuous columnar crystal grains is formed continuously from the insulating substrate side to the surface side.

  Thereby, even when the upper layer film is formed by the plasma CVD method, it is possible to form a polycrystalline Si film having few defects and good crystallinity, which cannot be obtained by a single film formation by the normal plasma CVD method. Further, since the channel is formed in the upper layer film 4b portion which is a high hydrogen content film, the crystal defects in the channel portion can be terminated efficiently with high concentration of hydrogen simultaneously with the formation of the upper layer film 4b itself. The interface state of the channel portion can also be reduced. By using this polycrystalline Si film as the semiconductor layer 4 of the TFT, it is possible to obtain a TFT having good characteristics with high mobility and little Vt shift. Further, since it is not necessary to separately provide a heat treatment process for hydrogen termination, the process can be shortened, and the process damage corresponding to the thermal history that occurs when hydrogen is terminated can also be reduced.

In the reactive thermal CVD method, which is a method for forming the first-layer SiGe film 4a, the insulating substrate 1 is heated to 400 ° C. or higher, and GeF ₄ and Si ₂ H ₆ are introduced as reaction gases and He is introduced as a dilution gas. A flow rate ratio of GeF ₄ : Si ₂ H ₆ is 0.005 to ₂ : 1 and a flow rate ratio of Si ₂ H ₆ : He is in the range of 1:10 to 5000, and it is possible to form a SiGe film having a good film quality. is there. In this example, GeF ₄ : Si ₂ H ₆ was set to 0.08 or more. Specifically, for example, a SiGe film having a thickness of 20 nm was formed using GeF ₄ : 0.3 sccm, Si ₂ H ₆ : 3 sccm, He: 1 slm, a substrate temperature of 450 ° C., and a gas pressure of 665 Pa.

In this embodiment, the first layer 4a of the semiconductor layer 4 is a SiGe film that easily obtains good quality crystal nuclei at a lower temperature. However, the present invention is not limited to this. In the reactive thermal CVD method, by changing the combination of reaction gases, for example, when using Si ₂ H ₆ + GeF ₄ , a polycrystalline SiGe film is formed, and when using Si ₂ H ₆ + F ₂ , polycrystalline SiGe is used. Each film can be formed. Therefore, for the first layer 4a of the present invention, it is possible to form a polycrystalline Si film using Si ₂ H ₆ + F ₂ instead of the SiGe film. Needless to say, even when a polycrystalline Si film is used, the same effect as that obtained when a polycrystalline SiGe film is used can be obtained.

As a feature of the first layer 4a formed by the reactive thermal CVD method, the semiconductor layer 4 of the present embodiment includes Ge, F, and H derived from source gases in addition to Si that is a constituent material of the semiconductor layer. And since most of H and F are discharged | emitted out of the system by formation of HF, it becomes a low hydrogen content film | membrane normally 1x10 < ¹⁸ > cm < ^-3 > or more and ^2x10 < ²⁰ > cm < ^-3 > or less. Further, as a feature of the laminated film of the first layer 4a that is a low hydrogen content film and the upper film 4b that is a high hydrogen content film, the H concentration of the semiconductor layer 4 of this embodiment is higher than that of the insulating substrate 1 side. Inevitably higher on the surface side. On the other hand, the Ge and F concentrations are lower on the surface side than the insulating substrate 1 side, contrary to the tendency of H concentration.

The H concentration of the upper layer film 4b is preferably 5 × 10 ²⁰ cm ⁻³ or more and 1 × 10 ²² cm ⁻³ or less from the viewpoint of supplying hydrogen necessary and sufficient for hydrogen termination. Specifically, it can be adjusted to an arbitrary high hydrogen content condition by optimizing the film forming conditions such as reactive gas species, flow rate, gas pressure, power density, and substrate temperature in the plasma CVD method. Further, by applying the plasma CVD method to the formation of the upper layer film 4b, high-speed film formation can be realized at 400 ° C. or lower, which is lower than the reactive heat CVD method, for the upper layer film 4b in the semiconductor layer 4.

In the present embodiment, a capacitive coupling type plasma CVD method is used as the semiconductor layer 4b on the surface side. Specifically, for example, SiF ₄ : H ₂ = 3: 1, substrate temperature 350 ° C., gas pressure 250 Pa. A polycrystalline Si film was continuously formed below. The film thickness was 100 nm. In this embodiment, the semiconductor layer 4b is formed as a single layer, but it may be composed of a plurality of laminated films having different hydrogen concentrations, and the hydrogen concentration may be increased stepwise toward the surface side of the semiconductor layer 4. It is. The method for forming the semiconductor layer 4b is not limited to this as long as it is a method capable of forming a high hydrogen content polycrystalline Si film. For example, high density plasma such as ECR method, ICP method, and helicon wave method is used. The same applies to the CVD method and the like.

  Further, from the viewpoint of low-temperature and high-speed film formation of the semiconductor layer 4, the film thickness of the first-layer polycrystalline SiGe film 4a formed by the reactive thermal CVD method should be as thin as possible while ensuring crystallinity. There is. In this example, 20 nm was used as the thickness of the first layer 4a, but it was confirmed that sufficient crystallinity for securing TFT characteristics can be obtained by preferably setting the thickness to 5 nm or more and 40 nm or less.

  In this example, an Nb film was used for the gate electrode wiring 6 and a Cr film was used for the source electrode wiring 12 and the drain electrode wiring 13. In the present invention, the high-temperature heat treatment process for hydrogen termination can be omitted as described above, and at the same time, the semiconductor layer 4 can be formed at a low temperature and at a high speed, so that the use is limited in a normal polycrystalline Si TFT process. It is also possible to use a low resistance metal such as Al or Cu or an alloy thereof as a wiring material. By applying Al, the wiring resistance can be greatly reduced as compared with the case where a high melting point metal is used. Therefore, the display device can be easily enlarged without considering the signal delay due to the wiring resistance.

  The above is an embodiment in which the present invention is applied to a top gate type TFT. However, as shown in other embodiments described later, the present invention can also be applied to a bottom gate type TFT.

  Each concentration distribution in the film thickness direction of H, Ge, and F in the semiconductor layer, which is the gist of the present invention, is evaluated by using a depth direction composition analysis method such as the RBS method or SIMS method, for example. Is possible.

7 and 8 show examples of composition analysis in the depth direction of the semiconductor film 4 in this example. Specifically, a first layer 4a made of a low-hydrogen-containing polycrystalline SiGe film formed by a reactive thermal CVD method as a semiconductor layer 4 of the present invention is formed on the SiO ₂ film 3 which is a base film, and has a parallel plate method formula. This is an example in which an upper film 4b made of high-hydrogen-containing polycrystalline Si continuously formed by the plasma CVD method is laminated to 100 nm. FIG. 7 shows RBS analysis results for Si, Ge, and O (underlayer) that are matrix components of the film, and FIG. 8 shows SIMS analysis results for H and F that are trace components. From these figures, it can be seen that the first layer 4a formed by the reactive thermal CVD method contains Ge, F, and H derived from source gases in addition to Si, which is a constituent material of the semiconductor layer. It can be seen that the composition ratio of Ge is about 15 at%, whereas the contents of H and F that are mostly discharged out of the system due to the formation of HF are small. About H, it becomes a low hydrogen content film | membrane of 10 < ²⁰ > cm <^-3> or less. On the other hand, it can be seen that the H concentration in the semiconductor layer 4 can be made higher on the surface side than on the insulating substrate side by stacking the upper layer film 4b which is a high hydrogen content film. The hydrogen concentration on the surface side is 10 ²¹ cm ⁻³ or more, which indicates that the hydrogen concentration necessary and sufficient for hydrogen termination of the semiconductor layer 4 can be secured. On the other hand, it can be seen that the Ge and F concentrations are lower on the surface side than on the insulating substrate side, contrary to the tendency of H concentration, due to the lamination of the upper film 4b.

FIG. 2 is a cross-sectional view of an essential part for explaining an application example to a TFT constituting a pixel of an organic EL display device which is a second embodiment of the semiconductor layer of the present invention. First, a top gate TFT using the semiconductor layer 4 of the present invention was formed by the same method as in Example 1. Then, after forming the pixel electrode 16, the organic EL charge transport layer 17, the light emitting layer 18, and the charge transport layer 19 are formed on the pixel electrode 16 by vapor deposition, and a transparent conductive film is formed as the upper electrode 20. An organic EL display device was manufactured by forming the sealing layer 21 by vapor deposition or sputtering. As described in Example 1, since a TFT using the semiconductor layer 4 of the present invention has good crystallinity, a mobility of 5 cm ² / VS or more can be easily achieved. Since good characteristics suitable for driving an organic EL can be stably obtained, the produced organic EL exhibited high luminance and long life characteristics.

  Although the example of the organic EL display device applied to the top gate type TFT has been described above, the present invention can also be applied to a bottom gate type TFT as shown in an example described later.

  FIG. 3 is a cross-sectional view of an essential part for explaining an application example of the semiconductor layer of the present invention to a liquid crystal display device which is Embodiment 3. First, a top gate TFT using the semiconductor layer 4 of the present invention was formed by the same method as in Example 1. The difference from the first embodiment is that a transparent conductive film is used as the pixel electrode 16. Specifically, an ITO film was formed by a sputtering method and processed into a transparent electrode pattern 16 using photolithography. The film thickness was 70 nm. Next, as shown in FIG. 3, an alignment film 22 was formed on the pixel electrode 16. Next, a counter substrate 27 on which a color filter layer 23, an overcoat layer 24, a counter electrode 25 made of an ITO film, and an alignment film 26 were formed in this order was bonded through a spacer 28. Liquid crystal 29 was sealed in this to produce a liquid crystal display device.

As described in Embodiment 1, the TFT using the semiconductor layer 4 of the present invention can reduce the off-current to 10 ⁻¹² A or less and stably obtain good characteristics. Even when applied to, the leakage current was small and high-quality images could be obtained. Although the example applied to the top gate type TFT has been described above, the present invention can also be applied to a bottom gate type TFT as shown in an example described later.

  FIG. 4 is a cross-sectional view of an essential part for explaining an application example to a TFT constituting a pixel of a liquid crystal display device which is a fourth embodiment of the semiconductor layer of the present invention. Example 4 is an application example to a bottom gate type TFT. First, the gate electrode wiring 6 was formed on the insulating substrate 1. Note that the base film is not shown. As a material of the gate electrode wiring 6, metals such as Nb, Mo, W, Ta, Cr, Ti, Fe, Ni, Co, alloys thereof, and laminated films thereof can be used. Furthermore, since the upper limit temperature of the process can be lowered, a low resistance metal such as Al or Cu can be used. These films can be formed by a sputtering method. In this example, an AlNd alloy film was used, and the film thickness was 200 nm. Next, the pattern of the gate electrode wiring 6 was processed using photolithography.

Next, the gate insulating film 5 was formed on the gate electrode wiring 6. As a material of the gate insulating film 5, SiO ₂ , SiN or the like can be used. These films can be formed by a plasma CVD method or a sputtering method. Alternatively, plasma oxidation, photooxidation, etc. may be used in combination. In this example, a SiO ₂ film formed by a plasma CVD method using TEOS was used, and the film thickness was 100 nm.

  Next, as the semiconductor layer 4 of the present invention on the gate insulating film 5, a first layer 4a made of a low-hydrogen-containing polycrystalline SiGe film formed by a reactive thermal CVD method capable of obtaining good crystallinity, and capacitive coupling A two-layer structure was formed with the upper layer film 4b made of high-hydrogen-containing amorphous Si continuously formed by the method of plasma CVD, and the H concentration in the semiconductor layer 4 was made higher on the surface side than on the insulating substrate side. The thickness of the first layer 4a and the upper layer film 4b was 20 nm and 200 nm, respectively.

  Next, an n + Si film to be the contact layers 30 and 31 was formed by a plasma CVD method. The film thickness was 40 nm. Thereafter, the stacked film of the n + Si film and the semiconductor layer 4 was processed into an island shape by using photolithography. Next, a source electrode wiring 12 and a drain electrode wiring 13 were formed thereon. As the material 13 of the source electrode wiring 12 and the drain electrode wiring, metals such as Nb, Mo, W, Ta, Cr, Ti, Fe, Ni, Co, alloys thereof, and laminated films thereof can be used. Furthermore, since the upper limit temperature of the process can be lowered, a low resistance metal such as Al or Cu can be used. These films are formed by a sputtering method. In this example, an AlNd alloy / Cr laminated film was used, and the film thickness was 200/50 nm. Subsequently, the pattern of the source electrode wiring 12 and the pattern of the drain electrode wiring 13 were processed using the photolithography method. Next, the n + Si film on the channel region 32 was etched using the source electrode wiring 12 and the drain electrode wiring 13 as a mask to form contact layers 31 and 32.

  Next, a SiN film was formed as a protective insulating film 14 on the source electrode wiring 12 and the drain electrode wiring 13 by a plasma CVD method. The film thickness was 500 nm. Next, an organic resin was formed thereon as an interlayer insulating layer 9. Thereafter, contact holes 15 were formed in the interlayer insulating layer 9 and the protective insulating film 14 using photolithography. Finally, a reflective metal film or a transparent conductive film was formed as the electrode material of the pixel electrode 16. In this embodiment, an Al film is formed as the pixel electrode 16 by a sputtering method and processed using a photolithography method. The film thickness was 100 nm.

  Unlike the case of the top gate TFT described in the first to third embodiments, a channel is formed on the insulating substrate 1 side in the case of the bottom TFT of this embodiment. Therefore, the polycrystalline SiGe film constituting the semiconductor first layer 4a serving as the channel portion is required to have both good crystallinity and defect termination characteristics due to hydrogen.

  In the present embodiment, the semiconductor layer 4 having the above-described configuration can use a SiGe film formed by a reactive thermal CVD method in which the first layer 4a of the semiconductor layer 4 has few defects and good crystallinity can be obtained. It was. Even when a polycrystalline SiGe film having a low hydrogen content is used, it is necessary for hydrogen termination of the polycrystalline SiGe film 4a by supplying hydrogen from the high hydrogen-containing film 4b constituting the upper film 4b of the semiconductor layer 4. High H concentration could be secured. This hydrogen supply is performed immediately after the formation of the first layer 4a of the semiconductor layer 4 and immediately above the first layer 4a simultaneously with the formation of the semiconductor layer 4b, so that the hydrogen supply can be efficiently performed. Crystal defects in 4a can be terminated efficiently. The interface state of the channel portion can also be reduced. By using this polycrystalline Si film as the semiconductor layer 4 of the TFT, it was possible to obtain a TFT having good characteristics with high mobility and little threshold (Vth) shift even when a bottom TFT was applied. . In addition, since it is not necessary to separately provide a heat treatment process for hydrogen termination, the process can be shortened, and the process damage corresponding to the thermal history that is experienced at the time of hydrogen termination can be reduced.

In this embodiment, the reactive thermal CVD method is used as the first layer constituting the first layer 4a of the semiconductor layer 4. Specifically, for example, a SiGe film having a film thickness of 20 nm was formed under the conditions of GeF ₄ : 0.25 sccm, Si ₂ H ₆ : 3 sccm, He: 1 slm, a substrate temperature of 450 ° C., and a gas pressure of 665 Pa.

  On the other hand, the high hydrogen content Si film that is the upper layer film 4b of the semiconductor layer 4 can be obtained by optimizing film formation conditions such as reaction gas species, flow rate, gas pressure, power density, and substrate temperature in the plasma CVD method. It can be adjusted to an arbitrary crystallinity from a crystalline film to an amorphous film. In the case of a bottom gate type TFT, the channel is formed by the first-layer polycrystalline SiGe film formed by the reactive thermal CVD method located on the insulating substrate side. The contribution to the crystallinity of the upper layer film 4b located on the surface side in the layer is small. Utilizing this characteristic, for example, when it is desired to further reduce the leakage current in the semiconductor layer and realize a TFT having a good off-current characteristic, the upper layer film 4b can be formed under the condition that an amorphous Si film can be continuously formed. It is also possible to form a film.

In this example, a parallel plate plasma CVD method was used as the upper layer film 4b of the semiconductor layer 4 on the surface side. Specifically, for example, an amorphous Si film was continuously formed using SiH ₄ : H ₂ = 1: 1, a substrate temperature of 320 ° C., and a gas pressure of 80 Pa. The film thickness was 200 nm. As in the first to third embodiments, a polycrystalline Si film can be continuously formed as the upper film 4b of the semiconductor layer.

  FIG. 5 is a cross-sectional view of an essential part for explaining an application example to a TFT constituting a pixel of an organic EL display device which is a fifth embodiment of the semiconductor layer of the present invention. First, a bottom gate type TFT using the semiconductor layer 4 of the present invention is formed by the same method as in Example 4. Then, after forming the pixel electrode 16, the organic EL charge transport layer 17, the light emitting layer 18, and the charge transport layer 19 are formed on the pixel electrode 16 by vapor deposition, and a transparent conductive film is formed as the upper electrode 20. An organic EL display device was manufactured by forming the sealing layer 21 by vapor deposition or sputtering.

As described in Example 4, since the TFT using the semiconductor layer 4 of the present invention has good crystallinity, a mobility of 5 cm ² / VS or more can be easily achieved. Since good characteristics suitable for driving an organic EL can be stably obtained, the produced organic EL exhibited high luminance and long life characteristics.

  FIG. 6 is a cross-sectional view of an essential part for explaining an application example of the semiconductor layer of the present invention to a liquid crystal display device that is Embodiment 6. In FIG. First, a top gate type TFT using the semiconductor layer 4 of the present invention is formed by the same method as in Example 4. Then, the pixel electrode 16 is formed. The difference from the fourth embodiment is that a transparent conductive film is used as the pixel electrode 16. Specifically, an ITO film was formed by a sputtering method and processed into a transparent electrode pattern 16 using photolithography. The film thickness was 70 nm. Similar to FIG. 3, an alignment film was formed on the pixel electrode 16 (not shown). Next, a counter substrate 27 on which a color filter layer 23, an overcoat layer 24, a counter electrode 25 made of an ITO film, and an alignment film 26 were formed in this order was bonded through a spacer 28. Liquid crystal 29 was sealed in this to produce a liquid crystal display device.

As described above in Example 4, the TFT using the semiconductor layer 4 of the present invention can reduce the off-current to 10 ⁻¹² A or less and stably obtain good characteristics. When applied to, the leakage current is small and high-quality images can be obtained.

  In the first to sixth embodiments described above, the application example to the pixel circuit of the active drive display device such as the TFT, the organic EL display device, and the liquid crystal display device has been described. Is also applicable. Further, the application destination of the present invention is not limited to this, and for example, by applying it to a semiconductor device such as a solar cell, a semiconductor device having a uniform and good characteristic over a large area is provided at a low cost and with a high yield. Is possible.

It is principal part sectional drawing explaining the example applied to TFT which comprises the pixel of the liquid crystal display device which is Example 1 of the semiconductor layer of this invention. It is principal part sectional drawing explaining the example applied to TFT which comprises the pixel of the organic electroluminescence display which is Example 2 of the semiconductor layer of this invention. It is principal part sectional drawing explaining the example applied to the liquid crystal display device which is Example 3 of the semiconductor layer of this invention. It is principal part sectional drawing explaining the example applied to TFT which comprises the pixel of the liquid crystal display device which is Example 4 of the semiconductor layer of this invention. It is principal part sectional drawing explaining the example applied to TFT which comprises the pixel of the organic electroluminescence display which is Example 5 of the semiconductor layer of this invention. It is principal part sectional drawing explaining the example applied to the liquid crystal display device which is Example 6 of the semiconductor layer of this invention. It is a figure which shows the depth direction RBS analysis example of Si, Ge, and O in the semiconductor film 4 of this invention. It is a figure which shows the depth direction SIMS analysis example of F and H in the semiconductor film 4 of this invention.

Explanation of symbols

1 ... insulating substrate, 2 ... SiN film, 3 ... SiO ₂ film, 4 ... semiconductor layer, 5 ... gate insulating film, 6 ... gate electrode wiring, 7 ... Interlayer insulating layer, 8, 9 ... contact region, 10, 11, 15 ... contact hole, 12 ... source electrode wiring, 13 ... drain electrode wiring, 14 ... protective insulating layer, 16 ... Pixel electrode, 17 ... Charge transport layer, 18 ... Light emitting layer, 19 ... Charge transport layer, 20 ... Upper electrode, 21 ... Sealing layer, 22,26 ... Alignment layer 23 ... Color filter layer 24 ... Overcoat layer 25 ... Counter electrode 27 ... Counter substrate 28 ... Spacer 29 ... Liquid crystal 30, 31, ... Contact layer, 32... Channel region, 4a... Low hydrogen content polycrystalline Si (or SiGe) film, 4b · High hydrogen containing Si film.

Claims (23)

A semiconductor layer formed on an insulating substrate and containing at least silicon, germanium, and hydrogen,
A semiconductor layer, wherein a hydrogen concentration in the semiconductor layer is high on a surface opposite to the insulating substrate. A semiconductor layer formed on an insulating substrate and containing at least silicon, fluorine, and hydrogen;
A semiconductor layer, wherein a hydrogen concentration in the semiconductor layer is high on a surface opposite to the insulating substrate. In claim 1,
A semiconductor layer characterized in that a germanium concentration in the semiconductor layer is low on the surface side opposite to the insulating substrate. In claim 2,
A semiconductor layer, wherein the fluorine concentration in the semiconductor layer is low on the surface side opposite to the insulating substrate. In claim 1 or 2,
A semiconductor layer, wherein a hydrogen concentration in the semiconductor layer is 1 × 10 ¹⁸ cm ⁻³ or more and 2 × 10 ²⁰ cm ⁻³ or less on the insulating substrate side. In claim 1 or 2,
A semiconductor layer, wherein a hydrogen concentration in the semiconductor layer is 5 × 10 ²⁰ cm ⁻³ or more and 1 × 10 ²² cm ⁻³ or less on the surface side. In claim 1 or 2,
The semiconductor layer is composed of a plurality of layers having different hydrogen concentrations. In claim 7,
Of the plurality of layers having different hydrogen concentrations constituting the semiconductor layer, at least the first layer on the insulating substrate side is a polycrystalline film formed by a thermal CVD method using a compound containing hydrogen and a compound containing halogen A semiconductor layer characterized in that In claim 8,
Among the plurality of layers having different hydrogen concentrations constituting the semiconductor layer, an upper layer film located on the surface opposite to the insulating substrate is formed by a plasma CVD method such as a capacitive coupling method, an inductive coupling method, or a high density plasma method. A semiconductor layer, which is a formed film. In claim 8,
The thickness of said 1st layer is 5 nm or more and 40 nm or less, The semiconductor layer characterized by the above-mentioned. In claim 8,
A plurality of layers having different hydrogen concentrations constituting the semiconductor layer are formed of a polycrystalline film having columnar crystal grains that continue from the insulating substrate side toward the surface side opposite to the insulating substrate. A semiconductor layer characterized by the above. In claim 8,
Of the plurality of layers having different hydrogen concentrations constituting the semiconductor layer, the upper layer film located on the surface side opposite to the insulating substrate is composed of an amorphous film. In claim 8,
The semiconductor layer, wherein the compound containing hydrogen is a silane compound. In claim 8,
The semiconductor layer, wherein the halogen-containing compound is a germanium halide compound.   A semiconductor device formed on an insulating substrate, containing at least silicon, germanium, and hydrogen, and having a high conductive layer on the surface opposite to the insulating substrate as an active layer .   A semiconductor device formed on an insulating substrate and containing at least silicon, fluorine, and hydrogen, and a conductive layer having a high hydrogen concentration on the surface opposite to the insulating substrate is used as an active layer . In claim 15 or 16,
A semiconductor device comprising a thin film transistor in which a source electrode, a drain electrode, and a gate electrode are provided in the semiconductor layer. A conductive layer formed on an insulating substrate, containing at least silicon, germanium, and hydrogen, and having a high hydrogen concentration on the surface side opposite to the insulating substrate, serves as an active layer, and the semiconductor layer has a source electrode, It has a thin film transistor provided with a drain electrode and a gate electrode,
A display region in which a plurality of pixels each having a lower electrode driven by the thin film transistor, an organic light emitting layer stacked on the lower electrode, and an upper electrode provided to cover the organic light emitting layer are arranged in a matrix A display device comprising: A conductive layer formed on an insulating substrate and containing at least silicon, fluorine, hydrogen, and having a high hydrogen concentration on the surface side opposite to the insulating substrate is an active layer, and the semiconductor layer has a source electrode, It has a thin film transistor provided with a drain electrode and a gate electrode,
A display region in which a plurality of pixels each having a lower electrode driven by the thin film transistor, an organic light emitting layer stacked on the lower electrode, and an upper electrode provided to cover the organic light emitting layer are arranged in a matrix A display device comprising: A conductive layer formed on an insulating substrate, containing at least silicon, germanium, and hydrogen, and having a high hydrogen concentration on the surface side opposite to the insulating substrate, serves as an active layer, and the semiconductor layer has a source electrode, It has a thin film transistor provided with a drain electrode and a gate electrode,
A display device comprising: a display region in which a plurality of pixels each having a pixel electrode driven by the thin film transistor and a counter electrode provided through liquid crystal are arranged in a matrix. A conductive layer formed on an insulating substrate and containing at least silicon, fluorine, hydrogen, and having a high hydrogen concentration on the surface side opposite to the insulating substrate is an active layer, and the semiconductor layer has a source electrode, It has a thin film transistor provided with a drain electrode and a gate electrode,
A display device comprising: a display region in which a plurality of pixels each having a pixel electrode driven by the thin film transistor and a counter electrode provided through liquid crystal are arranged in a matrix. A conductive layer formed on an insulating substrate, containing at least silicon, germanium, and hydrogen, and having a high hydrogen concentration on the surface side opposite to the insulating substrate, serves as an active layer, and the semiconductor layer has a source electrode, It has a thin film transistor provided with a drain electrode and a gate electrode,
A display device comprising a peripheral circuit driven by the thin film transistor. A conductive layer formed on an insulating substrate and containing at least silicon, fluorine, hydrogen, and having a high hydrogen concentration on the surface side opposite to the insulating substrate is an active layer, and the semiconductor layer has a source electrode, It has a thin film transistor provided with a drain electrode and a gate electrode,
A display device comprising a peripheral circuit driven by the thin film transistor.

Images