TW201013606A - Active matrix substrate, display panel, display device and method for manufacturing active matrix substrate - Google Patents

Active matrix substrate, display panel, display device and method for manufacturing active matrix substrate Download PDF

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Publication number
TW201013606A
TW201013606A TW098124830A TW98124830A TW201013606A TW 201013606 A TW201013606 A TW 201013606A TW 098124830 A TW098124830 A TW 098124830A TW 98124830 A TW98124830 A TW 98124830A TW 201013606 A TW201013606 A TW 201013606A
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Taiwan
Prior art keywords
wiring
active matrix
electrode
matrix substrate
film
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TW098124830A
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Chinese (zh)
Inventor
Tomonori Matsumuro
Noboru Fukuhara
Akira Hasegawa
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Sumitomo Chemical Co
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/131Interconnections, e.g. wiring lines or terminals
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00Organic light-emitting devices
    • H10K50/80Constructional details
    • H10K50/805Electrodes
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/40Arrangements for improving the aperture ratio
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2203/00Function characteristic
    • G02F2203/01Function characteristic transmissive

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Nonlinear Science (AREA)
  • Optics & Photonics (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Electroluminescent Light Sources (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Liquid Crystal (AREA)

Abstract

An active matrix substrate (101A) of the present invention includes a transparent substrate (10), transparent wirings (LG, LD, LP, L1, L2 and the like) formed on the transparent substrate, a transparent semiconductor layer (44) covering at least one part of the transparent wirings, and transparent insulation films (40, 50) covering at least one part of the wirings and the transparent semiconductor layer (44). The wirings contains main wirings (one part of 41 and the like) extending such that they intersects mutually in row and column directions, and sub-wirings (one part of 41, 42, 43 and the like) bifurcating from the main wirings and being connected to elements in each pixel (101a). These wirings are formed of, for example, a conductive material such as ZTO and ITO.

Description

201013606 六、發明說明: 【發明所屬之技術領域】 本發明係關於一種主動矩陣基板、顯示面板、顯示裝 置及主動矩陣基板的製造方法,且關於一種包含電晶體(特 別是薄膜電日日體’ thin-f i lm transistor,TFT)元件之主 動矩陣基板、顯示面板、顯示裝置及主動矩陣基板的製造 方法。 【先前技術】 近年末由於可實現低消耗電力、低驅動電壓化及省 空間化等’以液晶顯示(Liquid Crystal Display,LCD) 裝置、有機EL(Electro luminescence)顯示裝置等為代 表之平面顯示(Flat Panel Display)裝置之開發正盛行中。 在FPD裝置中,例如液晶顯示裝置或有機乩顯示裝置 等驅動方式,係大致區分為靜_動方式及動態驅動方 式’其中,才皮分類為動態驅動方式之主動$陣驅動方式係 由於可減低畫素間之串擾,並進行更清晰之影像再生,而 受到矚目。 在實現主動矩陣驅動方式時,一般而言係採用於各書 素具有1個以上之開關元件與電容元件等之被稱為陣^ 板的電路基板。在本說明中’將該電路基板稱為主動矩^ 基板。 在例如液晶顯示裝置之情形時,在主動矩陣基板 向基板之間設置有液晶元件。在此,從裝置内之光源 出之光係透過主動矩陣基板、液晶元件及對向基板而ς 321390 4 201013606 ·· 視,但此時藉由對液晶元件施加適當電壓並控制該液晶元 件之分子配列,而顯現作為影像之色調、色階等。 再者,在例如有機el顯示裝置之情形時,在主動矩陣 基板之主面中之一方的面侧設置有各畫素之有機發光二極 體。在此,來自有機發光二極體之光係透過主動矩陣基板 (背面發光型/底發射型)而辨視,或不透過主動矩陣基板 (上面發光型/頂發射型)而辨視,但此時藉由控制流通於有 ❹機發光二極體之電流量,而顯現作為影像之色調、色階等。 由以上之構成’主動矩陣基板係決定液晶顯示裝置或 有機EL顯示裝置等FPD之面板部分厚度的重要因素。因 此,該主動矩陣基板之開關元件係考慮到面板部分之薄型 化,一般係採用電晶體元件、特別是TFT元件等薄膜元件。 其中’藉由電極材料或半導體材料或絕緣膜材料等之 開發,可形成透明之TFT(參照例如以下所示之非專利文獻 1)。 II (先前技術文獻) 非專利文獻1 :神谷利夫等著「非晶氧化物半導體之設計 及高性能可撓薄膜電晶體之室溫形成」第19屆尖端技術大 賞參赛論文〔online〕、〔 2008年4月9日檢索〕、網際網 路 <URL . http://www. fbi~~award. jp/serrtan/;jusyou/2500/ toko_canon. pdf > 【發明内容】 (發明所欲解決之課題) 在此’作為決定液晶顯示裝置或有機EL顯示裝置等之 5 321390 201013606 !生月b的個因素而言,存在有主動矩陣基板之開口率。该 f 口率剌Μ現更高密度化或高糾及亮度料重制 〃開口率越大,越能實現高積體化、高對比或高亮度等。 然而,在前述習知之技術中,雖可實現主動矩陣基板 中之電晶體it件的透明化’但依然無法實現配線部分之透 明化。配線係被要求要有用以實現液晶顯示裝置或有機乩 顯不器裝置等之消耗電力或驅動電壓之減低之程度的大剖 ❿ 面積。因此,配線部分非透明會使習知之主動矩陣基板之 開口率的提升受到限制。 因此,本發明係鑑於上述問題而研創者,其目的在於 提供-種可提升開口率之主動矩陣基板、顯示面板、顯示 裝置及主動矩陣基板的製造方法。 (解決課題之手段) 為了達成上述目的,依據本發明, (1)一種主動矩陣基板,係具備複數個電晶體元件者, 其具備:基板,可供可見光穿透;配線,形成在前述基板 上’且可供可見光穿透;半導體層,從前述基板之厚度方 向觀看與前述配線之至少—部分重疊,且可供可見光穿 透,以及絕緣膜,用以覆蓋前述配線及半導體層之至少一 部分,且可供可見光穿透。 ^ (2)如前述(1)記載之主動矩陣基板,其中,前述配線 係包含主配線、及從該主配線點分歧且連接該主配線與前 述電晶體元件之副配線。 (3)如前述(1)或(2)記載之主動矩陣基板,其中,前述 321390 6 201013606 配線係由無機氧化物導電體材料所構成。 (4) 如前述(1)至(3)中任一項記載之主動矩陣義板 中,前述半導體層係由無機氧化物半導體材料所構成其 (5) 如前述(1)至(4)中任一項記載之主動起陣武板 中’别述配線係由以辞锡氧化物或含姻氧化物所成之、,、 體材料所構成,前述半導體層係由載體濃度比前述配^電 且以鋅錫氧化物或含銦氧化物所成之半導體材料所構^低 ❹ (6) 如前述(1)至(5)中任一項記載之主動矩陣基板,其201013606 VI. Description of the Invention: [Technical Field] The present invention relates to an active matrix substrate, a display panel, a display device, and a method for fabricating an active matrix substrate, and relates to a method comprising a transistor (especially a thin film electric solar body) An active matrix substrate, a display panel, a display device, and a method of manufacturing an active matrix substrate of a thin-f i lm transistor (TFT) device. [Prior Art] At the end of the year, it is a flat display represented by a liquid crystal display (LCD) device or an organic EL (Electro luminescence) display device, such as low power consumption, low driving voltage, and space saving. The development of Flat Panel Display devices is prevailing. In the FPD device, for example, a driving method such as a liquid crystal display device or an organic germanium display device is roughly classified into a static-moving method and a dynamic driving method, wherein the active-array driving method in which the skin is classified into the dynamic driving method is reduced. The crosstalk between the elements, and the clearer image reproduction, has attracted attention. When the active matrix driving method is implemented, it is generally used as a circuit board called a matrix board in which each of the books has one or more switching elements and capacitor elements. In the present description, the circuit substrate is referred to as a driving moment substrate. In the case of, for example, a liquid crystal display device, a liquid crystal element is provided between the active matrix substrate and the substrate. Here, the light emitted from the light source in the device passes through the active matrix substrate, the liquid crystal element, and the opposite substrate, but at this time, by applying an appropriate voltage to the liquid crystal element and controlling the molecules of the liquid crystal element Arranged as a color tone, a color scale, and the like. Further, in the case of, for example, an organic EL display device, an organic light-emitting diode of each pixel is provided on one of the principal faces of the active matrix substrate. Here, the light from the organic light emitting diode is recognized by the active matrix substrate (back light emitting type/bottom emission type), or is not reflected by the active matrix substrate (upper light emitting type/top emission type), but this is At the time of controlling the amount of current flowing through the fluorescent diode, the color tone, gradation, and the like of the image appear. From the above configuration, the active matrix substrate determines an important factor of the thickness of the panel portion of the FPD such as a liquid crystal display device or an organic EL display device. Therefore, the switching element of the active matrix substrate is generally a thin film element such as a TFT element, particularly a TFT element, in consideration of the thinning of the panel portion. In the development of an electrode material, a semiconductor material, or an insulating film material, a transparent TFT can be formed (see, for example, Non-Patent Document 1 shown below). II (Prior Art Paper) Non-Patent Document 1: Shinya Rif, et al., "Design of Amorphous Oxide Semiconductors and Formation of Room Temperature for High-Performance Flexible Films," 19th Advanced Technology Awards (online), Searched on April 9, 2008], Internet <URL. http://www.fbi~~award.jp/serrtan/;jusyou/2500/toko_canon. pdf > [Summary] (The invention wants to solve [Problem] Here, as a factor for determining a liquid crystal display device, an organic EL display device, or the like, there is an aperture ratio of the active matrix substrate. The f-port ratio is higher density or higher to correct the brightness of the material. The larger the aperture ratio, the higher the integration, high contrast, or high brightness. However, in the prior art, although the transparency of the transistor element in the active matrix substrate can be achieved, the transparency of the wiring portion cannot be achieved. The wiring system is required to be useful for realizing a large sectional area such as a power consumption of a liquid crystal display device or an organic display device or a reduction in driving voltage. Therefore, the non-transparent wiring portion limits the increase in the aperture ratio of the conventional active matrix substrate. Accordingly, the present invention has been made in view of the above problems, and an object thereof is to provide an active matrix substrate, a display panel, a display device, and a method of manufacturing an active matrix substrate which can increase an aperture ratio. In order to achieve the above object, according to the present invention, (1) an active matrix substrate comprising a plurality of transistor elements, comprising: a substrate for transmitting visible light; and wiring formed on the substrate And being transparent to visible light; the semiconductor layer is at least partially overlapped with the wiring as viewed from a thickness direction of the substrate, and is transparent to light, and an insulating film covering at least a portion of the wiring and the semiconductor layer, And can be used for visible light penetration. (2) The active matrix substrate according to the above aspect, wherein the wiring includes a main wiring, and a sub wiring that is branched from the main wiring and that is connected to the main wiring and the transistor. (3) The active matrix substrate according to (1) or (2) above, wherein the wiring of the 321390 6 201013606 is composed of an inorganic oxide conductor material. (4) In the active matrix panel according to any one of the above (1) to (3), the semiconductor layer is composed of an inorganic oxide semiconductor material (5) as in the above (1) to (4) In any of the active devices, the wiring system is composed of a tin oxide or a salt-containing oxide, and the semiconductor layer is composed of a carrier concentration. The active matrix substrate according to any one of the above (1) to (5), wherein the active matrix substrate according to any one of the above (1) to (5) is

中,前述配線之一部分係作為前述電晶體元件之電極而I 揮功能。 W (7) 如别述(1)至(6)中任一項記載之主動矩陣基板,其 中,前述配線之一部分係作為前述電晶體元件之閘極電 極、源極電極及汲極電極而發揮功能,前述絕緣膜之一部 分係作為前述電晶體元件之閘極絕緣膜而發揮功能。 (8) 如前述(1)至(7)中任一項記載之主動矩陣基板,其 中’具備第1及第2電晶體以及電容器’前述配線係構成 上之掃描線的至少—部分、」條以上之資料線的至少 曰P刀及1條以上之驅動線的至少一部分,前述第1電 j之控制端子連接在前述掃描線,輸人端子連接在前述 曰^線’而前述第2電晶體之控制端子連接在前述第j電 出端子’輸入端子連接在前述驅動線,前述電容 方電極係連接在前述驅動線,另一方端子係連接 剛述第2電晶體之控制端子。 (9)如前述⑴至⑺巾任—項記狀絲縛基板,其 321390 7 201013606 中’具備第〗電晶體及雷玄哭,‘上 之掃描線的至少一部;、係構成】條以上 及]條以上之電容線的至少一部^,貝=當至少一部分、 制端子連接在前述掃描線,且其輪入體之控 :前述電容—子係連接在前述== φ 記載任-項 板上,且可=^述+ 主動矩陣基 上.以&錢膜,形成在前述第1電極 ,及第2電極,形成在前述有機膜上。 前述第2電 具備有電性 (11) 如前述(10)記載之顯示面板,其中 極係可供可見光穿透。 ' (12) 如前述(丨丨)記載之顯示面板,其中 連接在前述第2電極之輔助電極。 前述輔助電 ❹ (13) 如前述(12)記載之顯示面板,其中 極係可供可見光穿透。 (14) 如前述(1G)至(13)中任—項記載之顯示面板,其 中,具備有形成在相對於前述有機膜為上層及下層之任二 方或雙方的濾波膜。 (15)—種顯示面板,係具備:前述(1)至(7)項及第9 項中任一項記載之主動矩陣基板;對向基板,可供可見光 穿透;液晶元件’包含液晶層、包夾該液晶層之2個配向 膜、及包夾由前述液晶層與前述2個配向膜所構成之積層 體的晝素電極與共通電極;其中,前述晝素電極與共通電 321390 8 201013606 極係可供可見光穿透’前述晝素電極係與前述主動矩陣基 • 板之前述配線電性連接’前述液晶元件係由前述主動矩陣 基板及前述對向基板所夾持。 (16)如前述(15)記載之顯示面板,其中,具備包夾由 前述主動矩陣基板、前述液晶元件及前述對向基板所構成 . 之積層體的2個偏光板。 • (17)如前述(15)或(16)記載之顯示面板,其中,具備 ❹形成在前述共通電極上之遮光膜、及形成在至少前述共通 電極上且使預定頻帶之波長穿透之濾波膜。 (18) —種顯示裝置,係具備前述(1〇)至(17)中任一項 記載之顯示面板。 (19) 一種主動矩陣基板之製造方法,係包含:第1配 線形成步驟冑可供可見光穿透之第!配線形成在可供可 見光穿透之基板上’而該第1配線的-部分包含構成電晶 體元件之電極;第1絕緣膜形成步驟,將第1絕緣膜形成 ❹在前述基板上,而該第1絕緣膜係用以覆蓋前述第!配線 之至少邙刀且邛分包含構成前述電晶體元件之絕緣 膜’ 供可見光穿透,第2配線形成步驟,將可供可見 光穿透之第2配線’形成在前述第!絕緣膜上,而其一部 分包含構成前述電晶體元件之電極;半導體層形成步驟, 將用以覆蓋前述第2配線之至少一部分且可供可見光穿透 之半導禮層,形成在前述第i絕緣膜上;以及第2絕緣膜 形成梦驟’將用以覆蓋前述半導體層及前述第2配線之至 少一部分且可供可見光穿透之第2絕緣膜,形成在前述第 321390 9 201013606 1絕緣膜上。 (20)如前述(19)記載之主動矩陣基板之製造方法,其 中,使用無機氧化物導電體材料來形成前述第2配線。 、(21)如前述⑽或(2G)記載之主動轉基板之製造方 法’其中,使用無機氧化物半導體材料來形成前述半導體 ⑽如刖述⑽至⑵)項中任1記載之主動矩陣基 ,製造方法,其中’使用由鋅錫氧化物或含銦氧化物所 2之導電體材_成前述第2配線,且使用由可使載體濃 度比前述配線低之鋅錫氧化物或含鋼氧 材料來形成前述半導體層。 仏〈千¥體 前卿至⑽項中任一項記载之主 ,之製造方法,其中,在前述半導體層形成 二述第2配線之半導體臈形成在前述且:One of the aforementioned wirings functions as an electrode of the above-described transistor element. The active matrix substrate according to any one of (1) to (6), wherein a part of the wiring is used as a gate electrode, a source electrode, and a drain electrode of the transistor element. It is a function that one of the insulating films functions as a gate insulating film of the transistor element. (8) The active matrix substrate according to any one of the above-mentioned (1) to (7), wherein the first and second transistors and the capacitor are provided with at least a portion of the scanning line of the wiring system. At least a part of the data line of at least the 曰P blade and the one or more drive lines, the control terminal of the first electric circuit is connected to the scanning line, and the input terminal is connected to the 曰^ line' and the second transistor The control terminal is connected to the input terminal of the jth electrical output terminal, and the input terminal is connected to the drive line. The capacitor side electrode is connected to the drive line, and the other terminal is connected to a control terminal of the second transistor. (9) The above-mentioned (1) to (7) towel--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- And at least one part of the capacitance line above the strip, and at least a part of the terminal is connected to the scan line, and the control of the wheeled body: the capacitor-sub-system is connected to the above == φ The first electrode and the second electrode are formed on the organic film by a & money film on the active matrix substrate. The second electric device is electrically conductive. (11) The display panel according to (10) above, wherein the electrode is transparent to visible light. (12) The display panel according to (a) above, wherein the auxiliary electrode is connected to the second electrode. The auxiliary electric device (13) is the display panel according to the above (12), wherein the electrode is transparent to visible light. The display panel according to any one of the above-mentioned (1), wherein the filter film formed on either or both of the upper layer and the lower layer with respect to the organic film is provided. (15) A display panel comprising: the active matrix substrate according to any one of (1) to (7), wherein the opposite substrate is transparent to visible light; and the liquid crystal element includes a liquid crystal layer And an aligning electrode and a common electrode sandwiching the liquid crystal layer and the laminated body comprising the laminate of the liquid crystal layer and the two alignment films; wherein the halogen electrode and the common current are 321390 8 201013606 The polar system is capable of penetrating visible light. The aforementioned halogen electrode system is electrically connected to the wiring of the active matrix substrate. The liquid crystal element is sandwiched between the active matrix substrate and the counter substrate. (16) The display panel according to the above aspect (15), comprising: two polarizing plates that sandwich the laminated body of the active matrix substrate, the liquid crystal element, and the counter substrate. The display panel according to the above aspect (15), wherein the light-shielding film formed on the common electrode and the filter formed on at least the common electrode and penetrating a wavelength of a predetermined frequency band are provided. membrane. (18) A display panel comprising the display panel according to any one of (1) to (17) above. (19) A method for manufacturing an active matrix substrate, comprising: a first wiring forming step 胄 for visible light penetration! The wiring is formed on the substrate through which the visible light can pass through, and the portion of the first wiring includes an electrode constituting the transistor element; and the first insulating film forming step forms the first insulating film on the substrate, and the first insulating film is formed on the substrate 1 insulation film is used to cover the above! At least the knives of the wiring and the division include the insulating film constituting the transistor element for transmitting visible light, and the second wiring forming step of forming the second wiring θ for allowing visible light to pass through! On the insulating film, a part thereof includes an electrode constituting the transistor element; and a semiconductor layer forming step of forming a semi-conductive layer for covering at least a part of the second wiring and allowing visible light to pass through the ith insulating layer And a second insulating film forming a second insulating film for covering at least a part of the semiconductor layer and the second wiring and allowing visible light to pass through the film, and formed on the insulating film of the aforementioned 32390 9 201013606 1 . (20) The method of producing an active matrix substrate according to (19) above, wherein the second wiring is formed using an inorganic oxide conductor material. (21) The method for producing an active substrate according to the above (10) or (2G), wherein the active matrix substrate according to any one of the items (10) to (2) of the semiconductor (10) is formed using an inorganic oxide semiconductor material. a manufacturing method in which 'the use of a zinc-tin oxide or an indium-containing oxide 2 conductive material _ into the aforementioned second wiring, and using a zinc tin oxide or a steel oxide-containing material which can lower the carrier concentration than the aforementioned wiring The foregoing semiconductor layer is formed. The manufacturing method according to any one of the preceding claims, wherein the semiconductor layer in which the second wiring is formed in the semiconductor layer is formed as described above:

使前述第2配線不會露出之太守mm# , U 成前述半導體層。 式刻該半導體膜,從而形 ❹ 如前述⑽至⑵)射任—項記载 f,製造方法,其中,在前述第1配線形成步驟 系巴緣膜形成步驟、前述第2配 1^ :形成步驟及前述第2絕緣膜形成步夂之至 :第=法,法,來形成二::步: 絕=㈣、_第2轉、前料料相前述第2 (發明之效果) 321390 10 201013606 队娜个放%,田於主動矩酿其 呈透明’因此可使絲輯基板之開目對於可見光 者,基於同樣之理由,依據本發明,可製^地提升。再 提升之主動矩陣基板。而且,藉 &開口率被大鴨 基板,即可實賴口树大缺狀顯n之主動矩陣 【實施方式】 板及顯示裝置。 以下參照®式詳細地糾實施本發 , 態。本發明並非受限於以下之實施形取佳實施形 中,各圖係僅以可理解本發明之内容㈣=以下之說明 狀、大小及位置關係,因此本發明 性顯不形 示之形狀、大小及位置關係。再者,在各=在各圖戶斤例 之清楚化,省略剖面之陰影線的一部分。’為/了構成 例示之數值係僅為本發明之較佳:在後述所 在例示之憾者。 目此树明並非限定 (實施形態1) ®首先,以有機EL顯示裂置刚為例說明本發明實施形 態1之顯示裝置。第1圖係顯示有機虹顯示震置ι〇〇之概 略構成的方塊圖。再者,在本實施形態中,係列舉所謂之 背面發光型(底發射型)的有機既顯示褒置1〇〇,其係可將 來自發光元件(例如第4圖中之有機發光二極體Μ)的光經 由元件基板(例如第4圖中之主動矩陣基板1〇u)從該基板 之下表面(例如第4圖中之下表面1〇〇a)輸出至外部。 (整體構成) 如第1圖所示,有機EL顯示裝置100係具備:包含以 321390 11 201013606 2維矩陣狀配列之晝素(PX)l〇la的顯示面板ιοί ;連接在 該顯示面板101之掃描驅動部103、資料驅動部104、電容 線驅動部1 〇 5及驅動信號產生部1 〇 β ;以及用以控制各部 之信號控制部102。再者,顯示面板1〇1係具備紅、緑 (G)及藍(B)之各個三原色的畫素1〇la。 在此,顯示面板101係包含:連接在掃描驅動部, 且刀別傳達掃描化號之掃描線LG1、lG2、…、Lgn(以下將任 意之掃描線设為L<〇 ;連接在資料驅動部1〇4,且分別傳逵 資料信號之資料線u、u、u、…、Lm(以下將任 料線設為Ld);連接在電容線驅動部1〇5,且分別傳達電容 線驅動信號之電容線Lel、Le2、Le3、“.、LeM(以下將任意之 電容線設為Le);連接在驅動信號產生部⑽,且分別傳達 驅動信號之驅動線Ln、LP2、U、...、Lpm(以下將任意之掃 描線設為Lp)。 各掃描線LC1至1^係朝圖中大致列方向延伸,各資料 線1至L DM係朝圖中大致行方向延伸。因此,掃描線LG,至 〔、貧料線Ldu係以2維矩陣狀交叉。各晝素101a 係分別配置在該2維矩陣之交又部分,且連接在對摩之掃 广:及資料線Ld。再者,各電容線至L⑶係與資料線 So 接在配置於各交叉部分的書 大致平行地㈣θ f ^係與資㈣1^至“ 大致+仃地延伸,且連接在配置於各交叉 101a。在本實施形態中,在 ^邛刀的旦素 LC及驅動線1^的各者中G、mD、電容線 將以彼此交叉之方式朝行列方向 321390 12 201013606 延伸之配線部分設為魏線,將從以祕分歧且連 各晝素1〇la中之開關電晶_或驅動電晶體Q2或電0 ^ ^例如第2圖)等元件的配線部分設為副配線。再 連接各70件間之配線(U、L2等)設為副配線。 仏號控制部102係依據從外部輪 B及用以控制其顯示之輸:入,梅號R、G、 芈同綠缺H 、 旒(資料致能信號DE、水 ❹ ❹ 產4用二在厂此+直同步信號〜⑶、主時脈說尺等), 產生用讀制影像再生之掃描控制 = 信號CONT2、電容線控制信號pnMTq & 貝枓控制 及視頻資料信號DAT等。,、光控制信號C0NT4The second wiring is not exposed to the front of the semiconductor layer. In the above-described (10) to (2)), the method for producing a semiconductor film, wherein the first wiring forming step is a film forming step, and the second portion is formed. The step and the second insulating film forming step are as follows: the first method, the method, to form two:: step: absolutely = (four), _ second turn, the front material phase, the second (the effect of the invention) 321390 10 201013606 The team is put in a %, and the field is made to be transparent in the active moment. Therefore, the opening of the silk substrate can be improved for the visible light, for the same reason, according to the present invention. The active matrix substrate is then upgraded. Moreover, the borrowing & aperture ratio is the base of the duck, and the active matrix of the large-sized tree can be realized. [Embodiment] A board and a display device. The following is a detailed explanation of the present invention with reference to the formula. The present invention is not limited to the following embodiments, and the drawings are only for the understanding of the content (4) of the present invention = the following description, size and positional relationship, and thus the shape of the present invention is not shown, Size and location relationship. In addition, each part is clearly clarified in each figure, and a part of the hatching of the section is omitted. The numerical values constituting the exemplifications are only preferred in the present invention: they are exemplified in the following description. The present invention is not limited to the embodiment (Embodiment 1). First, the display device of the first embodiment of the present invention will be described by taking an organic EL display crack as an example. Figure 1 is a block diagram showing the outline of an organic rainbow display. Further, in the present embodiment, a series of so-called back-illuminated type (bottom-emission type) organic materials are used to display a plurality of light-emitting elements (for example, the organic light-emitting diodes in FIG. 4). The light of the Μ) is output from the lower surface of the substrate (for example, the lower surface 1〇〇a in FIG. 4) to the outside via the element substrate (for example, the active matrix substrate 1〇u in FIG. 4). (Overall Configuration) As shown in Fig. 1, the organic EL display device 100 includes a display panel ιοί including a matrix of 321390 11 201013606 two-dimensionally arranged in a matrix, and is connected to the display panel 101. The scan driving unit 103, the data driving unit 104, the capacitance line driving unit 1 and the driving signal generating unit 1 〇β, and the signal control unit 102 for controlling each unit. Further, the display panel 1〇1 is provided with pixels 1〇la of three primary colors of red, green (G) and blue (B). Here, the display panel 101 includes scan lines LG1, 1G2, ..., Lgn connected to the scan driving unit and transmitting the scan number (hereinafter, any scan line is set to L<〇; connected to the data drive unit) 1〇4, and the data lines u, u, u, ..., Lm of the data signal are respectively transmitted (hereinafter, the line is set to Ld); connected to the capacitor line driving unit 1〇5, and respectively transmit the capacitance line driving signal The capacitance lines Lel, Le2, Le3, "., LeM (hereinafter any arbitrary capacitance line is set to Le); the drive lines Ln, LP2, U, ... which are connected to the drive signal generating portion (10) and respectively transmit drive signals Lpm (hereinafter, any scanning line is set to Lp). Each of the scanning lines LC1 to 1^ extends in a substantially column direction in the drawing, and each of the data lines 1 to LDM extends in a substantially vertical direction in the drawing. LG, to [, the poor material line Ldu is crossed in a two-dimensional matrix. Each element 101a is placed in the intersection of the two-dimensional matrix, and connected to the sweeping of the friction: and the data line Ld. The capacitance lines to the L(3) system are connected to the data line So in a book arranged at each intersection. (4) θ f ^ system and capital (4) 1 ^ to "substantially + 仃 extended, and connected to each intersection 101a. In the present embodiment, G, mD, capacitance lines will be in each other in each of the denier LC and the drive line 1^ The way of crossing is toward the row and column direction 321390 12 201013606 The extension part of the wiring is set to the Wei line, which will be divergent and connected to the switching transistor in the element 1〇la or the driving transistor Q2 or the electric 0 ^ ^ for example 2 The wiring portion of the element such as Fig.) is set as the sub wiring. The wiring (U, L2, etc.) between the 70 pieces is connected to the sub wiring. The nickname control unit 102 is based on the input from the outer wheel B and the display for controlling the display thereof, the plum number R, the G, the 绿 green deficiency H, the 旒 (the data enable signal DE, the water ❹ 产 production 4 This + direct synchronization signal ~ (3), the main clock ruler, etc.), generate scan control with read image reproduction = signal CONT2, capacitance line control signal pnMTq & Bessie control and video data signal DAT. ,, light control signal C0NT4

103。:= =控制信號㈣1係輸入至掃描驅動部 W控制W〇)NT1係包含用以指示 P 二:;之輸出開始的垂直同步開始信號、二: 電壓V°n之輸出時序的閘時脈信號及用以控制閘通 _之輸出期_輸紐能錢等。再者,在墨 =亦輪人有用以使包含在各晝素ma之開關電日體動〇部 碰。掃描驅動ζ Γ閘導通電壓v°n及閘關斷電髮 通電壓Von及門關^ 掃描控制信號贿1從開導 信號輸:::電壓V。一信號’並將該掃描 入5 ^,資料妈_ ·2及涵㈣錢DAT係於 一貝^驅動部104。資料控制信號C0NT2係包含用以= 資料#脖…/之輸入開始的水平同步開始信號或將 、〜狗入至貧料、線Ld之載入信號等。資料驅動部_ 32139〇 13 201013606 係依據資料控制信號C0NT2使所接收之視頻資料信號DAT 閂鎖後,適當地產生對應視頻資料信號DAT之資料信號, 並將該資料信號輸入至資料線Ld。 ·- 再者,電容線控制信號C0NT3係輸入至電容線驅動部 105。 電容線控制信號C0NT3係用以產生電容線Lc驅動用之 電容線驅動信號的信號。電容線驅動部105係依據電容線 控制信號C0NT3產生用以驅動電容線Lc之電容線驅動信 號,將該電容線驅動信號輸入至電容線Lc。 再者,發光控制信號CONT4係輸入至驅動信號產生部 ® 106。 發光控制信號C0NT4係用以產生驅動有機發光二極體 Dl(參照第2圖)用之驅動信號的信號。驅動信號產生部106 係用以產生依據發光控制信號C0NT4使有機發光二極體D1 發光或非發光之驅動信號,並將該驅動信號輸入至驅動線 Lp。 此外,驅動信號係輸入至後述之有機發光二極體D1之 陽極。而且,在有機發光二極體D1之陰極輸入有共通電壓 q103. := = control signal (4) 1 is input to the scan drive unit W control W〇) NT1 includes a vertical synchronization start signal for indicating the start of the output of P 2:; and a gate clock signal for the output timing of the voltage V°n And to control the gate _ output period _ lose the new energy. In addition, in the ink = also useful for people to make the switch of the electric element included in each element of the ma is touching. Scan drive Γ 导 导 导 v v v 及 及 及 v v v v v v v v 扫描 扫描 扫描 扫描 扫描 扫描 扫描 扫描 扫描 扫描 扫描 扫描 扫描 扫描 扫描 扫描 扫描 扫描 扫描 扫描 扫描 扫描 扫描 扫描 扫描A signal 'and the scan into 5 ^, the data mother _ · 2 and the culvert (four) money DAT is attached to a drive unit 104. The data control signal C0NT2 includes a horizontal synchronization start signal for starting the input of the data # neck... or a load signal for the dog, the dog, the line, and the line Ld. The data driving unit _ 32139 〇 13 201013606 latches the received video data signal DAT according to the data control signal C0NT2, appropriately generates a data signal corresponding to the video data signal DAT, and inputs the data signal to the data line Ld. Further, the capacitance line control signal C0NT3 is input to the capacitance line driving unit 105. The capacitance line control signal C0NT3 is a signal for generating a capacitance line driving signal for driving the capacitance line Lc. The capacitance line driving unit 105 generates a capacitance line driving signal for driving the capacitance line Lc based on the capacitance line control signal C0NT3, and inputs the capacitance line driving signal to the capacitance line Lc. Further, the light emission control signal CONT4 is input to the drive signal generation unit ® 106. The light emission control signal C0NT4 is used to generate a signal for driving a driving signal for the organic light emitting diode D1 (refer to Fig. 2). The drive signal generating unit 106 is configured to generate a drive signal for causing the organic light-emitting diode D1 to emit light or not according to the light-emission control signal C0NT4, and input the drive signal to the drive line Lp. Further, the drive signal is input to the anode of the organic light-emitting diode D1 to be described later. Moreover, a common voltage is input to the cathode of the organic light emitting diode D1.

Vcom(參照第2圖)。因此,在本實施形態中,藉由將使有 機發光二極體D1發光之期間的驅動信號之電壓位準設為 比共通電壓Vcom的電壓高,並將上述以外之期間的驅動信 號之電壓位準設為與共通電壓Vcom相同或比共通電壓vom 低,而控制有機發光二極體D1之發光/非發光。在此,共 通電壓Vcom係可設為例如接地電位。再者,亦可使用電源 線來取代驅動線Lp。此時,係省略驅動信號產生部106, 並對電源線施加電源電壓。 14 321390 201013606 (晝素構成) _· 接著,利用第2圖說明各晝素101a之概略構成及其動 作。此外,以下之說明中,對於R、G、B中之任一晝素101a 亦同。 第2圖係顯示晝素101a之概略電路構成的示意圖。如 第2圖所示,晝素101a係包含開關電晶體Q1、驅動電晶 體Q2、電容器C1及有機發光二極體D1。 開關電晶體Q1係例如η型之TFT,其源極S係連接在 ®例如節點N1中從資料線Ld之主配線分歧的副配線,汲極D 係經由包含節點N1之配線L1連接在驅動電晶體Q2之閘極 G。此外,開關電晶體Q1之閘極G係連接在例如節點N3中 從掃描線Lg之主配線分歧的副配線。因此,開關電晶體Q1 係依據掃描信號之電壓位準Vg(掃描控制電壓)使資料線Ld 及節點N1間導通或斷路。 在配線L1,經由在例如節點N1中分歧之配線部分(此 @部分亦包含在配線L1)連接有電容器C1之一方端子。電容 器C1之另一方端子係連接在例如節點N5中從電容線Lc之 主配線分歧的副配線。從上述電容線驅動部105對電容線 Lc施加電容線驅動信號。該電容線驅動信號之電壓位準 Vc(電容線驅動電壓)係可設成例如接地電位。換言之,電 容線Lc係可設成接地線。此時,可省略電容線驅動部105。 在此,當輸入至掃描線Lg之掃描信號的電壓位準Vg(掃 描控制電壓)成為高位準時,開關電晶體Q1成為導通狀 態,且經由該開關電晶體Q1將對應資料信號之電壓位準 15 321390 201013606 vd(=__的電荷注入驅動電晶賴的_ 果辨驅動電晶體Q2成為導通狀態,節點N3及發光: 極體D1間會導通。 俄發先— 在此’電容器Π係在從掃描線Lg之電壓位準 低位準且開關電晶體Q1完全成為_狀態後、到下—= 位準Vg成為高位準且開關電晶體Qi成為導通讓狀離:; 入下一個資料信號為止之期間,發 ^輪 ⑩ Γ 電位的作用。亦即,電容器㈣在預定期間伴i 輸入至資料線^之資料。 e门侏符 ,動電晶體Q2係例如η型之m,纽極 列如卽點N6中從驅動線主配線分歧的副配^在 係經由節點N2連接在有機發# _S ,+古纽丄 男機發先—極體D1之陽極。此外, 在有機發光二極體D1之险炻 垃Μ… 極施加有共通電壓Vcom(例如 接地電位GND)。因此,當驅動電曰 』如 曰斟κ A 田他勒罨日日體Q2成為導通狀態, 且對%極施加電源電壓VDD時, 光二極體m,因此,有機丄會流至有機發 ❹ 之電流量的亮度發光。二=電係::電流1 狀態時,㈣H動UQ2為關斷 會發光。 至有機發光二極體D1,因此不 之佈局構造及W么圖,坪細地說明各晝素101a 及層構造。苐3圖係用以說明畫素驗之主動 =1_參_如第4圖)的佈局構造的概略平面 圖侧以說明畫素_之層構造的概略剖面圖。 而在第3圖中,為了今B日, 為了 °兒月之間化,係省略透明基板10、層 321390 16 201013606 間絕緣膜40及50等之構成(參照例如第4圖)。第4圖係 _· 連續地顯示第3圖之A-A’之切斷端面的晝素101a之概略 ’― 性層構造。再者,在以下之說明中,為了說明之明確化, 對於同一層之相同種類之膜標記相同之符號。 如第3圖或第4圖所示,晝素101a係具備:作為陣列 基板之主動矩陣基板101A(參照例如第4圖);及主動矩陣 基板101A上之有機發光二極體D1(參照例如第4圖)。主 動矩陣基板101A係包含例如掃描線L·、資料線Ld、電容線 ® Lc、驅動線Lp、配線L1與L2、開關電晶體Q1、驅動電晶 體Q2及電容器C1。有機發光二極體D1係包含夾置於陽極 電極61及陰極電極63之有機膜62,經由例如配線L2而 連接在驅動電晶體Q2之源極電極24s。再者,亦可將濾色 器設置在相對於有機發光二極體D1之光的導出側。在第4 圖中,以反白箭頭表示發光方向(光之導出方向)。 掃描線Lg係由例如透明基板10上之第1配線層41所 ❹構成(參照例如第3圖)。資料線Ld、電容線Lc、驅動線Lp 係分別例如由透明基板10上之第1配線層41及層間絕緣 膜40上之第2配線層43、形成在層間絕緣膜40之接觸件 内之接觸件内配線42、以及由用以連接相鄰接之晝素101a 間之第1配線層41的接觸件内配線42及第2配線層43所 成之立體配線RC所構成。配線L1及L2係分別由例如透明 基板10上之第1配線層41及層間絕緣膜40上之第2配線 層43、與形成在層間絕緣膜40之接觸孔内之接觸件内配 線42所構成。再者,在配線L2亦包含有例如接觸插塞51, 17 321390 201013606 24接^ 51係用以將連接在驅動電晶體Q2之源極電極 24S的弟1配線層41電性連接至有機發光二極體D1之陽 極電極61者。再者,帛2圖所示之各節點N卜n N4 N5及N6係可分別定義在例如第3圖所示之各位置。Vcom (see Figure 2). Therefore, in the present embodiment, the voltage level of the drive signal during the period in which the organic light-emitting diode D1 emits light is set to be higher than the voltage of the common voltage Vcom, and the voltage level of the drive signal in the period other than the above is set. The light-emitting/non-light-emitting of the organic light-emitting diode D1 is controlled to be the same as or lower than the common voltage Vcom. Here, the common voltage Vcom can be set to, for example, a ground potential. Furthermore, a power cord can be used instead of the drive line Lp. At this time, the drive signal generating unit 106 is omitted, and a power supply voltage is applied to the power supply line. 14 321390 201013606 (Nuclear composition) _· Next, the schematic configuration of each element 101a and its operation will be described using FIG. In addition, in the following description, the same is true for any of the elements 101a of R, G, and B. Fig. 2 is a schematic view showing the schematic circuit configuration of the halogen 101a. As shown in Fig. 2, the halogen 101a includes a switching transistor Q1, a driving transistor Q2, a capacitor C1, and an organic light-emitting diode D1. The switching transistor Q1 is, for example, an n-type TFT whose source S is connected to, for example, a sub-wiring in which the main wiring of the data line Ld is branched from the node N1, and the drain D is connected to the driving electric power via the wiring L1 including the node N1. Gate G of crystal Q2. Further, the gate G of the switching transistor Q1 is connected to, for example, a sub-wiring in which the main wiring of the scanning line Lg is diverged from the node N3. Therefore, the switching transistor Q1 turns on or off the data line Ld and the node N1 according to the voltage level Vg (scanning control voltage) of the scanning signal. In the wiring L1, one terminal of the capacitor C1 is connected via a wiring portion which is branched in, for example, the node N1 (this @ portion is also included in the wiring L1). The other terminal of the capacitor C1 is connected to, for example, a sub-wiring in which the main wiring of the capacitor line Lc is branched from the node N5. A capacitance line drive signal is applied to the capacitance line Lc from the capacitance line driving unit 105. The voltage level Vc (capacitor line drive voltage) of the capacitance line drive signal can be set to, for example, a ground potential. In other words, the capacitor line Lc can be set as a ground line. At this time, the capacitance line driving unit 105 can be omitted. Here, when the voltage level Vg (scanning control voltage) of the scan signal input to the scanning line Lg becomes a high level, the switching transistor Q1 is turned on, and the voltage level of the corresponding data signal is 15 via the switching transistor Q1. 321390 201013606 vd (= __ charge injection drive crystallization _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ The voltage level of the scanning line Lg is low and the switching transistor Q1 is completely turned into the _ state, and then the lower level = the level Vg becomes a high level and the switching transistor Qi becomes turned on: the period until the next data signal is entered. The function of the potential of the wheel 10 。, that is, the capacitor (4) is input to the data line ^ during the predetermined period. e threshold, the moving crystal Q2 is, for example, η-type m, and the nucleus is like a defect. In the N6, the sub-distribution from the main wiring of the drive line is connected to the anode of the organic hair #_S, + the Gunuyo male machine first-polar body D1 via the node N2. In addition, the risk of the organic light-emitting diode D1炻炻Μ... The pole has a common voltage Vcom ( For example, when the driving power 曰 曰斟 κ κ 田 田 罨 罨 罨 Q Q Q Q Q Q Q Q , , , , , , , , , , , , , , , , , , , , Q Q Q Q Q Q Q Q Q Q Q Q Luminance luminescence of the amount of current flowing to the organic hairpin. 2 = Electrical system: When the current is 1 state, (4) H-moving UQ2 is turned off to emit light. To the organic light-emitting diode D1, the layout structure and the W-map are not included. The details of each element 101a and the layer structure are described in detail. The 苐3 diagram is used to illustrate the schematic plan view of the layout structure of the active test=1_parameter_as shown in Fig. 4 to explain the layer structure of the pixel. A schematic cross-sectional view. On the other hand, in the third drawing, the configuration of the insulating films 40 and 50 between the transparent substrate 10 and the layers 321390 16 201013606 is omitted for the purpose of the current day (see, for example, Fig. 4). Fig. 4 is a schematic view showing the outline of the element 101a of the cut end surface of A-A' in Fig. 3 continuously. In the following description, for the clarification of the description, the same type of film of the same layer is denoted by the same reference numeral. As shown in FIG. 3 or FIG. 4, the halogen 101a includes an active matrix substrate 101A as an array substrate (see, for example, FIG. 4); and an organic light-emitting diode D1 on the active matrix substrate 101A (see, for example, 4 picture). The active matrix substrate 101A includes, for example, a scanning line L·, a data line Ld, a capacitance line ® Lc, a driving line Lp, wirings L1 and L2, a switching transistor Q1, a driving transistor Q2, and a capacitor C1. The organic light-emitting diode D1 includes an organic film 62 interposed between the anode electrode 61 and the cathode electrode 63, and is connected to the source electrode 24s of the driving transistor Q2 via, for example, the wiring L2. Further, the color filter may be disposed on the lead-out side of the light with respect to the organic light-emitting diode D1. In Fig. 4, the direction of light emission (direction of light emission) is indicated by a reverse white arrow. The scanning line Lg is composed of, for example, the first wiring layer 41 on the transparent substrate 10 (see, for example, Fig. 3). The data line Ld, the capacitance line Lc, and the driving line Lp are respectively made of, for example, the first wiring layer 41 on the transparent substrate 10, the second wiring layer 43 on the interlayer insulating film 40, and the contact formed in the contact of the interlayer insulating film 40. The in-part wiring 42 and the three-dimensional wiring RC formed by the in-contact wiring 42 and the second wiring layer 43 for connecting the first wiring layer 41 between the adjacent cells 101a. Each of the wirings L1 and L2 is composed of, for example, the first wiring layer 41 on the transparent substrate 10, the second wiring layer 43 on the interlayer insulating film 40, and the contact inner wiring 42 formed in the contact hole of the interlayer insulating film 40. . Furthermore, the wiring L2 also includes, for example, a contact plug 51, which is used to electrically connect the wiring layer 41 connected to the source electrode 24S of the driving transistor Q2 to the organic light emitting diode. The anode electrode 61 of the polar body D1. Further, each of the nodes Nb, N4, N5 and N6 shown in Fig. 2 can be defined at each position shown in Fig. 3, for example.

在第1配線層41中,朝大致列方向或大致行方向延伸 之部分係分別相當於掃描線Lg、資料線匕、電容線^或驅 動線Lp巾之錄線部分。而且,相當於肚配線分歧且用 以連接該主配線與各晝素1Gla中之元件⑼、Q2、^等) 的副配線部分。In the first wiring layer 41, the portions extending in the substantially column direction or the substantially row direction correspond to the recording line portions of the scanning line Lg, the data line 匕, the capacitance line, or the driving line Lp, respectively. Further, it corresponds to a sub-wiring portion in which the belly wiring is divided and the main wiring and the elements (9), Q2, and the like in the respective elements 1G1 are connected.

接觸件内配線42及第2配線層43係為用以將例如資 料線Ld、電容線Lc或驅動線Lp導引至層間絕緣膜4〇上的 配線,或為跨越朝與各配線(1^、!^、Lp等)大致垂直之方向 延伸的掃描線LG,而為用以使各配線(1。、Lc、Lp等)之主配 線間電性連接的立體配線RC。此外,在本實施形態中,於 接觸件内配線42及第2配線層43中,將各配線(1^、&、 Lp等)導出至層間絕緣膜4〇上的部分係包含在副配線部 分,而用以跨越掃描線Lg之部分係包含在主配線。 如此,利用形成在層間絕緣膜4〇(參照例如第4圖)之 接觸件内配線42將層間絕緣膜40下之第1配線層41與層 間絕緣膜40上之第2配線層43予以電性連接,即可使各 4吕唬線(Lg、Ld、Lc、Lp等)立體交叉。藉此,可將各配線(Lg、 Ld、Lc、Lp等)之多數的區域形成在單一之層(在本實施形態 中為透明基板10上之層)’因此可實現主動矩陣基板1〇1Α 中之層構造的簡略化或配線佈局的明確化等,並且可提升 18 321390 201013606 形成在上層之膜上表面之平坦性。 、 再者,在透明基板10上,在未形成有各種配線(Lg、 ' Ld、Lc、Lp、LI、L2等)及各種元件(Ql、Q2、Cl等)之區域, 形成有例如第1配線層41之一部分冗長之冗長配線41a(參 照例如第3圖),因而使形成在透明基板10上之層上表面 的平坦性提升。 開關電晶體Q1係所謂之底閘構造之薄膜電晶體 (TF7),該開關電晶體Q1係由例如透明基板10上之閘極電 ® 極11、覆蓋閘極電極11之閘極絕緣膜12、閘極絕緣膜12 上之源極電極14s與汲極電極14d、及源極電極14s與汲 極電極14d間之閘極絕緣膜12上的透明半導體層13所構 成(參照例如第4圖)。 閘極電極11係可使用例如構成掃描線Lg之第1配線層 41的一部分。閘極絕緣膜12係可使用例如層間絕緣膜40 之一部分。透明半導體層13係可使用例如透明半導體層 ❿ 44之一部分。源極電極14s係可使用例如構成資料線Ld 之一部分的第2配線層43之一部分。汲極電極14d係可使 用例如構成配線L1之一部分的第2配線層43之一部分。 然而,本發明並不限定於此,亦可為例如於閘極電極11使 用第2配線層43之一部分、於源極電極14s及汲極電極 14d分別使用第1配線層41之一部分之所謂頂閘構造的薄 膜電晶體(TFT)。 同樣地,驅動電晶體Q2係所謂之底閘構造之舞膜電晶 體(TFT),該驅動電晶體Q2係由例如透明基板10上之閘極 19 321390 201013606 電極21、覆蓋閘極電極21之閘極絕緣膜22、閘極絕緣膜 22上之源極電極24s與汲極電極24d、及源極電極24s與 广 汲極電極24d間之閘極絕緣膜22上的透明半導體層23所 構成(參照例如第4圖)。 閘極電極21係可使用例如構成配線L1之第1配線層 41的一部分。閘極絕緣膜22係可使用例如層間絕緣膜40 之一部分。透明半導體層23係可使用例如透明半導體層 44之一部分。汲極電極24d係可使用例如構成驅動線Lp 之一部分的第2配線層43之一部分。源極電極14s係可使 v 用例如構成配線L2之一部分的第2配線層43之一部分。 然而,本發明並不限定於此,亦可為例如於閘極電極21使 用第2配線層43之一部分、於汲極電極24d及源極電極 14s分別使用第1配線層41之一部分之所謂頂閘構造的薄 膜電晶體(TFT)。 再者,本實施形態之主動矩陣基板101A係具有作為電 晶體元件之TFT之被稱為所謂之陣列基板者。 @ 電容器C1係由例如透明基板10上之下部電極31、下 部電極31上之上部電極33、及下部電極31及上部電極33 間之電容絕緣膜32所構成(參照例如第4圖)。下部電極 31係可使用例如構成電容線L·之一部分的第1配線層41 的一部分。電容絕緣膜32係可使用例如層間絕緣膜40之 一部分。上部電極33係可使用例如構成驅動線Lp的第2 配線層43之一部分。 再者,主動矩陣基板101A上之有機發光二極體D1係 20 321390 201013606 由例如陽極電柄 ^ ^ bl、陽極電極61上之有機膜62、及有機 膜bZ上之陰極 亦可在相對於古 所構成(參照例如第4圖)。此外’ a -十、士 E ;有機發光二極體D1導出光之側的層’配置滤 色為或波長轉換器等色轉換膜。 在鄰接之查冬 ^ . ^ C1 思素101a之間,形成有用以在各畫素區劃陽 極電極61與1。 〜$機膜62的間隔壁7〇(參照例如第4圖)。在 層間絕緣祺50 t- β nThe contact inner wiring 42 and the second wiring layer 43 are wiring for guiding, for example, the data line Ld, the capacitance line Lc or the driving line Lp to the interlayer insulating film 4, or the wiring and the wiring (1^ The scanning line LG extending in the substantially vertical direction is a three-dimensional wiring RC for electrically connecting the main wirings of the respective wirings (1, Lc, Lp, etc.). In the present embodiment, the portions of the contact inner wiring 42 and the second wiring layer 43 that lead the respective wirings (1, , , , , , , , , , , , , , , , , , , In part, the portion for crossing the scanning line Lg is included in the main wiring. In this manner, the first wiring layer 41 under the interlayer insulating film 40 and the second wiring layer 43 on the interlayer insulating film 40 are electrically connected by the contact inner wiring 42 formed in the interlayer insulating film 4 (see, for example, FIG. 4). By connecting, each of the 4 Lun lines (Lg, Ld, Lc, Lp, etc.) can be three-dimensionally intersected. Thereby, a plurality of regions of each of the wirings (Lg, Ld, Lc, Lp, etc.) can be formed in a single layer (in the present embodiment, a layer on the transparent substrate 10). Therefore, the active matrix substrate 1〇1Α can be realized. The simplification of the layer structure or the clarification of the wiring layout, etc., and the flatness of the upper surface of the film formed on the upper layer can be improved by 18 321390 201013606. Further, on the transparent substrate 10, for example, in the region where various wirings (Lg, 'Ld, Lc, Lp, LI, L2, etc.) and various elements (Q1, Q2, Cl, etc.) are not formed, for example, the first portion is formed. The redundant wiring 41a (see, for example, FIG. 3), which is partially redundant in the wiring layer 41, improves the flatness of the upper surface of the layer formed on the transparent substrate 10. The switching transistor Q1 is a thin film transistor (TF7) of a so-called bottom gate structure, for example, a gate electrode 11 on the transparent substrate 10, a gate insulating film 12 covering the gate electrode 11, The source electrode 14s on the gate insulating film 12 and the drain electrode 14d and the transparent semiconductor layer 13 on the gate insulating film 12 between the source electrode 14s and the drain electrode 14d are formed (see, for example, Fig. 4). For the gate electrode 11, for example, a part of the first wiring layer 41 constituting the scanning line Lg can be used. As the gate insulating film 12, for example, a part of the interlayer insulating film 40 can be used. The transparent semiconductor layer 13 can use, for example, a portion of the transparent semiconductor layer ❿ 44. For the source electrode 14s, for example, one of the second wiring layers 43 constituting a part of the data line Ld can be used. For the gate electrode 14d, for example, a part of the second wiring layer 43 constituting a part of the wiring L1 can be used. However, the present invention is not limited thereto, and for example, a portion of the second wiring layer 43 may be used for the gate electrode 11, and a so-called top portion of the first wiring layer 41 may be used for each of the source electrode 14s and the drain electrode 14d. Thin film transistor (TFT) of the gate structure. Similarly, the driving transistor Q2 is a dance film transistor (TFT) of a so-called bottom gate structure, which is composed of, for example, a gate 19 321390 201013606 on the transparent substrate 10, an electrode 21, and a gate covering the gate electrode 21. The pole insulating film 22, the source electrode 24s on the gate insulating film 22, the drain electrode 24d, and the transparent semiconductor layer 23 on the gate insulating film 22 between the source electrode 24s and the wide-boil electrode 24d (refer to For example, Figure 4). For the gate electrode 21, for example, a part of the first wiring layer 41 constituting the wiring L1 can be used. As the gate insulating film 22, for example, a part of the interlayer insulating film 40 can be used. The transparent semiconductor layer 23 can use, for example, a portion of the transparent semiconductor layer 44. For the gate electrode 24d, for example, one of the second wiring layers 43 constituting a part of the drive line Lp can be used. The source electrode 14s can be used, for example, as a part of the second wiring layer 43 constituting a part of the wiring L2. However, the present invention is not limited thereto, and for example, a portion of the second wiring layer 43 may be used for the gate electrode 21, and a so-called top portion of the first wiring layer 41 may be used for each of the drain electrode 24d and the source electrode 14s. Thin film transistor (TFT) of the gate structure. Further, the active matrix substrate 101A of the present embodiment has a so-called array substrate as a TFT of a transistor element. The capacitor C1 is composed of, for example, the lower electrode 31 on the transparent substrate 10, the upper electrode 33 on the lower electrode 31, and the capacitor insulating film 32 between the lower electrode 31 and the upper electrode 33 (see, for example, Fig. 4). For the lower electrode 31, for example, a part of the first wiring layer 41 constituting one of the capacitance lines L· can be used. As the capacitor insulating film 32, for example, a part of the interlayer insulating film 40 can be used. For the upper electrode 33, for example, one of the second wiring layers 43 constituting the drive line Lp can be used. Furthermore, the organic light-emitting diode D1 on the active matrix substrate 101A 20 321390 201013606 can be made, for example, from the anode electric handle ^^ bl, the organic film 62 on the anode electrode 61, and the cathode on the organic film bZ. It is configured (see, for example, Fig. 4). Further, 'a -10, E, and the layer on the side where the organic light-emitting diode D1 is led out from the light' is disposed in a color conversion film such as a color filter or a wavelength converter. Between the adjacent Chadong ^ . ^ C1 Sis 101a, it is useful to divide the anode electrodes 61 and 1 in each pixel. The partition wall 7 of the machine film 62 is referred to (see, for example, Fig. 4). Interlayer insulation 祺50 t- β n

— υ上形成有用以保護有機發光二極體D1及下 層之各元件與各配線之鈍化膜8G(參照例如第4圖)。 ^在此透明基板10係可使用玻璃基板。然而,並不限 疋於此亦可使用例如玻璃基板、石英基板或塑膠基板等 各種透明之崎性基板。再者,藉由使肖可撓性基板作為 透月基板10,亦可實現可撓性之有機EL顯示裝置1〇〇。在 本4明中,透明係指至少相對於可見光之頻帶所包含之波 長的光呈透明或半透明者。 第1配線層41、接觸件内配線42與第2配線層43、 ❿及接觸插塞51係利用以鋅鍚氧化物(zinc tin oxide :ZTO) 為主成分之導電體材料而形成。然而,並不限定於此,亦 可利用例如含銦氧化物(Indiura Tin 〇xide WT〇、indiuin zinc oxide,ΙΖ0等)或其他無機氧化物導電體材料、或能 以有機物材料等獲得透明導電性膜之導電性材料來形成。 再者’ ζτο材料係例如藉由使如之(莫耳)量比ζη多⑽如 加心之莫耳比為1:2等),而可作為導電體來使用。此 外’作為導賴材料之IT_ In:Snq耳輯常為〇 9: 〇.1左右,作為導電體材料之120的111:化之莫耳比通常 321390 21 201013606 為0. 9 : 0. 1左右。 特別是,ZTO導電性膜係可形成為非晶膜,因此具有 · 可實現可撓性之第1配線層41、第2配線層43、接觸件内 ' 配線42及接觸插塞51的優點。再者,非晶之ΖΤ0導電性 膜係可低溫形成,因此亦具有即便使用例如塑膠基板等高 溫耐性低的基板作為透明基板10亦可容易地形成之優 點。由此,可謂利用ΖΤ0導電性膜來形成第1配線層41、 第2配線層43、接觸件内配線42及接觸插塞51之方法係 可應用在形成可撓性之有機EL顯示裝置100時。 ® 層間絕緣膜40及50係可使用例如SOG(Spin ON Glass)、二氧化矽(Si〇2)、氮化矽(SiNx)等矽系絕緣物或氧 化鋁(Al2〇3)等鋁氧化物或氧化铪(Hf〇2)等铪氧化物或氧化 釔(Y2〇3)等釔氧化物或La2〇3等之鑭氧化物等,或是由透明 感光性樹脂等能以塗布製程進行成膜之絕緣物所構成之透 明的絕緣性單層膜或包含1個以上該等絕緣性單層膜之透 明的絕緣性多層膜。在本實施形態中,係以包含例如氧化 0 鋁(Al2〇3)膜及氧化铪(Hf〇2)膜之多層構造的膜來形成層間 絕緣膜40,並以由例如感光性樹脂所構成之單層構造的絕 緣膜來形成層間絕緣膜50。在本實施形態中,層間絕緣膜 40及50係除了可發揮作為用以絕緣各層間之絕緣膜的功 能以外,亦可作為用以確保各層之平坦性之平坦化膜而發 揮功能。 在層間絕緣膜40上,以覆蓋第2配線層43及接觸件 内配線42之方式形成有透明半導體層44。透明半導體層 22 321390 201013606 * ❹ 44係發揮作為用以減低在後述之製造步驟中之例如蝕刻步 •驟時位於下層之第2配線層43及接觸件内配線42等所受 到之製程扣害之保護膜的功能。在本實施形態中,就透明 半導體層44之例而言’係使用由可使載體濃度比前述導電 性材料(ΖΤ0導電性材料、含銦氧化物導電材料)所成之配 線更低之半導體材料之由ΖΤ0或含銦氧化物所半導體 ::所構f透明半導體層。再者,咖材二 sn多⑽zn:sn之莫耳比為2:1等), 而可作為導電體來使用。此外’在該挪半導體層之成膜 時,可增加環境氣體之氧濃度等,而 曰、 載體濃度的調整。再者,盘上述第二減低半導體層之 之===編W物實現可棱性 裝應用在形成可撓性之有機EL顯示 ❹ 材料,亦可利用含崎化半導體 他匕3稠五本或四苯并卟啉之前 料等各種透明半導體材料來形成。物4透明有機半導體材 =外,在本實施形態中,形成透明半導體層44之導電 體材料的主成分與各元件中形成盥診 部分的導電體材料之主成分係使心電: ?含源極電極14s與汲極電極14d、及源 線層43係由以則為 成刀之ΖΤ0導電性膜所形成’透明半導體層44係由以 321390 23 201013606 ΖΤ0為主成分且載體濃度比第2配線層43的載體濃度低的 ΖΤ0半導體膜所形成。如此,由於以同種之材料形成兩者, · 而可使例如開關電晶體Q1之源極電極14s或汲極電極14d 與透明半導體層13歐姆接觸。同樣地,可使驅動電晶體 Q2之源極電極24s或汲極電極24d與透明半導體層23歐 姆接觸。藉此,由於減低各TFT元件(Ql、Q2等)之電阻成 分,因此可減低各TFT元件之驅動電力,結果可減低有機 EL顯示裝置10 0之消耗電力。 間隔壁70係可由以例如感光性樹脂所成之單層構造 ® 的絕緣膜來形成。但並不限定於此,亦可使用例如S0G、— A passivation film 8G for protecting each element of the organic light-emitting diode D1 and the lower layer and each wiring is formed on the crucible (see, for example, Fig. 4). ^ A glass substrate can be used for the transparent substrate 10 here. However, it is not limited thereto, and various transparent and sturdy substrates such as a glass substrate, a quartz substrate, or a plastic substrate may be used. Further, by using the flexible substrate as the moon-permeable substrate 10, a flexible organic EL display device 1 can be realized. In the present invention, transparent means that the light of at least the wavelength included in the frequency band of visible light is transparent or translucent. The first wiring layer 41, the contact inner wiring 42 and the second wiring layer 43, the contact and the contact plug 51 are formed of a conductive material mainly composed of zinc tin oxide (ZTO). However, the present invention is not limited thereto, and for example, an indium oxide (Indiura Tin 〇xide WT 〇, indiuin zinc oxide, ΙΖ0, etc.) or other inorganic oxide conductor material, or an organic material or the like can be used to obtain transparent conductivity. The conductive material of the film is formed. Further, the ζτο material can be used as a conductor by, for example, making the amount of (mole) more than ζη (10) such as a molar ratio of 1:2, etc.). In addition, the IT_In:Snq ear set is often 〇9: 〇.1 or so, as the conductor material 120 of 111: the molar ratio is usually 321390 21 201013606 is 0. 9 : 0. 1 or so . In particular, since the ZTO conductive film can be formed as an amorphous film, it has the advantage that the flexible first wiring layer 41, the second wiring layer 43, and the contact wiring 42 and the contact plug 51 can be realized. Further, since the amorphous 导电0 conductive film can be formed at a low temperature, it is also advantageous in that a substrate having low temperature resistance such as a plastic substrate can be easily formed as the transparent substrate 10 even if it is used. Thus, the method of forming the first wiring layer 41, the second wiring layer 43, the contact inner wiring 42 and the contact plug 51 by using the 导电0 conductive film can be applied to the flexible organic EL display device 100. . For the interlayer insulating films 40 and 50, for example, a lanthanum-based insulator such as SOG (Spin ON Glass), cerium oxide (Si〇2) or tantalum nitride (SiNx), or an aluminum oxide such as alumina (Al 2 〇 3) can be used. Or a ruthenium oxide such as ruthenium oxide (Hf〇2) or ruthenium oxide such as ruthenium oxide (Y2〇3) or a ruthenium oxide such as La2〇3, or a transparent photosensitive resin or the like can be formed by a coating process. A transparent insulating single layer film composed of an insulator or a transparent insulating multilayer film including one or more of the insulating single layer films. In the present embodiment, the interlayer insulating film 40 is formed of a film having a multilayer structure including, for example, an oxidized aluminum (Al 2 〇 3) film and a hafnium oxide (Hf 〇 2) film, and is composed of, for example, a photosensitive resin. The interlayer insulating film 50 is formed by an insulating film of a single layer structure. In the present embodiment, the interlayer insulating films 40 and 50 can function as a planarizing film for ensuring the flatness of each layer, in addition to functioning as an insulating film for insulating the respective layers. The transparent semiconductor layer 44 is formed on the interlayer insulating film 40 so as to cover the second wiring layer 43 and the interconnect wiring 42. The transparent semiconductor layer 22 321390 201013606 * ❹ 44 is used as a process for reducing the process of the second wiring layer 43 located in the lower layer and the wiring 42 in the contact, for example, in the manufacturing step to be described later. The function of the protective film. In the present embodiment, as an example of the transparent semiconductor layer 44, a semiconductor material having a lower carrier concentration than the conductive material (the ITO conductive material or the indium-containing oxide conductive material) is used. The semiconductor consists of ΖΤ0 or an indium oxide:: a f-transparent semiconductor layer. Furthermore, the coffee material two sn (10) zn:sn has a molar ratio of 2:1, etc., and can be used as a conductor. Further, when the filming of the semiconductor layer is performed, the oxygen concentration of the ambient gas or the like can be increased, and the concentration of the carrier can be adjusted. Furthermore, the above-mentioned second reduced semiconductor layer of the semiconductor layer can be applied to form a flexible organic EL display material, or can be used to form a thickened semiconductor or Various transparent semiconductor materials such as tetrabenzoporphyrin precursors are formed. In the present embodiment, the main component of the conductor material forming the transparent semiconductor layer 44 and the main component of the conductor material forming the percussion portion in each element make the electrocardiogram: The electrode electrode 14s, the drain electrode 14d, and the source line layer 43 are formed of a 导电0 conductive film which is formed into a knives. The transparent semiconductor layer 44 is mainly composed of 321390 23 201013606 ΖΤ0 and has a carrier concentration ratio second wiring. The yttrium semiconductor film of the layer 43 having a low carrier concentration is formed. Thus, since both of the same kind of material are formed, for example, the source electrode 14s or the drain electrode 14d of the switching transistor Q1 can be in ohmic contact with the transparent semiconductor layer 13. Similarly, the source electrode 24s or the drain electrode 24d of the driving transistor Q2 can be brought into contact with the transparent semiconductor layer 23. As a result, the resistance components of the TFT elements (Q1, Q2, etc.) are reduced, so that the driving power of each TFT element can be reduced, and as a result, the power consumption of the organic EL display device 100 can be reduced. The partition wall 70 can be formed of an insulating film of a single layer structure ® made of, for example, a photosensitive resin. However, it is not limited thereto, and for example, S0G,

Si〇2、SiNx等矽系絕緣物或Ah〇3等鋁氧化物或Hf〇2等铪氧 化物或Y2〇3等釔氧化物或La2〇3等鑭氧化物等,或是由透明 感光性樹脂等能以塗布製程進行成膜之絕緣物所構成之透 明的絕緣性單層膜或包含1個以上該等絕緣性單層膜之透 明的絕緣性多層膜。 再者,開關電晶體Q1、驅動電晶體Q2及電容器C1係 @ 可使用上述第1配線層41、第2配線層43及層間絕緣膜 40之一部分來構成,因此其材料亦可使用與上述相同者。 然而,亦可在各電極上形成用以使其低電阻化之透明導電 性膜等,進行適當之變形。 此外,在有機發光二極體D1中,有機膜6 2係包含例 如電洞注入層、電洞輸送層、有機發光層、電子輸送層、 電子注入層及電洞阻障層之多層構造的積層膜。在有機膜 62中,有機發光層之主材料係可使用聚第及其衍生物與共 24 321390 201013606 聚物、聚伸芳基及其衍生物與共聚物、聚伸芳基烴伸乙烯 及其衍生物與共聚物、聚芳胺及其衍生物與共聚物等高分 子材料、其他螢紐麵光性之各祕分子發光材料或者 高分子材料等’依與電祠輪送層等之組合或標的波長而使 用各種發光材料。 出彻1之陽極電極61係可使用由例如ΖΤ0或 ΙΤ0等氧化物導電艚铋女丨 、、^电騷材枓、或銀(Ag)、鋁(A1)等金屬材料 所月早層犋或包含該等透明單層膜之多層構造的透 成為供光穿透之心^屬材料時,包含上賴之層係作 ffl 7ΤΠ/Ασ/7ΤΠ 又的溥膜。在本實施形態中,係列舉使 用ZT0/Ag/ZT0之穑思 甘士描从⑶增膜且以供光穿透之程度的薄膜形成 月形作為例子。此外,陰極電極63係玎使 用例如銀(Ag)、鉋u 之金屬或合金鎮(%)等兼具高導電性與反射率 列舉使用%與Ag 料而獲得。在本實施形態中’係 ❹ /合金膜的情形為例。 經莖客風暄而係可使用以例如CVD法成膜之Si02膜與siNX 膜等多層膜而形成。+丄 ^ ^ ςι·Μ Ά 在本實施形態中,係列舉使用Si〇2膜 與S1NX膜的夕層祺之情形為例。 由以上說明模4 Λ 本實施形態之有機EL顯示裝置100 :相對=膘62位於光導出側之下表面腕侧的所有 凰係:::·之遷明獏或半透明膜所形成,因此可實現 屬於光導出面之下类 衣面100a的全區域開口之所謂全開口 型的有機EL顯示裴置1〇〇。 所月 (製造方法) 25 321390 201013606 接著’參照圖式詳細說明本實施形態之有機el顯示裝 置100之製造方法。第5-1圖至第5-10圖係顯示本發明實* 施形禮之有機EL顯示裝置1〇〇之顯示面板ι01的製造方法' 之製程剖面圖。在第5-1圖至第5-10圖中,顯示以第3圖 所示之A-A’切斷之連續端面。 在本製造方法中,首先準備透明基板1〇,利用例如濺 鍍法、CVD(化學氣相沉積,Chemical Vap〇r Dep〇siti〇n) 法或真空蒸鍍法等將ZTO堆積在屬於與該基板之厚度方向 (相對於該基板垂直之方向)垂直之面的2個主面中之一方❿ 主面(以下稱為上表面)上,而形成透明之非晶狀的ζτ〇導 電性膜。接著,利用例如光微影法(在本說明書中,亦有「光 微影法」包含蝕刻步驟之類的圖案化步驟之情形)對該ζτ〇 導電性膜進行圖案化,藉此如第5-1圖所示,在透明基板 10上形成閘極電極11及21、下部電極31、第1配線層41 及冗長配線41a(參照第3圖)等(第1配線形成步驟)。然 而,並不限定於此,亦可利用使用例如凝膠/溶膠法之印刷 技術或噴墨印刷技術等塗布製程技術等,形成閘極電極u 及21、下部電極31、第1配線層41及冗長配線41a等。 接著’利用例如濺鍍法、CVD法或真空蒸鍍法等將氧 化結(Ah〇3)膜及氧化铪(Hf〇2)依序堆積在形成有各電極及 配線(11、21、31、41、41a等)之透明基板10上表面上, 藉此形成由透明之絕緣性積層膜所構成之層間絕緣膜4〇 (第1層間絕緣膜形成步驟)。接著,利用例如光微影法對 該層間絕緣膜40進行圖案化’而如第5_2圖所示,在層間 321390 26 201013606 絕緣膜4G㈣錢第1 _層41之-料露出之接觸孔 apl及ap2。然而,並不限定於此,亦可利用例如上述之塗 布製程技術等形成具備接觸孔aPl & ap2之層間絕緣膜 4〇。此外’在本步驟中形成之層間絕緣膜4〇中,至少閉極 電極11上的層間絕緣膜4〇係作為開關電晶體qi之間極絕 緣膜12而發揮功能,至少閘極電極21上的層間絕緣膜40 係,揮作為驅動電晶體Q2之閘極絕緣膜Μ的功能,至少 ❹ P電極31上之層間絕緣膜係發揮作為電容器[I之電 容絕緣膜32的功能。再者,接觸孔aP2係在後序之步驟中 用以形成與第1配線層41電性連接之接觸插塞Μ之一部 分的接觸孔。 接著,利用例如濺鍍法、CVD法或真空蒸鍍法等將ζτ〇 堆積在形成有接觸孔apl及ap2之層間絕緣膜上,藉此 形成透明之非晶狀之ZT0導電性膜。此時,亦可在接觸孔 叩2内形成ζτ〇導電性膜。接著,利用例如光微影法對該 ❹則導電性膜進行圖案化,而如第5-3圖所示,在層間絕 緣膜40上形成源極電極14s與汲極電極Ud、源極電極24s 與沒極電極24d、上部電極33及第2配線層43等,並且 在層間絕緣膜40之接觸孔apl内形成與第i配線層41電 1"生連接之接觸件内配線42(第2配線形成步驟)。然而,並 不限定於此,亦可利用例如上述之塗布製程技術等形成源 極電極14s與汲極電極14d、源極電極24s、汲極電極24d、 上部電極33、接觸件内配線42及第2配線層43。此外, 在此步驟中,亦可不完全地去除接觸孔ap2内的ζτ〇導電 321390 27 201013606 性膜。 接著’利用例如濺鍍法、CVD法或真空蒸鍍法等將ΖΤΟ , 堆積在形成有各電極及配線(14s、14d、24d、24s、33、42、 43等)之層間絕緣膜40上,藉此形成載體濃度比ZTO導電 性膜的載體濃度低之ζτο半導體膜(半導體層形成步驟)。 此時,亦可在接觸孔ap2内形成ζτ〇半導體膜。並且,如 上所述藉由控制Ζη與Sn之莫耳比等,ΖΤ0半導體膜可作 成其載體濃度比構成第】配線層41或第2配線層43等之 ζτο導電性膜低之透明的半導體膜。接著,利用例如光微⑩ 影法對該ζτο半導體膜進行圖案化,而如第5_4圖所示, 在層間絕緣膜40上形成用以覆蓋各電極及配線(14s、 14d、24d'24s、33、42、43等)之透明半導體層44。此時, 較佳為過蝕刻至完全去除接觸孔ap2内之半導體膜的 程度。此外,所形成之透明半導體層44中,至少源極電極 ⑷及汲極電極14d間的透明半導體層料係發揮作為開關 電晶體Q1之通道形成層之透明半導體層13的功能,至少 汲極電極24d及源極電極24s間的透明半導體層44係作為 驅動電晶體Q2之通道形成層之透明半導體層23而發揮功 能。 在本實施形態中,由於係使用同種之材料來形成透明 半導體層44、第2配線層43及接觸件内配線42,因此難 以獲得透明半導體層44與第2配線層43等之_的適當 選擇比。㈣如本實施形態,藉由以覆蓋第2配線層犯及 接觸件内配線42之方式構成圖案化後之透明半導體層 321390 28 201013606 4 44,而使第2配線層43及接觸件内配線42不會在蝕刻中 、曝露在蝕刻環境中,因此無須考慮與第2配線層43等之選 '擇比,即可將透明半導體層44予以圖案化。然而並不限定 於此,亦可利用例如上述之塗布製程技術等來形成透明半 導體層44。此時,由於無須藉由蝕刻等對所形成之透明半 導體層進行圖案化,因此透明半導體層44並非一定要覆蓋 第2配線層43及接觸件内配線42。 ❹ 如上所述形成透明半導體層(13、23、44等)時,接著 在形成有透明半導體層(13、23、44等)之層間絕緣膜4〇 上旋轉塗布例如感光性阻劑液,並對該阻劑液進行曝光及 顯影,藉此如第5-5圖所示,形成具備與層間絕緣膜4〇之 接觸孔ap2連續之接觸孔ap3且由透明之感光性樹脂所構 成2層間絕緣膜50(第2層間絕緣膜形成步驟)。然而並不 限疋於此,亦可利用例如上述之塗布製程技術等來形成具 備接觸孔ap3之層間絕緣膜5〇。 © 接著’利用例如滅鍍法、CVD法或真空蒸錄法等將ζτ〇 堆積在形成有接觸孔ap3之層間絕緣膜5〇上藉此如第 5—6圖所示’在至少層間絕緣膜50之接觸孔ap3内及層間 絕緣膜4〇之接觸孔ap2内形成與第1配線層41電性連接 之透明之非晶狀的接觸插塞5卜再者,此時形成之層間絕 緣膜5 0上的不要之zTQ導電性膜係利用例如㈣等技術等 而去除然、而,並不限定於此,亦可利用例如上述之塗布 製程技術等在層間絕緣膜4G及5()内形成接觸插塞5卜 經過上述說明之步驟’在本實施形態中,製造所謂之 29 321390 201013606 作為陣列基板之主動矩陣基板1〇1A。 接著,利用例如贿法、㈣法或真空蒸鐘法 等依序 將ZT0、Ag及ΖΤ0堆積在主動矩陣基板1〇1人上,藉此形成 八備“接觸插塞51電性連接之接點的透明之ZT()/Ag/zT〇 ,層膜…、:後’利用例如光微影法對ZT〇/Ag/ZT〇積層膜進 灯圖案化而如第5_7圖所示,在層間絕緣膜Μ上形成與 接觸插塞51電性連狀陽極電極6卜然而,並不限定於 此,亦可利關如上述之塗布製賴術等軸陽極電極61。矽-based insulator such as Si〇2 or SiNx, aluminum oxide such as Ah〇3, yttrium oxide such as Hf〇2 or yttrium oxide such as Y2〇3 or lanthanum oxide such as La2〇3, or transparent photosensitive A transparent insulating single-layer film made of an insulating material which can be formed by a coating process such as a resin or a transparent insulating multilayer film containing one or more of these insulating single-layer films. Further, since the switching transistor Q1, the driving transistor Q2, and the capacitor C1 are formed using one of the first wiring layer 41, the second wiring layer 43, and the interlayer insulating film 40, the material can be used in the same manner as described above. By. However, a transparent conductive film or the like for lowering the resistance may be formed on each of the electrodes and appropriately deformed. Further, in the organic light-emitting diode D1, the organic film 62 includes a multilayer structure including a hole injection layer, a hole transport layer, an organic light-emitting layer, an electron transport layer, an electron injection layer, and a hole barrier layer. membrane. In the organic film 62, the main material of the organic light-emitting layer may be a polydene and a derivative thereof, and a total of 24 321 390 201013606 polymer, a poly-arylene group and derivatives and copolymers thereof, a poly-arylene hydrocarbon-extended ethylene and Combinations of derivatives and copolymers, polymer materials such as polyarylamines and their derivatives and copolymers, and other molecular luminescent materials or polymer materials of other fluorescent materials, etc. Various luminescent materials are used for the target wavelength. The anode electrode 61 of the first one can be used by an oxide such as ΖΤ0 or ΙΤ0, or a metal material such as silver (Ag) or aluminum (A1). When the multilayer structure including the transparent single-layer film penetrates into a core material for light penetration, the layer containing the layer is used as a ruthenium film of ffl 7ΤΠ/Ασ/7ΤΠ. In the present embodiment, a series of films in which ZT0/Ag/ZT0 is used to form a film from (3) and a film for light penetration is formed as an example. Further, the cathode electrode 63 is obtained by using, for example, silver (Ag), a metal such as a metal, or an alloy (%), which has high conductivity and reflectance, and is obtained by using % and Ag materials. In the present embodiment, the case of the 系/alloy film is taken as an example. It is formed by a multilayer film such as a SiO 2 film and a siNX film which are formed by, for example, a CVD method. +丄 ^ ^ ςι·Μ Ά In the present embodiment, a case where the Si〇2 film and the S1NX film are used in the series is taken as an example. According to the above description, the organic EL display device 100 of the present embodiment is formed such that the opposite 膘62 is located on the wrist side of the lower surface of the light-extracting side, and is formed by a smear or semi-transparent film. A so-called full-open type organic EL display device that is a full-area opening of the garment-like surface 100a under the light-extracting surface is realized. Month (Manufacturing Method) 25 321390 201013606 Next, a method of manufacturing the organic EL display device 100 of the present embodiment will be described in detail with reference to the drawings. Figs. 5-1 to 5-10 are process cross-sectional views showing a method of manufacturing the display panel ι 01 of the organic EL display device of the present invention. In Figs. 5-1 to 5-10, the continuous end faces cut by A-A' shown in Fig. 3 are shown. In the present manufacturing method, first, a transparent substrate 1 is prepared, and ZTO is deposited and deposited by, for example, a sputtering method, a CVD (Chemical Vapor Deposition) method, a vacuum vapor deposition method, or the like. A transparent amorphous ζτ〇 conductive film is formed on one of the two main faces of the surface in the thickness direction of the substrate (the direction perpendicular to the substrate) on one of the two main faces (hereinafter referred to as the upper surface). Next, the ζτ〇 conductive film is patterned by, for example, photolithography (in the present specification, the "photolithography method" includes a patterning step such as an etching step), whereby As shown in FIG. 1, the gate electrodes 11 and 21, the lower electrode 31, the first wiring layer 41, and the redundant wiring 41a (see FIG. 3) are formed on the transparent substrate 10 (first wiring forming step). However, the present invention is not limited thereto, and the gate electrodes u and 21, the lower electrode 31, and the first wiring layer 41 may be formed by a coating process or the like using a printing technique such as a gel/sol method or an inkjet printing technique. Long wiring 41a, etc. Then, an oxide junction (Ah〇3) film and hafnium oxide (Hf〇2) are sequentially deposited by a sputtering method, a CVD method, a vacuum deposition method, or the like, and each electrode and wiring (11, 21, 31, On the upper surface of the transparent substrate 10 of 41, 41a, etc., an interlayer insulating film 4A made of a transparent insulating laminated film is formed (the first interlayer insulating film forming step). Next, the interlayer insulating film 40 is patterned by, for example, photolithography. As shown in FIG. 5-2, the contact holes apl and ap2 are exposed between the interlayers 321390 26 201013606, the insulating film 4G (4) the first layer _41. . However, the present invention is not limited thereto, and the interlayer insulating film 4B having the contact holes aP1 & ap2 may be formed by, for example, the above-described coating process technique. Further, in the interlayer insulating film 4 formed in this step, at least the interlayer insulating film 4 on the closed electrode 11 functions as the insulating film 12 between the switching transistors qi, at least on the gate electrode 21. The interlayer insulating film 40 functions as a gate insulating film of the driving transistor Q2, and at least the interlayer insulating film on the P electrode 31 functions as the capacitor insulating film 32 of the capacitor [I. Further, the contact hole aP2 is a contact hole for forming a portion of the contact plug which is electrically connected to the first wiring layer 41 in the subsequent step. Then, ζτ〇 is deposited on the interlayer insulating film on which the contact holes apl and ap2 are formed by, for example, a sputtering method, a CVD method, a vacuum deposition method, or the like, thereby forming a transparent amorphous ZT0 conductive film. At this time, a ζτ〇 conductive film may be formed in the contact hole 叩2. Next, the ruthenium conductive film is patterned by, for example, photolithography, and as shown in FIGS. 5-3, the source electrode 14s, the drain electrode Ud, and the source electrode 24s are formed on the interlayer insulating film 40. In the contact hole apl of the interlayer insulating film 40, the contact inner wiring 42 electrically connected to the i-th wiring layer 41 is formed in the contact hole apl of the interlayer insulating film 40 (the second wiring) Forming step). However, the present invention is not limited thereto, and the source electrode 14s and the drain electrode 14d, the source electrode 24s, the drain electrode 24d, the upper electrode 33, the contact inner wiring 42 and the first portion may be formed by, for example, the above-described coating process technique. 2 wiring layer 43. In addition, in this step, the ζτ〇 conductive 321390 27 201013606 film in the contact hole ap2 may not be completely removed. Then, the ruthenium is deposited on the interlayer insulating film 40 on which the electrodes and the wirings (14s, 14d, 24d, 24s, 33, 42, 43 and the like) are formed by, for example, a sputtering method, a CVD method, or a vacuum deposition method. Thereby, a 膜τ semiconductor film having a carrier concentration lower than that of the ZTO conductive film is formed (semiconductor layer forming step). At this time, a ζτ〇 semiconductor film may be formed in the contact hole ap2. Further, by controlling the molar ratio of Ζn to Sn as described above, the ΖΤ0 semiconductor film can be made to have a transparent semiconductor film having a carrier concentration lower than that of the conductive layer constituting the first wiring layer 41 or the second wiring layer 43. . Next, the ζτο semiconductor film is patterned by, for example, photomicro-shading, and as shown in FIG. 5-4, the interlayer insulating film 40 is formed to cover the electrodes and wiring (14s, 14d, 24d'24s, 33). , 42, 43, etc.) of the transparent semiconductor layer 44. At this time, it is preferable to overetch to the extent that the semiconductor film in the contact hole ap2 is completely removed. Further, among the transparent semiconductor layers 44 formed, at least the transparent semiconductor layer between the source electrode (4) and the drain electrode 14d functions as the transparent semiconductor layer 13 of the channel forming layer of the switching transistor Q1, at least the gate electrode The transparent semiconductor layer 44 between the 24d and the source electrode 24s functions as a transparent semiconductor layer 23 that drives the channel formation layer of the transistor Q2. In the present embodiment, since the transparent semiconductor layer 44, the second wiring layer 43, and the contact inner wiring 42 are formed using the same material, it is difficult to obtain appropriate selection of the transparent semiconductor layer 44, the second wiring layer 43, and the like. ratio. (4) In the present embodiment, the patterned second transparent layer 321390 28 201013606 4 44 is formed so as to cover the wiring 42 in the contact layer so as to cover the second wiring layer, and the second wiring layer 43 and the contact inner wiring 42 are formed. Since it is not exposed to the etching environment during etching, the transparent semiconductor layer 44 can be patterned without considering the selection ratio of the second wiring layer 43 or the like. However, it is not limited thereto, and the transparent semiconductor layer 44 may be formed by, for example, the above-described coating process technique. At this time, since the formed transparent semiconductor layer is not patterned by etching or the like, the transparent semiconductor layer 44 does not necessarily have to cover the second wiring layer 43 and the contact inner wiring 42. When the transparent semiconductor layer (13, 23, 44, etc.) is formed as described above, then, for example, a photosensitive resist liquid is spin-coated on the interlayer insulating film 4 of the transparent semiconductor layer (13, 23, 44, etc.), and By exposing and developing the resist liquid, as shown in FIGS. 5 to 5, a contact hole ap3 having a contact hole ap2 continuous with the interlayer insulating film 4 is formed, and two layers of insulating resin are formed of a transparent photosensitive resin. Film 50 (second interlayer insulating film forming step). However, it is not limited thereto, and the interlayer insulating film 5 具 having the contact hole ap3 may be formed by, for example, the above-described coating process technique. © Next, the ζτ〇 is deposited on the interlayer insulating film 5 of the contact hole ap3 by, for example, a sputtering method, a CVD method, or a vacuum vapor deposition method, thereby forming at least an interlayer insulating film as shown in FIG. 5-6. A transparent amorphous contact plug 5 electrically connected to the first wiring layer 41 is formed in the contact hole ap3 of the contact hole ap3 of 50 and the contact hole ap2 of the interlayer insulating film 4, and the interlayer insulating film 5 formed at this time is further formed. The unnecessary zTQ conductive film of 0 is removed by a technique such as (4), and the like, and is not limited thereto, and may be formed in the interlayer insulating films 4G and 5 () by, for example, the above-described coating process technique. The plug 5 is subjected to the above-described steps. In the present embodiment, the so-called 29 321390 201013606 is used as the active matrix substrate 1A1A of the array substrate. Then, ZT0, Ag, and ΖΤ0 are sequentially deposited on the active matrix substrate 1〇1 by using, for example, a bribe method, a (four) method, or a vacuum steaming method, thereby forming an eight-part "contact plug 51 electrically connected contact point. Transparent ZT()/Ag/zT〇, layer film...,: After 'Zero 影/Ag/ZT 〇 层 film is patterned by light lithography, as shown in Figure 5-7, in interlayer insulation The anode electrode 6 electrically connected to the contact plug 51 is formed on the film stack. However, the present invention is not limited thereto, and the shaft anode electrode 61 coated as described above may be used.

接著,在形成有陽極電極61之主動料基板舰上, 旋轉塗布例如感紐阻·,並對脉舰進行曝光及顯 影,藉此如帛5-8圖所示,在主動矩陣基板1〇1人之區劃各 旦素l〇la的區域,形成由透明之感光性樹脂所構成的間隔 壁70。然而並不限定於此’亦可湘例如上述之塗布製程 技術等來形成間隔壁70。Next, on the active substrate substrate on which the anode electrode 61 is formed, spin coating, for example, a sense resistor, and exposing and developing the ship, thereby as shown in FIG. 5-8, on the active matrix substrate 1〇1 A partition wall 70 made of a transparent photosensitive resin is formed in a region where each person divides each of the deniers. However, the partition wall 70 may be formed by, for example, the above-described coating process technique or the like.

接著,利用例如既存之成臈技術,在至少陽極電極e 序積層形成電洞注入層、電洞輪送層、有機發光層、 電子輸送層、電子注入層及電洞阻障層,如第5 _ 9圖所曰示 將有機膜62形成在由間隔壁70所區劃之陽極電極61上 再者,在有機膜62中,例如電洞注入層、電洞輸送層、, 送層、電子注入層及電洞阻障層係可利用例如高分^ 聚合物溶液的印刷技術或噴墨印刷技術等塗布製程技術^ 形成。然而’並不限定於此,亦可利用例如真空蒸鍍法戶 代表之陰影遮罩(shadow mask)蒸鍍法或轉印法所代表之 雷射熱轉印法(LITI法)、雷射再蒸鍍法(RIST法、Lips法 321390 30 201013606 * 等依序將電洞注入層、電洞輸送層、有機發光層、電子輸 *送層、電子注入層及電洞阻障層予以成膜,而形成對應晝 •素101a之有機膜62。再者,在陽極電極61使用例如ιτο/ PED0TC3, 4-伸乙基二氧基噻吩):Pss (polystyrenesulfonate)等無機氧化物導電性膜與導電性 高分子聚合物膜之積層膜時,可將有機膜62作成為從下層 起為例如電洞注入層/有機發光層/電子注入層之積層膜。 接著,利用例如真空蒸鏟法等將%與^之合金材料 堆積在形成有有機膜62及間隔壁7〇之整體主動矩陣基板 101A上’㈣成具有導電性之合金膜。此時,湘陰影遮 罩法防止多餘之合金膜蒸鍍在所希望之區域以外,而如第 5-11圖所不’在至少畫素(lGla)之配列區域整體形成陰極 電極63。然而並不限定於此,亦可利用例如上述之塗布製 程技術等來形成陰極電極63。 接著’利用CVD、法等將Si〇2與siNx之多層膜形成在由 ❹間隔壁70所區劃之陽極電極61及形成有由有機膜62與陰 極電極63所構成之有機發光二極體M的主動矩陣基板 101A上表面整體’藉此形成用以保護下層之各元件(qi、 Q2、(Π、D1 等)及配線(Lg、Ld、Lp、L1、L2 等)之鈍化膜 8〇。 最後在屬於其上表面之與基板1〇1A的相反側貼附基板以 進行密封’或利用濺鍍法或Cvd法等形成膜以進行密封。 經過以上之步驟,而製造第4圖所示之具備層構造之包含 畫素101a的顯示面板1〇1。此時,與基板1〇u相反側之 基板係可列舉破螭、PET等所代表之透明聚合物薄膜、為 31 321390 201013606 了以錢法或GVD料提高薄狀轉性衫互積 膜與無機膜之密封膜等。 9 钱 然後’藉由將如上方式製造之顯示面板1〇1安 載有信號控制部102、掃描驅動部1〇3、資料驅動部1〇二 電容線驅動部1G5、驅動信號產生部刷及其他零件的框 體’而製造本實施形態之有機EL顯示裝置1〇〇。 再者’在以上之製造步驟中,適當地包含洗淨基板之 步驟等,但在此為了說明之簡略化,省略該等步驟。 如以上之說明,本實施形態之有機乩顯示裝置i卯之 相對於有機膜62位於光導出側之下表面嶋側的所有層 係以供光穿透之膜所形成,因此可實現光導出面之全部^ 口之所謂全開口之背面發光型有機EL顯示裝置1〇〇。幵 一此外,如上方式構成光導出面全部開口,即可對發光 疋件(在本實施形態中為有機發光二極體D1)之配置進行自 由设計’因此可實現設計自由度大的有機EL顯示裝置丨叫。 再者,在本實施形態之製造方法中,由於在製造過程 中以透明半導體層44覆蓋接觸件内配線42及第2配線層 43,因此可減低後述之蝕刻步驟等之各配線(42、43等)戶= 受到之製程損害。 並且,在上述實施形態中,亦可使用可撓性材料形成 用以構成有機EL顯示裝置1〇〇之各層。 此外,在上述本發明之實施形態丨中,係列舉發光層 (在本實施形態中為有機膜62)為以有機材料所形成之有機 EL顯不裝置1〇〇加以說明,但本發明並不限定於此,亦可 321390 32 201013606 作成為例如發光層為以無機材料所形成之無機£ 置。 * (實施形態2)Next, a hole injection layer, a hole transport layer, an organic light-emitting layer, an electron transport layer, an electron injection layer, and a hole barrier layer are formed on at least the anode electrode e-sequence layer by, for example, an existing tantalum-forming technique, such as the fifth The organic film 62 is formed on the anode electrode 61 partitioned by the partition wall 70, and in the organic film 62, for example, a hole injection layer, a hole transport layer, a feed layer, and an electron injection layer. The hole barrier layer can be formed by a coating process such as a printing technique of a high-concentration polymer solution or an inkjet printing technique. However, it is not limited thereto, and a laser thermal transfer method (LITI method) represented by, for example, a shadow mask vapor deposition method or a transfer method represented by a vacuum evaporation method, or a laser can be used. The vapor deposition method (RIST method, Lips method 321390 30 201013606 *, etc. sequentially forms a hole injection layer, a hole transport layer, an organic light-emitting layer, an electron transport layer, an electron injection layer, and a hole barrier layer to form a film, Further, an organic film 62 corresponding to the element 101a is formed. Further, an inorganic oxide conductive film such as ιτο/ PED0TC3, 4-extended ethyldioxythiophene: Pss (polystyrenesulfonate), and conductivity are used for the anode electrode 61. In the case of the laminated film of the polymer film, the organic film 62 can be a laminated film of, for example, a hole injection layer/organic light-emitting layer/electron injection layer from the lower layer. Next, the alloy material of % and ^ is deposited on the entire active matrix substrate 101A on which the organic film 62 and the partition walls 7 are formed by, for example, a vacuum shovel method to form a conductive alloy film. At this time, the shadow mask method prevents the excess alloy film from being vapor-deposited outside the desired region, and the cathode electrode 63 is integrally formed in the arrangement region of at least the pixel (lGla) as shown in Figs. However, the present invention is not limited thereto, and the cathode electrode 63 may be formed by, for example, the above-described coating process technique. Then, a multilayer film of Si〇2 and siNx is formed on the anode electrode 61 partitioned by the tantalum partition wall 70 and the organic light-emitting diode M formed of the organic film 62 and the cathode electrode 63 by CVD, a method, or the like. The entire upper surface of the active matrix substrate 101A is formed with a passivation film 8 用以 for protecting the respective elements (qi, Q2, (Π, D1, etc.) and wirings (Lg, Ld, Lp, L1, L2, etc.) of the lower layer. A substrate is attached to the opposite side of the substrate 1 to 1A to be sealed, or a film is formed by a sputtering method, a Cvd method, or the like to perform sealing. After the above steps, the device shown in FIG. 4 is manufactured. The display panel 1〇1 of the layer structure includes the pixel 101a. In this case, the substrate on the side opposite to the substrate 1〇u is a transparent polymer film represented by ruthenium or PET, and is 31 321390 201013606. Or the GVD material is used to increase the sealing film of the thin translucent shirt and the inorganic film, etc. 9 Money then 'by the display panel 1〇1 manufactured as above, the signal control unit 102 and the scanning drive unit 1〇3 are mounted. , data drive unit 1〇2 capacitor line drive unit 1G5, drive In the organic EL display device 1 of the present embodiment, the organic light-emitting device 1 of the present embodiment is manufactured. In the above manufacturing steps, the steps of cleaning the substrate are appropriately included, but for the sake of explanation. The above steps are omitted, and as described above, the organic germanium display device of the present embodiment is provided with a film for light penetration with respect to the organic film 62 on the side of the lower surface of the light-extracting side. Since it is formed, it is possible to realize a so-called full-open back-light-emitting organic EL display device 1 of all the light-extracting surfaces. In addition, as described above, all the openings of the light-extracting surface are formed, and the light-emitting element can be realized. In the configuration, the arrangement of the organic light-emitting diode D1) is freely designed. Therefore, an organic EL display device having a large degree of freedom in design can be realized. Further, in the manufacturing method of the present embodiment, since Since the transparent semiconductor layer 44 covers the contact inner wiring 42 and the second wiring layer 43, the wiring (42, 43, and the like) of the etching step and the like described later can be reduced. In the above embodiment, each layer of the organic EL display device 1 can be formed of a flexible material. Further, in the embodiment of the present invention, a light-emitting layer is collectively used (in the present embodiment) The organic film 62) is an organic EL display device formed of an organic material. However, the present invention is not limited thereto, and may be, for example, 321390 32 201013606. For example, the luminescent layer is an inorganic material formed of an inorganic material. £. * (Embodiment 2)

❹ 接著,以有機EL顯示裝置為例,說明本發明實施形態 2之顯不裝置。在本實施形態中,係列舉可將來自發光元 件⑷如第6 ®中之有機發光二極體⑹之舱顯^面板 1〇1之上表面(例如第6圖中之上表面2_及下表面(例如 第6圖中之下表面100a)的兩方輪出至外部的有機豇顯示 襄置。亦即’本實施形態之有機虹顯示裝置係兼具上面發 光型(頂發射型)及背面發光型之兩方之所謂的兩面發光型 之有機EL顯示裝置⑽。在f6圖中,以反白箭頭表示發 光方向(光之導出方向)。並且,在以下之說明中 本發明之實施形態1相同之構成,為了說明之明確化,標 記相同之元件符號,並省略其詳細之說明。 不 本實施形態之有機EL顯示裝置的功能性構成係與第工 圖所示之有機EL顯示裝置100之概略性功能方塊成相 同。然而,在本實施形態中,係以畫素2〇ia取代第丨圖之 畫素101a。而且’畫素201a之概略電路構成係與第2圖 所示之晝素101a的概略電路構成相同。然而,在本實施形 態中,係以有機發光二極體D2來取代第2圖之有機發光二 極體D1。 (晝素構成) 接著,詳細地說明各晝素201a之佈局構造及層構造。 本實施形態之畫素201a的主動矩陣基板1〇ία之佈局構造 33 321390 201013606 係與第3圖所示之畫素101a的佈局構造相同。然而,本實 施形態之晝素2〇la的概略層構造係作成第6圖'所示者。而 且,第6圖係與第4圖同樣地’將畫素2〇1&顯示為在與第 3圖之A-A,相同之位置切斷的連續端面的概略剖面圖。 圖與第4圖得知’本實施形態之有機EL顯示 ΪΓ 施形態1之有機ELil示裝置刚同樣的 ! 係以由透明之電極材料所形成之陰極電極65 來取代陰極電極63(參照例如第4圖),並且在陰極電極仍 以減低有機發光二極體D2之陰極之電阻值的辅 助電極66。 陰極電極65係與例如陽極電極61同樣地,可利用可 供可見光穿透之電極材料來形成。該電極材料係可使用例 如ΖΤ0或ΙΤ0等氧化物導電體材料、或銀⑽、紹⑴)等 金屬材料所構成之透料層膜、錢包含料透明單層膜 之多層構造的透明積層膜。此外,使用金屬材料時,包含 上述膜之層係作成為供光穿透之程度的薄的半穿透膜。在 本實施形態中,係列舉使用Mg/Ag <合金膜且以供光穿透 之程度的薄膜形成之薄膜的情形作為例子。如此,除了本 發明之實施形態1中之底發射型的構戍外,藉由以透明之 電極構成陰極電極65,即可實現能從_示面板m之下表 面l〇〇a及上表面200a的兩方導出光之所謂兩面發光蜇的 有機EL顯示裝置。 再者,陰極電極65上之辅助電極郎係形成在例如主 動矩陣基板101A之區劃各畫素201a的區娀(例如間隔璧 34 321390 201013606 70上方)。該辅助電極材料 機氧化物導電體材料、或'、例如ZT0《IT〇等無 成之单層膜、或是包含S3膜'⑽等金屬、 然而,如本實施形態在將輔助;二夕層構造的意積層膜。 之各區域上時,輔助電極66並^1 配置在各畫素I 料而形成’亦可由具備例如A1 :使極村 〇 形成。在本實施形態中,係列舉使用§,導電性的材料而 單層膜來形成漏電極66之例^構成之導電性 機發光二極體D2之陰極之電此以減低有 極體D2之驅動電壓’結果可減 : 耗電力。此外’由於辅助電_之材料係使: 1 極材料,因此可實現不僅下表面购開口且上表面 a整體㈣口之所謂兩面全開口型之有機此顯 、製造方法) | 再者,本實施形態之有機EL顯示裝置的製造方法係在 、本發明之實施形態丨之有機EL_裝置的製造方法相同 =製造方法,其中,第5—u圖所示之陰極電極63的形成 步驟係為透明陰極電極65的形成步驟,並追加在陰極電極 65上形成辅助電極66之步驟。此外,其他製造步驟係與 在本發明之實施形態1中利用第54圖至第51〇圖及第4 圖說明之步驟相同,因此在此省略詳細之說明。 在陰極電極65之形成步驟中,利用例如真空蒸鍍法等 1 Mg與Ag之合金薄膜堆積在利用第5—丨圖至第5_9圖製 4的主動矩陣基板101A上整體,而形成陰極電極阳。此 35 321390 201013606 時,利用陰影遮罩法將陰極電極65形成在所希望之整體區 域。 < 此外,在輔助電極6 6之形成步驟中,如上所述步驟形 ' 成陰極電極65後,利用使用例如陰影遮罩法之濺鍍法、CVD 法或真空蒸鍍法等將ΖΤ0或ΙΤ0等氧化物導電材料或Ag、 A1、Cu等低電阻率的金屬堆積在至少陰極電極65上,藉 此在例如陰極電極65之上表面的間隔壁70之上方區域形 成輔助電極6 6。 之後,與本發明之實施形態1相同地,在形成鈍化膜⑬ 80之後,藉由將如上方式製造之顯示面板101安裝在搭載 有信號控制部102、掃描驅動部103、資料驅動部104、電 容線驅動部105、驅動信號產生部106及其他零件的框體, 而製造本實施形態之有機EL顯示裝置。 再者,在以上之製造步驟中,適當地包含洗淨基板之 步驟等,但在此為了說明之簡略化,省略該等步驟。 如以上之說明,本實施形態之有機EL顯示裝置之相對 ❹ 於有機膜62位於光導出側之上表面200a側及下表面100a 侧的所有層係以供光穿透之膜所形成,因此可實光導出面 之全部開口之所謂全開口之兩面發光型有機EL顯示裝置。 此外,如上方式構成光導出面全部開口,即可對發光 元件(在本實施形態中為有機發光二極體D2)之配置進行自 由設計,因此可實現設計自由度大的有機EL顯示裝置。再 者,由於本實施形態之有機EL顯示裝置具備用以減低陰極 電極65之電阻值的輔助電極66,因而可減低有機發光二 36 321390 201013606 4 極體D2之驅動電壓,結果可減低有機EL顯示裝置之消耗 、 電力。再者,本實施形態之有機EL顯示裝置係可作為例如 • 貼附在車輛之窗、玻璃窗或玻璃製水槽等透明面而使用的 顯示器,能以各種之目的來使用。 此外,在本實施形態之製造方法中,與本發明實施形 態1同樣地,由於在製造過程中以透明半導體層44覆蓋接 觸件内配線42及第2配線層43等,因此可減低後述之蝕 刻步驟等之各配線(42、43等)所受到之製程損害。 並且’在上述實施形態中,與本發明實施形態1同樣 地’亦可使用可撓性材料形成用以構成有機EL顯示裝置 100之各層。 此外’在本實施形態1中,與本發明實施形態1同樣 地’係可作成為例如發光層為以無機材料所形成之無機EL 顯示裝置。再者’在本實施形態中,藉由在屬於一方之光 導出側的上下任一側之層設置例如反射膜(反射器),即可Next, an organic EL display device will be taken as an example to explain the display device according to the second embodiment of the present invention. In the present embodiment, the upper surface of the panel 1 〇1 of the light-emitting element (4), such as the organic light-emitting diode (6) of the 6th (for example, the upper surface 2_ and the lower surface in FIG. 6) The surface of the surface (for example, the lower surface 100a in FIG. 6) is rotated to the external organic display device. That is, the organic rainbow display device of the present embodiment has both the upper emission type (top emission type) and the back surface. A two-sided light-emitting type organic EL display device (10) of the two types of light-emitting type. In the figure f6, the light-emitting direction (light-extracting direction) is indicated by a reverse white arrow. Further, in the following description, the first embodiment of the present invention The same components are denoted by the same reference numerals, and the detailed description thereof will be omitted. The functional configuration of the organic EL display device of the present embodiment and the organic EL display device 100 shown in the drawings are the same. The schematic functional blocks are the same. However, in the present embodiment, the pixels 101a of the second figure are replaced by pixels 2〇ia, and the schematic circuit configuration of the pixel 201a and the pixel shown in Fig. 2 are shown. Summary circuit composition of 101a However, in the present embodiment, the organic light-emitting diode D1 of the second embodiment is replaced by the organic light-emitting diode D2. (Formula structure) Next, the layout structure and layer of each element 201a will be described in detail. The layout structure 33 321390 201013606 of the active matrix substrate 1 α α 画 201 201 201 201 201 201 201 201 201 201 201 201 201 201 101 101 101 101 101 101 101 101 101 101 101 101 101 101 101 101 101 101 101 101 101 101 101 101 101 101 101 101 The schematic layer structure is shown in Fig. 6. Moreover, Fig. 6 shows that the pixel 2〇1& is displayed as a continuous cut at the same position as AA of Fig. 3, similarly to Fig. 4. The cross-sectional view of the end face is the same as that of the organic ELil display device of the organic EL display embodiment of the present embodiment. The cathode electrode 65 formed of a transparent electrode material is substituted for the cathode. The electrode 63 (see, for example, Fig. 4), and the auxiliary electrode 66 for reducing the resistance value of the cathode of the organic light-emitting diode D2 at the cathode electrode. The cathode electrode 65 can be used for visible light as well as the anode electrode 61, for example. Penetrating electrode material The electrode material can be formed by using an oxide conductor material such as ΖΤ0 or ΙΤ0, or a porous layer film made of a metal material such as silver (10) or shovel (1), or a transparent structure of a transparent monolayer film of a money-containing material. Laminated film. Further, when a metal material is used, the layer including the above film is a thin semi-transmissive film to the extent that light is transmitted. In the present embodiment, a case in which a film formed of a film of a film having a degree of light penetration of Mg/Ag < alloy film is used is taken as an example. Thus, in addition to the bottom emission type structure according to the first embodiment of the present invention, by forming the cathode electrode 65 with a transparent electrode, the lower surface l〇〇a and the upper surface 200a of the display panel m can be realized. The so-called two-sided luminescent organic EL display device that emits light from both sides. Further, the auxiliary electrode on the cathode electrode 65 is formed, for example, in the region of each pixel 201a of the active matrix substrate 101A (e.g., above the spacer 34 321390 201013606 70). The auxiliary electrode material machine oxide conductor material, or ', for example, a single layer film such as ZT0, IT〇, or a metal such as S3 film' (10), however, as in the present embodiment, the second layer Constructed an intentional laminate film. In each of the regions, the auxiliary electrode 66 is disposed in each of the pixels I to form ' or may be formed by, for example, A1: 极村〇. In the present embodiment, a series of thin electrodes 66 are formed by using a conductive material and a single layer film to form a drain electrode 66. The cathode of the conductive light-emitting diode D2 is configured to reduce the driving of the electrode body D2. The voltage 'results can be reduced: power consumption. In addition, since the material of the auxiliary electric material is: a one-pole material, it is possible to realize an organic display of the so-called two-sided full-open type of the opening of the upper surface a (four) opening, and the manufacturing method) The manufacturing method of the organic EL display device of the embodiment is the same as the manufacturing method of the organic EL_device according to the embodiment of the present invention. The manufacturing method of the cathode electrode 63 shown in the fifth embodiment is transparent. The step of forming the cathode electrode 65 and the step of forming the auxiliary electrode 66 on the cathode electrode 65 are added. Further, the other manufacturing steps are the same as those described in the first embodiment of the present invention in the first to fifth and fourth drawings, and therefore detailed description thereof will be omitted. In the step of forming the cathode electrode 65, an alloy thin film of 1 Mg and Ag is deposited on the active matrix substrate 101A using the fifth to fourth sheets to form a cathode electrode by using, for example, a vacuum deposition method. . At this 35 321 390 201013606, the cathode electrode 65 is formed in the desired overall region by the shadow mask method. < Further, in the step of forming the auxiliary electrode 66, after the step of forming the cathode electrode 65 as described above, ΖΤ0 or ΙΤ0 is performed by a sputtering method using a shadow mask method, a CVD method, a vacuum evaporation method, or the like. The oxide conductive material or a low-resistivity metal such as Ag, Al, Cu or the like is deposited on at least the cathode electrode 65, whereby the auxiliary electrode 66 is formed in a region above the partition wall 70 on the upper surface of the cathode electrode 65, for example. Then, in the same manner as in the first embodiment of the present invention, after the passivation film 138 is formed, the display panel 101 manufactured as described above is mounted on the signal control unit 102, the scan driving unit 103, the data driving unit 104, and the capacitor. The organic EL display device of the present embodiment is manufactured by the wire drive unit 105, the drive signal generating unit 106, and the casing of another component. Further, in the above manufacturing steps, the steps of cleaning the substrate and the like are appropriately included, but for the sake of simplification of the description, the steps are omitted. As described above, in the organic EL display device of the present embodiment, all of the layers on the light-derived side upper surface 200a side and the lower surface 100a side of the organic film 62 are formed by a film for light penetration, and thus can be formed. A so-called full-open two-sided light-emitting organic EL display device having all the openings of the solid light-derived surface. Further, since all the openings of the light-extracting surface are formed as described above, the arrangement of the light-emitting elements (the organic light-emitting diode D2 in the present embodiment) can be freely designed. Therefore, an organic EL display device having a large degree of freedom in design can be realized. Further, since the organic EL display device of the present embodiment includes the auxiliary electrode 66 for reducing the resistance value of the cathode electrode 65, the driving voltage of the organic light-emitting diode 36 can be reduced, and as a result, the organic EL display can be reduced. Device consumption, electricity. Further, the organic EL display device of the present embodiment can be used as, for example, a display that is attached to a transparent surface such as a window of a vehicle, a glass window, or a glass water tank, and can be used for various purposes. In the manufacturing method of the present embodiment, in the same manner as in the first embodiment of the present invention, the contact inner wiring 42 and the second wiring layer 43 are covered with the transparent semiconductor layer 44 during the manufacturing process, so that the etching described later can be reduced. The process of the wiring (42, 43, etc.) of the steps and the like is damaged. Further, in the above-described embodiment, the layers constituting the organic EL display device 100 may be formed using a flexible material in the same manner as in the first embodiment of the present invention. In the first embodiment, the inorganic EL display device formed of an inorganic material can be used as the light-emitting layer, for example, in the same manner as in the first embodiment of the present invention. In the present embodiment, by providing, for example, a reflection film (reflector) on one of the upper and lower sides of the light-extracting side belonging to one side,

❹實現了亮 度等提升之頂面發光型或背面發光型之有機EL 顯示裝置。 (實施形態3) 接著’以液晶顯示裝置3〇〇為例,說明本發明實施形 態3之顯示裝置。第7圖係顯示液晶顯示裝置3〇〇之概略 構成的方塊圖。再者,在本實施形態中,係列舉在被稱為 所謂背光之光源(參照例如第1〇圖中之光源35〇)與液晶元 件(參照例如第10圖中之液晶元件E31)之間介置有元件基 板(參照例如第10圖中之主動矩陣基板3〇1A)之構成的液 37 321390 201013606 = ’、、不裝置300。此外’在本實施形態中,對於與本發明 1 -4> 兔2相同的構成係標示相同符號,並省略其詳細說 ·_ 明。 * (整體構成) 、 如第7圖所示’液晶顯示裝置3〇〇係具備:包含以2 、隹矩陣狀配列之畫素(PX)301a的顯示面板301 ;連接在該 顯 TfC 面。η 1 攸之掃描驅動部103、資料驅動部104、電容線 驅動°卩105 ;及用以控制各部之信號控制部ι〇2。再者,顯 厂、面板3〇1係具備紅(R)、緑(G)及藍(Β)之各個三原色書❻ 素 30la。 — 在此’信號控制部102、掃描驅動部1〇3、資料驅動部 _ 線驅動部105之構成係與本發明實施形態1相 二、。此外,掃描控制信號CONT1、資料控制信號C0NT2、電 ^控制信號c〇NT3及視頻資料信號DAT亦適當地產生為 ,j夜阳元件之驅動方式的信號而輪出。然而,在本實施 形態中,^ j ,略驅動線LP、驅動信號產生部106及發光控 制信號。 ^ 電办=者,顯示面板301係連接在掃描線“、資料線Ld、 LC。在本實施形態中,各條掃描線^、資料線u、 配: 中’ W以彼此交叉之方式延伸之配線部分設為主 晶體從、该主配線分歧且連接在各晝素301a中之開關電 1或蓄積電容器⑶(參照例如第8圖)的配線設為 ;他構成::鱼2接各元件間之配線部分設為副配線。 構成因係與本發明實_態i同樣,故在此省略詳細 38 321390 201013606 之說明。 (晝素構成) 作第8_明各畫素3Gla之概略構成及Μ 作。=,以下之說明在R、G、B中任一個畫素斯a亦同 圖係晝素301a之概略電路構成的示意 圖所示,書素a a 如第8 —常301a包含開關電晶體Q31、蓄積 及液晶元件E31。 令益C31 Ο 開關電晶體Q31係為例如n型之m,其源極 接在例如節點N34中從資料線u之主配線分 線連 沒極〇係連接在包含節•點腿植線L31。此外,^ 晶體咖之開極G係連接在例如節點N33中從掃^ = ^配線分歧關配線。因此,開關電晶體Q31係依據掃插 #號之電壓位準(掃插控制電壓)使資料線Ld及節點N1 間導通或斷路。 在配線L31 ’經由在例如節點N31中分歧之配線部分 ❹(此部分亦包含在配線L31)連接有蓄積電容器C31之一方 端子。蓄積電容器C31之另一方端子係連接在例如節點N1 中從電容線Lc之主配線分歧的副配線。與本發明實施形態 1同樣地’從電容線驅動部105對電容線Lc施加電容線驅 動信號。該電容線驅動信號之電壓位準Vc(電容線驅動電 壓)係可設成例如接地電位。例如,與液晶元件Cpx(E31) 相同連接至屬於共通電極之GND(Vcom)端子。換言之,電 容線Lc係可設成接地線。此時,可省略電容線驅動部1〇5。 再者,在配線L31亦連接有液晶元件E31之另一方電 39 321390 201013606 極(例如第10圖中之書紊φ _ 方電極係共通電極(例如'第H7^31之另一 此,液晶元件E31係發揮作為電二電極313)。因 如之功能。如第7圖路上;即所謂液晶電容器 第8圖所不,在該共通電極313施 c;i :二電壓V_。由以上之連接關係得知,蓄積電容器 於屮二乂日日疋件咖係發揮並聯連接在開關電晶體⑽之 2 =的負載電容之功能。此外,共通電㈣⑽係可設 成例如接地電位GND。 b、輸人至掃n*5之掃描信號的電壓位準vg(掃 !: ^電幻成為高位準時’開關電晶體咖成為導通狀 二,由__晶體Q3i將電荷注入液晶元件£31之 I素電極311(參照例如第1G圖)。結果,畫素電 信號之電壓卿,在與共通電極313(參昭 伽之分子配列變化。 ν_)’而使液晶元件 成蓄積電容器⑶係在從掃描紅之㈣位準vg ;輕位準且開關電晶體Q1完全成為關斷狀態後、到下_ ^壓位準W為高位準且關電晶體Q31 : :=個信號為止之期間,發揮維持畫素電極‘ ㈣作用。亦即,蓄積電容器⑶係在財期間 至資料線L>之資料信號Sd。 ’、、則 再者,在本實施形態中,亦可採用例如輪入 Ld之貧料信號的極性與輸入至電容線^ j、·、 的電位在各預定期間反轉之所謂反轉 ^線驅動信號 轉驅動方式。就反轉驅 321390 40 201013606 動方式而言,雖有點反轉驅動方式或線反轉驅動方式等, -· 但亦可採用任一種反轉驅動方式。 • 接著’利用第9圖及第10圖,詳細地說明各晝素3〇la 之佈局構造及層構造。第9圖係用以說明晝素301a之主動 矩陣基板301A(參照例如第1〇圖)的佈局構造的概略平面 圖。第10圖係用以說明晝素301a之層構造的概略剖面圖。 而在第9圖中,為了說明之簡化,係省略透明基板1〇、層 ❹間絕緣膜40及50及對向基板302A等之構成(參照例如第 10圖)。第10圖係顯示對應於第9圖之A-A,切斷之連續端 面的畫素301a之概略性層構造。 如第9圖或第1〇圖所示,晝素3〇la係具備:作為陣 列基板之主動矩陣基板301A(參照例如第1〇圖);與該主 動矩陣基板301A相對向之對向基板302A(參照例如第10 圖);及配置在主動矩陣基板301A與對向基板3〇2A之間的 液晶元件E31(參照例如第1〇圖)。主動矩陣基板3〇ia係 ❹包含例如掃描線Lg、資料線Ld、電容線Lc、配線L31、開 關電晶體Q3卜及蓄積電容器C31。對向基板3〇2A係具備: 用以防止不必要之漏光之作為黑矩陣的遮光膜321 ;及晝 素301a用來供適當頻帶之波長穿透之濾色器61。液晶元 件E31係包含包夾液晶層312之畫素電極;311與共通電極 313;以及進一步包夾畫素電極311與共通電極313之配向 膜314與315,且以經由例如配線L31連接在開關電晶體 Q31及蓄積電容器C31之方式配置在主動矩陣基板3〇1A 上。此外,對向基板302A係以與主動矩陣基板3〇1A 一同 321390 41 201013606 包夾液晶元件E31之方式配置。再者,以主動矩陣基板 301A、液晶元件E31及對向基板302A形成之積層構造體係 ·- 由僅供例如朝預定方向震動之光穿透之偏光板330及340 - 所包夾。 掃描線L·、資料線Ld、電容線Lc及配線L3i係與本發明 實施形態1同樣地,分別由例如第1配線層41、接觸件内 配線42、第2配線層43及接觸插塞51中之至少一部分所 形成。開關電晶體Q31係由屬於構成掃描線LG之第1配線 層41之一部分的閘極電極15、屬於層間絕緣膜40之一部 ❿ 分的閘極絕緣膜16、屬於構成資料線之一部分的第2配 線層43之一部分的源極電極18s、屬於構成配線L31之一 部分的第2配線層43之一部分的汲極電極18d、及屬於透 明半導體層44之一部分的透明半導體層17所構成。再者, 蓄積電容器C31係由屬於構成配線L31之第1配線層41之 一部分的下部電極35、屬於層間絕緣膜40之一部分的電 容絕緣膜36、及屬於構成電容線Lc之第2配線層43之一 q 部分的上部電極37所構成。再者,第8圖所示之各節點 N31、N33至N35係可分別定義在例如第3圖所示之各位置。 再者,本實施形態之開關電晶體Q31係與本發明實施 形態1之開關電晶體Q1同樣地,為所謂底閘構造的TFT, 但本發明並不限定於此,亦可為例如頂閘構造之TFT。再 者,本實施形態之主動矩陣基板301A係與本發明實施形態 1之主動矩陣基板101A同樣地,為被稱為所謂之陣列基板 者。 42 321390 201013606 再者,在透明基板ι〇上,在未形成有各種配線(Lg、有机 A top-illuminated or back-illuminated organic EL display device with improved brightness or the like is realized. (Embodiment 3) Next, a display device according to Embodiment 3 of the present invention will be described by taking a liquid crystal display device 3 as an example. Fig. 7 is a block diagram showing a schematic configuration of a liquid crystal display device 3. In the present embodiment, the series is referred to as a light source called a backlight (see, for example, the light source 35A in the first drawing) and a liquid crystal element (see, for example, the liquid crystal element E31 in Fig. 10). The liquid 37 321390 201013606 = ', and the device 300 is not provided with the element substrate (see, for example, the active matrix substrate 3〇1A in Fig. 10). In the present embodiment, the same components as those in the present invention 1 - 4 & 2 are denoted by the same reference numerals, and the detailed description thereof will be omitted. * (Overall configuration) As shown in Fig. 7, the liquid crystal display device 3 includes a display panel 301 including a pixel (PX) 301a arranged in a matrix of two, and is connected to the display TfC surface. The scanning drive unit 103, the data driving unit 104, the capacitance line drive 卩105, and the signal control unit ι2 for controlling each unit. Further, the display unit and the panel 3〇1 are provided with three primary color book elements 30la of red (R), green (G) and blue (Β). The configuration of the signal control unit 102, the scan drive unit 1〇3, and the data drive unit_line drive unit 105 is the same as that of the first embodiment of the present invention. Further, the scan control signal CONT1, the data control signal C0NT2, the electric control signal c〇NT3, and the video data signal DAT are also appropriately generated as the signals of the driving mode of the night-yang element. However, in the present embodiment, the line LP, the drive signal generating unit 106, and the light emission control signal are slightly driven. ^Electric office=, the display panel 301 is connected to the scanning line ", the data line Ld, LC. In the present embodiment, each scanning line ^, data line u, and: 'W' extend in a manner of crossing each other The wiring portion is set as the main crystal, and the wiring of the switching electric power 1 or the storage capacitor (3) (see, for example, FIG. 8) which is connected to the main wiring 301a is divided into two; The wiring portion is a sub-wiring. The configuration is the same as that of the present invention. Therefore, the detailed description of 38 321 390 201013606 is omitted here. (The composition of the elements is 3). =. The following description shows a schematic diagram of the schematic circuit configuration of any of R, G, and B, and the schematic circuit of the element 301a. The book aa, such as the eighth-to-normal 301a, includes the switching transistor Q31. , accumulation and liquid crystal element E31. The switch C31 Ο switch transistor Q31 is, for example, n-type m, and its source is connected to, for example, the node N34 from the main line of the data line u. • Point leg line L31. In addition, ^ Crystal coffee open G system is connected to, for example, node N33 In the middle of the sweep ^ = ^ wiring divergence wiring. Therefore, the switching transistor Q31 is based on the voltage level of the sweep # (sweep control voltage) to make the data line Ld and node N1 conduction or open. In the wiring L31 'via For example, in the wiring portion 分歧 which is branched in the node N31 (this portion is also included in the wiring L31), one terminal of the storage capacitor C31 is connected. The other terminal of the storage capacitor C31 is connected to, for example, the main wiring of the capacitor line Lc in the node N1. In the same manner as in the first embodiment of the present invention, a capacitance line drive signal is applied from the capacitance line drive unit 105 to the capacitance line Lc. The voltage level Vc (capacitor line drive voltage) of the capacitance line drive signal can be set, for example. The ground potential is, for example, connected to the GND (Vcom) terminal belonging to the common electrode in the same manner as the liquid crystal element Cpx (E31). In other words, the capacitance line Lc can be set as a ground line. In this case, the capacitance line driving unit 1〇5 can be omitted. Further, the other side of the liquid crystal element E31 is also connected to the wiring L31. The other is 39 321390 201013606 (for example, the book Φ _ _ square electrode common electrode in FIG. 10 (for example, 'the other one of the H7^31, the liquid The crystal element E31 functions as the electric two electrode 313). As shown in Fig. 7, the so-called liquid crystal capacitor Fig. 8 does not, and the common electrode 313 applies c; i: the two voltage V_. According to the connection relationship, the storage capacitor functions as a load capacitor of 2 = 2 in the switching transistor (10) in parallel with the device. In addition, the common current (4) (10) can be set to, for example, the ground potential GND. The voltage level vg of the scan signal from the input to the scan n*5 (sweep!: ^ EMI becomes high level on time) The switch transistor is turned on, and the charge is injected into the liquid crystal element by the __ crystal Q3i. Electrode 311 (see, for example, Fig. 1G). As a result, the voltage of the pixel electrical signal is such that the liquid crystal element becomes a storage capacitor (3) in the common electrode 313 (the change of the molecular arrangement of the ginseng gamma. ν_)' is in the (four) level of the scanning red (v) level; After the switching transistor Q1 is completely turned off, it is maintained to maintain the pixel electrode '(4) during the period until the lower voltage level is high and the transistor Q31: := is turned off. That is, the accumulation capacitor (3) is the data signal Sd from the financial period to the data line L>. In addition, in the present embodiment, for example, the polarity of the lean signal in which Ld is turned in and the potential input to the capacitance line ^j, ·, may be reversed in each predetermined period. Drive signal to drive mode. In the case of the reverse drive 321390 40 201013606, although the reverse drive mode or the line reverse drive mode is used, etc., any of the reverse drive modes can be used. • Next, the layout structure and layer structure of each element 3〇la will be described in detail using FIG. 9 and FIG. Fig. 9 is a schematic plan view showing the layout structure of the active matrix substrate 301A (see, for example, Fig. 1) of the halogen element 301a. Fig. 10 is a schematic cross-sectional view for explaining the layer structure of the halogen element 301a. In the ninth figure, for the sake of simplification of the description, the configuration of the transparent substrate 1 and the interlayer insulating films 40 and 50 and the counter substrate 302A is omitted (see, for example, Fig. 10). Fig. 10 is a view showing a schematic layer structure of a pixel 301a corresponding to the continuous end face of A-A of Fig. 9. As shown in FIG. 9 or FIG. 1 , the halogen matrix 3A includes an active matrix substrate 301A as an array substrate (see, for example, a first drawing); and the active matrix substrate 301A faces the opposite substrate 302A. (See, for example, FIG. 10); and a liquid crystal element E31 disposed between the active matrix substrate 301A and the counter substrate 3A2A (see, for example, a first drawing). The active matrix substrate 3 〇 系 includes, for example, a scanning line Lg, a data line Ld, a capacitance line Lc, a wiring L31, a switching transistor Q3, and an accumulation capacitor C31. The counter substrate 3A2A includes a light shielding film 321 as a black matrix for preventing unnecessary light leakage, and a color filter 61 for the wavelength of the appropriate frequency band to pass through the substrate 301a. The liquid crystal element E31 includes a pixel electrode that sandwiches the liquid crystal layer 312; 311 and the common electrode 313; and an alignment film 314 and 315 that further sandwiches the pixel electrode 311 and the common electrode 313, and is connected to the switching electrode via, for example, the wiring L31. The crystal Q31 and the storage capacitor C31 are disposed on the active matrix substrate 3〇1A. Further, the counter substrate 302A is disposed so as to sandwich the liquid crystal element E31 together with the active matrix substrate 3〇1A 321390 41 201013606. Further, the laminated structure formed by the active matrix substrate 301A, the liquid crystal element E31, and the counter substrate 302A is sandwiched by polarizing plates 330 and 340 which are only allowed to pass through light which is vibrated in a predetermined direction. In the same manner as in the first embodiment of the present invention, the scanning line L, the data line Ld, the capacitance line Lc, and the wiring line L3i are, for example, the first wiring layer 41, the contact inner wiring 42, the second wiring layer 43, and the contact plug 51, respectively. At least part of it is formed. The switching transistor Q31 is a gate electrode 15 belonging to a part of the first wiring layer 41 constituting the scanning line LG, a gate insulating film 16 which is a part of the interlayer insulating film 40, and a part constituting one of the data lines. The source electrode 18s of one of the wiring layers 43 and the drain electrode 18d which is a part of the second wiring layer 43 which constitutes a part of the wiring L31, and the transparent semiconductor layer 17 which is a part of the transparent semiconductor layer 44 are formed. In addition, the storage capacitor C31 is a lower electrode 35 belonging to a part of the first wiring layer 41 constituting the wiring L31, a capacitor insulating film 36 belonging to one portion of the interlayer insulating film 40, and a second wiring layer 43 constituting the capacitance line Lc. The upper electrode 37 of one of the q portions is formed. Further, each of the nodes N31, N33 to N35 shown in Fig. 8 can be defined at each position shown in Fig. 3, for example. In the same manner as the switching transistor Q1 of the first embodiment of the present invention, the switching transistor Q31 of the present embodiment is a TFT having a bottom gate structure. However, the present invention is not limited thereto, and may be, for example, a top gate structure. TFT. The active matrix substrate 301A of the present embodiment is similar to the active matrix substrate 101A of the first embodiment of the present invention and is referred to as a so-called array substrate. 42 321390 201013606 Furthermore, on the transparent substrate ι, various wirings (Lg,

Ld、Lc、L31等)及各種元件(Q31、C31等)之區域,與本發 明實施形態1同樣地,形成有例如第1配線層4丨之一部分 冗長之冗長配線(參照例如第9圖),因而使形成在透明基 板10上之層上表面的平坦性提升。此外,在本實施形態 中’透明半導體層44係不僅作為各元件(例如開關電晶體 Q31)之通道層而發揮功能,亦作為用以減低位於下層之第 2配線層43或接觸件内配線42等所受到之製程損害之保 護膜而發揮功能。 再者’具備上述構成之主動矩陣基板301A上的液晶元 件E31係由例如晝素電極311、畫素電極311上之液晶層 312、液晶層312上之共通電極313、及從上下包夾液晶層 312之配向膜314與315所構成(參照例如第1〇圖)。此外, 在液晶元件E31中,亦可於液晶層312之上部設置大致三 角形之介電質突起316(參照例如第1〇圖)。再者,在相對 ❹於液晶元件E31導出光之侧,亦可配置用以防止來自光源 350之不必要的漏光之黑矩陣、濾色器或波長轉換器等色 轉換膜。在本實施形態中,係列舉在共通電極313與對向 基板302A之間配置作為黑矩陣之遮光膜321及濾色器64 之情形為例。 再者,在主動矩陣基板301A與對向基板302A之更外 側’設置有包夾主動矩陣基板301A與對向基板302A之偏 光板330及340。此外,光源350係配置在例如主動矩陣 基板301A下。因此,來自光源350之光係經由偏光板330、 43 321390 201013606 主動矩陣基板301A、液晶元件E31、濾色器64、對向基板 302A及偏光板340,從屬於顯示面板301之光導出面的上 : 表面300a輸出至外部。在第10圖中,以反白箭頭顯示發 ' 光方向(光的導出方向)。 在此,第1配線層41、層間絕緣膜40、透明半導體層 44及第2配線層43係使用與本發明實施形態1相同之材 料而形成。因此,開關電晶體Q31及蓄積電容器C31亦可 使用與上述相同之材料而形成。再者,透明基板、接觸件 内配線42、接觸插塞51及層間絕緣膜50亦可使用與本發 ® 明實施形態1相同之材料而形成。 濾色器64係可使用以依R、G、B各晝素301a使適當 頻帶的波長穿透之方式混合有預定顏料之感光性樹脂等各 種過濾材料而形成。在本實施形態中,係列舉使用依各晝 素301a混合有預定顏料之感光性樹脂而形成之情形為例。 在主動矩陣基板3 01A上之液晶元件E 31中’液晶層 312之母材係可使用例如酯系、聯苯系、苯環己烷系、環 @ 己烧系、苯基11密咬系、或二氧陸圜(dioxane)系材料等各種 材料。液晶層312係藉由在上述之母材混合對應目的之材 料而形成。 晝素電極311係可使用例如ZT0或IT0等氧化物導電 材料。在本實施形態中,係列舉使用ZT0之透明導電膜之 情形為例加以說明。再者,共通電極亦與畫素電極311同 樣地,可使用例如ZT0或IT0等氧化物導電材料。在本實 施形態中,係列舉使用ZT0之透明導電膜之情形為例加以 44 321390 201013606 4 說明。 • 配向膜314及315係分別使液晶層312之分子配列朝 ’ 一定方向排列之膜’依據使用在液晶層312之材料,適當 地由例如聚醯亞胺等材料所形成。 介電質突起316係在對液晶層312施加偏壓電壓時用 以控制液晶分子之排列方向者,以隔著液晶層312與例如 畫素電極311之中央部相對向之方式從液晶層312上表面 朝内部突出設置。該介電質突起316係可使用例如感光性 樹脂等介電質材料而形成。 遮光膜312係可使用例如鉻(Cr)等金屬膜或分散有碳 黑所代表之遮光性分散顏料之黑阻劑的感光性阻劑膜。在 本實施形態中,係列舉使用而形成之情形為例。 間隔件317係用以確保在主動矩陣基板3〇1人與對向基 板302A之間密封有液晶之空間的構件,可使用例如感光性 樹脂等而構成。然而’並不限定於此。 〇 再者,偏光板及340係與光之行進方向垂直且用 以供朝特定之方向強力振動之光穿透的薄膜,且可使用例 如使碘(I)吸附之聚乙烯醇(Polyvinyl Alc〇h〇1,PVA)等膜 而形成。然而,並不限定於此。 此外,對向基板302A係由例如透明基板32〇所構成。 該透明基板320係可使用例如玻璃基板、石英基板或塑膠 基板4各種透明之絕緣性基板。此外,亦可使用可撓性基 板作為透明基板320。 (製造方法) 321390 45 201013606 f ::广圖式詳細地說明本實施形態之液晶顯示裝 置 製造方法。第1Η圖及第1卜2圖、第12—!圖至 第12-6圖及第13圖係顯示本發明實施形態之液晶顯示裝 置300之顯示面板301的製造方法之製程圖。在第11—'1圖 及第1卜2圖、第μ圖至第12_6圖及第13圖中,顯示 為以第9圖所示之Β_Β’切斷之連續端面。 * 在本製造方法中,首先,藉由利用與本發明實施形離 1中以第5-i目至第5_6圖說明之各步驟相同的步驟,製 2含開關電晶體⑽及蓄積電容器⑶之主動矩陣基板 接著,利用例如濺鍍法、CVD法等依序將訂〇成膜在 動矩陣基板301A上,藉此形成具備與接觸插塞Η電性 連接之接點的透明ΖΤ0膜。然後,利用例如光微影法對該 膜進行圖案化,而如第1卜1圖所示,在層間絕緣膜50 上形,與接難塞51電性連接之晝素電極311。然:而,並 不限疋於此’亦可湘使用例如凝膠/溶膠法之印刷技術或 嘴墨印席他術等塗布製赌術#,形成畫素電極3ιι。 接著,在形成有晝素電極311之主動矩陣基板3〇1Α 方疋轉塗布例如聚醯亞胺溶液,並使該溶液乾燥並固化 〗’利用例如摩擦(rubbing)法摩擦聚醯亞胺膜,而如第 11-2圖所示,在主動矩陣基板3G1A上形成用以覆蓋晝素 電極311的配向膜314。然而並不限定於此,亦可利用例 ^述之塗布製程技術等來形成配向膜314,並以摩擦法 等來處理該配向膜314。 321390 46 201013606 然後’在主動矩陣基板301A之晝素301a的排列區域 周圍’形成用以防止液晶材之流出的密封材。此外,依需 要亦可進行塗布導電膠(transfer)等各種步驟。 再者,在本製造方法中,準備對向基板3〇2A用之透明 基板320,利用例如濺鍍法、CVD法或真空蒸鍍法等將Cr 堆積在與該基板之厚度方向垂直之面的2個主面中之一方 ,面(以下稱為上表面)上形成具備遮光性之鉻膜。接 © ❹ 著,利用例如光微影法對該鉻膜進行圖案化,藉此如第】2 _ j 圖所示,在例如主動矩陣基板3〇1A上之區劃各晝素隐 的區域形成作為黑矩陣之具遮光性的遮光膜321。然而, 限疋於此’亦可利用使用黑阻劑及光微影法 光膜32卜 接著,在形成有遮光膜321 <對向基板觀上,旋轉 及、^例如R、G、B混合有預定顏料之感光性阻劑液,並 反覆進彳讀餘缝丨叫錢 圖所示,依R、G、b各書音·〜驟而如第Μ 且啦* 各畫素301形成使適當之頻帶沾、* 長穿透的濾、色H 64。然而並秘定於此 ·的波 述之塗布製程技術等在R、G、B各晝素斯可^例如上 64。此外’在鄰接之濾色器64間的交界面下&二成濾色器 遮光膜321。 丨下’设置有例如 接著,利用例如雜法、⑽ 64之對向基板觀上,藉此形成透明成之= 形成 …、後’利關如光微影法去除多 饤〇膜。 圖所心在至少與畫一心:二:= 321390 47 201013606 形成/、通電極313。然而,並不限定於此,亦可利用例如 上述塗布製程技術等,形成共通電極313。 接著,在形成有共通電極313之對向基板3〇2A上,旋 轉塗布例如聚醯亞胺溶液’並使該溶液乾燥並g]化後,利 用例如摩擦法摩擦聚醯亞胺膜,而如第12_4圖所示,形成 配向膜315。然:而並不限定於此,亦可利用例如上述之塗 布製程技術等來形成配向膜315,独雜料來處理該 配向膜315。In the region of Ld, Lc, L31, and the like, and the regions of the various elements (Q31, C31, and the like), as in the first embodiment of the present invention, for example, a redundant wiring in which one of the first interconnect layers 4 is partially redundant (see, for example, FIG. 9) is formed. Thereby, the flatness of the upper surface of the layer formed on the transparent substrate 10 is improved. Further, in the present embodiment, the transparent semiconductor layer 44 functions not only as a channel layer of each element (for example, the switching transistor Q31) but also as a wiring layer 42 for reducing the second wiring layer 43 or the contact portion located in the lower layer. It functions as a protective film that is damaged by the process. Further, the liquid crystal element E31 on the active matrix substrate 301A having the above configuration is composed of, for example, a halogen electrode 311, a liquid crystal layer 312 on the pixel electrode 311, a common electrode 313 on the liquid crystal layer 312, and a liquid crystal layer sandwiched from above and below. The alignment films 314 and 315 of 312 are formed (see, for example, the first drawing). Further, in the liquid crystal element E31, a substantially triangular dielectric protrusion 316 may be provided on the upper portion of the liquid crystal layer 312 (see, for example, a first drawing). Further, a color conversion film such as a black matrix, a color filter or a wavelength converter for preventing unnecessary light leakage from the light source 350 may be disposed on the side opposite to the light emitted from the liquid crystal element E31. In the present embodiment, a case where the light-shielding film 321 and the color filter 64 as the black matrix are disposed between the common electrode 313 and the opposite substrate 302A is exemplified. Further, polarizing plates 330 and 340 which sandwich the active matrix substrate 301A and the opposite substrate 302A are provided on the outer side of the active matrix substrate 301A and the opposite substrate 302A. Further, the light source 350 is disposed under, for example, the active matrix substrate 301A. Therefore, the light from the light source 350 passes through the polarizing plates 330, 43 321390 201013606, the active matrix substrate 301A, the liquid crystal element E31, the color filter 64, the opposite substrate 302A, and the polarizing plate 340, and is subordinate to the light-extracting surface of the display panel 301: The surface 300a is output to the outside. In Fig. 10, the light direction (light direction of light extraction) is indicated by a reverse white arrow. Here, the first wiring layer 41, the interlayer insulating film 40, the transparent semiconductor layer 44, and the second wiring layer 43 are formed using the same material as in the first embodiment of the present invention. Therefore, the switching transistor Q31 and the storage capacitor C31 can be formed using the same material as described above. Further, the transparent substrate, the contact inner wiring 42, the contact plug 51, and the interlayer insulating film 50 may be formed using the same material as that of the first embodiment. The color filter 64 can be formed by using various kinds of filter materials such as a photosensitive resin in which a predetermined pigment is mixed in such a manner that the wavelengths of the appropriate frequency bands are penetrated by the respective elements 301a of R, G, and B. In the present embodiment, a case in which a photosensitive resin in which a predetermined pigment is mixed with each element 301a is used is exemplified as an example. In the liquid crystal element E 31 on the active matrix substrate 301A, the base material of the liquid crystal layer 312 can be, for example, an ester system, a biphenyl system, a benzene cyclohexane system, a ring@hexa Burn system, or a phenyl 11 diebone system. Or various materials such as dioxane-based materials. The liquid crystal layer 312 is formed by mixing the above-mentioned base material with a material for a corresponding purpose. As the halogen electrode 311, an oxide conductive material such as ZT0 or IT0 can be used. In the present embodiment, a case where a transparent conductive film of ZT0 is used in series will be described as an example. Further, the common electrode is also the same as the pixel electrode 311, and an oxide conductive material such as ZT0 or IT0 can be used. In the present embodiment, the case of using a transparent conductive film of ZT0 is exemplified by an example of 44 321 390 201013606 4 . • The alignment films 314 and 315 are respectively formed such that the molecules of the liquid crystal layer 312 are aligned in a certain direction. The material is preferably formed of a material such as polyimide or the like depending on the material used in the liquid crystal layer 312. The dielectric protrusions 316 are used to control the alignment direction of the liquid crystal molecules when a bias voltage is applied to the liquid crystal layer 312, so as to face the liquid crystal layer 312 with respect to the central portion of the pixel electrode 311 via the liquid crystal layer 312. The surface protrudes toward the inside. The dielectric protrusions 316 can be formed using a dielectric material such as a photosensitive resin. As the light-shielding film 312, for example, a metal film such as chromium (Cr) or a photosensitive resist film in which a black resist of a light-shielding dispersion pigment represented by carbon black is dispersed can be used. In the present embodiment, a case in which a series is used and used is taken as an example. The spacer 317 is a member for securing a space in which a liquid crystal is sealed between the active matrix substrate 3〇1 and the opposite substrate 302A, and can be formed using, for example, a photosensitive resin. However, ' is not limited to this. Further, the polarizing plate and the 340 are films which are perpendicular to the traveling direction of light and are used for light which is strongly vibrated in a specific direction, and for example, polyvinyl alcohol which adsorbs iodine (I) (Polyvinyl Alc〇) can be used. H〇1, PVA) is formed by a film. However, it is not limited to this. Further, the counter substrate 302A is composed of, for example, a transparent substrate 32A. As the transparent substrate 320, for example, a glass substrate, a quartz substrate, or a plastic substrate 4 can be used as various transparent insulating substrates. Further, a flexible substrate may be used as the transparent substrate 320. (Manufacturing method) 321390 45 201013606 f: The wide-film type describes the liquid crystal display device manufacturing method of the present embodiment in detail. Fig. 1 and Fig. 2, Fig. 12-! to 12-6 and Fig. 13 are process diagrams showing a method of manufacturing the display panel 301 of the liquid crystal display device 300 according to the embodiment of the present invention. In the 11th to 1st and 1st, 2nd to 12th, and 13th, the continuous end faces cut by Β_Β' shown in Fig. 9 are shown. * In the present manufacturing method, first, the switching transistor (10) and the storage capacitor (3) are manufactured by the same steps as those described in the fifth to fifth embodiments of the present invention. The active matrix substrate is then sequentially formed on the movable matrix substrate 301A by, for example, a sputtering method, a CVD method, or the like, thereby forming a transparent ITO film having a contact electrically connected to the contact plug. Then, the film is patterned by, for example, photolithography, and as shown in Fig. 1, a halogen electrode 311 which is electrically connected to the barrier 51 is formed on the interlayer insulating film 50. However, it is not limited to this. It is also possible to form a pixel electrode 3 ιι using a printing technique such as a gel/sol method or a stenciling technique such as a mouth ink printing technique. Next, a solution of, for example, a polyimide solution is applied to the active matrix substrate 3形成1Α on which the halogen electrode 311 is formed, and the solution is dried and solidified to rub the polyimide film by, for example, rubbing. As shown in FIG. 11-2, an alignment film 314 for covering the halogen electrode 311 is formed on the active matrix substrate 3G1A. However, the present invention is not limited thereto, and the alignment film 314 may be formed by a coating process technique or the like as described, and the alignment film 314 may be treated by a rubbing method or the like. 321390 46 201013606 Then, a sealing material for preventing the outflow of the liquid crystal material is formed around the arrangement region of the halogen 301a of the active matrix substrate 301A. Further, various steps such as applying a conductive paste may be performed as needed. Further, in the present manufacturing method, the transparent substrate 320 for the counter substrate 3A2A is prepared, and Cr is deposited on a surface perpendicular to the thickness direction of the substrate by, for example, a sputtering method, a CVD method, a vacuum deposition method, or the like. A chrome film having a light-shielding property is formed on one of the two main faces, and the surface (hereinafter referred to as the upper surface). The chrome film is patterned by, for example, photolithography, whereby, as shown in the second drawing, the region on the active matrix substrate 3〇1A is formed as a region in which each element is hidden. A light-shielding light-shielding film 321 of a black matrix. However, limited to this, it is also possible to use a black resist and a photolithography film 32, and then, in the formation of the light shielding film 321 < the opposite substrate, the rotation, and the like, for example, R, G, B mixing There is a photosensitive resistant liquid for the predetermined pigment, and it is repeated as shown in the 钱 钱 钱 钱 钱 , , , , , 依 依 依 依 依 依 依 依 依 依 依 依 依 依 依 依 依 依 依 依 依 依 依 依 依 依 依 依 依 依The band is dip, * long penetrating filter, color H 64. However, the coating process technique, etc., which is described in the above description, is described in R, G, and B. Further, the color filter light-shielding film 321 is formed at the interface between the adjacent color filters 64. The underarm is disposed, for example, by using, for example, a dummy method, (10) 64 of the opposite substrate, thereby forming a transparent film to form a film, and then removing the film by photolithography. The heart of the figure is at least with one heart: two: = 321390 47 201013606 Forming /, through electrode 313. However, the present invention is not limited thereto, and the common electrode 313 may be formed by, for example, the above-described coating process technique. Next, on the counter substrate 3A2A on which the common electrode 313 is formed, by spin coating a solution such as a polyimide solution and drying the solution, the polyimide film is rubbed by, for example, a rubbing method, such as As shown in Fig. 12-4, an alignment film 315 is formed. However, the present invention is not limited thereto, and the alignment film 315 may be formed by, for example, the above-described coating process technique, and the alignment film 315 may be treated with a single material.

接著,在形成有配向膜315之對向基板3〇2A上,旋專 ^布感光性阻舰’並在將餘劑料轉光與顯影後 糟,例如提升後供烤溫度,而如第12-5圖所示,將所形y 之樹月旨膜的角部分在配向膜315上形成三角形之介電質多 起316。然而並不限定於此,亦可利用例如上述之塗布靠 3術等形成預定形狀之介電f突起316,亦可利用光德 衫法以半色調遮罩對圖案進行3維加工。Next, on the opposite substrate 3〇2A on which the alignment film 315 is formed, the photosensitive photoresist is rotated and the toner is turned and developed after the toner is turned on, for example, after being lifted, the baking temperature is as shown in the 12th. As shown in Fig. 5, the corner portion of the shaped film of the y tree is formed on the alignment film 315 to form a triangular dielectric 316. However, the present invention is not limited thereto, and the dielectric f projections 316 having a predetermined shape may be formed by, for example, the above-described application, or the pattern may be three-dimensionally processed by a halftone mask by the light shirt method.

接著,在形成有介電質突起316之對向基板觀上, 旦〈塗布例如感光性阻劑液,並將該阻劑液予以曝光與顯 而如第12-6 _示,在對向基板職上之區劃各畫 門Λ'Γ11域之至少—部分形成有感光性樹脂所構叙 然而並不限定於此,亦可利用例如上述之塗 王技術等來形成間隔件317。或亦可 之間隔件之方式確保密封有液晶層犯的空間 狀 之^上所述’在製造形成有畫素電極31卜配向膜314 陣基板3〇U、及形成有遮光膜32卜濾色器64、 321390 48 201013606 共通電極313、配向膜315、介電質突起316及間隔件317 . 的對向基板302A時,接著在將液晶填充在對向基板302A 中之由密封材所圍繞之區域後,如第13圖所示,藉由貼合 該主動矩陣基板301A與對向基板302A,而將液晶層312 密封在主動矩陣基板301A與對向基板302A之間。 然後,準備吸附有例如碘(I)之聚乙烯醇(PVA)等之偏 光板330及340,並以該偏光板330及340包夾用以密封 液晶層312之主動矩陣基板301A與對向基板302A的方式 ® 彼此貼合。藉此,製造包含具備第10圖所示之層構造之晝 素301a的顯示面板301。 然後,藉由將如上方式製造之顯示面板101安裝在搭 载有信號控制部102、掃描驅動部103、資料驅動部104、 電容線驅動部1 〇 5及其他零件的框體,而製造本實施形態 之液晶顯示裝置300。 再者’在以上之製造步驟中,適當地包含洗淨基板之 Ο步驟等,但在此為了說明之簡略化,省略該等步驟。 如以上之說明’本實施形態之液晶顯示裝置300係以 供光穿透之膜來構成作為黑矩陣之遮光膜321以外的全部 層’因此可大幅提升液晶顯示裝置3〇〇之顯示面板3〇1的 開口率。而且,由於遮光膜321係依需要而適當形成者, 因此在無須黑矩陣之液晶顯示裝置中,亦可實現全開口型 之顯示器面板。 此外’如上方式作成開口率提升之構成,即可使液晶 元件E31或光源350之配置自由度提升,因此可實現設計 49 321390 201013606 自由度大的液晶顯示裝置300。 a再者,在本實施形態之製造方法中,與本發明實施形: 態1或2同樣地,由於在製造過程中以透明半導體層覆 蓋接觸件内配線42及第2配線層43等,因此可減低後述 之蝕刻步驟等中之各配線(42、43等)所受到之製程損害。 再者,上述各實施形態僅為用以實施本發明之例,本 發明並非限定在上述實施形態者,依據規格等進行各種變 形係在本發明之範圍内,且由以上記載得知,在本發明之 範圍内,可實施其他各式各樣之實施形態。 _ 【圖式簡單說明】 第1圖係顯示本發明實施形態!之有機EL顯示裝置之 概略構成的方塊圖。 、第2圖係顯示本發明實施形態!之各晝素之概略電路 構成的示意圖。 第3圖係用以說明本發明實施形態丨之各晝素之主動 矩陣基板的佈局構造的概略平面圖。 第4圖係用以說明本發明實施形態1之各晝素之層構〇 造的概略剖面圖。 第5-1圖係顯不本發明實施形態1之有機乩顯示裝置 之顯不面板的製造方法之製程剖面圖(其一)。 第5-2圖係顯不本發明實施形態}之有機乩顯示裝置 之顯不面板的製造方法之製程剖面圖(其二)。 第5-3圖係顯不本發明實施形態i之有機乩顯示裝置 之顯示面板的製造方法之製程剖面圖(其三)。 321390 50 201013606 第5-4圖γ争^5 — » -^ ^ t '、不本發明實施形態1之有機EL顯示裝置 ' 顯不面板的製造方法 / &万去之製程剖面圖(其四)。 5圖係顯不本發明實施形態1之有機此顯示裝置 之顯示面板的製造方法之製程剖面圖(其五)。 第5 6圖係顯示本發明實施形態】之有機此顯示裝置 之顯示面板的製造方法之製程剖面圖(其六)。 第5 7圖係顯示本發明實施形態1之有機EL顯示裝置 ❹之』不面板的製造方法之製程剖面圖(其七)。 第5 8圖係顯示本發明實施形態1之有機EL顯示裝置 之顯不面板的製造方法之製程剖面圖(其八)。 第5-9圖係顯示本發明實施形態1之有機EL顯示裝置 之顯示面板的製造方法之製程剖面圖(其九)。 第5-10圖係顯示本發明實施形態j之有機乩顯示裝 置之顯示面板的製造方法之製程剖面圖(其十)。 第6圖係用以§兒明本發明實施形態2之各晝素之層構 ❿造的概略剖面圖。 第7圖係顯示本發明實施形態3之液晶顯示裝置之概 略構成的方塊圖。 第8圖係顯示本發明實施形態3之各晝素之概略電路 構成的示意圖。 第9圖係用以說明本發明實施形態3之各畫素之主動 矩陣基板的佈局構造的概略平面圖。 第10圖係用以說明本發明實施形態3之各畫素之層構 造的概略剖面圖。 321390 51 2〇l〇13606 第11-1圖係顯示本發明實施形態3之液晶續 顯示面板的製造方法之製程剖面圖(其一)。 之 第11-2圖係顯示本發明實施形態3之液晶顯 顯示面板的製造方法之製程剖面圖(其二)。’、又 -第12-1圖係顯示本發明實施形態3之液晶_ 顯示面板的製造方法之製程剖面圖(其三)。’、、 第12-2圖係顯示本發明實施形態3之液晶颟示 顯示面板的製造方法之製程剖面圖(其四)。、 第12-3圖係顯示本發明實施形態3之液晶_ 顯示面板的製造方法之製程剖面圖(其五)。 、义 第12-4圖係顯示本發明實施形態3之液晶_ 顯示面板的製造方法之製程剖面圖(其六)。 、、 第12-5圖係顯示本發明實施形態3之液晶顯 顯示面板的製造方法之製程剖面圖(其七)。 、 第12-6圖係顯示本發明實施形態3之液晶顯 顯示面板的製造方法之製程剖面圖(其八)。 、 第13圖係顯示本發明實施形態3之液晶 不面板的製造方法之製程剖面圖(其九)。 、,, 【主要元件符號說明】 U、15、21閘極電極 10、320透明基板 U ' 16、22閘極絕緣膜 13、17、23、44透明半導體層 =、n_^14d、18d、24d_^ 、35下部電極 32、36電容絕緣臈 321390 52 201013606Next, on the opposite substrate on which the dielectric protrusions 316 are formed, (for example, a photosensitive resist liquid is applied, and the resist liquid is exposed and displayed as shown in FIG. 12-6, on the opposite substrate The division of the job is at least partially formed by the photosensitive door resin. However, the configuration is not limited thereto, and the spacer 317 may be formed by, for example, the above-described coating technique. Alternatively, the spacer may be used to ensure that the liquid crystal layer is sealed in a space-like manner. The photoreceptor electrode 31 is formed on the alignment film 314 array substrate 3, and the light shielding film 32 is formed. 64, 321390 48 201013606 The common substrate 313, the alignment film 315, the dielectric protrusion 316, and the spacer 317 are opposed to the substrate 302A, and then the liquid crystal is filled in the opposite substrate 302A surrounded by the sealing material. Thereafter, as shown in FIG. 13, the liquid crystal layer 312 is sealed between the active matrix substrate 301A and the opposite substrate 302A by bonding the active matrix substrate 301A and the opposite substrate 302A. Then, polarizing plates 330 and 340 to which polyvinyl alcohol (PVA) such as iodine (I) is adsorbed are prepared, and the active matrix substrate 301A and the opposite substrate for sealing the liquid crystal layer 312 are sandwiched by the polarizing plates 330 and 340. The way of 302A® fits on each other. Thereby, the display panel 301 including the element 301a having the layer structure shown in Fig. 10 was produced. Then, the display panel 101 manufactured as described above is mounted on a housing on which the signal control unit 102, the scan driving unit 103, the data driving unit 104, the capacitance line driving unit 1 and other components are mounted, thereby manufacturing the present embodiment. The liquid crystal display device 300. Further, in the above manufacturing steps, the step of cleaning the substrate is appropriately included, but the steps are omitted here for the sake of simplification of the description. As described above, the liquid crystal display device 300 of the present embodiment is configured such that all of the layers other than the light-shielding film 321 as the black matrix are formed by the film through which the light is transmitted. Therefore, the display panel 3 of the liquid crystal display device 3 can be greatly improved. The aperture ratio of 1. Further, since the light shielding film 321 is appropriately formed as needed, a full-open type display panel can be realized in a liquid crystal display device which does not require a black matrix. Further, in the configuration in which the aperture ratio is increased as described above, the degree of freedom in the arrangement of the liquid crystal element E31 or the light source 350 can be improved, so that the liquid crystal display device 300 having a large degree of freedom of designing a 321390390 201013606 can be realized. In the manufacturing method of the present embodiment, in the same manner as in the first or second embodiment of the present invention, the contact inner wiring 42 and the second wiring layer 43 are covered with a transparent semiconductor layer during the manufacturing process. Process damage to each of the wirings (42, 43, etc.) in the etching step and the like described later can be reduced. It is to be noted that the above-described embodiments are merely examples for carrying out the invention, and the present invention is not limited to the above-described embodiments, and various modifications based on specifications and the like are within the scope of the present invention. Various other embodiments are possible within the scope of the invention. _ [Simple description of the drawings] Fig. 1 shows an embodiment of the present invention! A block diagram of a schematic configuration of an organic EL display device. Fig. 2 shows an embodiment of the present invention! A schematic diagram of the schematic circuit of each element. Fig. 3 is a schematic plan view showing the layout structure of the active matrix substrates of the respective elements of the embodiment of the present invention. Fig. 4 is a schematic cross-sectional view showing the layer structure of each element of the first embodiment of the present invention. Fig. 5-1 is a cross-sectional view showing the process of the method for producing a panel of the organic germanium display device according to the first embodiment of the present invention. Fig. 5-2 is a cross-sectional view showing the process of manufacturing the display panel of the organic germanium display device according to the embodiment of the present invention (the second). Fig. 5-3 is a cross-sectional view showing the process of manufacturing the display panel of the organic germanium display device according to the first embodiment of the present invention (the third). 321390 50 201013606 Fig. 5-4 γ 争 ^5 — » -^ ^ t ', the organic EL display device of the first embodiment of the present invention is not the manufacturing method of the panel or the process section of the process ). Fig. 5 is a cross-sectional view showing the process of manufacturing a display panel of the organic display device according to the first embodiment of the present invention (the fifth). Fig. 5 is a cross-sectional view showing the process of manufacturing the display panel of the organic display device according to the embodiment of the present invention (the sixth). Fig. 5 is a cross-sectional view showing the process of the method for manufacturing a non-panel of the organic EL display device according to the first embodiment of the present invention (the seventh). Fig. 5 is a cross-sectional view showing a process of manufacturing a display panel of the organic EL display device according to the first embodiment of the present invention (the eighth). Fig. 5-9 is a cross-sectional view showing the process of manufacturing the display panel of the organic EL display device of the first embodiment of the present invention (ninth). Fig. 5-10 is a cross-sectional view showing the process of manufacturing the display panel of the organic germanium display device of the embodiment j of the present invention (the tenth). Fig. 6 is a schematic cross-sectional view showing the layer structure of each element of the embodiment 2 of the present invention. Figure 7 is a block diagram showing a schematic configuration of a liquid crystal display device of Embodiment 3 of the present invention. Fig. 8 is a view showing the schematic circuit configuration of each element of the third embodiment of the present invention. Fig. 9 is a schematic plan view showing the layout structure of the active matrix substrate of each pixel in the third embodiment of the present invention. Fig. 10 is a schematic cross-sectional view showing the layer structure of each pixel in the third embodiment of the present invention. 321390 51 2〇l〇13606 Fig. 11-1 is a process sectional view (part 1) showing a method of manufacturing a liquid crystal display panel according to a third embodiment of the present invention. Fig. 11-2 is a cross-sectional view showing the process of manufacturing a liquid crystal display panel according to Embodiment 3 of the present invention (Part 2). Further, Fig. 12-1 is a cross-sectional view showing a process of manufacturing a liquid crystal display panel according to Embodiment 3 of the present invention (Part 3). Fig. 12-2 is a cross-sectional view showing the process of manufacturing the liquid crystal display panel of the third embodiment of the present invention (fourth). Fig. 12-3 is a cross-sectional view showing the process of the liquid crystal display panel manufacturing method according to the third embodiment of the present invention (the fifth). Fig. 12-4 is a cross-sectional view showing the process of the liquid crystal display panel manufacturing method according to the third embodiment of the present invention (the sixth). Fig. 12-5 is a cross-sectional view showing the process of manufacturing the liquid crystal display panel of the third embodiment of the present invention (the seventh). Fig. 12-6 is a cross-sectional view showing the process of manufacturing the liquid crystal display panel of the third embodiment of the present invention (the eighth). Fig. 13 is a cross-sectional view showing the process of manufacturing a liquid crystal panel according to a third embodiment of the present invention (ninth). ,,, [Description of main component symbols] U, 15, 21 gate electrode 10, 320 transparent substrate U '16, 22 gate insulating film 13, 17, 23, 44 transparent semiconductor layer =, n_^14d, 18d, 24d_ ^, 35 lower electrode 32, 36 capacitor insulation 臈 321390 52 201013606

33、37上部電極 40、50 層間絕緣膜 41 第1配線層 41a 冗長配線 42 接觸件内配線 43 第2配線層 51 接觸插塞 61 1¾'極電極 62 有機膜 63、65 陰極電極 64 濾色器 66 輔助電極 70 間隔壁 80 鈍化膜 100 有機EL顯示裝置 100a 下表面 101 ' 301顯示面板 101A 、 ^ 301A主動矩陣基板 101a 、201a、301a 晝素 102 信號控制部 103 掃描驅動部 104 資料驅動部 105 電容線驅動部 106 驅動信號產生部 200a 、300a上表面 300 液晶顯示裝置 302A 對向基板 311 晝素電極 312 液晶層 313 共通電極 314、 315配向膜 316 介電質突起 317 間隔件 321 遮光膜 330、 340偏光板 350 光源 apl、 ap2、ap3接觸孔 Cl 電容器 C31 蓄積電容器 CONTI 掃描控制信號 CONT2 資料控制信號 C0NT3 電容線控制信號 CONT4 發光控制信號 D1 ' D2 有機發光二極體 DAT 視頻資料信號 DE 資料致能信號 E31 液晶元件 Hsync 水平同步信號 53 321390 20101360633, 37 upper electrode 40, 50 interlayer insulating film 41 first wiring layer 41a redundant wiring 42 contact inner wiring 43 second wiring layer 51 contact plug 61 13⁄4' pole electrode 62 organic film 63, 65 cathode electrode 64 color filter 66 auxiliary electrode 70 partition wall 80 passivation film 100 organic EL display device 100a lower surface 101' 301 display panel 101A, ^ 301A active matrix substrate 101a, 201a, 301a pixel 102 signal control portion 103 scan driving portion 104 data driving portion 105 capacitance Line driving unit 106 driving signal generating unit 200a, 300a upper surface 300 liquid crystal display device 302A opposite substrate 311 pixel electrode 312 liquid crystal layer 313 common electrode 314, 315 alignment film 316 dielectric protrusion 317 spacer 321 light shielding film 330, 340 Polarizer 350 Light source apl, ap2, ap3 Contact hole Cl Capacitor C31 Accumulator capacitor CONTI Scan control signal CONT2 Data control signal C0NT3 Capacitor line control signal CONT4 Illumination control signal D1 ' D2 Organic light-emitting diode DAT Video data signal DE data enable signal E31 liquid crystal element Hsync horizontal sync signal 53 321390 2010136 06

Lc 電容線 Ld 資料線 Lg 掃描線 Lp 驅動線 LI、L2、L31 配線 MCLK 主時脈 Q1、Q31開關電晶體 Q2 驅動電晶體 RC 立體配線 Vcom 共通電壓 Von 導通電壓 VDD 電源電壓 Voff 閘關斷電壓 Vsync 垂直同步信號Lc Capacitor line Ld Data line Lg Scan line Lp Drive line LI, L2, L31 Wiring MCLK Main clock Q1, Q31 Switching transistor Q2 Driving transistor RC Stereo wiring Vcom Common voltage Von Turn-on voltage VDD Supply voltage Voff Gate turn-off voltage Vsync Vertical sync signal

54 32139054 321390

Claims (1)

201013606 4 七、申請專利範圍: :一種主動矩陣基板,係具備複數個電晶體元件者,該主 : 動矩陣基板具備: 基板’可供可見光穿透; 配線,形成在前述基板上,且可供可見光穿透; 半導體層,從前述基板之厚度方向觀看與前述配線 之至少一部分重疊,且可供可見光穿透;以及 絕緣膜,用以覆蓋前述配線及半導體層之至少一部 ❹ 分,且可供可見光穿透。 2. 如申請專利範圍第1項之主動矩陣基板,其中,前述配 線係包含主配線、及從該主配線分歧且連接該主配線與 前述電晶體元件之副配線。 3. 如申請專利範圍第1項之主動矩陣基板,其中,前述配 線係由無機氧化物導電體材料所構成。 4. 如申請專利範圍第1項之主動矩陣基板,其中,前述半 Q 導體層係由無機氧化物半導體材料所構成。 5. 如申請專利範圍第1項之主動矩陣基板,其中,前述配 線係由以鋅錫氧化物或含銦氧化物所成之導電體材料 所構成, 前述半導體層係由載體濃度比前述配線低且以辞 錫氧化物或含姻乳化物所成之半導體材料所構成。 6. 如申請專利範圍第1項之主動矩陣基板,其中,前述配 線之一部为係作為如述電晶體元件之電極而發揮功能。 7·如申請專利範圍第1項之主動矩陣基板,其中,前述配 321390 55 201013606 線之一部分係作為前述電晶體元件之閘極電極、源極電 極及沒極電極而發揮功能,前述絕緣膜之一部分係作為 前述電晶體元件之閘極絕緣膜而發揮功能。 8. 如申請專利範圍第1項之主動矩陣基板,其中,具備第 1及第2電晶體以及電容器, 前述配線係構成1條以上之掃描線的至少一部 分、1條以上之資料線的至少一部分、及1條以上之驅 動線的至少一部分, 前述第1電晶體之控制端子連接在前述掃描線,輸 入端子連接在前述資料線, 而前述第2電晶體之控制端子連接在前述第1電晶 體之輸出端子,輸入端子連接在前述驅動線, 前述電容器之一方電極係連接在前述驅動線,另一 方端子係連接在前述第2電晶體之控制端子。 9. 如申請專利範圍第1項之主動矩陣基板,其中,具備第 1電晶體及電容器, 前述配線係構成1條以上之掃描線的至少一部 分、1條以上之資料線的至少一部分、及1條以上之電 容線的至少一部分, 前述第1電晶體之控制端子連接在前述掃描線且 其輸入端子連接在前述資料線, 前述電容器之一方端子係連接在前述電晶體之輸 出端子。 10. —種顯示面板,係具備: 201013606 申請專利範圍第1項記載之主動矩陣基板; * 第1電極,形成在前述主動矩陣基板上,且可供可 : 見光穿透; 有機膜,形成在前述第1電極上;以及 第2電極,形成在前述有機膜上。 11. 如申請專利範圍第10項之顯示面板,其中,前述第2 電極係可供可見光穿透。 12. 如申請專利範圍第Π項之顯示面板,其中,具備有電 性連接在前述第2電極之輔助電極。 13. 如申請專利範圍第12項之顯示面板,其中,前述輔助 電極係可供可見光穿透。 14. 如申請專利範圍第10項之顯示面板,其中,具備有形 成在相對於前述有機膜為上層及下層之任一方或雙方 的濾波膜。 15. —種顯示面板,係具備: Q 申請專利範圍第1項記載之主動矩陣基板; 對向基板,可供可見光穿透; 液晶元件,包含液晶層、包失該液晶層之2個配向 膜、及包夾由前述液晶層與前述2個配向膜所構成之積 層體的晝素電極與共通電極; 其中,前述晝素電極與共通電極係可供可見光穿 透, 前述晝素電極係與前述主動矩陣基板之前述配線 電性連接, 57 321390 201013606 則述液晶元件係由前述主動矩陣基板及前述對 基板所夾持。 16. 如:請專利範圍第15項之顯示面板,其中,具備包爽 由則述主動矩陣基板、前述液晶元件及前述對向基板所 構成之積層體的2個偏光板。 17. 如申請專利範圍第15項之—面板,其中,具備形成 在前述共通電極i之遮光膜、㈣成在至少前述共通電 極上且使預定頻帶之波長穿透之濾波膜。 18. :種顯示裝置,係具備中請專利範圍第iq項記載之顯⑩ 示面板。 19. 一種主動矩陣基板之製造方法,係包含: 第1配線形成步驟,將可供可見光穿透之第丨配線 形成在可供可見光穿透之基板上,而該第1配線的-部 分包含構成電晶體元件之電極; 第1絕緣膜形成步驟,將第丨絕緣膜形成在前述基 板上,而該第1絕緣膜係用以覆蓋前述第1配線之至少❹ 刀,且一部分包含構成前述電晶體元件之絕緣膜, 且可供可見光穿透; 第2配線形成步驟,將可供可見光穿透之第2配線 形成在述第1絕緣膜上,而該第2配線的一部分包含 構成前述電晶體元件之電極; 半導體層形成步驟,將用以覆蓋前述第2配線之至 少一部分且可供可見光穿透之半導體層形成在前述第 1絕緣膜上;以及 58 321390 201013606 第2絕緣膜形成步驟,將用以覆蓋前述半導體層及 '前述第2配線之至少一部分且可供可見光穿透之第2 ' 絕緣膜’形成在前述第1絕緣膜上。 20.如申請專利範圍第19項之主動矩陣基板之製造方法, 其中,使用無機氧化物導電體材料來形成前述第2配 線。 21·如申請專利範圍第19項之主動矩陣基板之製造方法, 〇 其中,使用無機氧化物半導體材料來形成前述半導體 層。 22, 如申請專利範圍第19項之主動矩陣基板之製造方法, 其中,使用由鋅鍚氧化物或含銦氧化物所成之導電體材 料形成前述第2配線,且使用由可使載體濃度比前述配 線低之鋅錫氧化物或善銦氧化物所成之半導體材料來 形成前述半導體層。 23. 如申請專利範圍第19項之主動矩陣基板之製造方法, ❹ 其中,在前述半導體層形成步驟中,將覆蓋前述第2 配線之半導體膜形成在前述第1絕緣膜上且以使前述 第2配線不會露出之方式蝕刻該半導體膜,從而形成前 述半導體層。 24’如申請專利範圍第19項之主動矩陣基板之製造方法, 其中,在前述第1配線形成步驟、前述第丨絕緣膜形成 步前述第2配線形成步驟、前述半導體層形成步驟 f則述第2絕緣膜形成步驟中之至少1個步驟中,利用 印刷法或噴墨印刷法,來形成前述第丨配線、前述第^ 321390 59 201013606 絕緣膜、前述第2配線、前述半導體層或前述第2絕緣 膜。 60 321390201013606 4 VII. Patent application scope: An active matrix substrate, which is provided with a plurality of transistor components, the main: the dynamic matrix substrate has: the substrate 'is available for visible light to pass through; the wiring is formed on the substrate and is available The visible light penetrates; the semiconductor layer overlaps at least a portion of the wiring from the thickness direction of the substrate and is transparent to visible light; and the insulating film covers at least one of the wiring and the semiconductor layer, and For visible light penetration. 2. The active matrix substrate according to claim 1, wherein the wiring includes a main wiring, and a sub wiring that is branched from the main wiring and that connects the main wiring and the transistor. 3. The active matrix substrate of claim 1, wherein the wiring is formed of an inorganic oxide conductor material. 4. The active matrix substrate according to claim 1, wherein the semi-Q conductor layer is composed of an inorganic oxide semiconductor material. 5. The active matrix substrate according to claim 1, wherein the wiring is formed of a conductive material made of zinc tin oxide or an indium oxide, and the semiconductor layer is lower in carrier concentration than the wiring. It is composed of a semiconductor material made of tin oxide or a fragrance-containing emulsion. 6. The active matrix substrate according to claim 1, wherein one of the wiring lines functions as an electrode of the transistor element. 7. The active matrix substrate according to claim 1, wherein one of the aforementioned lines 321390 55 201013606 functions as a gate electrode, a source electrode and a gate electrode of the transistor element, and the insulating film A part functions as a gate insulating film of the above-described transistor element. 8. The active matrix substrate according to claim 1, wherein the first and second transistors and the capacitor are provided, and the wiring constitutes at least a part of one or more scanning lines and at least a part of one or more data lines. And at least a part of one or more drive lines, wherein a control terminal of the first transistor is connected to the scan line, an input terminal is connected to the data line, and a control terminal of the second transistor is connected to the first transistor The output terminal is connected to the drive line, and one of the capacitors is connected to the drive line, and the other terminal is connected to the control terminal of the second transistor. 9. The active matrix substrate according to claim 1, wherein the first transistor and the capacitor are provided, and the wiring system constitutes at least a part of one or more scanning lines, at least a part of one or more data lines, and 1 At least a part of the capacitor line or more, the control terminal of the first transistor is connected to the scanning line, and an input terminal thereof is connected to the data line, and one of the capacitor terminals is connected to an output terminal of the transistor. 10. The display panel is provided with: 201013606 The active matrix substrate described in claim 1; * The first electrode is formed on the active matrix substrate, and is available for: seeing light penetration; organic film forming The first electrode is formed on the first electrode, and the second electrode is formed on the organic film. 11. The display panel of claim 10, wherein the second electrode is transparent to visible light. 12. The display panel of claim </RTI> wherein the auxiliary electrode is electrically connected to the second electrode. 13. The display panel of claim 12, wherein the auxiliary electrode is transparent to visible light. 14. The display panel of claim 10, comprising a filter film formed on one or both of the upper layer and the lower layer with respect to the organic film. 15. A display panel comprising: Q: an active matrix substrate according to claim 1; a counter substrate for visible light penetration; and a liquid crystal element comprising a liquid crystal layer and two alignment films covering the liquid crystal layer And a buffer electrode and a common electrode of the laminate formed by the liquid crystal layer and the two alignment films; wherein the halogen electrode and the common electrode are transparent to light, and the halogen electrode is The wiring of the active matrix substrate is electrically connected. 57 321 390 201013606 The liquid crystal element is sandwiched between the active matrix substrate and the counter substrate. 16. The display panel of the fifteenth aspect of the invention, comprising: two polarizing plates comprising a laminate of the active matrix substrate, the liquid crystal element, and the counter substrate. 17. The panel of claim 15 which has a light-shielding film formed on the common electrode i and (4) a filter film which is formed on at least the common-electrode and penetrates a wavelength of a predetermined frequency band. 18. A type of display device is provided with a display panel as described in item iq of the patent scope. 19. A method of manufacturing an active matrix substrate, comprising: a first wiring forming step of forming a second wiring through which visible light is transmitted is formed on a substrate through which visible light can pass, and a portion of the first wiring includes a composition The electrode of the transistor element; the first insulating film forming step of forming the second insulating film on the substrate, wherein the first insulating film covers at least the knives of the first wiring, and a part of the insulating film is formed to constitute the transistor The insulating film of the element is permeable to visible light; the second wiring forming step forms a second wiring through which visible light is transmitted, on the first insulating film, and a part of the second wiring includes the transistor element a semiconductor layer forming step of forming a semiconductor layer for covering at least a portion of the second wiring and allowing visible light to pass through the first insulating film; and 58 321390 201013606 a second insulating film forming step for use Forming the first insulating layer on the second 'insulating film' covering the semiconductor layer and at least a part of the second wiring and allowing visible light to pass through On. 20. The method of manufacturing an active matrix substrate according to claim 19, wherein the second wiring is formed using an inorganic oxide conductor material. 21. The method of manufacturing an active matrix substrate according to claim 19, wherein the inorganic oxide semiconductor material is used to form the semiconductor layer. The method of manufacturing an active matrix substrate according to claim 19, wherein the second wiring is formed using a conductive material made of zinc lanthanum oxide or an indium oxide, and the carrier concentration ratio can be used. The semiconductor layer formed of the zinc tin oxide or the good indium oxide having a low wiring is formed to form the semiconductor layer. 23. The method of manufacturing an active matrix substrate according to claim 19, wherein in the semiconductor layer forming step, a semiconductor film covering the second wiring is formed on the first insulating film so that the first The semiconductor film is etched so that the wiring is not exposed, thereby forming the semiconductor layer. The manufacturing method of the active matrix substrate according to claim 19, wherein the first wiring forming step, the second insulating layer forming step, the second wiring forming step, and the semiconductor layer forming step f are described In at least one of the steps of forming the insulating film, the second wiring, the first 321390 59 201013606 insulating film, the second wiring, the semiconductor layer, or the second portion is formed by a printing method or an inkjet printing method. Insulating film. 60 321390
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