201008419 ’九、發明說明： 【發明所屬之技術領域】 . 本發明涉及基板技術領域，尤其涉及一種基板表面平 坦化系統以及使用該基板表面平坦化系統進行基板表面平 坦化之方法。 【先前技術】 隨著電子產品往小型化、高速化方向之發展，基板亦 ❹從單面基板、雙面基板往多層基板方向發展。多層基板係 指具有多層導電線路之基板，由於其具有較多佈線面積、 較高裝配密度而得到廣泛應用，請參見Takahashi，A.等人 於 1992 年發表於 IEEE Trans, on Components，Packaging， and Manufacturing Technology 之文獻 High density multilayer printed circuit board for HITAC M-880。 多層基板之各層導電線路之間藉由導孔實現電氣連 通。該導孔依不同之設計可為通孔、盲孔或埋孔。導孔内 ®壁鍍層之品質十分重要，其會影響各層導電線路之間之連 通效果，進而影響多層基板之工作性能。 多層基板之導孔通常藉由如下方法製作。首先於覆銅 板（Copper Clad Laminate，CCL)之預定位置鑽孔，該覆 銅板係指包括銅箔與樹脂層之板狀基材。然後進行化學鍍 銅工序，於孔壁及覆銅板之銅箔表面形成極薄之化學銅 層。由於化學鍍銅層之厚度為幾個微米或更小，為確保孔 壁銅層之連續性與可靠性，於化學鍍銅後還需進行電鍍銅 6 201008419 工序，以於化學鍍銅層上形成較厚之電鍍銅層。然而，該 電鍛銅層纟面極易發生銅㈣，使得覆銅板表面平坦度^ -低。銅凹陷之深度為幾個微米或更大，當凹陷之深度:二$ -微米，將會對後續之線路製作、防焊處理等工序會"產生直 接影響，進而降低電路板之品質及良率。然，幾微米之銅 凹陷用人眼不容易觀察到，要從其中篩選出深度大於某一 定值之凹陷並對其進行處理更需要消耗大量人力及時間'。 冑鑑於此’提供一種基板表面平坦化系統以及使用該 基板表面平坦化系統進行基板表面平坦化之方法實屬必 要。 【發明内容】 以下將以實施職明—種基板表面平坦化彡統以及使 用該基板表面平坦化系統進行基板表面平坦化之方法。 一種基板表面平坦化系統，用於進行基板表面平坦 ❺化，其包括光學檢查裝置、覆蓋層形成装置以及拋光裝置。 該光學檢查裝置用於掃描得到該基板表面之影像，並從美 板表面之凹陷中筛選出尺寸大於一預定值之凹陷，即特二 凹陷。該覆蓋層形成裝置用於於該特定凹陷内形成覆蓋 層。該拋光裝置用於拋光基板表面覆蓋層以外之部分，以 提尚基板表面之平坦度。 一種基板表面平坦化方法，包括以下步驟： 炎使用光學檢查裝置掃減基板之表面，得到基板表面 之影像並從基板表面之凹陷中篩選出尺寸大於預定值之凹 201008419 陷，即特定凹陷； 使用覆蓋層形成裝置於該特定凹陷内形成覆蓋層； • 使用拋光裝置對基板表面覆蓋層以外之部分進行拋光 -處理’以提高基板表面平坦度。 本技術方案之基板表面平坦化系統將光學檢查裝置與 覆蓋層形成裝置及拋光裝置結合。使用該基板表面平坦化 系統進行基板表面平坦化之方法可快速找到發生凹陷處並 筛選出尺寸大於一預定值之凹陷，即特定凹陷，進而於該 特定凹陷處形成覆蓋層，再由拋光裝置對基板表面進行拋 光處理’可節省大量人力並提高效率。 【實施方式】 下面將結合附圖及實施例’對本技術方案之基板表面 平坦化系統及使用該基板表面平坦化系統進行基板表面平 坦化之方法作進一步詳細說明。 ❹ 請參閱圖1 ’本技術方案提供之基板表面平坦化系統 工〇〇用於提高基板之表面平坦度。該基板表面平坦化系統 工〇〇包括傳送裝置10、機架20、光學檢查裝置30、覆蓋層 形成裝置40、拋光裝置50及控制裝置60。本實施例中， 待處理之基板為電路板。請參閱圖2,該待處理之基板200 包括絕緣層210、第一導電層220及第二導電層230。該第 一導電層220及第二導電層230分別位於該絕緣層210之 相對之兩個表面。基板200還設有一導孔240，導孔240 連接第一導電層220及第二導電層230，且該導孔240與第 8 201008419 一導電層22〇連接處有一凹陷如，該凹陷具有一凹陷 面242。凹㉟241之深度大於5微米。具體操作中，基板電 •鍍過程中形成之凹陷可能為複數個，且凹陷程度不一，本 -實施例中，僅以該凹陷241為例來進行說明。 該傳送裝置10用於傳輸待處理之基板細。傳送 傳送帶，本實施例卜採用傳送帶傳輸待 θ 4 401" ^ ^^ ^ ^ 1〇 20 部^該光學檢杳普置3/、//廢一主體部21及四個支標 %及控㈣請㈣物 傻，I光Γ檢查裝置3〇用於掃描得到基板200表面之影 ，々從土板200表面之凹陷中篩選出尺寸大於一值 ❹ 二：：即特定凹陷。光學檢查裝置3〇包括光源Μ、攝像 面，得二及處理器33。該攝像裝置32掃描基板200之表 於不所有凹陷"，選出特定凹陷。對 本實=特定凹陷之介定值(即預定值)可不相同。 陷為：凹陷該預定值為5微米’即深度大於5微米之凹 覆蓋二覆】成裝置40用於於特定凹陷處形成覆蓋層。 例中，層开41，學檢查裝置30相鄰設置。本實施 4盍層形成裝置40為一喷寫裝置其包括—保護 9 201008419 劑儲存盒41以及一喷寫頭42。該保護劑儲存盒41中可儲 存乾膜光阻、濕膜光阻、防焊材料或塞孔阻劑等，本實施 -例中保護劑儲存盒41中儲存有塞孔阻劑。 . 該拋光裝置50用於拋光基板200表面覆蓋層以外部 分，以提高基板200表面之平坦度。拋光裝置50設置於覆 蓋層形成裝置40之後。該拋光裝置50可為蝕刻/微蝕刻槽 或者磨刷機。 該控制裝置60用於控制傳送裝置10、光學檢查裝置 〇 30、覆蓋層形成裝置40及拋光裝置50,以實現該基板表面 平坦化系統100之連續工作。 可理解，還可於該覆蓋層形成裝置40及拋光裝置50 間設置一烘乾裝置70，以利於保護劑之乾燥或熟化。 本技術方案之基板表面平坦化系統100將光學檢查裝 置30與覆蓋層形成裝置40及拋光裝置50結合。可於短時 間内找出人眼不易觀察之基板200表面之凹陷並對其進行 進一步處理，可節省大量人力及時間，提高生產效率。 本技術方案還提供一種採用如上該基板表面平坦化系 統100進行基板200表面平坦化之方法，其包括以下步驟： 第一步，使用光學檢查裝置30掃描基板200表面，得 到基板200表面之影像並從基板200表面之凹陷中篩選出 尺寸大於預定值之凹陷，即特定凹陷。 將該待處理之基板200置於傳送裝置10上，基板200 之第一導電層220相對於機架20之主體部21設置。將待 處理之基板200移動至該光學檢查裝置30處，由該光學檢 201008419 查裝置30對第一導電層220進行光 至控制裝置60。具體地，該光源^予檢查，並將結果傳送 •該攝像裝置32攝取第—導 第一導電層220照明’ -對第一導電層細之影像進電行層分〇之該處理器％ 尺寸大於預定值之凹陷，即特^從所有凹陷中筛選出 狀位置資訊傳送至控制裝置I::特定— 於5微米之㈣被定義騎定凹陷本實施财，凹陷深度大 ❹覆蓋使用覆盍層形成裝置4G於該特定凹陷内形成 具體地’該控制裝置60接收到第一導電層22〇 之後，啟動傳送裝置10將样虚 圖像 M H 之基板細移動至該覆蓋 層形成裝置40處，該覆蓋層形成裝置4〇於控制裝置6〇之 =用下對第-導電層22〇選擇性地塗覆保護劑，即於特 定凹陷内形成覆蓋層。該保護劑可為乾膜光阻、濕膜光阻、 防焊材料或塞孔阻劑等，本實施财為塞錄劑。由於該 ❹ 凹陷241之深度大於5微米，故為特定凹陷。請一併參閱 圖2及圖3,保護劑喷到凹陷241内，並於凹陷面242上形 成一覆蓋層243,覆蓋層243將該凹陷241部分填充或填滿。 第三步，使用拋光裝置50對基板200表面覆蓋層243 以外之部分進行拋光處理，以提高基板2〇〇表面平坦度。 將待處理之基板200移動至該抛光裝置5〇處，並對第 一導電層220上覆蓋層243以外部分進行抛光處理。該拋 光處理過程可採用物理磨刷或化學蝕刻等方法。本實施例 中採用化學蝕刻之方法，先後經歷水洗、蝕刻、水洗及抗 11 201008419 =等步驟。由於該凹陷面242上形成有覆蓋層犯，第一 層220上相陷241周圍之導電物質被㈣，造成第 一導電層220之厚度減少，從而該凹陷241之凹陷深度降 低或基本消失，達到提高基板雇表面平坦度之目之。請 參閱圖4’多餘表層銅如被姓刻掉’覆蓋層Μ2自然脫落， 僅留下靠近絕緣層21G —端之内層銅222，從而使得待處理 之基板200摘層表面平坦化。可理解，有料深度較大The invention relates to the field of substrate technology, and in particular to a substrate surface flattening system and a method for planarizing a substrate surface using the substrate surface flattening system. [Prior Art] With the development of electronic products in the direction of miniaturization and high speed, substrates have also evolved from single-sided substrates and double-sided substrates to multilayer substrates. Multilayer substrate refers to a substrate having a plurality of layers of conductive lines, which is widely used due to its large wiring area and high assembly density. See Takahashi, A. et al., 1992, IEEE Trans, on Components, Packaging, and Manufacturing Technology's literature High density multilayer printed circuit board for HITAC M-880. Electrical communication between the conductive lines of each layer of the multilayer substrate is achieved by via holes. The via hole can be a through hole, a blind hole or a buried hole according to different designs. The quality of the inner wall of the via hole is very important, which affects the connection between the conductive lines of each layer, which in turn affects the performance of the multilayer substrate. The via holes of the multilayer substrate are usually fabricated by the following method. First, a hole is drilled at a predetermined position of a Copper Clad Laminate (CCL), which is a plate-like substrate including a copper foil and a resin layer. Then, an electroless copper plating process is performed to form a very thin chemical copper layer on the surface of the copper foil of the hole wall and the copper clad laminate. Since the thickness of the electroless copper plating layer is several micrometers or less, in order to ensure the continuity and reliability of the copper layer of the hole wall, the electroplating copper 6 201008419 process is required after the electroless copper plating to form on the electroless copper plating layer. Thicker plated copper layer. However, the surface of the wrought copper layer is highly prone to copper (four), so that the surface flatness of the copper clad plate is low. The depth of the copper depression is a few micrometers or more. When the depth of the depression: two $-micron, it will have a direct impact on subsequent circuit fabrication, soldering resistance, etc., thereby reducing the quality of the circuit board and good. rate. However, a few micrometers of copper depressions are not easily observed by the human eye, and it takes a lot of manpower and time to screen out the depressions having a depth greater than a certain value and process them. In view of the above, it is necessary to provide a substrate surface flattening system and a method of planarizing the surface of the substrate using the substrate surface flattening system. SUMMARY OF THE INVENTION Hereinafter, a method of planarizing a substrate surface and a method of planarizing a substrate surface using the substrate surface flattening system will be described. A substrate surface flattening system for performing planarization of a substrate surface, which includes an optical inspection device, a cover layer forming device, and a polishing device. The optical inspection device is configured to scan an image of the surface of the substrate, and to screen a depression having a size larger than a predetermined value from the depression of the surface of the sheet, that is, a special depression. The cover layer forming means is for forming a cover layer in the specific recess. The polishing apparatus is used to polish a portion other than the surface covering layer of the substrate to improve the flatness of the surface of the substrate. A method for flattening a surface of a substrate comprises the steps of: illuminating the surface of the substrate with an optical inspection device, obtaining an image of the surface of the substrate, and screening a recess of the surface of the substrate from a depression of the surface of the substrate by a thickness of greater than a predetermined value of 201008419, that is, a specific depression; The cover layer forming device forms a cover layer in the specific recess; • polishing/treating a portion other than the substrate surface cover layer using a polishing device to improve the surface flatness of the substrate. The substrate surface flattening system of the present invention combines an optical inspection device with a cover layer forming device and a polishing device. The method for flattening the surface of the substrate by using the substrate surface flattening system can quickly find the recessed portion and select the recess having a size larger than a predetermined value, that is, a specific recess, and then form a cover layer at the specific recess, and then the polishing device is used. Polishing the surface of the substrate can save a lot of manpower and increase efficiency. [Embodiment] Hereinafter, a substrate surface flattening system of the present invention and a method of planarizing the substrate surface using the substrate surface flattening system will be further described in detail with reference to the accompanying drawings and embodiments. ❹ Refer to Figure 1 'The substrate surface flattening system provided by the technical solution is used to improve the surface flatness of the substrate. The substrate surface flattening system includes a transfer device 10, a chassis 20, an optical inspection device 30, a cover layer forming device 40, a polishing device 50, and a control device 60. In this embodiment, the substrate to be processed is a circuit board. Referring to FIG. 2 , the substrate 200 to be processed includes an insulating layer 210 , a first conductive layer 220 , and a second conductive layer 230 . The first conductive layer 220 and the second conductive layer 230 are respectively located on opposite surfaces of the insulating layer 210. The substrate 200 is further provided with a guiding hole 240. The guiding hole 240 is connected to the first conductive layer 220 and the second conductive layer 230, and the guiding hole 240 has a recess at the joint of the 8th 201008419 conductive layer 22, and the recess has a recess. Face 242. The depth of the recess 35241 is greater than 5 microns. In the specific operation, the number of depressions formed during the electroplating process of the substrate may be plural, and the degree of depression is different. In the present embodiment, only the depression 241 is taken as an example for description. The conveyor 10 is used to transport the substrate to be processed. Conveyor belt, this embodiment uses a conveyor belt to transmit θ 4 401 " ^ ^^ ^ ^ 1 〇 20 parts ^ The optical inspection 杳 3 3 /, / / waste one body part 21 and four yaw% and control (four) Please (4) the silly, I-light inspection device 3〇 is used to scan to obtain the shadow of the surface of the substrate 200, and the size of the surface of the soil plate 200 is selected to be larger than a value ❹ 2:: a specific depression. The optical inspection device 3 includes a light source Μ, an imaging surface, and a processor 33. The image pickup device 32 scans the substrate 200 for not all the depressions ", and selects a specific depression. The value of the actual = specific depression (ie predetermined value) may be different. The depression is such that the predetermined value is 5 micrometers, i.e., the concave coverage is greater than 5 micrometers. The device 40 is used to form a coating layer at a specific depression. In the example, the layer 41 is opened, and the inspection device 30 is disposed adjacent to each other. The present embodiment 4 layer forming device 40 is a jetting device which includes a protection 9 201008419 agent storage case 41 and a write head 42. The protective agent storage case 41 can store a dry film photoresist, a wet film photoresist, a solder resist material or a plug resistance agent. In the embodiment, the protective agent storage case 41 stores a plug hole resist. The polishing apparatus 50 is for polishing the surface covering layer of the substrate 200 to be externally divided to improve the flatness of the surface of the substrate 200. The polishing device 50 is disposed behind the cover layer forming device 40. The polishing apparatus 50 can be an etched/microetched bath or a brush. The control device 60 is used to control the transfer device 10, the optical inspection device 30, the cover layer forming device 40, and the polishing device 50 to effect continuous operation of the substrate surface flattening system 100. It can be understood that a drying device 70 can be disposed between the cover layer forming device 40 and the polishing device 50 to facilitate drying or curing of the protective agent. The substrate surface flattening system 100 of the present invention combines the optical inspection device 30 with the cover layer forming device 40 and the polishing device 50. In the short time, the surface of the substrate 200 which is difficult to observe by the human eye can be found and further processed, which can save a lot of manpower and time and improve production efficiency. The present technical solution also provides a method for planarizing the surface of the substrate 200 by using the substrate surface flattening system 100 as described above, which includes the following steps: First, the surface of the substrate 200 is scanned using the optical inspection device 30 to obtain an image of the surface of the substrate 200 and A depression having a size larger than a predetermined value, that is, a specific depression is selected from the depression of the surface of the substrate 200. The substrate 200 to be processed is placed on the transfer device 10, and the first conductive layer 220 of the substrate 200 is disposed relative to the main body portion 21 of the chassis 20. The substrate 200 to be processed is moved to the optical inspection device 30, and the first conductive layer 220 is irradiated to the control device 60 by the optical inspection 201008419. Specifically, the light source is inspected and the result is transmitted. • The camera device 32 ingests the first conductive layer 220 to illuminate the processor. The size of the processor that is fine for the first conductive layer is divided into the processor. A depression larger than a predetermined value, that is, the information of the selected position from all the depressions is transmitted to the control device I:: specific - at 5 micrometers (4) is defined as a fixed depression, the depression depth is large, and the coverage layer is covered. Forming device 4G is formed in the specific recess. Specifically, after the control device 60 receives the first conductive layer 22, the transfer device 10 is activated to finely move the substrate of the virtual image MH to the cover layer forming device 40. The cover layer forming device 4 is affixed to the control device 6 to selectively apply a protective agent to the first conductive layer 22, that is, to form a cover layer in a specific recess. The protective agent may be a dry film photoresist, a wet film photoresist, a solder resist material or a plug resistance agent, etc., and the implementation is a plugging agent. Since the depth of the depression 241 is larger than 5 μm, it is a specific depression. Referring to Figures 2 and 3 together, the protective agent is sprayed into the recess 241, and a cover layer 243 is formed on the recessed surface 242. The cover layer 243 partially fills or fills the recess 241. In the third step, a portion other than the surface covering layer 243 of the substrate 200 is polished using the polishing device 50 to improve the flatness of the surface of the substrate 2. The substrate 200 to be processed is moved to the polishing apparatus 5, and a portion other than the cover layer 243 on the first conductive layer 220 is polished. The polishing process can be performed by physical polishing or chemical etching. In this embodiment, a chemical etching method is employed, which successively undergoes steps of washing, etching, water washing, and anti-11 201008419. Since the cover layer 242 is formed with a cover layer, the conductive material around the phase trap 241 of the first layer 220 is (4), causing the thickness of the first conductive layer 220 to decrease, so that the recess depth of the recess 241 is reduced or substantially disappeared. Improve the flatness of the substrate surface. Referring to Fig. 4', the excess surface layer copper is removed by the surname' cover layer Μ2 naturally falls off, leaving only the inner layer copper 222 near the end of the insulating layer 21G, thereby flattening the surface of the substrate 200 to be processed. Understandably, there is a large depth of material
之凹陷處經過拋光步驟仍會存在—定程度凹陷，且盆中殘 留有部分賴層243,此時，需要祕液對其騎處理以除 去其中之殘留覆蓋層243。 ，另外，當採用化學蝕刻/微蝕刻方法對基板2〇〇進行拋 光處理時，為加快㈣之速度並優化㈣之效果，形成於 特疋凹内之覆蓋層之厚度最大值可為相應凹陷深度之 1/3至2/3範圍内。 進行拋光處理後，基板2〇〇表面平坦度得到提高，但 参可理解，該絕緣層210上背離該第二導電層23〇之一側僅 覆蓋有内層銅222,為提高該基板2〇〇之可靠度，還可於拋 光處理之後設置一電鍍步驟。請參閱圖5，電鍍步驟完成 後，該内層銅222表面又增加一電鑛層250。 使用該基板表面平坦化系統1〇〇進行基板2〇〇表面平 坦化之方法可快速地找到發生凹陷之位置並篩選出尺寸大 於一預定值之凹陷，即特定凹陷，進而於該特定凹陷處形 成覆蓋層，再由拋光裝置50對基板200表面進行拋光處 理，可節省大量人力並提高效率。 12 201008419 綜上所述，本發明確已符合發明專利之要件，遂依法 提出專利申請。惟，以上所述者僅為本發明之較佳實施方 ^式，自不能以此限制本案之申請專利範圍。舉凡熟悉本案 -技藝之人士援依本發明之精神所作之等效修飾或變化，皆 應涵蓋於以下申請專利範圍内。 【圖式簡單說明】 圖1係本技術方案提供之基板表面平坦化系統之結構 ®示意圖。 圖2係本技術方案提供之基板之結構示意圖。 圖3係使用本技術方案提供之基板形成覆蓋層後之結 構示意圖。 圖4係使用本技術方案提供之基板拋光後之結構示意 圖。 圖5係使用本技術方案提供之基板表電鍍後之結構示 【主要元件符號說明】 表面平坦化系統 100 基板 200 傳送裝置 10 機架 20 主體部 21 支撐部 22 光學檢查裝置 30 覆蓋層形成裝置 40 光源 31 攝像裝置 32 處理器 33 保護劑儲存盒 41 13 201008419 喷寫頭 42 烘乾裝置 70 表層銅 221 内層銅 222 第二導電層 230 導孔 240 凹陷 241 凹陷面 242 覆蓋層 243 電鍍層 250 〇 14The depression is still present through the polishing step - a certain degree of depression, and a portion of the layer 243 remains in the basin. At this time, the secret liquid is required to be subjected to riding treatment to remove the residual coating layer 243 therein. In addition, when the substrate 2 is polished by a chemical etching/micro-etching method, in order to speed up the speed of (4) and optimize the effect of (4), the maximum thickness of the cover layer formed in the special recess may be the corresponding recess depth. 1/3 to 2/3 range. After the polishing process, the surface flatness of the substrate 2 is improved, but it can be understood that one side of the insulating layer 210 facing away from the second conductive layer 23 is covered only with the inner layer copper 222, in order to improve the substrate 2 The reliability can also be set after the polishing process. Referring to FIG. 5, after the electroplating step is completed, an electric ore layer 250 is further added to the surface of the inner layer copper 222. The method for flattening the surface of the substrate 2 using the substrate surface flattening system 1 can quickly find the position where the recess occurs and select a recess having a size larger than a predetermined value, that is, a specific recess, and further form a specific recess. By covering the layer, the surface of the substrate 200 is polished by the polishing device 50, which saves a lot of manpower and improves efficiency. 12 201008419 In summary, the present invention has indeed met the requirements of the invention patent, and has filed a patent application according to law. However, the above description is only a preferred embodiment of the present invention, and it is not possible to limit the scope of the patent application of the present invention. Equivalent modifications or variations made by persons skilled in the art and skilled in the art will be covered by the following claims. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic view of the structure of a substrate surface flattening system provided by the present technical solution. 2 is a schematic structural view of a substrate provided by the technical solution. Fig. 3 is a schematic view showing the structure after forming a cover layer using the substrate provided by the technical solution. Fig. 4 is a schematic structural view of the substrate after polishing using the technical solution. 5 is a structural diagram after plating of a substrate table provided by the present technical solution. [Main component symbol description] Surface flattening system 100 Substrate 200 Transfer device 10 Rack 20 Main body portion 21 Support portion 22 Optical inspection device 30 Cover layer forming device 40 Light source 31 Camera 32 Processor 33 Protective agent storage box 41 13 201008419 Spray head 42 Drying device 70 Surface copper 221 Inner layer copper 222 Second conductive layer 230 Guide hole 240 Sag 241 Depression surface 242 Cover layer 243 Plating layer 250 〇14