201005991 ' 九、發明說明 - 【發明所屬之技術領域】 本發明是有關於一種發光二極體（LED)元件，且特別β 有關於一種垂直結構發光二極體元件及其製造方法。 疋 【先前技術】 一般而言，發光二極體元件之結構通常依η型與ρ型電 極之相對位置，而分成垂直與橫向結構二類型。垂直結構之 發光二極體元件具有降低接合墊之遮光面積、較佳之電流散 布能力、與降低封裝打線之複雜度等優勢。 氣化鎵系列（GaN based)之發光二極體元件一般係以藍 寶石來作為磊晶成長基板。然而，由於藍寶石基板不導電， 因此一般氮化鎵系列之發光二極體元件大都以η型與p型電 極位於同一侧的橫向結構為主流。此外，藍寶石基板之熱傳 導係數不佳，發光二極體元件之操作效率會因熱效應而大幅 下降。 Ο 目前，為製作垂直型氮化鎵發光二極體元件，並提高元 件之散熱能力’一般利用晶片接合或電鍍的方式來設置高散 熱的另一基板’再以雷射剝除或濕蝕刻方式移除藍寶石成長 基板°然而’利用雷射剝除或濕蝕刻方式來移除藍寶石基板 時’雷射剝除所使用之雷射能量易對氮化鎵磊晶結構造成損 傷’而濕姓刻方式則有蝕刻終點控制不易的問題，同樣容易 損及氮化鎵磊晶結構。 【發明内容】 5 201005991 因此本發明之一目的就是在提供一種發光二極體元 件其具有商散熱特性、高反射特性與高品質之磊晶結構特 故可大巾《&升發光二極體元件之發光效率，並可有效延 長元件之操作壽命。 ▲本發明之另一目的是在提供一種發光二極體元件之製 每方法，其可利用第一電性接觸層來作為以雷射、蝕刻或研 磨方式移除成長基板時的終止層’而可避免傷害在成長基板 表面之發光磊晶結構’進而可提高發光磊晶結構之品質。 0 本發明之又一目的是在提供一種發光二極體元件之製 &方法《η型與p型接觸層均係在反射層之形成、與散熱 基板之黏合或電鍍前完成，因此可避免η型與ρ型接觸層在 高溫回火影響反射層之反射率與散熱基板之黏合能力。 、本發明之再一目的是在提供一種發光二極體元件之製 造方法’其可僅移除部分之成長藍寶石基板，因此可利用剩 餘之藍寶石基板來作為側光取出的窗戶層（Wind〇w 7 —此外，本發明之另—實施例更可在藍寶石基板本 或藍寶石基板上額外設置圖案層以製作規則或不規則性 圖形’進一步增加光取出率。 ，丨、根據本發明之上述目的，提出一種發光二極體元件，至 夕包括·一發光磊晶結構至少包括依序堆疊之一第一電性半 導體層 ' -主動層以及一第二電性半導體層，其中發光磊晶 結構具有至少1 口貫穿發光蟲晶結構，且開口暴露出第一 =性半導體層之-側面，其中第—電性不同於第二電性；一 . 接觸層至少填設於開σ中且與第—電性半導體層 之侧面接觸；―第二電性接觸層覆蓋第二電性半導體層；一 6 201005991 保護層覆蓋第一電性接觸層，以電性隔離第一電性接觸層與 • 第二電性接觸層；一反射層覆蓋保護層與第二電性接觸層； 以及一第一基板具有相對之第一表面與第二表面，且反射層 設於第一基板之第一表面。 根據本發明之目的’提出—種發光二極體元件之製造方 法，至少包括：形成一發光磊晶結構於一第一基板之第一表 面上’其中發光磊晶結構至少包括依序堆疊在第一基板之第 一表面上之一第一電性半導體層、一主動層與一第二電性半 ❹導體層，且發光磊晶結構具有一開口穿設於發光磊晶結構中 並暴露出第一電性半導體層之一側面，其中第一電性不同於 第二電性；形成一第一電性接觸層至少填設於開口中且與第 電性半導體層之側面接觸；形成一第二電性接觸層覆蓋第 二電性半導體層；形成一保護層覆蓋第一電性接觸層，以電 性隔離第一電性接觸層與第二電性接觸層；形成一反射層覆 蓋保護層與第二電性接觸層；以及設置一第二基板於反射層 上，其中第二基板具有相對之第一表面與第二表面，且反射 ❿層與第一基板之第一表面接合。 【實施方式】 4參，系第1 A圖至第1 E圖，其係繪示依照本發明之第 一較佳實施例的一種發光二極體元件之製程剖面圖。在一示 ，實施例中，先提供成長基板⑽，以供材料層後續遙晶成 於其上，其中成長基板1〇〇可具有相對之表面ιΐ6與 • ^8。在一實施例中，成長基板1〇〇之材料可例如為藍寶石。 .接著，利用例如悬晶成長方式，於該成長基板1〇〇之表面 7 201005991 11 8上形成發光磊晶結構丨丨2。在一實施例中，發光磊晶妗 構112可包括依序堆疊在成長基板i 00之表面118上的第一 電性半導體層106、主動層1〇8與第二電性半導體層11〇, 其中第一電性半導體層106與第二電性半導體層11〇具有不 同電性。例如，第一電性半導體層丨06為n型而第二電性半 導體層110為ρ型；或者第一電性半導體層1〇6為1?型而第 二電性半導體層110為η型。主動層1〇8可例如為多重量子 井（MQW)結構。在本示範實施例中，發光磊晶結構U2更 選擇性地包括有依序堆疊在成長基板1〇〇之表面118上的緩 衝層102與未摻雜半導體層1〇4，以提升後續成長之第一電 性半導體層106的磊晶品質，其中緩衝層1〇2與未摻雜半導 體層104位於成長基板ι〇〇之表面U8與第一電性半導體層 106之間。發光蠢晶結構i 12之材料可例如為氣化姻銘嫁 (InAlGaN)系列。 而後，利用例如微影與蝕刻等圖案定義技術，對發光磊201005991 ' IX. EMBODIMENT OF THE INVENTION - TECHNICAL FIELD OF THE INVENTION The present invention relates to a light emitting diode (LED) element, and in particular to a vertical structure light emitting diode element and a method of fabricating the same.疋 [Prior Art] In general, the structure of a light-emitting diode element is generally divided into two types of vertical and horizontal structures depending on the relative positions of the n-type and p-type electrodes. The vertical structure of the LED component has the advantages of reducing the shading area of the bonding pad, better current spreading capability, and reducing the complexity of the package wiring. A gallium nitride element (GaN based) light-emitting diode element is generally made of sapphire as an epitaxial growth substrate. However, since the sapphire substrate is not electrically conductive, the GaN series of light-emitting diode elements are generally dominated by a lateral structure in which the n-type and p-type electrodes are on the same side. In addition, the thermal conductivity of the sapphire substrate is not good, and the operating efficiency of the LED component is greatly reduced by the thermal effect. Ο At present, in order to fabricate vertical GaN LED components and improve the heat dissipation capability of the components, 'other substrates with high heat dissipation are generally used by wafer bonding or electroplating' and then laser stripping or wet etching. Remove the sapphire growth substrate. However, 'the laser energy used for laser stripping is easy to damage the gallium nitride epitaxial structure when using the laser stripping or wet etching to remove the sapphire substrate. There is a problem that the etching end point control is not easy, and the gallium nitride epitaxial structure is also easily damaged. SUMMARY OF THE INVENTION 5 201005991 Therefore, an object of the present invention is to provide a light-emitting diode element which has a commercial heat dissipation characteristic, a high reflection characteristic and a high quality epitaxial structure, and can be used as a large-sized light-emitting diode. The luminous efficiency of the component and can effectively extend the operational life of the component. ▲ Another object of the present invention is to provide a method for fabricating a light-emitting diode element that utilizes a first electrical contact layer as a termination layer for removing a grown substrate by laser, etching or grinding. It can avoid damage to the luminescent epitaxial structure on the surface of the grown substrate, which in turn can improve the quality of the luminescent epitaxial structure. Another object of the present invention is to provide a method for fabricating a light-emitting diode element. "The n-type and p-type contact layers are both formed before the formation of the reflective layer, bonding with the heat-dissipating substrate or plating, thereby avoiding The high-temperature tempering of the n-type and p-type contact layers affects the reflectivity of the reflective layer and the adhesion of the heat-dissipating substrate. A further object of the present invention is to provide a method for fabricating a light-emitting diode element that can remove only a portion of the grown sapphire substrate, so that the remaining sapphire substrate can be utilized as a window layer for sidelight extraction (Wind〇w 7 - In addition, another embodiment of the present invention may further provide a pattern layer on the sapphire substrate or the sapphire substrate to form a regular or irregular pattern to further increase the light extraction rate. According to the above object of the present invention, A light-emitting diode element is provided, comprising: a light-emitting epitaxial structure comprising at least one of a first electrical semiconductor layer'-active layer and a second electrical semiconductor layer, wherein the light-emitting epitaxial structure has at least 1 through the luminescent crystal structure, and the opening exposes the side of the first = semiconductor layer, wherein the first electrical property is different from the second electrical property; 1. The contact layer is filled at least in the open σ and the first Side contact of the semiconductor layer; "the second electrical contact layer covers the second electrical semiconductor layer; a 6 201005991 protective layer covers the first electrical contact layer, electrically isolated An electrical contact layer and a second electrical contact layer; a reflective layer covering the protective layer and the second electrical contact layer; and a first substrate having opposite first and second surfaces, and the reflective layer is disposed on The first surface of a substrate. According to the object of the present invention, a method for fabricating a light-emitting diode element includes at least: forming a light-emitting epitaxial structure on a first surface of a first substrate, wherein the light-emitting epitaxial structure The method further includes at least one of the first electrical semiconductor layer, the active layer and the second electrical half-conductor layer stacked on the first surface of the first substrate, and the luminescent epitaxial structure has an opening extending through the illuminating beam And exposing a side surface of the first electrical semiconductor layer, wherein the first electrical property is different from the second electrical property; forming a first electrical contact layer filled in at least the opening and the electrically conductive semiconductor layer Forming a second electrical contact layer covering the second electrical semiconductor layer; forming a protective layer covering the first electrical contact layer to electrically isolate the first electrical contact layer from the second electrical contact layer; forming a reflection Covering the protective layer and the second electrical contact layer; and disposing a second substrate on the reflective layer, wherein the second substrate has opposite first and second surfaces, and the reflective germanium layer is bonded to the first surface of the first substrate [Embodiment] FIG. 1A to FIG. 1E are cross-sectional views showing a process of a light-emitting diode element according to a first preferred embodiment of the present invention. In an example, a growth substrate (10) is provided first for the material layer to be subsequently crystallized thereon, wherein the growth substrate 1〇〇 may have opposite surfaces ι 6 and • ^8. In an embodiment, the growth substrate 1 The material may be, for example, sapphire. Then, a luminescent epitaxial structure 丨丨2 is formed on the surface 7 201005991 11 8 of the grown substrate 1 by, for example, a suspension growth method. In one embodiment, the luminescent epitaxial structure 112 may include a first electrical semiconductor layer 106, an active layer 1 〇 8 and a second electrical semiconductor layer 11 堆叠 stacked on the surface 118 of the growth substrate i 00 in sequence, wherein the first electrical semiconductor layer 106 and the second Electrical semiconductor layer 11 has different electrical propertiesFor example, the first electrical semiconductor layer 丨06 is n-type and the second electrical semiconductor layer 110 is p-type; or the first electrical semiconductor layer 1〇6 is 1×-type and the second electrical semiconductor layer 110 is n-type . The active layer 1 〇 8 can be, for example, a multiple quantum well (MQW) structure. In the exemplary embodiment, the luminescent epitaxial structure U2 more selectively includes a buffer layer 102 and an undoped semiconductor layer 1 〇4 stacked on the surface 118 of the growth substrate 1 to enhance subsequent growth. The epitaxial quality of the first electrical semiconductor layer 106, wherein the buffer layer 1〇2 and the undoped semiconductor layer 104 are located between the surface U8 of the growth substrate ι and the first electrical semiconductor layer 106. The material of the luminescent crystal structure i 12 can be, for example, a gasification series of InAlGaN. Then, using pattern definition techniques such as lithography and etching,
性接觸層124 ;或者， <裝作第二電性接觸層丨24,再製 一實施例中，先形成第二 丨土伐啊尽iM，驭者，可先製作第二 作第一雷性接觸屉1 ο ο ~ 1 .The contact layer 124; or, <installed as the second electrical contact layer 丨24, in an embodiment, the second 丨 伐 啊 i i i i i i i i i i i i Contact drawer 1 ο ο ~ 1 .
201005991 層110上。在一實施例中，第二電性接觸層124可為p型接 觸層，其中第二電性接觸層124可為金屬層或透明金屬氧化 層。第二電性接觸層124之材料為鎳/金（Ni/Au)、鎳/銀 (Ni/Ag)、氧化銦錫（IT〇)、氧化鋅（Zn〇)、摻雜鎵之氧化鋅 (GZO)、氧化鋅鋁（AZ〇)或氧化銦（Ιη2〇3)β在一實施例中， 第二電性接觸層124可為單層結構。在另一實施例中，第二 電性接觸層124可為多層結構。完成第二電性接觸層124 之設置後，可進行高溫回火程序，以使第二電性接觸層Η* 與第二電性半導體層之間形成歐姆接觸。 然後再形成第一電性接觸層122a至少填設於開口 u4a 中，並覆蓋成長基板100所暴露出之表面118，且第一電性 接觸層122a與暴露之部分第一電性半導體層1〇6及其側面 120接觸，以使第一電性接觸層122&與第一電性半導體層 106電性連接。其中，第二電性接觸層124與第一電性接觸 層122a分開，如第1B圖所示。在本發明中，第一電性接 觸層122a不與主動層1G8及第二電性半導體層110接觸。 如第1B圖所示’在_實施例中，第—電性接觸層具 有類U字型結構’第一電性接觸層ma可例如為订型金屬 層。完成第-電性接觸層心之設置後，可進行高溫回火 程序’以使第—電性接觸層ma與第—電性半導 之間形成歐姆接觸。 接著，形成保護層126a覆蓋第一電性接觸層Η 電性隔離第—電性接觸層122a與第二電性接觸層m 中此保護層126a之材料可為透明絕緣材料， ： 聊、氣切⑽）、旋刚（⑽ 9 201005991 氧化鋁（Al2〇3)。在一實施例中，保護層126a較佳係填滿開 口 U4a，如第1C圖所示，以確保第一電性接觸層1223與 第二電性接觸層124之間的電性隔離，避免短路。 接著’如第1D圖所示，利用例如蒸鑛方式沉積反射層 128覆蓋保護層126a與第二電性接觸層124，以反射主動層 1〇8射向第二電性接觸層124之光。反射層128之材料較佳 係採用高反射之金屬材料，例如鋁、銀或鉑。然後，利用黏 。法、μ片接合法（wafer bonding)或電鑛法來設置基板132 於反射層128之上，以使基板132之表面134與反射層128 接合’其中基板132具有相對之表面134與136。此基板132 較佳係由低熱阻之材料所組成，以提供高散熱特性。在一些 實施例中，基板1 3 2之材料較佳係具高導電與高導熱特性之 材料。基板132可例如為金屬基板、矽基板或金屬複合基 板。在一實施例中，基板132之材料可為矽、鋁、銅、鉬或 銅鎢合金。利用黏合方式來設置基板132時，可先在反射層 128之表面或基板132之表面134上形成接合層13〇 ,再利 用接合層130將基板132之表面134與反射層128接合。在 另一些實施例中，可分別在基板132之表面134與反射層 128上設置接合薄膜（僅繪示組合而成之接合層13〇)，再將 基板132之表面134與反射層128上之接合薄膜互相接合成 接合層130’而使反射層丨28與基板132之表面134接合。 在另一實施例中，利用電鍍方式形成基板132時，接合層 130可為基板132電鍍時的晶種層（Seed Layer)，其中接合 層130先形成在反射層128之表面上，再以接合層13()為電 鍍晶種層來電鍍沉積基板132。接合層13〇較佳可為金屬層。 10 201005991 接下來，可先選擇性地對成長基板100與基板132進行 研磨’以縮減成長基板100與基板132之厚度。然後，如第 1E圖所示，可利用例如蝕刻法或雷射劃線法，並以第一電 性接觸層122a作為終止層’來形成接觸孔14〇貫穿成長基 板1〇〇，並暴露出第一電性接觸層122a之表面146的一部 分。在一不範實施例中，發光磊晶結構112具有相對之表面 148與150,而第一電性接觸層122a之表面U6可與發光遙 晶結構112之表面148共面。在一實施例中，接觸孔14〇 之直徑可例如實質小於20〇 Ai m，而接觸孔1 40之深度可例 如J於300/zni。完成接觸孔140後，形成第一電性接合墊 142a延伸覆蓋在成長基板1〇〇之ns表面的一部分、接觸 洞140之表面與第一電性接觸層122a之表面146的暴露部 分上，其中第一電性接合墊142a與第一電性接觸層i22a 接觸而形成電性連接。第一電性接合墊142a之材料可採用 金屬材料，更佳地第一電性接合墊142a之底層採用具有高 反射特性之金屬材料。 在本不範實施例中，發光二極體元件丨52a之成長基板 100並未移除，因此成長基板100可作為側光取出時的窗戶 層◦如第1E圖所示，在一些實施例中，更可選擇性地在成 長基板100之表面116進行圖案化步驟，以使成長基板1〇〇 之表面116具有圖案結構144a，其中此圖案結構144a可具 有規則圓形或不規則圖形。藉由此圖案結構丨44a的設置， 可增加發光二極體元件I 52a之光取出率。在另一實施例 中’可在成長基板100之表面的圖案結構144a設置額 外之透明圖案層（未繪示），其申由於此透明圖案層係設置在 201005991 圖案結構144a上，因此此透明圖案層之圖形係取決於圖案 -構144a之圖形，或者，在未經圖案化之成長基板⑽的 表面116 _L直接β又置具有規則圖形或不規則圖形的透明圖 案層。此透明圖案層之材料可例如為透明氧化物。在另一些 實施例中’亦可選擇性地形—成共金金屬層138於基板13~2 之表面136,以使所製作而成之發光二極趙元件仙在後 續封裝製程中，可與封|金屬支架在適當溫度下直接接合， 進而可避免外加封膠材料增加熱阻。共金金屬層138之材料 ❿可例如為銀錫合金、銀錫銅合金或金錫銅合金。 請參照第2A圖至第2E圖，其係緣示依照本發明之第 二較佳實施例的-種發光二極體元件之製程剖面圖。在本示 範實施例中，如同上述第一實施例所述，先提供成長基板 100’再利用例如磊晶成長方式於該成長基板1〇〇之表面 118上形成發光蟲晶結構112 '然後，利用例如微影與姓刻 等圖案定義技術’對發光蟲晶結構i 12進行圖案化，而移除 發光磊晶結構112之第二電性半導體層11〇之一部分、主動 ❹層_之-部分以及部分之第一電性半導體層1〇6，以在發 光磊晶結構112中形成開口 n4b，其中開口丨丨仆並未貫穿 發光蟲晶結構112而在第_雷，W：主道. 仕弟電性丰導體層106中形成階梯狀 之開口，如第2Α圖所示。值得注意的是，於另一示範實施 例中，在進行㈣製程時，亦可以更進—步移除部分之未推 雜半導體層i04,而使得階梯狀之開σ _底層位於暴露 之未推雜半導體層lG4上。在本發明中，開口 ll4b亦暴露 .出部分之第一電性半導體層1〇6及其側面12〇。 • 《著’製作第-電性接觸層122b與第二電性接觸層 12 201005991 124’其中第一電性接觸層mb與第二電性接觸㊉i24之製 .作順序可依實際製程來調整。在本示範實施例中，先形成如 上途第-實施例所述之第二電性接觸層124覆蓋在發光蟲 晶結構U2之第二電性半導體層11〇上。同樣地，完成第二 電性接觸層124之設置後’可進行高溫回火程序，以使第二 電性接觸層124與第二電性半導體f 11〇之間形成歐姆接 觸。然後再形成第-電性接觸層122b至少填設於開口⑽ 中’並覆蓋第-電性半導體層1G6所暴露出之部分表面及其 φ侧面12〇’且第一電性接觸層122b與第一電性半導體層1〇6 所暴露出之部分表面與側面12〇接觸，以使第一電性接觸層 mb與第一電性半導體層1〇6電性連接。於另一示範實施 例中帛-電性接觸層1221)更可與暴露之未摻雜半導體層 接觸。在本實把例中，第一電性接觸層不與主動 f 108及第二電性半導體層⑽接觸。如第2B圖所示，在 實施例中，第一電性接觸層122b具有類ϋ字型結構，第 :!·生接觸層122b可例如為η型金屬層。完成第一電性接 ❹層122b之設置後’可進行高溫回火程序，以使第一電性 =觸層mb與第一電性半導體層1〇6之間形成歐姆接觸。 、中第—電性接觸層124與第—電性接觸層mb分開。 、一接下來’形成保護層126b覆蓋第-電性接觸層122b， =性隔離第—電性接觸層⑽與第二電性接觸層124, 二此保邊層126b之材料可為透明絕緣材料，例如二氧化 省切、旋塗玻璃、二氧化鈦或氧化銘。在一實施例中， 層，較佳係填滿開…，如第2C圖所示，以確 •保第-電性接觸層mb與第二電性接觸層124之間的電性 13 201005991 隔離，避免短路。 接著，如第2D圖所示，利用蒸鍍方式形成如同第一實 施例所述之反射層128覆蓋保護層126b與第二電性接觸層 124,以反射主動層108射向第二電性接觸層124之光。然 後，·如同第一貫施例’以黏合、晶片接合、或電鍍方式設置 基板132於反射層128之上。 接下來，可先選擇性地對基板132進行研磨，以縮減基 板132之厚度。同時，利用例如雷射法、蝕刻法或研磨法， 並以第一電性接觸層122b為停止層，來移除成長基板1〇〇201005991 on layer 110. In an embodiment, the second electrical contact layer 124 can be a p-type contact layer, wherein the second electrical contact layer 124 can be a metal layer or a transparent metal oxide layer. The material of the second electrical contact layer 124 is nickel/gold (Ni/Au), nickel/silver (Ni/Ag), indium tin oxide (IT〇), zinc oxide (Zn〇), gallium-doped zinc oxide ( GZO), zinc aluminum oxide (AZ〇) or indium oxide (Ιη〇3)3 In one embodiment, the second electrical contact layer 124 may have a single layer structure. In another embodiment, the second electrical contact layer 124 can be a multi-layer structure. After the second electrical contact layer 124 is disposed, a high temperature tempering process can be performed to form an ohmic contact between the second electrical contact layer Η* and the second electrical semiconductor layer. Then, the first electrical contact layer 122a is formed at least in the opening u4a, and covers the exposed surface 118 of the growth substrate 100, and the first electrical contact layer 122a and the exposed portion of the first electrical semiconductor layer 1〇 6 and its side surface 120 are in contact with each other such that the first electrical contact layer 122 & is electrically connected to the first electrical semiconductor layer 106 . The second electrical contact layer 124 is separated from the first electrical contact layer 122a as shown in FIG. 1B. In the present invention, the first electrical contact layer 122a is not in contact with the active layer 1G8 and the second electrical semiconductor layer 110. As shown in Fig. 1B, in the embodiment, the first electrical contact layer has a U-like structure. The first electrical contact layer ma may be, for example, a patterned metal layer. After the setting of the first electrical contact layer is completed, a high temperature tempering procedure can be performed to form an ohmic contact between the first electrical contact layer ma and the first electrical semiconductor. Then, the protective layer 126a is formed to cover the first electrical contact layer, and the material of the protective layer 126a in the second electrical contact layer m and the second electrical contact layer m may be a transparent insulating material. (10)), Rotary ((10) 9 201005991 Alumina (Al2〇3). In an embodiment, the protective layer 126a preferably fills the opening U4a as shown in FIG. 1C to ensure the first electrical contact layer 1223 Electrical isolation from the second electrical contact layer 124 to avoid short circuit. Next, as shown in FIG. 1D, the reflective layer 128 is deposited, for example, by a vapor deposition method, to cover the protective layer 126a and the second electrical contact layer 124. The reflective active layer 1 〇 8 is directed to the second electrical contact layer 124. The material of the reflective layer 128 is preferably a highly reflective metal material such as aluminum, silver or platinum. A wafer bonding or electrominening method is used to place the substrate 132 over the reflective layer 128 such that the surface 134 of the substrate 132 is bonded to the reflective layer 128. The substrate 132 has opposing surfaces 134 and 136. The substrate 132 is preferably Made of low thermal resistance material to provide high heat dissipation In some embodiments, the material of the substrate 132 is preferably a material having high conductivity and high thermal conductivity. The substrate 132 can be, for example, a metal substrate, a germanium substrate or a metal composite substrate. In an embodiment, the substrate 132 The material may be tantalum, aluminum, copper, molybdenum or copper-tungsten alloy. When the substrate 132 is provided by bonding, the bonding layer 13 may be formed on the surface of the reflective layer 128 or the surface 134 of the substrate 132, and the bonding layer 130 may be used. The surface 134 of the substrate 132 is bonded to the reflective layer 128. In other embodiments, a bonding film (only the combined bonding layer 13 is shown) may be disposed on the surface 134 of the substrate 132 and the reflective layer 128, respectively. The surface 134 of the substrate 132 and the bonding film on the reflective layer 128 are bonded to each other to form the bonding layer 130' to bond the reflective layer 28 to the surface 134 of the substrate 132. In another embodiment, when the substrate 132 is formed by electroplating, The bonding layer 130 may be a seed layer when the substrate 132 is plated, wherein the bonding layer 130 is first formed on the surface of the reflective layer 128, and the bonding substrate 13 is electroplated to deposit the substrate 132. Bonding layer 13 Preferably, it may be a metal layer. 10 201005991 Next, the growth substrate 100 and the substrate 132 may be selectively polished to reduce the thickness of the growth substrate 100 and the substrate 132. Then, as shown in FIG. 1E, for example, Etching or laser scribing, and forming a contact hole 14 with the first electrical contact layer 122a as a termination layer 〇, extending through the growth substrate 1 〇〇, and exposing a portion of the surface 146 of the first electrical contact layer 122a In an exemplary embodiment, the light emitting epitaxial structure 112 has opposing surfaces 148 and 150, and the surface U6 of the first electrical contact layer 122a can be coplanar with the surface 148 of the light emitting crystal structure 112. In one embodiment, the diameter of the contact hole 14A can be, for example, substantially less than 20 〇 Ai m, and the depth of the contact hole 144 can be, for example, J at 300/zni. After the contact hole 140 is completed, the first electrical bonding pad 142a is formed to extend over a portion of the ns surface of the growth substrate 1 , the surface of the contact hole 140 and the exposed portion of the surface 146 of the first electrical contact layer 122a, wherein The first electrical bonding pad 142a is in contact with the first electrical contact layer i22a to form an electrical connection. The material of the first electrical bonding pad 142a may be a metal material. More preferably, the bottom layer of the first electrical bonding pad 142a is made of a metal material having high reflection characteristics. In the present embodiment, the growth substrate 100 of the LED component 52a is not removed, so the growth substrate 100 can be used as a window layer when the sidelight is taken out, as shown in FIG. 1E, in some embodiments. Optionally, a patterning step is performed on the surface 116 of the growth substrate 100 such that the surface 116 of the growth substrate 1 has a pattern structure 144a, wherein the pattern structure 144a may have a regular circular shape or an irregular pattern. By the arrangement of the pattern structure 丨 44a, the light extraction rate of the light-emitting diode element I 52a can be increased. In another embodiment, an additional transparent pattern layer (not shown) may be disposed on the pattern structure 144a of the surface of the growth substrate 100, since the transparent pattern layer is disposed on the 201005991 pattern structure 144a, so the transparent pattern The pattern of the layer depends on the pattern of the pattern-structure 144a, or a transparent pattern layer having a regular pattern or an irregular pattern is directly placed on the surface 116_L of the unpatterned grown substrate (10). The material of the transparent pattern layer may be, for example, a transparent oxide. In other embodiments, the surface layer 136 of the substrate 13~2 may be selectively formed to form a common gold metal layer 138, so that the fabricated light-emitting diode element can be sealed in the subsequent packaging process. |The metal bracket is directly joined at an appropriate temperature to prevent the external sealing material from increasing the thermal resistance. The material of the co-gold metal layer 138 may be, for example, a silver tin alloy, a silver tin copper alloy or a gold tin copper alloy. Referring to Figs. 2A to 2E, a process cross-sectional view of a light-emitting diode element according to a second preferred embodiment of the present invention is shown. In the exemplary embodiment, as described in the first embodiment, the growth substrate 100' is first provided, and then the luminescent crystal structure 112' is formed on the surface 118 of the growth substrate 1 by, for example, epitaxial growth. For example, a pattern definition technique such as lithography and surname engraving the illuminating crystal structure i 12 , and removing a portion of the second electrical semiconductor layer 11 、 of the luminescent epitaxial structure 112, an active ❹ layer portion, and a portion of the first electrical semiconductor layer 1 〇 6 to form an opening n4b in the luminescent epitaxial structure 112, wherein the opening 并未 并未 does not penetrate the illuminating worm crystal structure 112 in the first ray, W: main road. A stepped opening is formed in the electrically conductive conductor layer 106 as shown in FIG. It should be noted that, in another exemplary embodiment, during the (four) process, a portion of the undoped semiconductor layer i04 may be further removed, such that the stepped opening σ _ bottom layer is exposed. On the hetero semiconductor layer lG4. In the present invention, the opening ll4b is also exposed to a portion of the first electrical semiconductor layer 1〇6 and its side surface 12〇. • The fabrication of the first electrical contact layer 122b and the second electrical contact layer 12 201005991 124' wherein the first electrical contact layer mb and the second electrical contact layer are made. The order can be adjusted according to the actual process. In the exemplary embodiment, the second electrical contact layer 124, as described in the first embodiment, is formed over the second electrically conductive semiconductor layer 11 of the luminescent insect crystal structure U2. Similarly, after the second electrical contact layer 124 is disposed, a high temperature tempering process can be performed to form an ohmic contact between the second electrical contact layer 124 and the second electrical semiconductor f 11 。. Then, the first electrical contact layer 122b is formed at least in the opening (10) and covers a portion of the surface exposed by the first electrical semiconductor layer 1G6 and its φ side 12' and the first electrical contact layer 122b and the first A portion of the surface exposed by the first semiconductor layer 〇6 is electrically connected to the first electrical semiconductor layer 1〇6. In another exemplary embodiment, the erbium-electric contact layer 1221) is more in contact with the exposed undoped semiconductor layer. In the present embodiment, the first electrical contact layer is not in contact with the active f 108 and the second electrical semiconductor layer (10). As shown in Fig. 2B, in the embodiment, the first electrical contact layer 122b has a ϋ-like structure, and the first contact layer 122b may be, for example, an n-type metal layer. After the setting of the first electrical contact layer 122b is completed, a high temperature tempering process can be performed to form an ohmic contact between the first electrical property layer mb and the first electrical semiconductor layer 1A6. The first electrical contact layer 124 is separated from the first electrical contact layer mb. Then, the protective layer 126b is covered to cover the first electrical contact layer 122b, the first electrical contact layer (10) and the second electrical contact layer 124 are separated, and the material of the edge guard layer 126b may be a transparent insulating material. For example, dioxide cutting, spin-on glass, titanium dioxide or oxidation. In one embodiment, the layer is preferably filled with, as shown in FIG. 2C, to ensure isolation of the electrical property 13 201005991 between the first electrical contact layer mb and the second electrical contact layer 124. To avoid short circuits. Next, as shown in FIG. 2D, the reflective layer 128 as described in the first embodiment is formed by the evaporation method to cover the protective layer 126b and the second electrical contact layer 124 to reflect the active layer 108 to the second electrical contact. Light of layer 124. Then, as in the first embodiment, the substrate 132 is disposed over the reflective layer 128 by bonding, wafer bonding, or electroplating. Next, the substrate 132 can be selectively ground to reduce the thickness of the substrate 132. At the same time, the growth substrate 1 is removed by, for example, a laser method, an etching method, or a grinding method, and the first electrical contact layer 122b is used as a stop layer.
❹ 直至暴露出第一電性接觸層122b之表面146與發光磊晶結 構112之表面148。在本示範實施例中，第一電性接觸層12孔 之表面146可與發光磊晶結構112之表面148共面。接著， 形成隔離層154於發光磊晶結構112之表面148的一部分， 其中發光磊晶結構112之表面148受到隔離層154所覆蓋的 部分鄰近於第-電性接觸$ mb。接下纟，形成第一電性 接合墊142b於第一電性接觸層12几之表面146與發光磊晶 =構122之表面148上方之隔離層154上，其中第一電性接 «墊142b與第一電性接觸層122b接觸而呈電性連接，且隔 =層154夾堍在發光磊晶結構112之表面與第一電性接 。墊142b之間’以隔離第一電性接合墊142b與發光磊晶結 構112 ’如第2E圖所示。第_電性接合墊142b之材料可採 =金屬材料，更佳地第—電性接合墊㈣之底層採用具有 南反射特性之金屬材料。 ^第2E圖所不，在一些實施例中，更可選擇性地在發 ^阳、°構112之表面148進行圖案化步驟，以使發光磊晶 201005991 結構112之表面148具有圖案結構I44b，其中此圖案結構 144b可具有規則圖形或不規則圖形，以增加發光二極體元 件152b之光取出率。依據本發明之一些實施例，圖案結構 144b可以形成在第一電性半導體層1〇6上或者是未摻雜半 導體層104 Λ。在另一實施例中，可在發光蠢晶結構ιΐ2 之表面148的圖案結構144b設置額外之透明圖案層（未繪 示）’其中由於此透明圖案層係設置在圖案結構l44b上，因 此此透明圖案層之圖形係取決於圖案結構1 44b之圖形；或 者’在未經圖案化之發光磊晶結構112之表面148上直接設 置具有規則圖形或不規則圖形的透明圖案層。此透明圖案層 之材料可例如為透明氧化物。在另一些實施例中，亦可選擇 性地形成如同第一實施例之共金金屬層138於基板132之表 面136 ’以利發光二極體元件152b與封裝金屬支架在適當 溫度下直接接合，進而可避免外加封膠材料增加熱阻。 請參照第3A圖至第3E圖’其係繪示依照本發明之第 三較佳實施例的一種發光二極體元件之製程剖面圖。在本示 範實施例中’如同上述第一實施例所述，先提供成長基板 100’再利用例如蠢晶成長方式’於該成長基板100之表面 Π8上形成發光磊晶結構112。然後，利用例如微影與蝕刻 等圖案定義技術，對發光遙晶結構112進行圖案化，而移除 部分之發光磊晶結構11 2與部分之成長基板1 00，以在發光 磊晶結構112與成長基板1 〇〇中形成開口 114c。其中，開 口 U4c自發光磊晶結構112之表面150延伸至成長基板1〇〇 之一部分深度中，如第3A圖所示。在本發明中，開口 ii4c 亦暴露出第一電性半導體層106之側面120。 15 201005991 « 接著，製作第-電性接觸層122c與第二電性接觸層 124’其中第—電性接觸層me與第二電性接觸層⑶ 作順序可依實際製程來㈣。在本示範實施例中，先形成如 上述第一實施例所述之第二電性接觸層124覆蓋發光蠢曰曰 結構m之第二電性半導體層11〇上。同樣地，完成第心 性接觸層124之設置後’可進行高溫回火程序，以使第 性接觸層124與第二電性丰莲轳爲11Λ € “。 冤性丰導體層110之間形成歐姆接觸。 然後形成第一電性接觸層122 v具0又於開口 114c中，並 ❹覆盍開口 114C之内側面與底面，且第—電性接觸層似 與第-電性半導體層1〇6所暴露出之側自i -電性接觸層122c與第一電性半導體層ι〇6 使： 本實施例中，第一電性接觸層 連接在 饮啊層i22c不與主動層1〇8及第一 電性半導體層110接觸。如第 θ⑽及第- 咕^ 弟3圖所不，在—實施例中， 第一電性接觸層122c具有類u 如為η型金屬層二子第型？ ’第-電性接觸層 ¥接_ 層儿成第一電性接觸層122c之設 可進心溫回火程序，以使第—電性接觸層仙與 ❹-電性+導體層1G6之間形成歐姆 接觸層124與第-電性接觸層i22c分開。 第一電丨 接下來^成保蠖層I26c覆蓋第 以電性隔離第一電性接艏思丨莰啁層 j. ψ . ^ = c與第二電性接觸層ι24， 護層126C之材料可為透明絕緣材料，例如-氧化 石夕、氮化石夕、旋塗玻璃、二氧化鈦或氧化銘。：—:如-：化 保護層126c較佳係填滿開口丨，笛 、施例 保第-電性接觸層122c鱼第 ’ 3C圖所示’以確 隔離，避免短路。。與第-電性接觸層⑶之間的電性 16 201005991 接著，如第3D騎示，利蒸财式形成如 ::所述之反射層128覆蓋保護層1-與第二電性接觸: :广以反射主動層_射向第二電性接觸層124之光。： 後，如同第一實施例，以點八、曰 132於反射層128之上。…片接5、或電鑛設置基板直至 until the surface 146 of the first electrical contact layer 122b and the surface 148 of the luminescent epitaxial structure 112 are exposed. In the exemplary embodiment, surface 146 of the first electrical contact layer 12 can be coplanar with surface 148 of luminescent epitaxial structure 112. Next, a portion of the surface 148 of the isolation layer 154 is formed on the surface 148 of the luminescent epitaxial structure 112, wherein the portion of the surface 148 of the luminescent epitaxial structure 112 that is covered by the isolation layer 154 is adjacent to the first electrical contact $mb. Next, the first electrical bonding pad 142b is formed on the surface 146 of the first electrical contact layer 12 and the isolation layer 154 above the surface 148 of the luminescent epitaxy 122, wherein the first electrical interface 142b The first electrical contact layer 122b is in electrical contact with the first electrical contact layer 122b, and the spacer layer 154 is electrically connected to the first surface of the light-emitting epitaxial structure 112. Between the pads 142b' is to isolate the first electrical bond pads 142b from the light-emitting epitaxial structures 112' as shown in Figure 2E. The material of the first electrical pad 142b can be made of a metal material, and more preferably the bottom layer of the first electrical pad (4) is made of a metal material having a south reflection property. ^2E, in some embodiments, the patterning step is more selectively performed on the surface 148 of the luminescent structure 112 such that the surface 148 of the luminescent epitaxial 201005991 structure 112 has a patterned structure I44b, The pattern structure 144b may have a regular pattern or an irregular pattern to increase the light extraction rate of the light emitting diode element 152b. According to some embodiments of the present invention, the pattern structure 144b may be formed on the first electrical semiconductor layer 1〇6 or the undoped semiconductor layer 104Λ. In another embodiment, an additional transparent pattern layer (not shown) may be disposed on the pattern structure 144b of the surface 148 of the light emitting structure ι2, wherein the transparent pattern layer is disposed on the pattern structure 144b, so this transparency The pattern of the pattern layer is dependent on the pattern of the pattern structure 144b; or 'a transparent pattern layer having a regular pattern or an irregular pattern is disposed directly on the surface 148 of the unpatterned luminescent epitaxial structure 112. The material of the transparent pattern layer may be, for example, a transparent oxide. In other embodiments, the common gold metal layer 138 of the first embodiment may be selectively formed on the surface 136' of the substrate 132 to facilitate direct bonding of the light emitting diode element 152b and the package metal holder at an appropriate temperature. In turn, the external sealing material can be prevented from increasing the thermal resistance. Referring to Figures 3A through 3E, there is shown a process cross-sectional view of a light emitting diode device in accordance with a third preferred embodiment of the present invention. In the present exemplary embodiment, as described in the first embodiment, the growth substrate 100' is first provided, and the light-emitting epitaxial structure 112 is formed on the surface Π8 of the growth substrate 100 by, for example, a stray growth method. Then, the illuminating crystal structure 112 is patterned by using a pattern definition technique such as lithography and etching, and a part of the luminescent epitaxial structure 11 2 and a portion of the grown substrate 100 are removed to illuminate the epitaxial structure 112 with An opening 114c is formed in the growth substrate 1 . Wherein, the opening U4c extends from the surface 150 of the light-emitting epitaxial structure 112 to a portion of the depth of the growth substrate 1? as shown in Fig. 3A. In the present invention, the opening ii4c also exposes the side 120 of the first electrically conductive semiconductor layer 106. 15 201005991 « Next, the first electrical contact layer 122c and the second electrical contact layer 124' are formed. The order of the first electrical contact layer me and the second electrical contact layer (3) can be sequentially processed according to the actual process (4). In the exemplary embodiment, the second electrical contact layer 124 as described in the first embodiment above is formed to cover the second electrical semiconductor layer 11 of the light emitting dormant structure m. Similarly, after the setting of the first cardiographic contact layer 124 is completed, a high temperature tempering process can be performed to make the first contact layer 124 and the second electrically conductive lotus root 11 Λ. Then, the first electrical contact layer 122 is formed in the opening 114c, and the inner side surface and the bottom surface of the opening 114C are covered, and the first electrical contact layer and the first electrical semiconductor layer 1〇6 are formed. The exposed side is from the i-electric contact layer 122c and the first electrical semiconductor layer ι6: In this embodiment, the first electrical contact layer is connected to the active layer i22c and not to the active layer 1 The first electrical semiconductor layer 110 is in contact. As in the θ(10) and the third embodiment, in the embodiment, the first electrical contact layer 122c has a class u such as an n-type metal layer and a second sub-type? The first electrical contact layer is formed into a first electrical contact layer 122c, and is capable of being subjected to a temperature tempering process to form a first electrical contact layer between the first electrical contact layer and the germanium-electricity + conductor layer 1G6. The ohmic contact layer 124 is separated from the first electrical contact layer i22c. The first electrical layer is then covered with a protective layer I26c to cover the electrical isolation. The first electrical contact layer j. ψ . ^ = c and the second electrical contact layer ι24, the material of the sheath 126C may be a transparent insulating material, such as - oxidized stone, nitrided, spin coating Glass, titanium dioxide or oxidized.::: If -: protective layer 126c is better to fill the opening 丨, flute, the example of the first electrical contact layer 122c fish '3C' to ensure isolation, to avoid Short circuit. The electrical property between the first electrical contact layer (3) and the second electrical property. Contact: wide to reflect the active layer _ light incident on the second electrical contact layer 124.: After, as in the first embodiment, the dots VIII and 曰 132 are above the reflective layer 128. Mine setting substrate
接著，可先選擇性地對基板132進行研磨，以縮減基板 之厚度。同時’利用例如雷射法、蝕刻法或研磨法，並 以弟-電性接觸層心為停止層，來局部移除成長基板1〇〇 而縮減成長基100之厚度’直至暴露出第-電性接觸層 122c之表面146。在—實施例中’厚度經縮減後之成長基板 1〇〇之厚度可實質小於300 ,在本示範實施例中，第— 電性接觸I me之表面146可與成長基板1〇〇之表面116 共面。接下來，形成第一電性接合塾142。於第一電性接觸 層122c之表面146與成長基板1〇〇之表面116的一部分上’ 其中第一電性接合墊142c與第一電性接觸層12。接觸而呈 電性連接’如第3E圖所示。第一電性接合墊142。之材料 可採用金屬材料，更佳地第一電性接合墊142c之底層採用 具有高反射特性之金屬材料。 如第3E圖所示，在一些實施例中，更可選擇性地在成 長基板100之表面116進行圖案化步驟以使成長基板1〇〇 之表面116具有圖案結構144C，其中此圖案結構144c可具 有規則圖形或不規則圖形，以増加發光二極體元件152<：之 光取出率。在另-實施例中，可在成長基板1GG之表面116 的圖案結構144c設置額外之透明圖案層（未繪示），其中由 於此透明圖案層係設置在圖案結構14补上，因此此透明圖 17 201005991 案層之圖形係取決於圖案結構144c之圖形；或者，在未經 *圖案化之成長基板100之表面116上直接設置具有規則圖形 或不規則圖形的透明圖案層。此透明圖案層之材料可例如為 透明氧化物。在另一些實施例中，亦可選擇性地形成如同第 一實施例之共金金屬層138於基板132之表面136，以利發 光二極體元件152c與封裝金屬支架在適當溫度下直接接 合，進而可避免外加封膠材料增加熱阻。 由上述之實施例可知，本發明之一優點就是因為本發明 0之發光二極體元件具有高散熱特性、高反射特性與高品質之 磊晶表面，因此可大幅提升發光二極體元件之發光品質，並 可有效延長元件之操作壽命。 由上述實施例可知，本發明之另一優點就是因為本發明 之發光一極體元件之製造方法可利用第一電性接觸層來作 為成長基板之雷射、蝕刻或研磨移除時的終止層，而可避免 傷害到成長在成長基板表面之發光磊晶結構，進而可提高發 光磊晶結構之品質。 參 由上述實施例可知，本發明之又一優點就是因為本發明 之發光二極體元件之製造方法的n型與p型接觸層均係在反 射層之形成、與散熱基板之黏合或電鍍前完&，因此可避免 η型與p型接㈣的高溫回火影響反射層《反射率與散熱基 板之黏合能力。 °' 由上述實施例可知，本發明之再一優點就是因為本發明 之發光二極體元件之製造方法可僅局部移除成長藍寶石基 .板，因此可利用剩餘之藍寶石基板來作為側光取出的窗戶 •層n本發明之發光m件之製造方法更可在成長 18 201005991 基板本身、或成長基板上額外設置圖案層來製作規則或不規 〜則性圖形，進一步增加光取出率。 雖然本發明已以一較佳實施例揭露如上，然其並非用以 限定本發明，任何在此技術領域中具有通常知識者，在不脫 離本發明之精神和範圍内，當可作各種之更動與潤飾，因此 本發明之保護範圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 第1A圖至第1E圖係繪示依照本發明之第一較佳實施 例的一種發光二極體元件之製程剖面圖。 第2A圖至第2E圖係繪示依照本發明之第二較佳實施 例的一種發光二極體元件之製程剖面圖。 第3 A圖至第3E圖係％示依照本發明之第三較佳實施 例的一種發光二極體元件之製程剖面圖。 【主要元件符號說明】 102 :緩衝層 106 :第一電性半導體層 110:第二電性半導體層 114a :開口 114c :開口 118 :表面 122a :第一電性接觸層 122c :第一電性接觸層 126a :保護層 100 :成長基板 瘳 1〇4 :未摻雜半導體層 108 :主動層 112 .發光產晶結構 114b :開口 116 :表面 120 :侧面 122b :第一電性接觸層 124 :第二電性接觸層 19 201005991Next, the substrate 132 can be selectively polished to reduce the thickness of the substrate. At the same time, the thickness of the growth substrate 100 is reduced by using, for example, a laser method, an etching method, or a grinding method, and the mother-electric contact layer is used as a stop layer to locally remove the growth substrate 1 直至 until the first electricity is exposed. The surface 146 of the contact layer 122c. In the embodiment, the thickness of the grown substrate 1 厚度 after the thickness is reduced may be substantially less than 300. In the exemplary embodiment, the surface 146 of the first electrical contact I me may be opposite to the surface 116 of the growth substrate 1 Coplanar. Next, a first electrical junction 142 is formed. On a surface 146 of the first electrical contact layer 122c and a portion of the surface 116 of the growth substrate 1', wherein the first electrical bond pad 142c and the first electrical contact layer 12 are. Contact is electrically connected as shown in Fig. 3E. The first electrical bond pad 142. The material may be a metal material, and more preferably, the bottom layer of the first electrical bonding pad 142c is made of a metal material having high reflection characteristics. As shown in FIG. 3E, in some embodiments, the patterning step is further selectively performed on the surface 116 of the growth substrate 100 such that the surface 116 of the growth substrate 1 has a pattern structure 144C, wherein the pattern structure 144c can be There is a regular pattern or an irregular pattern to add the light extraction rate of the light-emitting diode element 152 <:. In another embodiment, an additional transparent pattern layer (not shown) may be disposed on the pattern structure 144c of the surface 116 of the growth substrate 1GG, wherein the transparent pattern layer is disposed on the pattern structure 14, so the transparent pattern 17 201005991 The pattern of the layer depends on the pattern of the pattern structure 144c; or, a transparent pattern layer having a regular pattern or an irregular pattern is directly disposed on the surface 116 of the growth substrate 100 that is not *patterned. The material of the transparent pattern layer may be, for example, a transparent oxide. In other embodiments, the common gold metal layer 138 of the first embodiment may be selectively formed on the surface 136 of the substrate 132 to facilitate direct bonding of the light emitting diode element 152c to the package metal holder at a suitable temperature. In turn, the external sealing material can be prevented from increasing the thermal resistance. It can be seen from the above embodiments that one of the advantages of the present invention is that the light-emitting diode element of the present invention has high heat dissipation characteristics, high reflection characteristics and high-quality epitaxial surface, thereby greatly improving the light-emitting diode element. Quality and can effectively extend the operating life of components. It can be seen from the above embodiments that another advantage of the present invention is that the manufacturing method of the light-emitting diode element of the present invention can utilize the first electrical contact layer as a termination layer for laser, etching or grinding removal of the growth substrate. Moreover, it is possible to avoid damage to the luminescent epitaxial structure grown on the surface of the grown substrate, thereby improving the quality of the luminescent epitaxial structure. According to the above embodiments, another advantage of the present invention is that the n-type and p-type contact layers of the method for fabricating the light-emitting diode device of the present invention are formed before the formation of the reflective layer, adhesion to the heat-dissipating substrate, or plating. After the &, it can avoid the high temperature tempering of the n-type and p-type connection (4) affecting the adhesion of the reflective layer "reflectance and heat dissipation substrate. According to the above embodiment, another advantage of the present invention is that since the manufacturing method of the light-emitting diode element of the present invention can only partially remove the grown sapphire-based plate, the remaining sapphire substrate can be used as the side light extraction. Window/layer n The manufacturing method of the light-emitting m piece of the present invention can further increase the light extraction rate by additionally providing a pattern layer on the substrate itself or the growth substrate by growing a pattern of 18 201005991 to form a regular or irregular pattern. Although the present invention has been described above in terms of a preferred embodiment, it is not intended to limit the invention, and it is intended that various modifications may be made without departing from the spirit and scope of the invention. And the scope of the present invention is defined by the scope of the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS FIGS. 1A to 1E are cross-sectional views showing a process of a light-emitting diode element in accordance with a first preferred embodiment of the present invention. 2A to 2E are cross-sectional views showing a process of a light emitting diode element in accordance with a second preferred embodiment of the present invention. 3A to 3E are cross-sectional views showing a process of a light emitting diode element in accordance with a third preferred embodiment of the present invention. [Main component symbol description] 102: buffer layer 106: first electrical semiconductor layer 110: second electrical semiconductor layer 114a: opening 114c: opening 118: surface 122a: first electrical contact layer 122c: first electrical contact Layer 126a: protective layer 100: growth substrate 瘳1〇4: undoped semiconductor layer 108: active layer 112. luminescent crystal structure 114b: opening 116: surface 120: side surface 122b: first electrical contact layer 124: second Electrical contact layer 19 201005991
12 6b :保護層 128 :反射層 1 3 2 :基板 136 :表面 140 :接觸孔 142b :第一電性接合墊 144a :圖案結構 144c :圖案結構 148 :表面 152a :發光二極體元件 152c :發光二極體元件 126c :保護層 130 :接合層 13 4 :表面 13 8 :共金金屬層 142a :第一電性接合墊 142c :第一電性接合墊 144b :圖案結構 146 :表面 150 :表面 152b :發光二極體元件 154 :隔離層12 6b : protective layer 128 : reflective layer 1 3 2 : substrate 136 : surface 140 : contact hole 142b : first electrical bonding pad 144a : pattern structure 144c : pattern structure 148 : surface 152a : light emitting diode element 152c : light Diode element 126c: protective layer 130: bonding layer 13 4 : surface 13 8 : common gold metal layer 142a : first electrical bonding pad 142c : first electrical bonding pad 144b : pattern structure 146 : surface 150 : surface 152b : Light-emitting diode element 154: isolation layer
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