200950217 九、發明說明： 【發明所屬之技術領域】 本發明涉及一種等化器及具有該等化器之連接器。 【先前技術】 在印刷電路板傳輸線中，隨著訊號之傳輸速度越來越 高，訊號之高頻損耗亦不斷加大。目前，為了補償訊號之高 頻損耗，设計晶片時，通常在訊號傳送端採用預加強及解加 強兩種手段對訊號處理。預加強透過增加訊號之高頻分量來 ❹補償傳輸線中之高頻損耗。解加強透過減少訊號之低頻分 量，使經傳輸線後之訊號低頻分量與高頻分量 二減少因頻率分量差異過大所產生之抖動。然，上=種二 ’又均會消耗-定之功率’而且它們之電磁輻射會隨著訊號傳 輸速度之加快而加重。如何在印刷電路板之訊號接收端採用 γ種合理之高頻訊號補償裝置以滿足高速訊號之傳輸要 求’成為一個亟待解決之問題。 【發明内容】 © 繁於以上内容’有必要提供—種位於訊號接收端之高頻 訊號補償裝置。 八一種等化器，用於補償訊號在訊號傳輸線中損耗之高頻 刀量’其包括-電阻及一電容’該電阻與電容並聯，該電容 之正極連接該訊號傳輸線，負極透過一終端電阻接地。 —種連接器，用於連接一第一電子裝置及一第二電子裝 置—該連接器包括至少—等化器，該等化器包括—電阻及一 该電阻與電容並聯’該電容之正極連接該第—電子裝 置，負極連接該第二電子裝置。 200950217 相較于習知技術，本發明等化器能在訊號接收端補償訊 號在印刷電路板傳輸線中傳輸之高頻損耗，改善印刷電路板 之傳輸性能。 【實施方式】 請參考圖1，本發明等化器之較佳實施方式包括一電阻 R1及一電容C1，該電容C1之正極連接傳輸線10，負極透 過終端電阻R2接地，該電容C1之正極與負極分別作為等化 器20之輸入端及輸出端，該電容C1之正極與負極上之電壓 q 分別標示為Vi及Vo，該電阻R1與電容C1並聯。 由以上各元件之連接關係，得推導出本實施例中之頻率 響應為： ^ * Cl * i?l * R2 + R2 f 1 ) ^ s^Cl^Rl^R2^R2 + Rl K ) 其中s表示複頻率jw，Cl、R1及R2分別表示該電容 Cl之容值、電阻R1及R2之阻值。從（1)式得看出，s為 1/(R1*C1)時為此頻率響應之零點，s為（R2+R1)/(C1*R1*R2) ❹時為此頻率響應之極點。故，在該電阻R2已知之情況下， 結合所需要之低頻增益及極點位置，便得設計出符合要求之 等化器。若所需要之低頻增益為A分貝，則可得： (2) m_R2*(l-10A/2a) 沿= ι〇Α/20 對於該電容Cl，其容值要使得該極點（R2+R1)(C1*R2*R1) 小於訊號之主頻率，若訊號之主頻率為F赫茲，則可得： ci> m+ji2200950217 IX. Description of the Invention: [Technical Field of the Invention] The present invention relates to an equalizer and a connector having the same. [Prior Art] In the printed circuit board transmission line, as the transmission speed of the signal becomes higher and higher, the high frequency loss of the signal is also continuously increased. At present, in order to compensate for the high frequency loss of the signal, when designing the chip, the signal is usually processed by pre-emphasis and de-emphasis on the signal transmission end. Pre-emphasis compensates for high frequency losses in the transmission line by increasing the high frequency components of the signal. The solution enhances the low frequency component of the signal, so that the low frequency component and the high frequency component of the signal after the transmission line reduce the jitter caused by the excessive difference of the frequency components. However, the upper = species 2 will consume a certain amount of power and their electromagnetic radiation will increase as the signal transmission speed increases. How to use γ reasonable high-frequency signal compensation devices to meet the transmission requirements of high-speed signals at the signal receiving end of printed circuit boards has become an urgent problem to be solved. SUMMARY OF THE INVENTION © The above content is necessary to provide a high frequency signal compensation device at the signal receiving end. An equalizer for compensating for the high-frequency tool loss of the signal in the signal transmission line. The resistor includes a resistor and a capacitor. The resistor is connected in parallel with the capacitor. The anode of the capacitor is connected to the signal transmission line, and the anode is connected through a terminal resistor. Ground. a connector for connecting a first electronic device and a second electronic device - the connector includes at least an equalizer, the equalizer includes a resistor and a resistor connected in parallel with the capacitor The first electronic device has a negative electrode connected to the second electronic device. 200950217 Compared with the prior art, the equalizer of the present invention can compensate the high frequency loss transmitted in the transmission line of the printed circuit board at the signal receiving end, and improve the transmission performance of the printed circuit board. [Embodiment] Referring to FIG. 1, a preferred embodiment of the equalizer of the present invention includes a resistor R1 and a capacitor C1. The anode of the capacitor C1 is connected to the transmission line 10, and the cathode is grounded through the terminal resistor R2. The anode of the capacitor C1 is The negative poles respectively serve as the input end and the output end of the equalizer 20, and the voltages q on the positive and negative poles of the capacitor C1 are denoted as Vi and Vo, respectively, and the resistor R1 is connected in parallel with the capacitor C1. From the connection relationship of the above components, it is derived that the frequency response in this embodiment is: ^ * Cl * i?l * R2 + R2 f 1 ) ^ s^Cl^Rl^R2^R2 + Rl K ) where s Indicates the complex frequency jw, Cl, R1, and R2 represent the capacitance of the capacitor C1 and the resistance values of the resistors R1 and R2, respectively. It can be seen from equation (1) that s is 1/(R1*C1) for the zero point of this frequency response, and s is (R2+R1)/(C1*R1*R2) ❹ is the pole of this frequency response. Therefore, in the case where the resistor R2 is known, in combination with the required low frequency gain and pole position, it is necessary to design an equalizer. If the required low frequency gain is A decibel, then: (2) m_R2*(l-10A/2a) edge = ι〇Α/20 For the capacitor Cl, the capacitance is such that the pole (R2+R1) (C1*R2*R1) is less than the main frequency of the signal. If the main frequency of the signal is FHz, then: ci> m+ji2
InFRiRl 7 200950217 需要指出之是，根據（3)式，雖然該電容Cl只有下限值， ' 但其值愈大，零點1/(R1*C1)越小，該等化器20之低頻增益 '作用之頻率範圍愈窄。因此，該電容C1之大小要合理選擇， -兼顧該等化器 20 之零點 1/(R1*C1)與極點 (R2+R1)/(C1*R2*R1)。該電阻R1與電容C1可分別設置為可 變電阻及可變電容。 若對於一傳輸速度為5Gbps，主頻率為2.5GHz之訊號， 該電阻R2為100Ω，需要設計一個具有-9.5dB之低頻增益 φ 之等化器。由上述分析可知，該極點（R2+R1)/(C1*R2*R1) 要小於訊號之主頻率2.5GHz，則可得該電阻R1及電容Cl 分別為：InFRiRl 7 200950217 It should be pointed out that according to the formula (3), although the capacitance C1 has only the lower limit value, 'but the larger the value, the smaller the zero point 1/(R1*C1), the low frequency gain of the equalizer 20' The narrower the frequency range of the action. Therefore, the size of the capacitor C1 should be reasonably selected, taking into account the zero point 1/(R1*C1) and the pole (R2+R1)/(C1*R2*R1) of the equalizer 20. The resistor R1 and the capacitor C1 can be respectively set as variable resistors and variable capacitors. For a transmission speed of 5 Gbps, the main frequency is 2.5 GHz signal, the resistance R2 is 100 Ω, and it is necessary to design a equalizer with a low frequency gain φ of -9.5 dB. It can be seen from the above analysis that the pole (R2+R1)/(C1*R2*R1) is smaller than the main frequency of the signal of 2.5 GHz, and the resistor R1 and the capacitor Cl are respectively:
fi?l = 100QFi?l = 100Q
[C1^2pF ( 4 ) 本實施例中將Cl設為5pF。請對比圖2A及圖2B，在 訊號接收端未使用等化器時，訊號抖動較大，眼高較低；在 訊號接收端使用該等化器20後，不僅減小了訊號之抖動， Q還增加了眼高。由此可見，該等化器20能補償訊號在印刷 電路板傳輸線中之高頻損耗，減少訊號之抖動，改善印刷電 路板之傳輸性能。請對比圖3A及圖3B，使用該等化器20 後，訊號之抖動亦有明顯改善。 本發明還涉及一種具有上述等化器之連接器30。請參考 圖4,為了節省電路板之繞線空間，複數等化器20内嵌於連 接器30中。該連接器30用於連接主機板及外接卡，該連接 器30包括複數連接主機板之引腳1及連接外接卡之引腳2, 每一等化器20之電容C1之正極透過連接器之引腳1連接主 8 200950217 ' 機板，負極透過連接器之引腳2連接外接卡，每一等化器20 之電阻R1與其電容C1並聯。該電阻R1與電容C1可分別 '設置為可變電阻及可變電容，便於根據不同之設計要求，靈 活調整該電阻R1之阻值與電容C1之容值。該連接器30亦 可為其他連接兩種不同電子裝置之連接器，其中等化器之數 目亦可根據不同連接器之引腳數目及定義相應調整。 本發明等化器能在訊號接收端補償訊號在印刷電路板 傳輸線中傳輸之高頻損耗，改善印刷電路板之傳輸性能。 ^ 綜上所述，本發明符合發明專利要件，爰依法提出專 利申請。惟，以上所述者僅為本發明之較佳實施方式，舉 凡熟悉本案技藝之人士，於爰依本發明精神所作之等效修 飾或變化，皆應涵蓋於以下之申請專利範圍内。 【圖式簡單說明】 圖1係本發明等化器之較佳實施方式之電路原理圖。 圖2A及圖2B分別係訊號經過不含有等化器之印刷電 路板傳輸後及經過具有本發明等化器之印刷電路板傳輸後 ❹之仿真眼圖。 圖3A及圖3B分別係訊號經過不含有等化器之印刷電 路板傳輸後及經過具有本發明等化器之印刷電路板傳輸後 之仿真直方圖。 圖4係本發明連接器之較佳實施方式之示意圖。 【主要元件符號說明】 傳輸線 10 等化器 20 電阻 R1 終端電阻 R2 9 200950217 輸入電壓 Vi 輸出電壓 Vo 連接器 30 引腳 1、2 電容 Cl 10[C1^2pF (4) In the present embodiment, Cl was set to 5 pF. Please compare FIG. 2A and FIG. 2B, when the equalizer is not used at the signal receiving end, the signal jitter is large and the eye height is low; after the equalizer 20 is used at the signal receiving end, not only the jitter of the signal is reduced, Q Also increased eye height. It can be seen that the equalizer 20 can compensate for the high frequency loss of the signal in the transmission line of the printed circuit board, reduce the jitter of the signal, and improve the transmission performance of the printed circuit board. Please compare FIG. 3A and FIG. 3B. After using the equalizer 20, the jitter of the signal is also significantly improved. The invention also relates to a connector 30 having the above-described equalizer. Referring to Figure 4, in order to save the winding space of the board, the complex equalizer 20 is embedded in the connector 30. The connector 30 is configured to connect a motherboard and an external card. The connector 30 includes a pin 1 connected to the motherboard and a pin 2 connected to the external card. The positive pole of the capacitor C1 of each equalizer 20 is transmitted through the connector. Pin 1 is connected to the main 8 200950217 ' board, the negative pole is connected to the external card through pin 2 of the connector, and the resistor R1 of each equalizer 20 is connected in parallel with its capacitor C1. The resistor R1 and the capacitor C1 can be respectively set as variable resistors and variable capacitors, so that the resistance value of the resistor R1 and the capacitance value of the capacitor C1 can be flexibly adjusted according to different design requirements. The connector 30 can also be other connectors for connecting two different electronic devices. The number of equalizers can also be adjusted according to the number of pins and definitions of different connectors. The equalizer of the present invention can compensate the high frequency loss of the signal transmitted in the transmission line of the printed circuit board at the signal receiving end, and improve the transmission performance of the printed circuit board. ^ In summary, the present invention complies with the patent requirements of the invention and submits a patent application according to law. However, the above description is only the preferred embodiment of the present invention, and equivalent modifications or variations made by those skilled in the art in the spirit of the present invention are intended to be included in the following claims. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a circuit schematic diagram of a preferred embodiment of the equalizer of the present invention. 2A and 2B are respectively simulated eye diagrams after the signal has been transmitted through the printed circuit board without the equalizer and after being transmitted through the printed circuit board having the equalizer of the present invention. 3A and 3B are simulated histograms of signals transmitted after transmission through a printed circuit board that does not contain an equalizer and after transmission through a printed circuit board having an equalizer of the present invention. 4 is a schematic illustration of a preferred embodiment of the connector of the present invention. [Main component symbol description] Transmission line 10 Equalizer 20 Resistor R1 Terminating resistor R2 9 200950217 Input voltage Vi Output voltage Vo Connector 30 Pin 1, 2 Capacitor Cl 10