200937829 九、發明說明： 【發明所屬之技術領域^ 本案係關於-種電麗轉換器，尤指一種將直 壓並轉換成交流電壓之電壓轉換器。 外 【先前技術】200937829 IX. INSTRUCTIONS: [Technical field to which the invention pertains] This case relates to a type of electric converter, and more particularly to a voltage converter that converts and converts into an alternating voltage. [Prior Art]
隨著科技的進步，各類3C產品已被視為推動市 長的重要力量。無庸置疑的，這樣的發展趨勢仍將持：下 去’而且隨著微電子技術的進步，3C產品不但功能日趨 雜，其尺寸亦漸趨於小型化，且可攜性也隨之大幅提高， 使用者因此可以方便輕鬆以3C產品處理各項事務。门 而電腦、手機、數位相機等商品都可歸類為况產品， 為了因應3C產品體積越做越小的趨勢，產品内部的組件 必須跟著小型化’尤其是絲將直流電壓（DC)昇壓並 換成交流電壓（AC)的電壓轉換器’才能達到產品小型化 的目的，以符合市場的需求。 句翏閲第-圖，其係為習知電壓轉換器之電路社構干 意圖’如圖所示’習知電壓轉換器1〇係包含時序』生電 路11、複數個開關元件12、昇壓電壓器13、電容C1以 電感U，用以接收-直流電壓Vdc並昇髮轉換成谷為一= ==，至於習知電壓轉換器10的運作方式係 ί流㈣Vdc ’並利用時序產生電路U所輸出之控制㈣ 來控制複數個_元# 12的關及導通，將直流電壓 200937829With the advancement of technology, various 3C products have been regarded as an important force driving the mayor. Undoubtedly, such a trend will continue: and with the advancement of microelectronics technology, 3C products are not only increasingly functional, but their size is also becoming smaller and the portability is greatly improved. Therefore, it is easy to handle various matters with 3C products. Doors and computers, mobile phones, digital cameras and other products can be classified as products. In order to cope with the trend of 3C products becoming smaller and smaller, the internal components of the products must be miniaturized, especially the wire will boost the DC voltage (DC). And replaced by AC voltage (AC) voltage converter 'to achieve product miniaturization purposes to meet the needs of the market. See the figure-picture, which is the circuit architecture of the conventional voltage converter. As shown in the figure, the conventional voltage converter 1 includes a timing circuit 11, a plurality of switching elements 12, and a boost. The voltage regulator 13 and the capacitor C1 are used to receive the DC voltage Vdc and the rise and fall is converted into a valley ====. As for the conventional voltage converter 10, the operation mode is (4) Vdc' and the timing generating circuit U is utilized. The output control (4) to control the closing and conducting of a plurality of _ yuan # 12, the DC voltage 200937829
Vdc ’可為+5V至+12V之間，於由電感Ll、電容ci、并 堡變壓器13(1:20)及開關元件12所組成的迥路中，利用 開關π件12間的開閉作用，使得昇壓變壓器13的二次树 可得到已昇壓至需求標準之交流電壓Vac。 、雖然習知電壓轉換器10確實可達到將直流電壓箅虞 並轉換成為一交流電壓，但是在小型化的趨勢下，習知電 壓轉換器10使用昇壓變壓器13，將使得此種電路設計難 © 法縮小體積，使得產品無法滿足小型薄型化的目標。 因此，如何發展一種可改善上述習知技術缺失之電麋 轉換器，實為目前迫切需要解決之問題。 【發明内容】 壓Μ本案之主要目的在於提供一種電壓轉換器，俾解決電 換器使用昇壓變壓器，無法縮小體積，使得所製造么 品無法滿足小型薄型化的缺點。 為達上述目的，本案之一較廣義實施樣態為提供一韓 電壓輕姑SB m , 片 、盗，用以接收輸入直流電壓，其係包含：昇壓晶 大，用以接收輸入直流電壓，並昇壓為第一直流電壓；放 收^略，與昇壓晶片連接且具有至少一倍壓電路，其係接 直流電壓，用以對經過昇壓後之第一直流電壓進行 倍壓Jt I® _ ^ 生 理，以產生第二直流電壓；時序產生電路，用以產 產^制k號；以及極性控制電路，其係與放大電路及時序 生電路連接，用以接收第二直流電壓及輸入直流電壓， 7 200937829 且因應控制信號之控制將第二直流電壓轉換成輸出交流 電壓。 根據本案之構想，其中控制信號係為時脈信號。 根據本案之構想，其中倍壓電路係由複數個二極體及 電容所組成。 根據本案之構想，其中倍壓電路係由複數個二極體所 組成。 根據本案之構想，其中昇壓晶片係為直流-直流轉換 晶片。 根據本案之構想，其中第二直流電壓的大小係因應放 大電路中所包含倍壓電路的數量。 根據本案之構想，其中極性控制電路係由複數個隔離 開關元件及複數個共接式開關元件所組成。 根據本案之構想，其中隔離開關元件係為光耦開關元 件。 根據本案之構想，其中共接式開關元件係為金屬氧化 物半導體元件。 根據本案之構想，其中電壓轉換器更包含輸出電容， 其係與放大電路及極性控制電路連接，放大電路進行倍壓 處理後所產生之第二直流電壓係提供至輸出電容上輸出。 根據本案之構想，其中電壓轉換器更包含分壓電路， 其係與昇壓晶片連接，用以調整第一直流電壓之大小。 200937829 【實施方式】 體現本案特徵與優點的一些典型實施例將在後段的 說明中詳細敘述。應理解的是本案能夠在不同的態樣上具 有各種的變化，其皆不脫離本案的範圍，且其中的說明及 圖示在本質上係當作說明之用，而非用以限制本案。 本案之電源轉換器係利用半導體昇壓、倍壓技術，不 使用變壓器而達到將直流電源昇壓並轉成交流電源的目 ❹ 的，且只要依需要增加串聯的倍壓電路數，即可輕易的將 電壓從直流低壓昇壓至需要的直流高壓。 請參閱第二圖，其係為本案較佳實施例之電源轉換器 之電路結構示意圖。如第二圖所示，本案之電壓轉換器20 可由昇壓晶片21、放大電路22、極性控制電路23、時序 產生電路24、分壓電路25以及電感L1、二極體D1以及 電容Cl、C2，主要用來接收一輸入直流電壓Vin並昇壓轉 換成為一輸出交流電壓。 © 本案之昇壓晶片21可為一直流-直流轉換晶片（DC to DC Converter 1C)且其内部係包含有一開關元件Q1，利 用昇壓晶片21的過流飽和功能使得開關元件Q1可進行關 斷切換，於本實施例中，昇壓晶片21可使用美商二極體 公司（DIODES. Inc)所設計製造之具有關斷功能之編號 AP34063晶片，但不此為限，任何具有同樣功能之晶片此 ^ 皆可併入參考。 • 昇壓晶片21的運作方式係接收該輸入直流電壓Vin， 9 200937829 藉由開關元件Q1的關斷切換以及電感L1、二極體D1與電 容C1的配合而將輸入直流電壓Vin昇壓為一第一直流電 壓VI，最後將第一直流電壓VI加至電容C1上，至於，昇 壓完成之第一直流電壓VI可藉由與昇壓晶片21連接之分 壓電路25來調整最終加至電容C1上的直流電壓值，其中 分壓電路25可由電阻R1及電阻R2所構成。 舉例而言，於一些實施例中，輸入直流電壓Vin可介 於DC+3V〜+ 12V，昇壓晶片21加上電感L1、二極體D1、 電容Cl、C2後可將輸入直流電壓Vin昇壓至DC+30V的直 流電壓，並可藉由分壓電路25調整昇壓晶片21輸出為 DC+25，並將此電壓加至電容C1 (以下將以此數據作為說 明的例子）。 放大電路22係與二極體D1、電容C1及輸出電容C9 連接，放大電路22内部可包含至少一倍壓電路，主要因 應所串聯的倍壓電路數量，而將第一直流電壓VI從直流 φ 低壓昇壓至需要的直流高壓，其運作方式係接收第一直流 電壓VI，並根據倍壓電路的數量對經過昇壓後之第一直流 電壓VI進行倍壓處理，以產生一第二直流電壓V2，並將 第二直流電壓V2加至電容C9上。 於本實施例中，放大電路22係包含4組倍壓電路221 〜224，且彼此之間係串聯連接，其中，倍壓電路221可 • 由電容C3、C4以及二極體D2、D3所構成，倍壓電路222 可由電容C5、C6以及二極體D4、D5所構成，倍壓電路223 可由電容C7、C8以及二極體D6、D7所構成，而倍壓電路 200937829 224則由二極體D8、D9所構成，倍壓電路22i〜似依序 可將第直机電壓VI倍壓至2倍、3倍、4倍及5倍，舉 例而言’當第-直流電髮n為沉備時，倍 221 〜224可依序將電壓由nr dc 麵、m +25V^^+5()v'dc:+75V' 你古：再參閱第一圖以下將說明放大電路22的倍壓運 作方式·· w「口土 < ❹ ❹ 在時間T1時，昇壓曰y ^ 輸入直流電壓Vin經電的開關元件Q1為導通’ T1 €感Ll、開關元件Ql後接地’使得 電感L1内因電流流過而 旦 无妖忧行 η Ύ9 PI - ^ η儲存此里，其兩端電壓為VL1。在 時間T2時開關兀件Q；[轡 …加上㈣u ，於㈣人直流電壓 C1上，利用電阻m、電阻=過二極體D1而加在電容 得到所需的DC+25V。 的適‘調整，可在電容C1 在時間T3時’昇壓曰 、s τι 曰日片21内開關元件Q1又變為導 通，此時除電感L1趣路重複上述充電狀態外 上的電能瞻一經由二極體D2、電容C2、開關元件qi 後接地’於疋電谷C2也被充電至DC+25V。在時間τ4時開 關元件Q1為OFF狀態，於是電容C1又被充電至Dc+25v。 而此同時，輸入直流電壓Vin加上VL1再加上電容c2上 之電壓總合可為DC+50V，DC+50V經過二極體D3後加在電 谷C3及電谷C1構成之串聯迴路上’於是電容[I、電容 C3都分別被充電至DC+25V。 在時間T5時’昇廢晶片21内開關元件qi又變為導 11 200937829 通，此時除電感L1迴路重複上述充電狀態外，在電容C3 加電容Cl的電壓為DC+50V，經由二極體D4、電容C4、電 容C2、開關元件Q1後接地，於是電容C2、電容C4都被 充電至DC+25V。在時間T6時開關元件Q1為OFF狀態，於 是電容C1又被充電至DC+25V，而此同時，輸入直流電壓 Vin加上VL1再加上電容C2、電容C4上之電壓總合為 DC+75V，經過二極體D5後加在電容C5、電容C3及電容 C1構成之串聯迴路上，於是電容C1、電容C3、電容C5都 分別被充電至DC+25V。 在時間T7時，昇壓晶片21内開關元件Q1又變為導 通，此時除電感L1迴路重複上述充電狀態外，在電容 C5+C3+C1的總和電壓為DC+75V，經由二極體D6、電容C6、 電容C4、電容C2、開關元件Q1後接地，於是電容C2、電 容C4、電容C6都分別被充電至DC+25V。在時間T8時開 關元件Q1為OFF狀態，於是電容C1又被充電至DC+25V。 而此同時，輸入直流電壓Vin加上VL1再加上電容C2、電 容C4、電容C6上之總合電壓為DC+100V，經過二極體D7 後加在電容C7、電容C5、電容C3及電容C1構成之串聯 迴路上，於是電容C1、電容C3、電容C5、電容C7都分別 被充電至DC+25V。 在時間T9時，昇壓晶片21内開關元件Q1又變為導 通，此時除電感L1迴路重複上述充電狀態外，在電容 C7+C5+C3+C1上的總和電壓為DC+100V，經由二極體D8、 電容C8、電容C6、電容C4、電容C2、開關元件Q1後接 12 200937829 地，於是電容C2、電容C4、電容C6、電容C8都分別被充 ' 電至DC+25V。在時間T10時開關元件Q1為OFF狀態，於 是電容C1又被充電至DC+25V。而此同時，Vin加上VL1 再加上電容C2、電容C4、電容C6、電容C8之總合DC+125V， 經過二極體D9後加在輸出電容C9上，於是輸出電容C9 被充電至DC+125V，此為第二直流電壓之高壓輸出端點。 請再參閱第二圖，時序產生電路24係可調整頻率且 與極性控制電路23連接，用以接收輸入直流電壓Vin，主 要產生一控制信號，可為一時序信號（clock signal)， 用來控制極性控制電路23的運作。 極性控制電路係與輸出電容C9及時序產生電路24連 接，主要用來接收第二直流電壓V2及輸入直流電壓Vin， 且因應該控制信號之控制將第二直流電壓V2轉換成一輸 出交流電壓。 本案之極性控制電路23主要由隔離開關元件Q4〜Q7 q 及共接式開關元件Q2及Q3所組成，其中，隔離開關元件 Q4〜Q7可為光耦開關元件，而共接式開關元件Q2及Q3則 可為金屬氧化物半導體元件（M0S元件），共接式開關元件 Q2係用來控制隔離開關元件Q4及Q5運作，而共接式開關 元件Q3係用來控制隔離開關元件Q6及Q7運作，至於， 共接式開關元件Q2及Q3則與時序產生電路24連接，用 ^ 以因應控制信號的驅動來進行開關切換，使得共接式開關 元件Q2及Q3受時序產生電路24的控制而將高電壓直流 轉變成高電壓交流輸出。 13 200937829 於本實施例中，極性控制電路23的運作方式係為： 在時間tl時，時序產生電路24輸出之控制信號為正電 壓，共接式開關元件Q2不導通而共接式開關元件Q3為導 通，使得隔離開關元件Q4、Q5、Q6、Q7中只有隔離開關 元件Q6、Q7導通，於是經由隔離開關元件Q6的導通使得 Vout-2端輸出DC+125V，而經由隔離開關元件Q7的導通 使得Vout-1端被接地。接著在時間12時，時序產生電路 24之控制信號輸出為零電壓，將使得共接式開關元件Q2 導通，而共接式開關元件Q3為不導通，使得隔離開關元 件Q4、Q5、Q6、Q7中只有隔離開關元件Q4、Q5導通，於 是經由隔離開關元件Q4的導通使得Vout-1端輸出 DC+125V，經由隔離開關元件Q4的導通使得Vout-2被接 地。如此週而復始，Vout-1、Vout-2兩端即可輸出AC 250Vpp交流電壓。另外，更可藉由調整時序產生電路24 之輸出訊號頻率，即可變更最終輸出交流電壓的輸出頻 ❹率。Vdc ' can be between +5V and +12V. In the circuit composed of the inductor L1, the capacitor ci, the bunker transformer 13 (1:20) and the switching element 12, the opening and closing function between the switch π members 12 is utilized. The secondary tree of the step-up transformer 13 is made available to the AC voltage Vac that has been boosted to the required standard. Although the conventional voltage converter 10 can achieve the conversion of the DC voltage into an AC voltage, in the trend of miniaturization, the conventional voltage converter 10 uses the step-up transformer 13, which makes the circuit design difficult. The method reduces the volume, making the product unable to meet the goal of small and thin. Therefore, how to develop an electro-optical converter that can improve the above-mentioned conventional technology is an urgent problem to be solved. SUMMARY OF THE INVENTION The main purpose of the present invention is to provide a voltage converter that solves the problem that the converter cannot be reduced in size by using a step-up transformer, so that the manufactured product cannot satisfy the disadvantage of being small and thin. In order to achieve the above objectives, one of the more general implementations of the present case is to provide a Korean voltage SB m, a chip, and a thief for receiving an input DC voltage, which includes: a boosting crystal large for receiving an input DC voltage. And boosting to a first DC voltage; releasing, slightly connected to the booster chip and having at least one voltage circuit connected to the DC voltage for bucking the boosted first DC voltage Jt I® _ ^ physiology to generate a second DC voltage; a timing generation circuit for producing a k-number; and a polarity control circuit coupled to the amplifying circuit and the timing generating circuit for receiving the second DC voltage and Input DC voltage, 7 200937829 and convert the second DC voltage into an output AC voltage in response to control of the control signal. According to the concept of the present case, the control signal is a clock signal. According to the concept of the present case, the voltage doubling circuit is composed of a plurality of diodes and capacitors. According to the concept of the present case, the voltage doubler circuit is composed of a plurality of diodes. According to the concept of the present invention, the booster chip is a DC-DC conversion chip. According to the concept of the present case, the magnitude of the second DC voltage is due to the number of voltage doubler circuits included in the amplifier. According to the concept of the present invention, the polarity control circuit is composed of a plurality of isolated switching elements and a plurality of common switching elements. According to the concept of the present invention, the isolating switching element is an optocoupler switching element. According to the concept of the present invention, the common-connecting switching element is a metal oxide semiconductor element. According to the concept of the present invention, the voltage converter further includes an output capacitor connected to the amplifying circuit and the polarity control circuit, and the second DC voltage generated by the amplifying circuit after the voltage multiplication process is provided to the output capacitor for output. According to the concept of the present invention, the voltage converter further includes a voltage dividing circuit connected to the boosting chip for adjusting the magnitude of the first DC voltage. 200937829 [Embodiment] Some exemplary embodiments embodying the features and advantages of the present invention will be described in detail in the following description. It is to be understood that the present invention is capable of various modifications in the various aspects of the present invention, and the description and illustration are in the nature of The power converter of this case uses semiconductor boosting and voltage doubler technology to achieve the goal of boosting the DC power supply and converting it into an AC power supply without using a transformer, and it is easy to increase the number of voltage doubler circuits connected in series as needed. The voltage is boosted from DC low voltage to the required DC high voltage. Please refer to the second figure, which is a schematic diagram of the circuit structure of the power converter of the preferred embodiment of the present invention. As shown in the second figure, the voltage converter 20 of the present invention can be a booster chip 21, an amplifying circuit 22, a polarity control circuit 23, a timing generating circuit 24, a voltage dividing circuit 25, and an inductor L1, a diode D1, and a capacitor C1. C2 is mainly used for receiving an input DC voltage Vin and boosting and converting into an output AC voltage. The booster chip 21 of the present invention can be a DC-DC converter (CDC to DC Converter 1C) and has a switching element Q1 inside thereof, and the switching element Q1 can be turned off by the overcurrent saturation function of the boosting chip 21. Switching, in this embodiment, the boosting chip 21 can use the numbered AP34063 chip with the shutdown function designed and manufactured by DIODES. Inc., but not limited thereto, any wafer having the same function. This ^ can be incorporated into the reference. • The operation mode of the booster chip 21 is to receive the input DC voltage Vin, 9 200937829. The input DC voltage Vin is boosted to one by the switching of the switching element Q1 and the matching of the inductor L1, the diode D1 and the capacitor C1. The first DC voltage VI is finally applied to the capacitor C1. As a result, the boosted first DC voltage VI can be adjusted by the voltage dividing circuit 25 connected to the boosting chip 21 to be finally added to The DC voltage value on the capacitor C1, wherein the voltage dividing circuit 25 can be composed of a resistor R1 and a resistor R2. For example, in some embodiments, the input DC voltage Vin can be between DC+3V and +12V, and the boosting chip 21 plus the inductor L1, the diode D1, the capacitors C1, and C2 can increase the input DC voltage Vin. The DC voltage is applied to DC + 30 V, and the output of the booster chip 21 is adjusted to DC + 25 by the voltage dividing circuit 25, and this voltage is applied to the capacitor C1 (this data will be exemplified below). The amplifying circuit 22 is connected to the diode D1, the capacitor C1 and the output capacitor C9, and the amplifying circuit 22 can include at least one voltage doubler circuit, and the first DC voltage VI is mainly determined according to the number of voltage doubler circuits connected in series. DC φ low voltage boost to the required DC high voltage, the operation mode is to receive the first DC voltage VI, and according to the number of voltage doubling circuits, the boosted first DC voltage VI is doubled to generate a first Two DC voltages V2, and a second DC voltage V2 is applied to the capacitor C9. In the present embodiment, the amplifying circuit 22 includes four sets of voltage doubling circuits 221 to 224 connected in series with each other, wherein the voltage doubling circuit 221 can be composed of capacitors C3 and C4 and diodes D2 and D3. The voltage doubler circuit 222 can be composed of capacitors C5 and C6 and diodes D4 and D5. The voltage doubler circuit 223 can be composed of capacitors C7 and C8 and diodes D6 and D7, and the voltage doubler circuit 200937829 224 It is composed of diodes D8 and D9, and the voltage doubler circuit 22i can sequentially double the voltage of the straight machine VI to 2 times, 3 times, 4 times and 5 times, for example, when the first DC power When n is sinking, the multiples 221 ~ 224 can sequentially apply the voltage from the nr dc plane, m +25V^^+5()v'dc: +75V'. You: Refer to the first figure below to explain the amplifier circuit. 22 times voltage operation mode ··w "mouth soil" ❹ ❹ At time T1, boost 曰 y ^ input DC voltage Vin power-on switching element Q1 is conducting 'T1 € sense L1, switching element Q1 after grounding' In the inductor L1, due to the current flowing through, there is no worries η Ύ9 PI - ^ η stored here, the voltage across it is VL1. At time T2, the switch element Q; [辔...plus (four)u, in (4) On the human DC voltage C1, the resistor M and the resistor = the diode D1 are applied to the capacitor to obtain the desired DC+25V. The appropriate adjustment can be made at the time C3 when the capacitor C1 is 'boost', s τ ι 曰In the day 21, the switching element Q1 becomes conductive again. At this time, in addition to the inductance L1, the electric energy on the above-mentioned charging state is repeated through the diode D2, the capacitor C2, and the switching element qi, and then grounded in the electric valley C2. It is charged to DC+25V. At time τ4, the switching element Q1 is OFF, and then the capacitor C1 is charged to Dc+25v. At the same time, the input DC voltage Vin plus VL1 plus the voltage sum of the capacitor c2 It can be DC+50V, DC+50V is applied to the series circuit formed by the electric valley C3 and the electric valley C1 after the diode D3. Then the capacitor [I and the capacitor C3 are respectively charged to DC+25V. At time T5 'The switching element qi in the waste wafer 21 becomes the conduction 11 200937829 again. At this time, except the inductance L1 circuit repeats the above charging state, the voltage of the capacitor C3 is increased to DC + 50V through the diode D4 and the capacitor C4. After the capacitor C2 and the switching element Q1 are grounded, the capacitor C2 and the capacitor C4 are all charged to DC+25V. When the T6 switch element Q1 is OFF, the capacitor C1 is charged to DC+25V, and at the same time, the input DC voltage Vin plus VL1 plus the capacitance of the capacitor C2 and the capacitor C4 is DC+75V. After the diode D5 is applied to the series circuit formed by the capacitor C5, the capacitor C3 and the capacitor C1, the capacitor C1, the capacitor C3 and the capacitor C5 are respectively charged to DC+25V. At time T7, the switching element Q1 in the boosting chip 21 is turned on again. At this time, except that the inductor L1 loop repeats the above charging state, the sum voltage of the capacitor C5+C3+C1 is DC+75V, via the diode D6. The capacitor C6, the capacitor C4, the capacitor C2, and the switching element Q1 are grounded, so that the capacitor C2, the capacitor C4, and the capacitor C6 are respectively charged to DC+25V. At time T8, switching element Q1 is turned OFF, and capacitor C1 is again charged to DC + 25V. At the same time, the input DC voltage Vin plus VL1 plus the capacitor C2, capacitor C4, capacitor C6 on the total combined voltage is DC + 100V, after the diode D7 is added to the capacitor C7, capacitor C5, capacitor C3 and capacitor C1 constitutes a series circuit, so capacitor C1, capacitor C3, capacitor C5, and capacitor C7 are respectively charged to DC+25V. At time T9, the switching element Q1 in the boosting chip 21 is turned on again. At this time, the sum voltage on the capacitor C7+C5+C3+C1 is DC+100V except that the inductor L1 loop repeats the above charging state. The body D8, the capacitor C8, the capacitor C6, the capacitor C4, the capacitor C2, and the switching element Q1 are connected to 12 200937829, so that the capacitor C2, the capacitor C4, the capacitor C6, and the capacitor C8 are respectively charged to DC+25V. At time T10, switching element Q1 is turned off, and capacitor C1 is again charged to DC + 25V. At the same time, Vin plus VL1 plus capacitor C2, capacitor C4, capacitor C6, capacitor C8 total DC + 125V, after the diode D9 is added to the output capacitor C9, so the output capacitor C9 is charged to DC +125V, this is the high voltage output terminal of the second DC voltage. Referring to the second figure, the timing generating circuit 24 is adjustable in frequency and connected to the polarity control circuit 23 for receiving the input DC voltage Vin, and mainly generates a control signal, which can be a clock signal for controlling The operation of the polarity control circuit 23. The polarity control circuit is connected to the output capacitor C9 and the timing generating circuit 24, and is mainly used for receiving the second DC voltage V2 and the input DC voltage Vin, and converting the second DC voltage V2 into an output AC voltage according to the control of the control signal. The polarity control circuit 23 of the present invention is mainly composed of the isolating switching elements Q4 Q Q7 q and the common switching elements Q2 and Q3, wherein the isolating switching elements Q4 Q Q7 can be optocoupler switching elements, and the common switching element Q2 and Q3 can be a metal oxide semiconductor device (M0S device), the common switching device Q2 is used to control the operation of the isolating switching device Q4 and Q5, and the common switching device Q3 is used to control the operation of the isolating switching device Q6 and Q7. As a result, the common-connected switching elements Q2 and Q3 are connected to the timing generating circuit 24, and are switched by the driving of the control signal so that the common-connecting switching elements Q2 and Q3 are controlled by the timing generating circuit 24. The high voltage DC is converted to a high voltage AC output. 13 200937829 In the present embodiment, the polarity control circuit 23 operates in the following manner: At time t1, the control signal outputted by the timing generating circuit 24 is a positive voltage, and the common-connected switching element Q2 is not turned on and the common-connecting switching element Q3 To be turned on, only the isolating switching elements Q6, Q7 of the isolating switching elements Q4, Q5, Q6, Q7 are turned on, so that the conduction of the isolating switching element Q6 causes the Vout-2 terminal to output DC + 125V, and the conduction through the isolating switching element Q7 The Vout-1 end is grounded. Then at time 12, the control signal of the timing generating circuit 24 outputs a zero voltage, which will cause the common-connected switching element Q2 to be turned on, and the common-connecting switching element Q3 is non-conductive, so that the isolating switching elements Q4, Q5, Q6, Q7 Only the isolating switching elements Q4, Q5 are turned on, so that the Vout-1 terminal outputs DC + 125V via the conduction of the isolating switching element Q4, and Vout-2 is grounded via the conduction of the isolating switching element Q4. So cyclically, Vout-1 and Vout-2 can output AC 250Vpp AC voltage at both ends. Further, the output frequency of the final output AC voltage can be changed by adjusting the output signal frequency of the timing generating circuit 24.
本案所揭露之電壓轉換器20係利用半導體之昇壓、 倍壓技術，將輸入直流電源昇壓並轉成交流電源。且本案 之電壓轉換器20所使用的標準昇壓晶片21隨著半導體技 術的發展，其輸出的第一直流電壓應可再提昇至DC +40V 或更高，而為了得到更高的輸出電壓，只要增加串聯倍壓 ^ 電壓組數即可。以此方式已可達到將輸入直流電壓由DC +5V昇壓至AC約400Vpp之交流輸出，而整個設計之電路 板板含零件厚度不到3mm。 14 200937829 綜上所述，本案之電壓轉換器係利用半導體昇壓、倍 壓技術，不使用變壓器而達到將直流電源昇壓並轉成交流 電源的目的，且只要依需要增加串聯的倍壓電路數，即可 輕易的將電壓從直流低壓昇壓至需要的交流高壓。是以， 本案之電壓轉換器極具產業之價值，爰依法提出申請。 本案得由熟知此技術之人士任施匠思而為諸般修 飾，然皆不脫如附申請專利範圍所欲保護者。The voltage converter 20 disclosed in the present invention boosts the input DC power source and converts it into an AC power source by using a boosting and voltage doubling technique of the semiconductor. Moreover, with the development of semiconductor technology, the standard booster chip 21 used in the voltage converter 20 of the present invention should be further boosted to DC +40V or higher, and in order to obtain a higher output voltage, Just increase the number of series voltages and voltage groups. In this way, an AC output that boosts the input DC voltage from DC +5V to AC of approximately 400Vpp is achieved, while the entire design of the board contains less than 3mm of part thickness. 14 200937829 In summary, the voltage converter of the present invention utilizes semiconductor boosting and voltage doubling technology to achieve the purpose of boosting the DC power supply and converting it into an AC power source without using a transformer, and adding a series doubling piezoelectric as needed. The number of channels can easily boost the voltage from DC low voltage to the required AC high voltage. Therefore, the voltage converter of this case is of great industrial value and is submitted in accordance with the law. This case has been modified by people who are familiar with the technology, but it is not intended to be protected by the scope of the patent application.
15 200937829 【圖式簡單說明】 第一圖：其係為習知電壓轉換器之電路結構示意圖。 第二圖：其係為本案較佳實施例之電壓轉換器之電路結構 示意圖。 【主要元件符號說明】 電壓轉換器：10 開關元件：12 電壓轉換器：20 放大電路：22 時序產生電路：24 電阻：Rl、R2 時序產生電路：11 昇壓電壓器：13 昇壓晶片· 21 極性控制電路：23 電感：L1 開關元件：Q1 電容·· Cl、C2、C3、C4、C5、C6、C7、C8、C9 倍壓電路：221、222、223、224 二極體：Dl、D2、D3、D4、D5、D6、D7、D8、D9 隔離開關元件：Q4、Q5、Q6、Q7 共接式開關元件：Q2、Q3 1615 200937829 [Simple description of the diagram] The first picture: it is a schematic diagram of the circuit structure of the conventional voltage converter. Second: It is a schematic diagram of the circuit structure of the voltage converter of the preferred embodiment of the present invention. [Main component symbol description] Voltage converter: 10 Switching component: 12 Voltage converter: 20 Amplifying circuit: 22 Timing generating circuit: 24 Resistor: Rl, R2 Timing generating circuit: 11 Boost voltage: 13 Boost chip · 21 Polarity control circuit: 23 Inductance: L1 Switching component: Q1 Capacitor · · Cl, C2, C3, C4, C5, C6, C7, C8, C9 voltage doubler circuit: 221, 222, 223, 224 diode: Dl, D2, D3, D4, D5, D6, D7, D8, D9 Isolation switch components: Q4, Q5, Q6, Q7 Commonly connected switching components: Q2, Q3 16