1358191 九、發明說明： 【發明所屬之技術領域】 本案係關於一種電壓轉換器，尤指一種將直流電壓昇 壓並轉換成交流電壓之電壓轉換器。 【先前技術】 隨著科技的進步，各類3C產品已被視為推動市場成 長的重要力量。無庸置疑的，這樣的發展趨勢仍將持續下 去，而且隨著微電子技術的進步，3C產品不但功能日趨複 雜，其尺寸亦漸趨於小型化，且可攜性也隨之大幅提高， 使用者因此可以方便輕鬆以3C產品處理各項事務。 而電腦、手機、數位相機等商品都可歸類為3C產品， 為了因應3C產品體積越做越小的趨勢，產品内部的組件 必須跟著小型化，尤其是用來將直流電壓（DC)昇壓並轉 換成交流電壓（AC)的電壓轉換器，才能達到產品小型化 的目的，以符合市場的需求。 請參閱第一圖，其係為習知電壓轉換器之電路結構示 意圖，如圖所示，習知電壓轉換器10係包含時序產生電 路11、複數個開關元件12、昇壓電壓器13、電容C1以及 電感L1，用以接收一直流電壓Vdc並昇壓轉換成為一交流 電壓Vac，至於習知電壓轉換器10的運作方式係為：接收 直流電壓Vdc，並利用時序產生電路11所輸出之控制信號 來控制複數個開關元件12的關閉及導通，將直流電壓 13,58191 且因應控制信號之控制將第二直流電壓轉換成輸出交流 電壓。 根據本案之構想，其中控制信號係為時脈信號。 根據本案之構想，其中倍壓電路係由複數個二極體及 電容所組成。 根據本案之構想，其中倍壓電路係由複數個二極體所 組成。 根據本案之構想，其中昇壓晶片係為直流-直流轉換 晶片。 根據本案之構想，其中第二直流電壓的大小係因應放 大電路中所包含倍壓電路的數量。 根據本案之構想，其中極性控制電路係由複數個隔離 開關元件及複數個共接式開關元件所組成。 根據本案之構想，其中隔離開關元件係為光耦開關元 件。 根據本案之構想，其中共接式開關元件係為金屬氧化 物半導體元件。 根據本案之構想，其中電壓轉換器更包含輸出電容， 其係與放大電路及極性控制電路連接，放大電路進行倍壓 處理後所產生之第二直流電壓係提供至輸出電容上輸出。 根據本案之構想，其中電壓轉換器更包含分壓電路， 其係與昇壓晶片連接，用以調整第一直流電壓之大小。 13,58191 . 【實施方式】 體現本案特徵與優點的一些典型實施例將在後段的 說明中詳細敘述。應理解的是本案能夠在不同的態樣上具 * 有各種的變化，其皆不脫離本案的範圍，且其中的說明及 圖示在本質上係當作說明之用，而非用以限制本案。 本案之電源轉換器係利用半導體昇壓、倍壓技術，不 使用變壓器而達到將直流電源昇壓並轉成交流電源的目 B 的，且只要依需要增加串聯的倍壓電路數，即可輕易的將 電壓從直流低壓昇壓至需要的直流高壓。 請參閱第二圖，其係為本案較佳實施例之電源轉換器 之電路結構示意圖。如第二圖所示，本案之電壓轉換器20 可由昇壓晶片21、放大電路22、極性控制電路23、時序 產生電路24、分壓電路25以及電感L1、二極體D1以及 電容Cl、C2，主要用來接收一輸入直流電壓Vin並昇壓轉 換成為一輸出交流電壓。 # 本案之昇壓晶片21可為一直流-直流轉換晶片（DC to DC Converter 1C)且其内部係包含有一開關元件Q1，利 用昇壓晶片21的過流飽和功能使得開關元件Q1可進行關 * 斷切換，於本實施例中，昇壓晶片21可使用美商二極體 公司（DIODES. Inc )所設計製造之具有關斷功能之編號 . AP34063晶片，但不此為限，任何具有同樣功能之晶片此 皆可併入參考。 昇壓晶片21的運作方式係接收該輸入直流電壓Vin， 1358191 藉由開關元件Q1的關斷切換以及電感L1.、二極體D1與電 容C1的配合而將輸入直流電壓Vin昇壓為一第一直流電 壓VI，最後將第一直流電壓VI加至電容C1上，至於，昇 壓完成之第一直流電壓VI可藉由與昇壓晶片21連接之分 壓電路25來調整最終加至電容C1上的直流電壓值，其中 分壓電路25可由電阻R1及電阻R2所構成。 舉例而言，於一些實施例中，輸入直流電壓Vin可介 於DC+3V〜+ 12V，昇壓晶片21加上電感L1、二極體D1、 電容Cl、C2後可將輸入直流電壓Vin昇壓至DC+30V的直 流電壓，並可藉由分壓電路25調整昇壓晶片21輸出為 DC+25，並將此電壓加至電容C1 (以下將以此數據作為說 明的例子）。 放大電路22係與二極體D1、電容C1及輸出電容C9 連接，放大電路22内部可包含至少一倍壓電路，主要因 應所串聯的倍壓電路數量，而將第一直流電壓VI從直流 低壓昇壓至需要的直流高壓，其運作方式係接收第一直流 電壓VI，並根據倍壓電路的數量對經過昇壓後之第一直流 電壓VI進行倍壓處理，以產生一第二直流電壓V2，並將 第二直流電壓V2加至電容C9上。 於本實施例中，放大電路22係包含4組倍壓電路221 〜224，且彼此之間係串聯連接，其中，倍壓電路221可 由電容C3、C4以及二極體D2、D3所構成，倍壓電路222 可由電容C5、C6以及二極體D4、D5所構成，倍壓電路223 可由電容C7、C8以及二極體D6、D7所構成，而倍壓電路 1358191 224則由二極體D8、D9所構成，倍麼電路221〜224依序 可將第一直流電壓VI倍壓至2倍、3倍、4倍及5倍，舉 例而言，當第一直流電壓VI為DC +25V時，倍壓電路 • 〜224可依序將電壓由DC +25V倍壓至DC +50V、DC +75V、 DC +100V、DC +125V ° 請再參閱第二圖’以下將說明放大電路22的倍壓運 作方式： 在時間T1時，畀壓晶片21内的開關元件Q1為導通， * 輸入直流電壓Vin經電感L1、開關元件Q1後接地，使得 電感L1内因電流流過而儲存能量，其兩端電壓為VL1。在 時間T2時開關元件Q1變為OFF狀態，於是輸入直流電壓 Vin加上電感L1兩端電壓VL1經過二極體D1而加在電容 C1上’利用電阻R1、電阻R2的適當調整，可在電容C1 得到所需的DC+25V。 在時間T3時’歼壓晶片21内開關元件Q1又變為導 鲁 通’此時除電感L1迴路重複上述充電狀態外，在電容ci 上的電能DC+25V經由二極體D2、電容C2、開關元件Q1 後接地，於是電容C2也被充電至DC+25V。在時間T4時開 關元件Q1為OFF狀態，於是電容C1又被充電至DC+25V。 而此同時，輸入直流電壓Vin加上VL1再加上電容C2上 之電壓總合可為DC+50V，DC+50V經過二極體D3後加在電 容C3及電容C1構成之串聯迴路上，於是電容C1、電容 C3都分別被充電至DC+25V。 在時間T5時，昇壓晶片21内開關元件以又變為導 11 13.58191 通，此時除電感L1迴路重複上述充電狀態外，在電容C3 加電容Cl的電壓為DC+50V，經由二極體D4、電容C4、電 容C2、開關元件Q1後接地，於是電容C2、電容C4都被 充電至DC+25V。在時間T6時開關元件Q1為OFF狀態，於 是電容C1又被充電至DC+25V，而此同時，輸入直流電壓 Vin加上VL1再加上電容C2、電容C4上之電壓總合為 DC+75V，經過二極體D5後加在電容C5、電容C3及電容 C1構成之串聯迴路上，於是電容C1、電容C3、電容C5都 分別被充電至DC+25V。 在時間T7時，昇壓晶片21内開關元件Q1又變為導 通，此時除電感L1迴路重複上述充電狀態外，在電容 C5+C3+C1的總和電壓為DC+75V，經由二極體D6、電容C6、 電容C4、電容C2、開關元件Q1後接地，於是電容C2、電 容C4、電容C6都分別被充電至DC+25V。在時間T8時開 關元件Q1為OFF狀態，於是電容C1又被充電至DC+25V。 而此同時，輸入直流電壓Vin加上VL1再加上電容C2、電 容C4、電容C6上之總合電壓為DC+100V，經過二極體D7 後加在電容C7、電容C5、電容C3及電容C1構成之串聯 迴路上，於是電容C1、電容C3、電容C5、電容C7都分別 被充電至DC+25V。 在時間T9時，昇壓晶片21内開關元件Q1又變為導 通，此時除電感L1迴路重複上述充電狀態外，在電容 C7+C5+C3+C1上的總和電壓為DC+100V，經由二極體D8、 電容C8、電容C6、電容C4、電容C2、開關元件Q1後接 y r*· \ .3 12 13.58191 地，於是電容C2、電容C4、電容C6、電容C8都分別被充 電至DC+25V。在時間T10時開關元件Q1為OFF狀態，於 是電容C1又被充電至DC+25V。而此同時，Vin加上VL1 再加上電容C2、電容C4、電容C6、電容C8之總合DC+125V， 經過二極體D9後加在輸出電容C9上，於是輸出電容C9 被充電至DC+125V，此為第二直流電壓之高壓輸出端點。 請再參閱第二圖，時序產生電路24係可調整頻率且 與極性控制電路23連接，用以接收輸入直流電壓Vin，主 要產生一控制信號，可為一時序信號（clock signal)， 用來控制極性控制電路23的運作。 極性控制電路係與輸出電容C9及時序產生電路24連 接，主要用來接收第二直流電壓V2及輸入直流電壓Vin， 且因應該控制信號之控制將第二直流電壓V2轉換成一輸 出交流電壓。 本案之極性控制電路23主要由隔離開關元件Q4〜Q7 及共接式開關元件Q2及Q3所組成，其中，隔離開關元件 Q4〜Q7可為光耦開關元件，而共接式開關元件Q2及Q3則 可為金屬氧化物半導體元件（M0S元件），共接式開關元件 Q2係用來控制隔離開關元件Q4及Q5運作，而共接式開關 元件Q3係用來控制隔離開關元件Q6及Q7運作，至於， 共接式開關元件Q2及Q3則與時序產生電路24連接，用 以因應控制信號的驅動來進行開關切換，使得共接式開關 元件Q2及Q3受時序產生電路24的控制而將高電壓直流 轉變成高電壓交流輸出。 / #» Λ ...Ο 13 13.58191 於本實施例中，極性控制電路23的運作方式係為： 在時間tl時，時序產生電路24輸出之控制信號為正電 壓，共接式開關元件Q2不導通而共接式開關元件Q3為導 通，使得隔離開關元件Q4、Q5、Q6、Q7中只有隔離開關 元件Q6、Q7導通，於是經由隔離開關元件Q6的導通使得 Vout-2端輸出DC+125V，而經由隔離開關元件Q7的導通 使得Vout-1端被接地。接著在時間t2時，時序產生電路 24之控制信號輸出為零電壓，將使得共接式開關元件Q2 導通，而共接式開關元件Q3為不導通，使得隔離開關元 件Q4、Q5、Q6、Q7中只有隔離開關元件Q4、Q5導通，於 是經由隔離開關元件Q4的導通使得Vout-Ι端輸出 DC+125V，經由隔離開關元件Q4的導通使得Vout-2被接 地。如此週而復始，Vout-1、Vout-2兩端即可輸出AC 250Vpp交流電壓。另外，更可藉由調整時序產生電路24 之輸出訊號頻率，即可變更最終輸出交流電壓的輸出頻 率0 本案所揭露之電壓轉換器20係利用半導體之昇壓、 倍壓技術，將輸入直流電源昇壓並轉成交流電源。且本案 之電壓轉換器20所使用的標準昇壓晶片21隨著半導體技 術的發展，其輸出的第一直流電壓應可再提昇至DC +40V 或更高，而為了得到更高的輸出電壓，只要增加串聯倍壓 電壓組數即可。以此方式已可達到將輸入直流電壓由DC +5V昇壓至AC約400Vpp之交流輸出，而整個設計之電路 板板含零件厚度不到3匪。 13.58191 綜上所述，本案之電壓轉換器係利用半導體昇壓、倍 壓技術，不使用變壓器而達到將直流電源昇壓並轉成交流 電源的目的，且只要依需要增加串聯的倍壓電路數，即可 輕易的將電壓從直流低壓昇壓至需要的交流高壓。是以， 本案之電壓轉換器極具產業之價值，爰依法提出申請。 本案得由熟知此技術之人士任施匠思而為諸般修 飾，然皆不脫如附申請專利範圍所欲保護者。1358191 IX. Description of the invention: [Technical field to which the invention pertains] The present invention relates to a voltage converter, and more particularly to a voltage converter that boosts a DC voltage and converts it into an AC voltage. [Prior Art] With the advancement of technology, various 3C products have been regarded as an important force to promote market growth. Undoubtedly, such development trend will continue, and with the advancement of microelectronics technology, 3C products are not only increasingly complex in function, but also their size is gradually becoming smaller, and the portability is also greatly improved. Therefore, it is easy to handle various matters with 3C products. Computers, mobile phones, digital cameras and other products can be classified as 3C products. In order to cope with the trend of 3C products becoming smaller and smaller, the internal components of the products must be miniaturized, especially for boosting DC voltage (DC). And the voltage converter that is converted into an alternating current voltage (AC) can achieve the purpose of miniaturization of the product to meet the needs of the market. Please refer to the first figure, which is a schematic diagram of a circuit structure of a conventional voltage converter. As shown, the conventional voltage converter 10 includes a timing generating circuit 11, a plurality of switching elements 12, a boosting voltage regulator 13, and a capacitor. C1 and the inductor L1 are configured to receive the DC voltage Vdc and boost the voltage into an AC voltage Vac. The conventional voltage converter 10 operates by receiving the DC voltage Vdc and controlling the output of the timing generating circuit 11. The signal controls the closing and conducting of the plurality of switching elements 12, and converts the DC voltage 13, 58191 and converts the second DC voltage into an output AC voltage according to the control of the control signal. According to the concept of the present case, the control signal is a clock signal. According to the concept of the present case, the voltage doubling circuit is composed of a plurality of diodes and capacitors. According to the concept of the present case, the voltage doubler circuit is composed of a plurality of diodes. According to the concept of the present invention, the booster chip is a DC-DC conversion chip. According to the concept of the present case, the magnitude of the second DC voltage is due to the number of voltage doubler circuits included in the amplifier. According to the concept of the present invention, the polarity control circuit is composed of a plurality of isolated switching elements and a plurality of common switching elements. According to the concept of the present invention, the isolating switching element is an optocoupler switching element. According to the concept of the present invention, the common-connecting switching element is a metal oxide semiconductor element. According to the concept of the present invention, the voltage converter further includes an output capacitor connected to the amplifying circuit and the polarity control circuit, and the second DC voltage generated by the amplifying circuit after the voltage multiplication process is provided to the output capacitor for output. According to the concept of the present invention, the voltage converter further includes a voltage dividing circuit connected to the boosting chip for adjusting the magnitude of the first DC voltage. 13,58191. [Embodiment] Some exemplary embodiments embodying the features and advantages of the present invention will be described in detail in the following description. It should be understood that the present invention is capable of various changes in various aspects, and does not depart from the scope of the present invention, and the description and illustration thereof are used in the nature of the description, rather than limiting the case. . The power converter of the present invention utilizes semiconductor boosting and voltage doubling technology to achieve the purpose of boosting the DC power supply and converting it into an AC power source without using a transformer, and it is easy to increase the number of voltage doubler circuits connected in series as needed. The voltage is boosted from DC low voltage to the required DC high voltage. Please refer to the second figure, which is a schematic diagram of the circuit structure of the power converter of the preferred embodiment of the present invention. As shown in the second figure, the voltage converter 20 of the present invention can be a booster chip 21, an amplifying circuit 22, a polarity control circuit 23, a timing generating circuit 24, a voltage dividing circuit 25, and an inductor L1, a diode D1, and a capacitor C1. C2 is mainly used for receiving an input DC voltage Vin and boosting and converting into an output AC voltage. # The booster chip 21 of the present invention may be a DC-DC converter (CDC to DC Converter 1C) and has a switching element Q1 inside thereof, and the switching element Q1 can be turned off by the overcurrent saturation function of the boosting chip 21* In this embodiment, the boosting chip 21 can use the number of the shutdown function designed and manufactured by DIODES. Inc. AP34063 chip, but not limited thereto, any of the same functions The wafers are hereby incorporated by reference. The operation mode of the boosting chip 21 is to receive the input DC voltage Vin, and the voltage of the input DC voltage Vin is boosted by the switching of the switching element Q1 and the matching of the inductor L1., the diode D1 and the capacitor C1. A DC voltage VI is finally applied to the capacitor C1. The first DC voltage VI that is boosted can be adjusted and finally applied to the capacitor by the voltage dividing circuit 25 connected to the boosting chip 21. The DC voltage value on C1, wherein the voltage dividing circuit 25 can be composed of a resistor R1 and a resistor R2. For example, in some embodiments, the input DC voltage Vin can be between DC+3V and +12V, and the boosting chip 21 plus the inductor L1, the diode D1, the capacitors C1, and C2 can increase the input DC voltage Vin. The DC voltage is applied to DC + 30 V, and the output of the booster chip 21 is adjusted to DC + 25 by the voltage dividing circuit 25, and this voltage is applied to the capacitor C1 (this data will be exemplified below). The amplifying circuit 22 is connected to the diode D1, the capacitor C1 and the output capacitor C9, and the amplifying circuit 22 can include at least one voltage doubler circuit, and the first DC voltage VI is mainly determined according to the number of voltage doubler circuits connected in series. The DC low voltage is boosted to the required DC high voltage, and the operation mode is to receive the first DC voltage VI, and double-pressurize the boosted first DC voltage VI according to the number of voltage doubler circuits to generate a second The DC voltage V2 is applied and the second DC voltage V2 is applied to the capacitor C9. In this embodiment, the amplifying circuit 22 includes four sets of voltage doubling circuits 221 to 224, and is connected in series with each other. The voltage doubling circuit 221 can be composed of capacitors C3 and C4 and diodes D2 and D3. The voltage doubler circuit 222 can be composed of capacitors C5 and C6 and diodes D4 and D5. The voltage doubler circuit 223 can be composed of capacitors C7 and C8 and diodes D6 and D7, and the voltage doubler circuit 1358191 224 is composed of The diodes D8 and D9 are formed, and the multiple circuits 221 to 224 sequentially press the first DC voltage VI to 2 times, 3 times, 4 times and 5 times, for example, when the first DC voltage VI is DC +25V, voltage doubler circuit • ~224 can sequentially voltage from DC +25V to DC +50V, DC +75V, DC +100V, DC +125V ° Please refer to the second figure 'The following will explain The voltage doubler operation mode of the amplifier circuit 22: At the time T1, the switching element Q1 in the stamped wafer 21 is turned on, * the input DC voltage Vin is grounded via the inductor L1 and the switching element Q1, so that the inductor L1 is stored by the current flowing. Energy, the voltage across it is VL1. At time T2, the switching element Q1 is turned off, so that the input DC voltage Vin is added and the voltage VL1 across the inductor L1 is applied to the capacitor C1 via the diode D1. 'The appropriate adjustment of the resistor R1 and the resistor R2 can be used in the capacitor. C1 gets the desired DC+25V. At time T3, the switching element Q1 in the chip 21 is turned into a turn-on pass. At this time, except for the above-mentioned state of charge except the inductor L1 loop, the electric energy DC+25V on the capacitor ci is via the diode D2 and the capacitor C2. After the switching element Q1 is grounded, the capacitor C2 is also charged to DC+25V. At time T4, switching element Q1 is in an OFF state, and capacitor C1 is again charged to DC + 25V. At the same time, the input DC voltage Vin plus VL1 plus the voltage on the capacitor C2 can be DC + 50V, DC + 50V after the diode D3 is added to the series circuit formed by the capacitor C3 and the capacitor C1, so Capacitor C1 and capacitor C3 are respectively charged to DC+25V. At time T5, the switching element in the boosting chip 21 becomes the conduction 11.3.5191, and then the voltage of the capacitor C1 is DC+50V in the capacitor C3, except that the inductor L1 loop repeats the above charging state, via the diode. D4, capacitor C4, capacitor C2, and switching element Q1 are grounded, so capacitor C2 and capacitor C4 are all charged to DC+25V. At time T6, the switching element Q1 is in an OFF state, so that the capacitor C1 is charged to DC+25V, and at the same time, the input DC voltage Vin plus VL1 plus the capacitance of the capacitor C2 and the capacitor C4 is DC+75V. After passing through the diode D5, it is applied to the series circuit formed by the capacitor C5, the capacitor C3 and the capacitor C1, so that the capacitor C1, the capacitor C3 and the capacitor C5 are respectively charged to DC+25V. At time T7, the switching element Q1 in the boosting chip 21 is turned on again. At this time, except that the inductor L1 loop repeats the above charging state, the sum voltage of the capacitor C5+C3+C1 is DC+75V, via the diode D6. The capacitor C6, the capacitor C4, the capacitor C2, and the switching element Q1 are grounded, so that the capacitor C2, the capacitor C4, and the capacitor C6 are respectively charged to DC+25V. At time T8, switching element Q1 is turned OFF, and capacitor C1 is again charged to DC + 25V. At the same time, the input DC voltage Vin plus VL1 plus the capacitor C2, capacitor C4, capacitor C6 on the total combined voltage is DC + 100V, after the diode D7 is added to the capacitor C7, capacitor C5, capacitor C3 and capacitor C1 constitutes a series circuit, so capacitor C1, capacitor C3, capacitor C5, and capacitor C7 are respectively charged to DC+25V. At time T9, the switching element Q1 in the boosting chip 21 is turned on again. At this time, the sum voltage on the capacitor C7+C5+C3+C1 is DC+100V except that the inductor L1 loop repeats the above charging state. Pole body D8, capacitor C8, capacitor C6, capacitor C4, capacitor C2, switching element Q1 are connected to yr*· \ .3 12 13.58191 ground, then capacitor C2, capacitor C4, capacitor C6, capacitor C8 are respectively charged to DC+ 25V. At time T10, switching element Q1 is turned off, and capacitor C1 is again charged to DC + 25V. At the same time, Vin plus VL1 plus capacitor C2, capacitor C4, capacitor C6, capacitor C8 total DC + 125V, after the diode D9 is added to the output capacitor C9, so the output capacitor C9 is charged to DC +125V, this is the high voltage output terminal of the second DC voltage. Referring to the second figure, the timing generating circuit 24 is adjustable in frequency and connected to the polarity control circuit 23 for receiving the input DC voltage Vin, and mainly generates a control signal, which can be a clock signal for controlling The operation of the polarity control circuit 23. The polarity control circuit is connected to the output capacitor C9 and the timing generating circuit 24, and is mainly used for receiving the second DC voltage V2 and the input DC voltage Vin, and converting the second DC voltage V2 into an output AC voltage according to the control of the control signal. The polarity control circuit 23 of the present invention is mainly composed of the isolating switching elements Q4 Q Q7 and the common switching elements Q2 and Q3, wherein the isolating switching elements Q4 Q Q7 can be optocoupler switching elements, and the common switching elements Q2 and Q3 The metal oxide semiconductor device (M0S device), the common switching device Q2 is used to control the operation of the isolating switching device Q4 and Q5, and the common switching device Q3 is used to control the operation of the isolating switching device Q6 and Q7. As a matter of course, the common-connected switching elements Q2 and Q3 are connected to the timing generating circuit 24 for switching switching in response to driving of the control signal, so that the common-connecting switching elements Q2 and Q3 are controlled by the timing generating circuit 24 to apply a high voltage. The DC is converted to a high voltage AC output. / #» Λ ... Ο 13 13.58191 In the present embodiment, the polarity control circuit 23 operates in the following manner: At time t1, the control signal outputted by the timing generating circuit 24 is a positive voltage, and the common-connected switching element Q2 does not. The common-connected switching element Q3 is turned on, so that only the isolated switching elements Q6, Q7 of the isolated switching elements Q4, Q5, Q6, and Q7 are turned on, so that the Vout-2 terminal outputs DC+125V through the conduction of the isolating switching element Q6. The conduction of the isolation switching element Q7 causes the Vout-1 terminal to be grounded. Then at time t2, the control signal of the timing generating circuit 24 outputs a zero voltage, which causes the common-connected switching element Q2 to be turned on, and the common-connecting switching element Q3 is turned off, so that the isolating switching elements Q4, Q5, Q6, Q7 Only the isolating switching elements Q4, Q5 are turned on, so that the Vout-Ι terminal outputs DC+125V via the conduction of the isolating switching element Q4, and Vout-2 is grounded via the conduction of the isolating switching element Q4. So cyclically, Vout-1 and Vout-2 can output AC 250Vpp AC voltage at both ends. In addition, the output frequency of the final output AC voltage can be changed by adjusting the output signal frequency of the timing generating circuit 24. The voltage converter 20 disclosed in the present invention uses a semiconductor boosting and voltage doubling technique to input an input DC power source. Boost and convert to AC power. Moreover, with the development of semiconductor technology, the standard booster chip 21 used in the voltage converter 20 of the present invention should be further boosted to DC +40V or higher, and in order to obtain a higher output voltage, Just increase the number of series voltage doubler voltage groups. In this way, an AC output that boosts the input DC voltage from DC +5V to AC of approximately 400Vpp is achieved, while the entire design of the board contains less than 3 parts of thickness. 13.58191 In summary, the voltage converter of the present invention utilizes semiconductor boosting and voltage doubling technology to achieve the purpose of boosting the DC power supply and converting it into an AC power source without using a transformer, and increasing the number of voltage doubler circuits connected in series as needed. , you can easily boost the voltage from DC low voltage to the required AC high voltage. Therefore, the voltage converter of this case is of great industrial value and is submitted in accordance with the law. This case has been modified by people who are familiar with the technology, but it is not intended to be protected by the scope of the patent application.
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