TW200929365A - Method of manufacturing semiconductor substrate - Google Patents

Method of manufacturing semiconductor substrate Download PDF

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Publication number
TW200929365A
TW200929365A TW097147315A TW97147315A TW200929365A TW 200929365 A TW200929365 A TW 200929365A TW 097147315 A TW097147315 A TW 097147315A TW 97147315 A TW97147315 A TW 97147315A TW 200929365 A TW200929365 A TW 200929365A
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TW
Taiwan
Prior art keywords
layer
carbon
buffer layer
ruthenium
semiconductor substrate
Prior art date
Application number
TW097147315A
Other languages
Chinese (zh)
Inventor
Keisuke Kawamura
Seiji Takayama
Brian Murphy
Original Assignee
Siltronic Ag
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Publication date
Application filed by Siltronic Ag filed Critical Siltronic Ag
Publication of TW200929365A publication Critical patent/TW200929365A/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002Preparing wafers

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Toxicology (AREA)
  • Health & Medical Sciences (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

To provide a method of manufacturing a SiC wafer having a single crystal silicon carbide layer of surface roughness 0. 5nm (RMS) or below without carrying out a CMP process. A buffer layer 2 is formed on the surface of a silicon substrate 1 (S1). Carbon ions are implanted via the buffer layer 2, and thereby a carbon containing layer 3 in which silicon and carbon are mixed is formed in the silicon substrate 1 (S2). The buffer layer 2 is selectively removed from the silicon substrate 1 and thereby the carbon containing layer 3 is exposed (S3). The silicon substrate 1 is heat treated and the carbon containing layer 3 is single crystallized and thereby a single crystal silicon carbide layer 4 is formed (S4). An oxide layer 5 that is formed on the surface of the single crystal silicon carbide layer 4 in the course of the heat treatment is removed and thereby the single crystal silicon carbide layer 4 is exposed (S5).

Description

200929365 六、發明說明: 【發明所屬之技術領域】 本發明關於一種製造半導體基材之方法,該半導體基材係適用 於製造功率裝置和光電裝置,且本發明尤其關於一種製造表面部 分係由單晶碳化矽層製成之半導體基材之方法。 【先前技術】 具有南肖特基勢壘(Schottky barrier )、高電崩潰場強度和高熱 傳導性的碳化矽係適用於功率裝置用的材料。此外,碳化矽的晶 格常數係接近於作為典型光電半導體材料之氮化物半導體的晶格 常數’並且能夠磊晶生長含少量缺陷的氮化物半導體,因此適用 於光電裝置用的材料。在此情況下,開發出一種製造在矽基材表 面部分上具有單晶碳化矽層之半導體基材(下文稱為「Sic晶圓」) 的技術(專利文獻1至8,非專利文獻丨)。 第5圖所示為一根據先前技術製造SiC晶圓之方法的實施例。 該製造方法包括:將碳離子植入一矽基材内並由此形成一混有矽 與碳之含碳層的步驟(S11),將矽基材退火和使含碳層單晶化並 由此形成一單晶碳化矽層的步驟(S12),將矽基材在乾燥的氧氣 氛圍中加熱並在單晶碳化矽層上形成一犧牲層的步驟(S13),通 過蝕刻從矽基材選擇性除去犧牲層並由此暴露含碳層的步騍 (S14),以及通過CMp (化學機械拋光)將已暴露之單晶碳化矽 層的表面光滑化的步驟(S15)。 【專利文獻1】US 2007/176210 A1 【專利文獻2】曰本專利申請特許公開第2〇〇6_327931號 【專利文獻3】US 2006/267024 A1 200929365 【專利文獻4】曰本專利申請國家公開(特許公開)第 2005-506699 號 【專利文獻5】 【專利文獻6】 【專利文獻7】 【專利文獻8】 US 2004/0248390 A1 WO 03/034485 WO 03/071588 US 2005/0020084 A1200929365 VI. Description of the Invention: [Technical Field] The present invention relates to a method of fabricating a semiconductor substrate suitable for use in the manufacture of power devices and optoelectronic devices, and in particular to a method of fabricating a surface portion A method of crystallizing a semiconductor substrate made of a tantalum layer. [Prior Art] A tantalum carbide having a south Schottky barrier, a high electric breakdown field strength, and a high thermal conductivity is suitable for a material for a power device. Further, the lattice constant of tantalum carbide is close to the lattice constant ' of the nitride semiconductor which is a typical photovoltaic semiconductor material and can epitaxially grow a nitride semiconductor containing a small amount of defects, and thus is suitable for a material for photovoltaic devices. In this case, a technique of manufacturing a semiconductor substrate (hereinafter referred to as "Sic wafer") having a single crystal yttrium carbide layer on the surface portion of the ruthenium substrate has been developed (Patent Documents 1 to 8, Non-Patent Document 丨). . Figure 5 shows an embodiment of a method of fabricating a SiC wafer in accordance with the prior art. The manufacturing method includes the steps of: implanting carbon ions into a tantalum substrate and thereby forming a carbon-containing layer mixed with tantalum and carbon (S11), annealing the tantalum substrate, and single-crystallizing the carbon-containing layer by The step of forming a monocrystalline niobium carbide layer (S12), heating the tantalum substrate in a dry oxygen atmosphere and forming a sacrificial layer on the monocrystalline niobium carbide layer (S13), selecting from the tantalum substrate by etching The step of removing the sacrificial layer and thereby exposing the carbon-containing layer (S14), and the step of smoothing the surface of the exposed monocrystalline niobium carbide layer by CMp (chemical mechanical polishing) (S15). [Patent Document 1] US 2007/176210 A1 [Patent Document 2] Japanese Patent Application Laid-Open No. Hei. No. 2-327931 [Patent Document 3] US 2006/267024 A1 200929365 [Patent Document 4] Patent Publication No. 2005-506699 [Patent Document 5] [Patent Document 6] [Patent Document 7] [Patent Document 8] US 2004/0248390 A1 WO 03/034485 WO 03/071588 US 2005/0020084 A1

【專利文獻9】曰本專利申請特許公開第2006-528423號 【專利文獻10】US 7060620 B2 【非專利文獻 1 】“Organometallic vapor phase epitaxial growth of GaN on a 3c-SiC/Si (111) template formed by C+-ion implantation into Si(l 11) subs”,A. Yamamoto et al” Journal of Crystal Growth 261 (2004) 266-270。 【發明内容】 [本發明解決的問題] 在上述的先前技術中,在退火程序之後,在單晶碳化石夕層的上 © 層部分之上形成一由多晶碳化碎顆粒和Si晶體構成之厚度約為40 奈米的過渡層。因為該過渡層在平面方向上不均勻,所以在第5 圖中通過蝕刻暴露出含碳層的步驟(S14)之後表面粗糙度為2奈 米或更大(在10微米X10微米之面積内的RMS,下文稱為rms)d 因此’為了使通過钱刻暴露之單晶碳切層的表面粗糙度小於或 等於0.5 ♦米(RMS)(此係蟲晶生長所需的表面粗糖度),不可或 缺者係為進一步實錢過CMP程序將已暴露之單晶破化石夕層的表 面光滑化的步驟(S15)» 5 200929365 然而,該CMP程序具有以下問題》由於經拋光之SiC表面的化 學反應較矽晶體為慢,通過CMP程序之SiC除去速率約為每小時 10奈米,這嚴重較每分鐘50奈米之矽除去速率為慢,並因此需要 數小時以拋光SiC。此外,SiC的機械硬度極高,且使用鑽石磨料 或者用於矽的磨料可能只會導致拋光缺陷。因此在拋光sic時, 必需使用非常特殊的磨料,例如膠體二氧化矽顆粒(專利文獻9 至10)。因此,SiC的CMP程序存在許多困難,且若能夠省略或 減少該CMP程序(S15),則可以大幅減少製造sic晶圓所需的成 本和時間。 因此’本發明之-個目的係提供—種在未實施⑽程序的情況 下製造-具有表面粗縫度小於或等於〇 5奈米⑽s)之單晶碳化 石夕層的SiC晶圓的方法。本發明之另—個目的係提供—種通過僅 實施極小幅度的CMP程相製造—具有與si晶㈣乎相同水準 的極小表面機度(約為G.2奈米觸)之⑽晶圓的方法。 根據本申請案的本發明係包括以下⑴至(13)方面。 (1) 一種製造沉晶圓之方法,其包括以下相繼實施的步驟: 在-石夕基材之表面上形成—緩衝層的步驟; 將碳離子經由該緩衝層植入該石夕基材内,並由此形成—混有石夕 與碳之含碳層的步驟; 從該石夕基材選擇性除去該緩衝層,並由此暴露該含碳層的步 驟;以及 熱處理該秒基材並使該含碳層 矽層的步驟。 單晶化’並由此形成一單晶碳化 200929365 (2) 根據(1)之製造SiC晶圓之方法,其中該熱處理之氛圍 是非氧化性氛圍。 (3) 根據(1)之製造SiC晶圓之方法,其中該熱處理之氛圍 包含氧氣,並在該熱處理之後,將一在該熱處理期間在該單晶碳 化矽層之表面上所形成的氧化物層除去,並從而暴露該單晶碳化 ί夕層。 ' (4) 一種製造SiC晶圓之方法,其包括以下相繼實施的步驟: 在一矽基材之表面上形成一緩衝層的步驟; 將碳離子經由該緩衝層植入該矽基材内,並由此形成一混有矽 與碳之含碳層的步驟; 熱處理該矽基材並使該含碳層單晶化並由此形成一單晶碳化矽 層的步驟;以及 從該矽基材選擇性除去該緩衝層並由此暴露該單晶碳化矽層的 步驟。 (5) 根據(1)至(4)之任一之製造SiC晶圓之方法,其中該 φ 緩衝層係通過氣相蝕刻或液相蝕刻而被選擇性除去。 (6) 根據(5)之製造SiC晶圓之方法,其中該緩衝層係由氧 化矽、氮化矽或其組合所構成。 (7) 根據(1)至(6)之任一之製造SiC晶圓之方法,其中恰 在植入碳離子之後調節離子植入條件,使得在該含碳層與該緩衝 層間的介面中含碳層側的碳原子濃度應為15原子%或更高,且在 該矽基材中之碳原子濃度的最大值應為55原子%或更低。 200929365 (8) 根據(7)之製造SiC晶圓之方法,其中該離子植入條件 之調節係考慮該緩衝層的厚度、碳離子的植入能量和碳離子的植 入量之任意者。 (9) 根據(7)或(8)之製造SiC晶圓之方法,其中在該含碳 層與該緩衝層間的介面中含碳層側的碳原子濃度為25原子%或更 兩。 (10) 根據(1)至(9)之任一之製造Sic晶圓之方法,其中 係在將該矽基材加熱至大於或等於4〇〇°C且小於或等於1〇〇〇。〇的 溫度的狀態下進行碳離子的植入° (11) 根據(1)至(10)之任一之製造Sic晶囫之方法,其中 該熱處理的溫度係大於或等於n〇〇°c且低於矽的炫點。 (12) 根據(11)之製造SiC晶圓之方法’其中該熱處理的溫 度係大於或等於1200°C且低於矽的熔點。 其中該熱處理的溫 (13)根據(12)之製造SiC晶圓之方法, 度係大於或等於1300°C且低於矽的熔點。 [本發明的效果] 根據本發明,可以在未實施CMP程序的情死下製i 粗糙度小於或等於0.5奈米(RMS)之單晶碳化發二面 因此可以大幅減少製造SiC晶圓所需的成本和時間。或者=以通 過僅實施極小幅度的CMP程序以製造—具有與⑴晶圓幾乎相同 水準的極小表面粗較度(約0.2奈米(Rms))之si(:晶圓。 【實施方式】 [實施本發明之最佳模式] 200929365 以下闡述本發明之例示性實施態樣。 [第一例示性實施態樣] 第1圖為一程序圖’顯示本發明製造方法中的一系列程序。第2 圖為一對應於第1圖的流程圖。 此一製造方法是-種製造Sic晶BMG之方法,其包括以下相繼 實施的步驟: 在矽基材1之表面上形成緩衝層2的步驟Sl . ❹ 將碳離子經由緩衝層2植入石夕基材i内,並由此形成混切與 碳之含碳層3的步驟S2; 、 從石夕基材i選擇性除去緩衝層2,並由此暴露含碳層3 S3 ; ^ 熱處理石夕基材i並使含碳層3單晶化,並由此形成單晶碳化石夕 層4的步驟S4 ;以及 除去在熱處理期間在單晶碳化㈣4之表面上形成的氧化物層 5 ’並由此暴露單晶碳化矽層4的步驟S5。 © 在步驟S1中’在⑦基材1之表層部分上形成由氧切(Si〇2)、 氮化矽(Sl3N4 ’ SiN)或其組合構成的緩衝層2。緩衝層2係藉由 例如在約1000。〇下將矽基材1乾氧化或濕氧化而形成的。或者, 係藉由採用化學氣相沉積(CVD)而在矽基材1上形成。或者, 係籍由乾氧化、濕氧化和CVD的組合而形成。此外,緩衝層2可 以藉由使用其他固體材料來形成,該固體材料能夠自矽基材丨選 擇陡除去並具有與氧化石夕或氮化石夕相同的财熱性。例如在採用100 9 200929365 至200 keV作為碳離子之植入能量的情況下,緩衝層2的厚度係 選自約200奈米至6〇〇奈米之值。 在步驟S2中,恰在植人雜子之後調節離子植人條件使得含 碳層3 (石夕與碳混合的區域)與緩衝廣2間的介面(以下稱為「緩 =2與含韻3时面」)巾(在含碳層3側)㈣原子漠度, = :_s二中在含碳層3上端處的碳原子濃度,應為Η 或更並^ 3中碳原子濃度的最大值應為55原子% 或更低,並實施碳離子的植入。 使緩衝層2與含碳層3的介面中 度為15原子%或更高,對 層3側)的碳原子濃 的。若在緩衝層2與含碳層介料面粗糙度是極其重要 子濃度下降至低於15原子%,則在面中(在含碳層3側)的碳原 上層部分上,會開始出現一+ >退火後,在單晶碳化矽層4之 渡層,並損害所有程序完成難和Si晶體構成的過 衝層2與含碳層3的介面中(在含:粗糙度。另-方面,若使緩 原子%或更高,則過渡層會消失,並 側)的碳原子濃度為15 更佳地,為了穩定地實現較佳=可以實現較佳的表面粗糙度。 碳層3的介面中(在含碳層3 Μ糙度,使緩衝層2與含 高係所欲者。 、碳原子濃度為25原子或更 使含碳層3中的碳原子濃度的 持單晶碳切層4的晶態特性 值為55原子%或更低對於保 原子漠度的最大值超過55原^ /、重要的。若含碳層3中的碳 4中出現由超細碳顆粒構成的缺==在退火後’在單晶碳切層 的缺陷’麵害了單晶碳切層4的晶 200929365 態特性。另一方面’若使含碳層3中的碳原子濃度的最大值為55 原子❶/。或更低,則可以避免出現碳顆粒。 更佳地,為了穩定地避免碳顆粒,使含碳層3中的碳原子濃度 的最大值為50原子%或更低係所欲者。 在將矽基材加熱至大於或等於400。(:之溫度的狀態下實施碳離 子的植入係所欲者。若將基材加熱溫度下降至低於4〇〇°C,則在植 入後,會使含碳層3結構化之單晶碳化矽顆粒的方向變歪,並且 φ 在退火後,會損害單晶碳化矽層4的晶態特性,而在最壞的情況 下,該層可能會變為多晶層或非晶層。 更佳地,為了進一步提尚單晶碳化矽層4的晶態特性,在將矽 基材加熱至大於或等於5GGC之溫度的狀態下實施碳離子的植入 係所欲者。 在將石夕基材加熱至小於或等於⑽代之溫度的狀態下,實施碳 離子的植人係所欲者。若基材加熱溫度上升至超過丨_1,則在 〇 植入後’將含碳層3結構化的單晶碳切顆粒會樹枝狀地融合, 並且在退火後,喪失了單晶碳切層4的極高精確度和均句性。 更佳地,為了進-步提高單晶碳化石夕層4之極高精確度和均句 性’在將絲材加熱至大於或等於奪c之溫度的狀態下實施碳離 子的植入係為所欲者》 同時,根據緩衝層2的厚度,通過調節碳離子的植人能量和 離子的植入量來調節離子植入條件。 200929365 例如在缓衝層2的厚度為400奈米至550奈米的情況下,將碳 離子的植入能量設定為大約180 keV,且碳離子的植入量為每平方 公分7 X 1017至8 X 1〇17係合適的。 在步驟S3中,對緩衝層2實施液相蝕刻,並由此選擇性地僅除 去緩衝層2。在緩衝層2為氧化物的情況下,可以使用稀的氫氟酸 或氟化銨等作為液相蝕刻劑。在緩衝層2為氮化物的情況下,可 以使用熱的填酸等作為液相钱刻劑。 在步驟S4中,在包含約〇.5體積%氧氣的氬氣氛圍中在大於或 等於llGGt:且低於雜㈣溫度下對絲材丨實施熱處理。該熱 處理所需時_為1G小時。為了進—步改善表面粗糙度,在大於 或等於1200C ’且更在大於或等於13〇(rc下在低於石夕溶點的溫度 範圍内進賴纽軸欲者1為在含韻3崎單晶化的期間 内’含碳層3中的·㈣移至表面,所以在單晶碳糾層4中 最終形成的氧含量極低。 在步驟S5中[Patent Document 9] Japanese Patent Application Laid-Open No. 2006-528423 [Patent Document 10] US 7060620 B2 [Non-Patent Document 1] "Organometallic vapor phase epitaxial growth of GaN on a 3c-SiC/Si (111) By C+-ion implantation into Si(l 11) subs", A. Yamamoto et al" Journal of Crystal Growth 261 (2004) 266-270. [Problems to be Solved by the Invention] In the above prior art, After the annealing process, a transition layer having a thickness of about 40 nm composed of polycrystalline carbonized particles and Si crystals is formed on the upper layer portion of the monocrystalline carbonized carbide layer because the transition layer is in the planar direction. Non-uniform, so the surface roughness after the step (S14) of exposing the carbon-containing layer by etching in FIG. 5 is 2 nm or more (RMS in an area of 10 μm×10 μm, hereinafter referred to as rms) d Therefore, in order to make the surface roughness of the single crystal carbon cut layer exposed by the money less than or equal to 0.5 ♦ m (RMS) (the surface roughness required for the growth of the worm crystal), the indispensable person is further real money. Over CMP program will have been violent Step of Smoothing Surface of Single Crystal Breaking Stone Layer (S15) » 5 200929365 However, the CMP procedure has the following problem: Since the chemical reaction of the polished SiC surface is slower than that of the germanium crystal, the SiC removal rate by the CMP program It is about 10 nm per hour, which is much slower than the 50 nm per minute removal rate, and therefore it takes several hours to polish SiC. In addition, SiC has extremely high mechanical hardness and uses diamond abrasive or enamel. Abrasives may only cause polishing defects. Therefore, when polishing sic, it is necessary to use very special abrasives, such as colloidal cerium oxide particles (Patent Documents 9 to 10). Therefore, CMP CMP procedures have many difficulties, and if they can be omitted or By reducing the CMP process (S15), the cost and time required to manufacture the sic wafer can be greatly reduced. Therefore, the object of the present invention is to provide a surface roughing degree without performing the (10) procedure. A method of SiC wafers of less than or equal to 5 nanometers (10) s of monocrystalline carbonized stone layers. Another object of the present invention is to provide a CMP process by performing only a very small amplitude Method of manufacturing (10) wafer having a very small surface degree (about G. 2 nanometer touch) of the same level as si crystal (four). The invention according to the present application includes the following aspects (1) to (13). 1) A method of manufacturing a sink wafer, comprising the steps of: sequentially forming a buffer layer on a surface of a stone substrate; implanting carbon ions into the stone substrate via the buffer layer, And thereby forming a step of mixing the carbonaceous layer of the stone and the carbon; selectively removing the buffer layer from the stone substrate and thereby exposing the carbon layer; and heat treating the second substrate The step of the carbon layer layer. Single crystalization' and thereby forming a single crystal carbonization 200929365 (2) The method for producing a SiC wafer according to (1), wherein the atmosphere of the heat treatment is a non-oxidizing atmosphere. (3) The method of producing a SiC wafer according to (1), wherein the atmosphere of the heat treatment contains oxygen, and after the heat treatment, an oxide formed on the surface of the single crystal yttrium carbide layer during the heat treatment The layer is removed and thereby exposes the single crystal carbonized layer. (4) A method of fabricating a SiC wafer, comprising the steps of: sequentially forming a buffer layer on a surface of a substrate; implanting carbon ions into the germanium substrate via the buffer layer, And forming a carbon-containing layer mixed with tantalum and carbon; a step of heat-treating the tantalum substrate and single-crystallizing the carbon-containing layer and thereby forming a monocrystalline niobium carbide layer; and from the tantalum substrate The step of selectively removing the buffer layer and thereby exposing the monocrystalline niobium carbide layer. (5) The method of producing a SiC wafer according to any one of (1) to (4), wherein the φ buffer layer is selectively removed by vapor phase etching or liquid phase etching. (6) The method of producing a SiC wafer according to (5), wherein the buffer layer is composed of cerium oxide, cerium nitride or a combination thereof. (7) The method of producing a SiC wafer according to any one of (1) to (6), wherein the ion implantation conditions are adjusted just after the implantation of the carbon ions, so that the interface between the carbon-containing layer and the buffer layer is included The carbon atom concentration on the carbon layer side should be 15 atom% or more, and the maximum value of the carbon atom concentration in the tantalum substrate should be 55 atom% or less. (2) The method of manufacturing a SiC wafer according to (7), wherein the ion implantation condition is adjusted by any one of a thickness of the buffer layer, an implantation energy of carbon ions, and a implantation amount of carbon ions. (9) A method of producing a SiC wafer according to (7) or (8), wherein a carbon atom concentration on the side of the carbon-containing layer in the interface between the carbon-containing layer and the buffer layer is 25 atom% or more. (10) A method of producing a Sic wafer according to any one of (1) to (9), wherein the ruthenium substrate is heated to be greater than or equal to 4 〇〇 ° C and less than or equal to 1 〇〇〇. The method of manufacturing a Sic crystal according to any one of (1) to (10), wherein the temperature of the heat treatment is greater than or equal to n〇〇°c and Below the sly highlights. (12) A method of producing a SiC wafer according to (11) wherein the temperature of the heat treatment is greater than or equal to 1200 ° C and lower than the melting point of ruthenium. Wherein the temperature of the heat treatment (13) is a method for producing a SiC wafer according to (12), the degree being greater than or equal to 1300 ° C and lower than the melting point of ruthenium. [Effects of the Invention] According to the present invention, it is possible to produce a single crystal carbonization surface having an i-roughness of 0.5 nm or less (RMS) without performing a CMP process, thereby greatly reducing the need for manufacturing a SiC wafer. Cost and time. Or = manufactured by performing only a very small CMP procedure - si with a very small surface roughness (about 0.2 nm (Rms)) of almost the same level as the (1) wafer (embodiment) [embodiment] BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, an exemplary embodiment of the present invention will be described. [First Exemplary Embodiment] FIG. 1 is a sequence diagram showing a series of programs in the manufacturing method of the present invention. This is a flow chart corresponding to Fig. 1. This manufacturing method is a method of manufacturing Sic crystal BMG, which comprises the following steps of successively performing: Step S1 of forming buffer layer 2 on the surface of tantalum substrate 1. The carbon ions are implanted into the stone substrate i via the buffer layer 2, thereby forming a step S2 of mixing and carbon-containing carbon layer 3; and selectively removing the buffer layer 2 from the stone substrate i, and thereby Exposing the carbon-containing layer 3 S3 ; ^ heat-treating the stone substrate i and monocrystalline the carbon-containing layer 3, and thereby forming the step S4 of the monocrystalline carbonized stone layer 4; and removing the single-crystal carbonization during the heat treatment (4) The step of forming the oxide layer 5' on the surface and thereby exposing the monocrystalline carbonized germanium layer 4 Step S5. © In step S1, a buffer layer 2 composed of oxygen cut (Si〇2), tantalum nitride (Sl3N4 'SiN) or a combination thereof is formed on the surface layer portion of the 7 substrate 1. The buffer layer 2 is borrowed. The ruthenium substrate 1 is formed by dry oxidation or wet oxidation, for example, at about 1000 Torr. Alternatively, it is formed on the ruthenium substrate 1 by chemical vapor deposition (CVD). A combination of oxidation, wet oxidation, and CVD is formed. Further, the buffer layer 2 can be formed by using other solid materials that can be selected to be steeply removed from the tantalum substrate and have the same properties as the ore oxide or the nitrite For example, in the case of using 100 9 200929365 to 200 keV as the implantation energy of carbon ions, the thickness of the buffer layer 2 is selected from a value of about 200 nm to 6 nm. In step S2, After irrigating the seeds, the ion implantation conditions are adjusted so that the carbon-containing layer 3 (the region mixed with the stone and the carbon) and the buffered interface (hereinafter referred to as "the slow = 2 and the rhyme 3 surface") ( On the side of the carbonaceous layer 3) (4) Atomic inversion, = :_s II, the carbon atom at the upper end of the carbonaceous layer 3 is concentrated The maximum value of the carbon atom concentration in Η or ^3 should be 55 atom% or less, and the implantation of carbon ions is carried out. The medium of the buffer layer 2 and the carbon-containing layer 3 is 15 atom%. Or higher, on the side of layer 3) carbon atoms are concentrated. If the surface roughness of the buffer layer 2 and the carbonaceous layer is extremely important, the sub-concentration drops to less than 15 atomic %, and then a portion of the carbon layer in the surface (on the side of the carbon-containing layer 3) begins to appear. + > After annealing, in the layer of the monocrystalline niobium carbide layer 4, and impairing all the procedures to complete the hard and Si crystal composed of the interface between the overburden layer 2 and the carbonaceous layer 3 (in the inclusion: roughness. If the slow atomic % or higher is used, the transition layer disappears, and the side has a carbon atom concentration of 15 or more. In order to stably achieve better = a preferable surface roughness can be achieved. In the interface of the carbon layer 3 (in the carbon layer 3, the roughness is such that the buffer layer 2 and the high-content system are desired. The carbon atom concentration is 25 atoms or more, and the carbon atom concentration in the carbon-containing layer 3 is maintained. The crystalline characteristic value of the crystalline carbon cut layer 4 is 55 atom% or less. It is important that the maximum value of the atomic preservative moisture exceeds 55 Å. If the carbon 4 in the carbon-containing layer 3 appears to be composed of ultrafine carbon particles. The defect of the composition == after the annealing, the 'defect in the single-crystal carbon cut layer' damages the crystal 200929365 state characteristic of the single-crystal carbon cut layer 4. On the other hand, 'if the carbon atom concentration in the carbon-containing layer 3 is the largest A value of 55 atomic ❶ /. or lower can avoid the occurrence of carbon particles. More preferably, in order to stably avoid carbon particles, the maximum concentration of carbon atoms in the carbon-containing layer 3 is 50 atom% or less. If you want to heat the tantalum substrate to a temperature greater than or equal to 400. (In the state of temperature, the implantation of carbon ions is performed. If the substrate heating temperature is lowered to less than 4 °C, Then, after implantation, the direction of the monocrystalline niobium carbide particles structured with the carbon layer 3 is changed, and φ damages the monocrystalline carbon after annealing. The crystalline state of the ruthenium layer 4, and in the worst case, the layer may become a polycrystalline layer or an amorphous layer. More preferably, in order to further improve the crystalline state of the single crystal yttrium carbide layer 4, The carbon ion implantation is carried out in a state where the ruthenium substrate is heated to a temperature greater than or equal to 5 GGC. The carbon ion is carried out in a state where the shier substrate is heated to a temperature less than or equal to (10). If the heating temperature of the substrate rises above 丨_1, the single-crystal carbon-cut particles structured with the carbon-containing layer 3 will be dendritic after the implantation of the crucible, and after annealing, The extremely high precision and uniformity of the single crystal carbon cut layer 4 are lost. More preferably, in order to further improve the extremely high precision and uniformity of the single crystal carbonized stone layer 4, the wire is heated to The implantation of carbon ions is performed at a temperature greater than or equal to the temperature of the c. At the same time, according to the thickness of the buffer layer 2, the ion implantation is adjusted by adjusting the implantation energy of the carbon ions and the implantation amount of the ions. Condition 200929365 For example, in the case where the thickness of the buffer layer 2 is 400 nm to 550 nm, The implantation energy of the carbon ions is set to about 180 keV, and the implantation amount of the carbon ions is suitably 7 x 1017 to 8 X 1 〇 17 per square centimeter. In step S3, the buffer layer 2 is subjected to liquid phase etching. And thereby selectively removing only the buffer layer 2. In the case where the buffer layer 2 is an oxide, dilute hydrofluoric acid or ammonium fluoride or the like can be used as the liquid phase etchant. The buffer layer 2 is nitrided. In this case, a hot acid filling or the like may be used as the liquid phase money engraving agent. In step S4, in an argon atmosphere containing about 5% by volume of oxygen, at a temperature greater than or equal to llGGt: and lower than the impurity (four) temperature The wire material is subjected to heat treatment. The heat treatment is required to be 1 G hour. In order to further improve the surface roughness, it is greater than or equal to 1200 C ' and more than 13 〇 (rc is lower than the Shi In the temperature range, the first axis is the one in the carbon-containing layer 3 during the single-crystalization of the rhyme-like crystal, and the (4) is moved to the surface, so that the oxygen content finally formed in the single-crystal carbon layer 4 is extremely high. low. In step S5

用师的虱氟酸蝕刻並除去氧化物層5,並由此 ^晶碳切層4。在除钱化物層5時,從含碳層3遷移至表 面粗乾層5中的氧化物係被完全除去。因此,暴露出 Μ晶生長所需的表面粗糙度水準。 在步驟S3和S5中,可 如上所述,根據第-例二代替_刻。 施⑽程相情況下造方法,可以在未 (RMS) ,、有表面_度小於或等於0.5奈: 之早曰曰碳化石夕層4的Sic晶圓1〇。 12 200929365 同時,在步驟S4之熱處理係可在非氧化性氛圍中進行。在此产 況下,可以省略步驟S5,且恰在退火之後將單晶碳化矽層4暴露 於表面上。 [第二例示性實施態樣] 第3圖為一程序圖,顯示根據本發明之製造方法中的一系列程 序。第4圖為一對應於第3圖的流程圖。 該製造方法是一種製造SiC晶圓10之方法,其包括以下相繼實 施的步驟: 在矽基材1之表面上形成緩衝層2的步驟S1-2 ; 將碳離子經由緩衝層2植入矽基材丨内,並由此形成混有矽與 碳之含碳層3的步驟S2-2 ; 熱處理矽基材1並使含碳層3單晶化,並由此形成單晶碳化矽 層4的步驟S3-2 ;以及 從矽基材1選擇性除去緩衝層2,並由此暴露單晶碳化矽層4 的步驟S4-2。 在上述步驟S1-2至S4-2中,S1-2和S2-2與第一例示性實施態 樣中的步驟S1和S2相同。 ’ S3_2中’在包含約0.5體積%氧氣的氬氣氛圍中在大於 1 、1〇〇C且低於碎熔點的溫度下對矽基材1實施熱處理。該 …處理所需的時間約為1G小時m—步改善表面粗糙度在 、w ; ί等於12〇〇c ’且更在大於或等於1300。〇下在低於矽熔點的 X範圍内進行熱處理係為所欲者。因為在使含碳層3進行單晶 13 200929365 化期間,含碳層3中的氧遷移至緩衝層2中,所以在單晶碳化矽 層4中最終形成的氧含量極低。 在步驟S4-2中,用稀的氫氟酸蝕刻並除去緩衝層2 ,並由此暴 露單晶碳化矽層4。在除去緩衝層2時,從含碳層3遷移出且進入 緩衝層2中的氧被完全除去。因此,暴露出表面粗糙度小於或等 於0.5奈米(rms)的單晶碳化矽層4。該表面粗糙度值係磊晶 生長所需的表面粗糙;度水準。 在步驟S4-2中,可奋祕,A , j u實施軋相蝕刻以代替液相蝕刻。 如上所述’根據第二例示性實施態樣之製造方法,可以在未實 施CMP程序的情況 取化一具有表面粗糙度小於或等於0.5奈米 (RMS)之單晶碳化 丁丁 %化發層4的SiC晶圓1〇。 [實施態樣] 下文中參考實施 並不偈限於此。 態樣更具體地闡述本發明 但是應注意本發明 第一實施態樣 製造直徑為iso套半 木的多個(111) n型浮區矽晶圓,並在乾燥 氧氣鼠圍中於ll〇〇tn F熱處理,並在晶圓上形成由300奈米、35〇 奈米、400奈米和45〇太 $米厚之表面氧化物膜構成的緩衝層。製造 多個具有各種緩衝層厘Λ 序度的樣品。在晶圓加熱溫度為550°C、加速 能量為180 keV、劑| % & 垔马每平方公分7.5 X 1〇17的情況下將碳離子 (C+)植入這些晶圓, 座由此在矽基材中形成一含碳層。在植入 後’關於部分樣品, 通過拉塞福逆散射(Rutherford back scattering RBS )冽量獲得被植入之碳離子在基材深度方向上的 200929365 漢度分佈。結果,在表面氧化物厚度為3〇〇奈米、35〇奈米、_ 奈米和450奈米的各個樣品中,緩衝層與含碳層間的介面中(在 含碳層側)的碳原子濃度分別為9原子%、19原子%、K原子% 和47原子%。而在每個樣品中,含碳層的最大碳原子濃度在仆 至52原子%的範圍内。關於其餘的樣品,在植入後,用稀的氣氣 酸除去在各個樣品上形成的氧化物臈緩衝層。㈣,通過垂直高 溫熱處理爐於IWc下、在Al> + Q 5體積%〇2的氛圍中對各個樣 品進行退火歷時1M、時,㈣稀的氫氟酸除去在樣品表面上形 成的表面氧化物膜。然後藉由使用橫截面透射電子顯微鏡(橫截 面TEM)評估接近各個樣品表面的橫截面結構。此外,藉由原子 力顯微鏡(atomic force microscope,AFM)評估各個樣品的表面 粗糙度(RMS)。橫截s TEM評估的結果是,發現在樣品的表面 部分上形成-厚度為50i 120奈米的單晶碳切層。該單晶碳化 石夕層的厚度隨著氧化物膜緩衝層厚度的增加而平緩地降低。在氧 化物膜緩衝層厚度為300奈米的樣品中,在晶圓的最上層表面上 ❹觀察到由多晶SiC顆粒和Si晶體構成的過渡層,並發現表面粗链 度(RMS)約為4奈米。在氧化物膜緩衝層厚度為35()奈米或更 大的樣品中,過渡層會消失。在氧化物膜緩衝層厚度為35〇奈米、 400奈米、450奈米的各個樣品中,表面粗糙度(rms)分別為〇 8 奈米、0.4奈米、0.3奈米,因此隨著氧化物膜緩衝層厚度的增加, 即隨著在緩衝層與含碳層的介面中的碳原子濃度的增加,表面粗 糙度會大幅改善。在氧化物膜緩衝層厚度為4〇〇奈米、45〇奈米的 15 200929365 各個樣品中,在未實施CMP程序的情況下達到適合於磊晶生長的 小於或等於0.5奈米(RMS)的表面粗糙度。 第一比較例 製造直徑為150毫米的多個(ui) n型浮區矽晶圓,並在未形 成緩衝層下,在晶圓加熱溫度為550°C、加速能量為18〇keV、劑 量為每平方公分7.5 X 1017的情況下將碳離子(c+)植入這些晶 圓,並由此在矽基材中形成一含碳層。在植入後,通過RBS測量 獲得被植入之碳離子在基材深度方向上的濃度分佈。結果,含碳 層中的最大碳原子濃度在48至52原子%的範圍内。然後,通過垂 ® 直高溫熱處理爐於1350t:下在Ar + 〇 5體積%〇2的氛圍中對各個 樣品進行退火歷時10小時。接著,關於部分樣品,通過使用橫截 面TEM s平估接近表面的橫截面結構。結果,發現形成了一由厚度 約為130奈米的表面氧化物膜、厚度約為26〇奈米的矽層、厚度 約為40奈米的過渡層和厚度約為12〇奈米的單晶碳化矽層所組成 的分層結構。此外,關於部分樣品,在高溫退火後,在乾燥的氧 氣氛圍中於ll〇〇°C下使該表面氧化物膜、該矽層和該過渡層被氧 ◎ 化並用稀的氫敗酸除去在樣品表面上通過氧化形成的表面氧化 物膜。然後,通過AFM評估樣品的表面粗糙度(RMS)<>結果, 發現在未實施CMP程序的情況下樣品的表面粗糙度(RMS)g 2 6 至3.8奈米’不適合磊晶生長。 第二實施態樣 製造直徑為150毫米的多個(n型浮區矽晶圓,並在乾燥 的氧氣氛圍中於11〇〇。(:下熱處理,並在晶圖上形成由厚度為45〇 16 200929365 奈米的表面氧化物膜構成的緩衝層。在晶圓加熱溫度為5贼、加 速能量為180 keV、劑量為每平方公分7 5 χ 1〇】7、8 5 χ 1〇17、9 〇 X Η)17的情況下將碳離子(C+)植人這些晶圓,並由此在梦基材中 形成含碳層。在植入後’關於部分樣品,通過拉塞福逆散射(rbs) 測量獲得被植人之碳離子在基材深度方向上的濃度分佈。結果, 在劑量為每平方公分7.5 χ 10η、8 5 χ 1〇17和9 〇 χ 1〇17的各個樣 品中,緩衝層與含碳層的介面中(在含碳層側)的碳原子濃度分 ❹別為47原子%、53原子%和56原子%。而在劑量為每平方公分 7.5 10 8.5xl〇和9·〇 χ1〇ΐ7的各個樣品中,含碳層的最大 碳原子激度分別為51原子%、56原子%和59原子%。關於其餘的 樣品’在植人後’用稀的氫氟酸料在各個樣品上形成的氧化物 膜緩衝層。然後,通過垂直高溫熱處理爐於l35〇(>c下在& + 體積。/。〇2的氛@中對各個樣品進行退火歷時1G小時,接著用稀的 氫氟酸除去在樣品表面上形成的表面氧化物膜。然後,通過使用 橫截面TEM „子估接近各個樣品表面的橫截面結構。此外,通過 ❹AF”評估各個樣品的表面粗糙度(RMS)。橫截面而評估的結 果疋,發現在劑量為每平方公分9 〇χ 1〇17的樣品中在單晶碳化 石夕層中出現由於過度劑量而導致殘顆粒構成的缺陷,不適合蟲晶 生長。在劑量為每平方公分7 5 χ 1〇17、8 5 χ 1〇17的樣品中未觀 察到由碳顆粒構成的缺陷。劑量為每平方公分 7.5xl017' 8.5 χ 1〇17 的各個樣品的表面粗糙度(纖)分別為〇.3奈米、0.4奈米,而 在未實施CMP程序的情況下達到適合於蟲晶生長的小於或等於 〇·5奈米(RMS)的表面粗糙度。 17 200929365 第三實施態樣 將直徑為150毫米的多個(111) !^型浮區;g夕晶圓在乾燥氧氣氛 圍中於1100ec下熱處理,並在晶圓上形成由厚度為300奈米的表 面氧化物膜構成的緩衝層。此外,通過低壓化學氣相沉積The oxide layer 5 is etched and removed by the teacher's fluorinated acid, and the layer 4 is thus cut by the crystal carbon. At the time of removing the money layer 5, the oxide which migrated from the carbon-containing layer 3 to the surface rough layer 5 was completely removed. Therefore, the surface roughness level required for the growth of twins is exposed. In steps S3 and S5, as described above, the second embodiment may be replaced by the second embodiment. In the case of the (10) process, the Sic wafer of the carbonization layer 4 may be 1 曰曰 in the early (RMS), surface _degree less than or equal to 0.5 Å. 12 200929365 Meanwhile, the heat treatment in step S4 can be carried out in a non-oxidizing atmosphere. In this case, step S5 may be omitted and the monocrystalline niobium carbide layer 4 is exposed to the surface just after annealing. [Second exemplary embodiment] Fig. 3 is a sequence diagram showing a series of procedures in the manufacturing method according to the present invention. Figure 4 is a flow chart corresponding to Figure 3. The manufacturing method is a method of manufacturing the SiC wafer 10, which includes the following steps of successively performing: a step S1-2 of forming the buffer layer 2 on the surface of the tantalum substrate 1; implanting carbon ions into the tantalum base via the buffer layer 2. Step S2-2 in the material, and thereby forming the carbon-containing layer 3 mixed with niobium and carbon; heat-treating the crucible substrate 1 and monocrystalline the carbon-containing layer 3, and thereby forming the monocrystalline niobium carbide layer 4 Step S3-2; and step S4-2 of selectively removing the buffer layer 2 from the tantalum substrate 1 and thereby exposing the monocrystalline carbonized tantalum layer 4. In the above steps S1-2 to S4-2, S1-2 and S2-2 are the same as steps S1 and S2 in the first exemplary embodiment. The 'S3_2' is subjected to heat treatment at a temperature of more than 1, 1 〇〇C and below the melting point in an argon atmosphere containing about 0.5% by volume of oxygen. The time required for the treatment is about 1 G hour, the m-step improvement surface roughness is , w; ί is equal to 12 〇〇 c ' and more than 1300 is greater than or equal to 1300. Heat treatment in the X range below the melting point of the crucible is desirable. Since oxygen in the carbon-containing layer 3 migrates into the buffer layer 2 during the single crystal 13 200929 365 conversion of the carbon-containing layer 3, the oxygen content finally formed in the monocrystalline lanthanum carbide layer 4 is extremely low. In step S4-2, the buffer layer 2 is etched and removed with dilute hydrofluoric acid, and thereby the monocrystalline niobium carbide layer 4 is exposed. When the buffer layer 2 is removed, oxygen which has migrated from the carbon-containing layer 3 and entered the buffer layer 2 is completely removed. Therefore, the monocrystalline niobium carbide layer 4 having a surface roughness of less than or equal to 0.5 nanometers (rms) is exposed. The surface roughness value is the surface roughness required for epitaxial growth; In step S4-2, it is possible to perform a rolling phase etching instead of liquid phase etching. As described above, according to the manufacturing method of the second exemplary embodiment, a single-crystal carbonized butadiene-cured hair layer 4 having a surface roughness of less than or equal to 0.5 nanometers (RMS) can be taken without performing a CMP procedure. The SiC wafer is 1 〇. [Embodiment] The following reference is not limited to this. The present invention is described in more detail, but it should be noted that the first embodiment of the present invention produces a plurality of (111) n-type floating-region germanium wafers of iso-case half-timber, and is dried in a dry oxygen rat. The tn F heat treatment, and a buffer layer composed of a surface oxide film of 300 nm, 35 Å nm, 400 nm, and 45 Å to $ m thick is formed on the wafer. A plurality of samples having various buffer layer centistries were fabricated. Implanting carbon ions (C+) into these wafers at a wafer heating temperature of 550 ° C, an acceleration energy of 180 keV, and a dose of 7.5 X 1 〇 17 per square centimeter of the Hummer. A carbonaceous layer is formed in the tantalum substrate. After implantation, for a portion of the sample, the 200929365 Hanter distribution of the implanted carbon ions in the depth direction of the substrate was obtained by Rutherford back scattering RBS. As a result, in each sample having a surface oxide thickness of 3 Å, 35 Å, _ nm, and 450 nm, carbon atoms in the interface between the buffer layer and the carbon-containing layer (on the side of the carbon-containing layer) The concentrations were 9 atom%, 19 atom%, K atom%, and 47 atom%, respectively. In each sample, the maximum carbon atom concentration of the carbon-containing layer was in the range of 52 atom%. Regarding the remaining samples, after implantation, the oxide buffer layer formed on each of the samples was removed with a dilute gas. (4) After each sample is annealed in an atmosphere of Al > + Q 5 vol% 〇2 by a vertical high-temperature heat treatment furnace for 1 M, (4) dilute hydrofluoric acid removes surface oxide formed on the surface of the sample. membrane. The cross-sectional structure close to the surface of each sample was then evaluated by using a cross-sectional transmission electron microscope (cross-sectional TEM). Further, the surface roughness (RMS) of each sample was evaluated by an atomic force microscope (AFM). As a result of the cross-sectional s TEM evaluation, it was found that a single crystal carbon cut layer having a thickness of 50i and 120 nm was formed on the surface portion of the sample. The thickness of the single crystal carbonized stone layer is gently lowered as the thickness of the oxide film buffer layer is increased. In the sample with an oxide film buffer layer thickness of 300 nm, a transition layer composed of polycrystalline SiC particles and Si crystal was observed on the uppermost surface of the wafer, and the surface roughness (RMS) was found to be about 4 nm. In a sample having an oxide film buffer layer thickness of 35 (? nm or more), the transition layer disappears. In each sample with an oxide film buffer layer thickness of 35 μN, 400 nm, and 450 nm, the surface roughness (rms) was 〇8 nm, 0.4 nm, and 0.3 nm, respectively, so The increase in the thickness of the film buffer layer, that is, as the concentration of carbon atoms in the interface between the buffer layer and the carbonaceous layer increases, the surface roughness is greatly improved. In each sample of 15 200929365 having an oxide film buffer layer thickness of 4 nanometers and 45 nanometers, less than or equal to 0.5 nanometers (RMS) suitable for epitaxial growth was achieved without performing a CMP procedure. Surface roughness. The first comparative example produced a plurality of (ui) n-type floating-region germanium wafers having a diameter of 150 mm, and under the condition that no buffer layer was formed, the wafer heating temperature was 550 ° C, the acceleration energy was 18 〇 keV, and the dose was Carbon ions (c+) are implanted into these wafers per square centimeter of 7.5 X 1017, and thereby a carbonaceous layer is formed in the tantalum substrate. After implantation, the concentration distribution of the implanted carbon ions in the depth direction of the substrate was obtained by RBS measurement. As a result, the maximum carbon atom concentration in the carbon-containing layer is in the range of 48 to 52 atom%. Then, each sample was annealed in an atmosphere of Ar + 〇 5 vol% 〇 2 at 1,350 t: by a vertical high temperature heat treatment furnace for 10 hours. Next, with respect to a part of the sample, the cross-sectional structure close to the surface was evaluated by using the cross-sectional TEM s. As a result, it was found that a surface oxide film having a thickness of about 130 nm, a tantalum layer having a thickness of about 26 nm, a transition layer having a thickness of about 40 nm, and a single crystal having a thickness of about 12 nm were formed. A layered structure composed of a layer of tantalum carbide. Further, with respect to a part of the sample, after annealing at a high temperature, the surface oxide film, the ruthenium layer and the transition layer are oxidized and removed with dilute hydrogen sulphuric acid at ll 〇〇 ° C in a dry oxygen atmosphere. A surface oxide film formed by oxidation on the surface of the sample. Then, the surface roughness (RMS) of the sample was evaluated by AFM <>, and it was found that the surface roughness (RMS) g 2 6 to 3.8 nm of the sample was not suitable for epitaxial growth without performing the CMP procedure. The second embodiment produces a plurality of (n-type floating-region germanium wafers having a diameter of 150 mm and is in a dry oxygen atmosphere at 11 Å. (: heat treatment, and formed on the crystal pattern by a thickness of 45 〇) 16 200929365 The buffer layer composed of the surface oxide film of nanometer. The heating temperature of the wafer is 5 thieves, the acceleration energy is 180 keV, and the dose is 7 5 χ 1 平方 7 8 1〇17, 9 In the case of 〇X Η)17, carbon ions (C+) are implanted on these wafers, and thus a carbon-containing layer is formed in the dream substrate. After implantation, 'About part of the sample, through Laceford inverse scattering (rbs) The concentration distribution of the implanted carbon ions in the depth direction of the substrate was measured. As a result, in each sample having a dose of 7.5 χ 10 η, 8 5 χ 1 〇 17 and 9 〇χ 1 〇 17 per square centimeter, buffering was performed. The concentration of carbon atoms in the interface between the layer and the carbon-containing layer (on the side of the carbon-containing layer) is 47 atom%, 53 atom%, and 56 atom%, and the dose is 7.5 10 8.5 x 1 and 9.5 per square centimeter. In each sample of 〇χ1〇ΐ7, the maximum carbon atomic susceptibility of the carbon-containing layer was 51 atom%, 56 atom%, and 59, respectively. %. About the remaining samples 'after implantation' with an oxide film buffer layer formed on each sample with a dilute hydrofluoric acid material. Then, through a vertical high temperature heat treatment furnace at l35 〇 (>c under & + Each sample was annealed in a volume of 。2 for 1 G hour, followed by removal of the surface oxide film formed on the surface of the sample with dilute hydrofluoric acid. Then, by using a cross-sectional TEM The cross-sectional structure of the sample surface. In addition, the surface roughness (RMS) of each sample was evaluated by ❹AF". The results of the cross-section evaluation were found to be in the single crystal at a dose of 9 〇χ 1 〇 17 per square centimeter. In the carbonized stone layer, defects due to excessive doses caused by residual particles are not suitable for the growth of insect crystals. No carbon particles were observed in the samples with a dose of 7 5 χ 1〇17, 8 5 χ 1〇17 per square centimeter. Defects in composition. The surface roughness (fiber) of each sample at a dose of 7.5xl017' 8.5 χ 1〇17 per square centimeter is 〇.3 nm, 0.4 nm, respectively, and is suitable without the CMP procedure. Insect crystal The surface roughness is less than or equal to 〇·5 nm (RMS). 17 200929365 The third embodiment has a plurality of (111) !^ type floating regions with a diameter of 150 mm; Heat treatment at 1100 ec and forming a buffer layer composed of a surface oxide film having a thickness of 300 nm on the wafer. Further, by low pressure chemical vapor deposition

Pressure Chemical Vapor Deposition,LPCVD),在氧化物膜緩衝層 上形成一厚度為150奈米之由氮化矽(SisN4)構成的緩衝層。在 晶圓加熱溫度為550°C、加速能量為18〇 keV、劑量為每平方公分 7·5 X 1017的情況下將碳離子(c+)植入這些晶圓,並由此在矽基 材中形成一含碳層。在植入後,通過拉塞福逆散射(RBS)測量獲 得被植入之碳離子在基材深度方向上的濃度分佈。結果,在氧化 物臈緩衝層與含碳層的介面十的碳原子濃度為45原子%,而含碳 層的最大碳原子濃度為51原子%。在植入後,用稀的氫氟睃除去 在各個樣品上形成的表面氧化物膜。然後,通過垂直高溫熱處理 爐於1350。(:下在Αγ + 0·5體積%〇2的氛圍中’對各個樣品進行退 火歷時10小時,接著用稀的氫氟酸除去在樣品表面上形成的表面 氧化物膜。然後,通過使用橫戴面ΤΕΜ評估接近樣品表面的橫截 面、、·〇構。此外,通過AFM評估樣品的表面粗糙度(RMS)。橫截 面TEM評估的結果是,發現在晶圓表面部分上形成一厚度約為% 奈米的單晶碳化矽層。樣品的表面粗糙度(RMS)為〇 4奈米,在 未實施CMP程序的情況下達到適合於遙晶生長的小於或等於〇 5 奈米(RMS)的表面粗糙度。 第四實施態樣 200929365 將直徑為150毫米的多個(111)η型浮區矽晶圓在乾燥氧氣氛 圍中於1100°C下熱處理,並在晶圓上形成由厚度為450奈米的表 面氧化物膜構成的緩衝層。在晶圓加熱溫度為55(rc、加速能量為 180 keV、劑量為每平方公分7,5 X 1〇〗7的情況下將碳離子(c+) 植入這些晶圓,並由此在碎基材中形成一含碳層。在植入後通 過拉塞福逆散射(RBS )測量獲得被植入之碳離子在基材深度方白 上的濃度分佈。結果,在氧化物膜緩衝層與含碳層的介面中的碳 原子濃度為47原子β/❶,而含碳層的最大碳原子濃度為51原子%。 在植入後’用稀的氫氟酸除去在各個樣品上形成的表面氧化物 膜。然後’通過垂直高溫熱處理爐於1200。〇下在純淨氛圍.中對各 個樣品進行退火歷時10小時。然後,通過使用橫截面TEM評估 接近樣品表面的橫截面結構。此外,通過AFM評估樣品的表面粗 链度(RMS)。橫截面TEM評估的結果是,發現在晶圓表面部分 上形成一厚度約為90奈米的單晶碳化矽層。樣品的表面粗糙度 (RMS )為〇.5奈米,在未實施CMP程序的情況下達到適合於磊 φ 晶生長的小於或等於0.5奈米(RMS)的表面粗链度。 第五實施態樣 製造直徑為150毫米的多個(111) η型浮區碎晶圓,並在乾燥 氧氣氛圍令於11〇〇。(:下熱處理’並在晶圓上形成由厚度為450奈 米的表面氧化物膜構成的緩衝層。在加速能量為180 keV、劑量為 每平方公分7.5 X 1017的情況下將碳離子(C+)植入這些晶圓,並 由此在矽基材中形成一含碳層。此時,將晶圓加熱溫度設置為350 °C、400°C、7〇〇°C、i〇〇〇°C、l〇50°C。在植入後,關於部分樣品, 19 200929365 通過拉塞福逆散射(RBS)測量獲得被植入之碳離子在基材深度方 向上的濃度分佈。結果,在緩衝層與含碳層的介面中(在含碳層 側)的碳原子濃度在45至48原子%的範圍内。而在每個樣品中, 含碳層的最大碳原子濃度在47至52原子%的範圍内。關於其餘的 樣品,在植入後,用稀的氫氟酸除去在各個樣品上形成的氧化物 膜緩衝層。然後,通過垂直高溫熱處理爐於135(rc下在5 體積%〇2的氛圍中對各個樣品進行退火歷時1〇小時,接著用稀的 氫氟酸除去在樣品表面上形成的表面氧化物臈。然後,通過使用 橫截面TEM評估接近各個樣品表面的橫截面結構。此外,通過 〇 AFM評估各個樣品的表面粗糙度(RMS)。橫截面TEM評估的钟 果是,發現在350°C的晶圓加熱溫度下實施植入的樣品中,單晶碳 化矽層的上層部分和下層部分變為非晶態,不適合磊晶生長。此 外,發現在105(TC的晶圓加熱溫度下實施植入的樣品申,單晶碳 化矽層變為Si區與碳化矽區的混合層,不適合磊晶生長。在 至l〇〇〇°C的晶圓加熱溫度下實施植入的樣品中,形成連續的單晶 碳化矽層。晶圓加熱溫度為400°c、70(rc和1〇〇(rc的各個樣品的 表面粗糙度(RMS)分別為〇.5奈米、〇.3奈米和〇·5奈米在未 〇 實施CMP程序的情況下達到適合於磊晶生長的小於或等於ο〗卉 米(RMS)的表面粗糙度。 第六實施態樣 將直徑為150毫米的多個(111) η型浮區矽晶圓在乾燥氧氣氛 圍中於lioot:下熱處理,並在晶圓上形成由厚度為45〇奈米的表 面氧化物膜構成的緩衝層。在晶圓加熱溫度為55(rc、加速能量為 20 200929365 18〇 keV、劑量為每平方公分7.5 x 1〇17的情沉下將碳離子(c+) 植入這些晶圓’並由此抑基材中形成—含碳層。在植人後通 過拉塞福逆散射(RBS)測量獲得被植人之碳離子在基材深度方向 上的濃度分佈。結果,在氧化物膜緩衝層與含碳層的介面中的碳 原子濃度為47原子。/〇,而含碳層的最大碳原子濃度為51原子%。 在植入後,用稀的氫氟酸除去在各個樣品上形成的表面氧化物 •膜。然後,通過垂直高溫熱處理爐在Ar + 〇 5體積%〇2的氛圍中 對各個樣品進行退火歷時1G小時。將退火保持溫度設置為蘭 。(:、謂。C、屬。C和測C 1稀的氫&酸除去在樣品表面上 形成的表面氧化物膜。然後’通過㈣橫截面TEM評估接近各個 樣品表面的橫截面結構。此外,通過織评估各個樣品的表面粗 糖度(RMS)。橫截面TEM評估的結果是,發現在晶圓表面部分 上形成一厚度約為50至80奈米的單晶碳化矽層。在退火保持溫 度為noot、umrc ' 1300。(:和135(rc的各個樣品中’表面粗糙 度(RMS)分別為0.7奈米、0.5奈米、0.4奈米和0.3奈米,並隨 φ 著退火保持溫度的升高而改善。在退火保持溫度為1200°C或更高 的各個樣品中,在未實施CMP程序的情況下達到適合於磊晶生長 的小於或等於0,5奈米(RMS)的表面粗糙度。 第七實施態樣 製造直徑為150毫米的多個(in) n型浮區矽晶圓,並在乾燥 氧氣氛圍中於1100°C下熱處理,並在晶圓上形成由厚度為300奈 米、350奈米、400奈米和450奈米的表面氧化物膜構成的緩衝層。 製造多個具有各種緩衝層厚度的樣品。在晶圓加熱溫度為550、加 21 200929365 速能量為180 keV、劑量為每平方公分7 5 x 10i7的情況下將碳離 子(C )植入這些晶圓,並由此在矽基材中形成一含碳層。在植 入後,關於部分樣品,通過拉塞福逆散射(RBS)測量獲得被植入 之碳離子在基材深度方向上的濃度分佈。結果,在表面氧化物膜 厚度為300奈米、350奈米、4〇〇奈米和45〇奈米的各個樣品中在 緩衝層與含碳層的介面中(在含碳層側)的碳原子濃度分別為9 原子/。 19原子%、32原子%和47原子%。而在每個樣品中,含 © 〇 碳層的最大碳原子濃度在48纟52原子%的範圍内。關於其餘的樣 抑,在植入後,通過垂直高溫熱處理爐於135〇t>c下在Ar + 〇 $體 積的氛圍中對各個樣品進行退火歷時1〇小時,接著用稀的氫 I酸除去各個樣品表面的緩衝層。織,通過使用橫截面TEM評 估接近各個樣品表面的橫截面結構。此外,通過原子力顯微鏡 (AFIV^ ef估各個樣品的表面粗糙度(rms)。橫截面職的評 =果疋’發現在晶圓表面部分上形成-厚度為5G至160奈米的 早明碳化發層。單晶碳化㈣的厚度隨著氧化物膜緩衝層厚度的 平緩地降低。在氧化物膜緩衝層厚度為300奈米的樣品中, 产層#分地留在晶圓的最上層表面上,並發現表面粗縫 " 、約為7奈米。在氧化物膜緩衝層厚度為350奈米或更 1的^中,過渡層會;肖失。在氧化物膜緩衝層厚度為350奈米、 L3奈米、、^物奈米的各個樣品中,表面粗糙度(_分別為 Λα,g^ - 7奈米和Μ奈米因此隨著氧化物臈緩衝層厚度的增 粗輪产衝層與含碳層的介面中的碳原子漢度的增加,表面 又^改善。尤其是在氧化物膜緩衝層厚度為45〇奈米的 22 200929365 樣品中,在未實施CMP程序的情況下達到適合於磊晶生長的小於 或等於0.5奈米(RMS)的表面粗糙度。 【圖式簡單說明】 第1圖為一程序圖,顯示根據本發明之製造方法中的一系列程 序; 第2圖為一對應於第1圖的流程圖; 第3圖為一程序圖,顯示根據本發明之製造方法中的一系列程 序; 第4圖為一對應於第3圖的流程圖;以及 第5圖為一流程圖,顯示根據先前製造方法的一系列程序。 【主要元件符號說明】 1 妙基材 2 緩衝層 3 含碳層 4 單晶碳化矽層 ❹ 5 氧化物層 10 SiC晶圓 S1在一梦基材的表面上形成一緩衝層 S2將碳離子經由該緩衝層植入該矽基材中,並由此形成一含碳 層 S3選擇性除去該緩衝層並由此暴露該含碳層 S4熱處理該矽基材並使該含碳層單晶化,並由此形成一單晶碳 化矽層 23 200929365 S5除去在熱處理期間形成的氧化物層,並由此暴露該單晶碳化 矽層 51- 2在一矽基材的表面上形成一緩衝層 52- 2將碳離子經由該緩衝層植入該矽基材中,並由此形成一含 碳層 53- 2熱處理該矽基材並使該含碳層單晶化,並由此形成一單晶 碳化矽層 54- 2選擇性除去該緩衝層,並由此暴露該單晶碳化矽層 S11將碳離子植入矽基材中並由此形成一含碳層 S12將矽基材退火並使該含碳層單晶化,並由此形成一單晶碳化 矽層 S13在該單晶碳化矽層上形成一犧牲層 S14自矽基材選擇性除去該緩衝層,並由此暴露該單晶碳化矽層 S15通過CMP使已暴露之單晶碳化矽層的表面光滑化Pressure Chemical Vapor Deposition (LPCVD), a buffer layer of tantalum nitride (SisN4) having a thickness of 150 nm was formed on the oxide film buffer layer. Carbon ions (c+) are implanted into the wafers at a wafer heating temperature of 550 ° C, an acceleration energy of 18 〇 keV, and a dose of 7·5 X 1017 per square centimeter, and thus in the ruthenium substrate A carbonaceous layer is formed. After implantation, the concentration distribution of the implanted carbon ions in the depth direction of the substrate was obtained by Raspford backscattering (RBS) measurement. As a result, the carbon atom concentration in the interface of the oxide buffer layer and the carbon-containing layer was 45 atom%, and the maximum carbon atom concentration of the carbon-containing layer was 51 atom%. After the implantation, the surface oxide film formed on each of the samples was removed with dilute hydrofluoroquinone. Then, through a vertical high temperature heat treatment furnace at 1350. (: Each of the samples was annealed in an atmosphere of Αγ + 0.5 vol% 〇 2 for 10 hours, followed by removal of the surface oxide film formed on the surface of the sample with dilute hydrofluoric acid. Then, by using the horizontal The face was evaluated for the cross section of the sample surface, and the surface roughness (RMS) of the sample was evaluated by AFM. As a result of the cross-sectional TEM evaluation, it was found that a thickness was formed on the surface portion of the wafer. % nanocrystalline tantalum carbide layer. The surface roughness (RMS) of the sample is 〇4 nm, which is less than or equal to 〇5 nm (RMS) suitable for telecrystal growth without CMP procedures. Surface roughness. Fourth embodiment 200929365 A plurality of (111) n-type floating-area wafers having a diameter of 150 mm are heat-treated at 1100 ° C in a dry oxygen atmosphere and formed on the wafer by a thickness of 450 a buffer layer composed of a surface oxide film of nanometer. The carbon ion (c+) is obtained at a wafer heating temperature of 55 (rc, an acceleration energy of 180 keV, and a dose of 7,5 X 1 每7 per square centimeter). Implanting these wafers and thereby smashing the substrate A carbon-containing layer is formed. After implantation, the concentration distribution of the implanted carbon ions on the depth of the substrate is obtained by Raspford backscattering (RBS) measurement. As a result, the oxide film buffer layer and the carbonaceous layer are formed. The carbon atom concentration in the interface is 47 atoms β/❶, and the maximum carbon atom concentration of the carbon-containing layer is 51 atom%. After implantation, the surface oxide film formed on each sample is removed with dilute hydrofluoric acid. Then, each sample was annealed in a pure atmosphere by a vertical high-temperature heat treatment furnace at 1200 for 10 hours. Then, the cross-sectional structure close to the surface of the sample was evaluated by using a cross-sectional TEM. In addition, the sample was evaluated by AFM. Surface roughness (RMS). As a result of cross-sectional TEM evaluation, it was found that a monocrystalline niobium carbide layer having a thickness of about 90 nm was formed on the surface portion of the wafer. The surface roughness (RMS) of the sample was 〇.5. Nano, which achieves a surface roughness of less than or equal to 0.5 nanometers (RMS) suitable for epitaxial crystal growth without performing a CMP procedure. The fifth embodiment produces a plurality of (111) diameters of 150 mm. Η-type floating zone Round, and in a dry oxygen atmosphere at 11 〇〇. (: heat treatment ' and form a buffer layer on the wafer consisting of a surface oxide film with a thickness of 450 nm. The acceleration energy is 180 keV, the dose is per In the case of square centimeters 7.5 X 1017, carbon ions (C+) are implanted into these wafers, thereby forming a carbon-containing layer in the tantalum substrate. At this time, the wafer heating temperature is set to 350 ° C, 400 °. C, 7〇〇°C, i〇〇〇°C, l〇50°C. After implantation, for some samples, 19 200929365 The implanted carbon ions were obtained by Raspford inverse scattering (RBS) measurement. The concentration distribution in the depth direction of the substrate. As a result, the concentration of carbon atoms in the interface of the buffer layer and the carbon-containing layer (on the side of the carbon-containing layer) is in the range of 45 to 48 at%. In each sample, the carbon-containing layer had a maximum carbon atom concentration in the range of 47 to 52 atom%. Regarding the remaining samples, after implantation, the oxide film buffer layer formed on each sample was removed with dilute hydrofluoric acid. Then, each sample was annealed in a vertical heat treatment furnace at 135 (rc under a volume of 5 vol% 〇2 for 1 hr, and then the surface oxide lanthanum formed on the surface of the sample was removed with dilute hydrofluoric acid. Then, the cross-sectional structure close to each sample surface was evaluated by using a cross-sectional TEM. In addition, the surface roughness (RMS) of each sample was evaluated by 〇AFM. The cross-sectional TEM evaluation of the clock was found at 350 ° C wafer In the sample implanted at the heating temperature, the upper portion and the lower portion of the monocrystalline niobium carbide layer become amorphous, which is not suitable for epitaxial growth. Further, it was found that the implanted sample was carried out at 105 (TC wafer heating temperature). Shen, the monocrystalline niobium carbide layer becomes a mixed layer of the Si region and the niobium carbide region, which is not suitable for epitaxial growth. In the sample implanted at a wafer heating temperature of 10 ° C, a continuous single crystal is formed. The ruthenium carbide layer has a wafer heating temperature of 400 ° C and 70 (rc and 1 〇〇 (the surface roughness (RMS) of each sample of rc is 〇.5 nm, 〇.3 nm, and 〇·5奈Rice reached in the future when the CMP procedure was implemented A surface roughness suitable for epitaxial growth of less than or equal to RMS. The sixth embodiment has a plurality of (111) n-type floating-region wafers having a diameter of 150 mm in a dry oxygen atmosphere. Lioot: heat treatment and form a buffer layer composed of a surface oxide film having a thickness of 45 nanometers on the wafer. The heating temperature at the wafer is 55 (rc, acceleration energy is 20 200929365 18 〇 keV, dose is per A square centimeter of 7.5 x 1〇17 is used to implant carbon ions (c+) into these wafers' and thus form a carbon-containing layer in the substrate. It is measured by Raspberry backscattering (RBS) after implantation. The concentration distribution of the implanted carbon ions in the depth direction of the substrate is obtained. As a result, the carbon atom concentration in the interface between the oxide film buffer layer and the carbon-containing layer is 47 atoms/〇, and the maximum carbon of the carbon-containing layer. The atomic concentration was 51 atom%. After implantation, the surface oxide film formed on each sample was removed with dilute hydrofluoric acid, and then passed through a vertical high-temperature heat treatment furnace in an atmosphere of Ar + 〇 5 vol% 〇 2 Annealing each sample for 1 G hour. Annealing to maintain temperature Set to blue. (:, C. C. genus C and C 1 dilute hydrogen & acid remove the surface oxide film formed on the surface of the sample. Then 'pass the cross section TEM to evaluate the cross near the surface of each sample. Cross-sectional structure. Further, the surface roughness (RMS) of each sample was evaluated by weaving. As a result of cross-sectional TEM evaluation, it was found that a monocrystalline niobium carbide layer having a thickness of about 50 to 80 nm was formed on the surface portion of the wafer. The annealing temperature was noot, umrc ' 1300. (: and 135 (the surface roughness (RMS) of each sample in rc was 0.7 nm, 0.5 nm, 0.4 nm, and 0.3 nm, respectively, with φ Annealing improves while maintaining an increase in temperature. In each of the samples in which the annealing temperature was 1200 ° C or higher, a surface roughness of less than or equal to 0,5 nanometers (RMS) suitable for epitaxial growth was obtained without performing the CMP procedure. A seventh embodiment produces a plurality of (in) n-type floating-region germanium wafers having a diameter of 150 mm, heat-treated at 1100 ° C in a dry oxygen atmosphere, and formed on the wafer to have a thickness of 300 nm. A buffer layer composed of a surface oxide film of 350 nm, 400 nm, and 450 nm. A plurality of samples having various buffer layer thicknesses were fabricated. Carbon ions (C) are implanted into the wafers at a wafer heating temperature of 550, plus 21 200929365 speed energy of 180 keV, and a dose of 7 5 x 10i7 per square centimeter, thereby forming in the tantalum substrate A carbonaceous layer. After the implantation, with respect to a part of the samples, the concentration distribution of the implanted carbon ions in the depth direction of the substrate was obtained by Raspford backscattering (RBS) measurement. As a result, carbon in the interface between the buffer layer and the carbonaceous layer (on the side of the carbonaceous layer) in each of the samples having a surface oxide film thickness of 300 nm, 350 nm, 4 Å nm, and 45 Å nm The atomic concentration is 9 atoms/. 19 atom%, 32 atom%, and 47 atom%. In each sample, the maximum carbon atom concentration of the carbon layer containing 〇 was in the range of 48 纟 52 atom%. For the rest of the samples, after implantation, each sample was annealed in a vertical atmosphere heat treatment furnace at 135 °t > c in an Ar + 〇$ volume atmosphere for 1 hour, followed by dilute hydrogen acid removal. A buffer layer on the surface of each sample. Weaving, the cross-sectional structure close to the surface of each sample was evaluated by using a cross-sectional TEM. In addition, the surface roughness (rms) of each sample was estimated by atomic force microscopy (AFIV^ ef. Cross-sectional evaluation = fruit 疋 ' found on the surface portion of the wafer - thickness of 5G to 160 nm of early carbonization The thickness of the single crystal carbonization (4) decreases gently with the thickness of the oxide film buffer layer. In the sample having an oxide film buffer layer thickness of 300 nm, the layer # is left on the uppermost surface of the wafer. And found that the surface is thick ", about 7 nm. In the oxide film buffer layer thickness of 350 nm or more, the transition layer will; Xiao lost. The oxide film buffer layer thickness is 350 Nai In each sample of rice, L3 nanometer, and nanometer, the surface roughness (_ Λα, g^ - 7 nm and ΜNi, respectively, is increased with the thickness of the oxide buffer layer). The increase in the hardness of the carbon atoms in the interface between the layer and the carbonaceous layer improves the surface, especially in the 22 200929365 sample with an oxide film buffer layer thickness of 45 nanometers, which is achieved without the CMP procedure being implemented. A surface roughness of less than or equal to 0.5 nanometers (RMS) suitable for epitaxial growth. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a sequence diagram showing a series of programs in a manufacturing method according to the present invention; FIG. 2 is a flowchart corresponding to FIG. 1; and FIG. 3 is a program diagram showing A series of programs in the manufacturing method according to the present invention; Fig. 4 is a flow chart corresponding to Fig. 3; and Fig. 5 is a flow chart showing a series of programs according to the prior manufacturing method. 】 1 wonderful substrate 2 buffer layer 3 carbon-containing layer 4 monocrystalline niobium carbide layer ❹ 5 oxide layer 10 SiC wafer S1 forms a buffer layer S2 on the surface of a dream substrate to implant carbon ions through the buffer layer In the crucible substrate, and thereby forming a carbon-containing layer S3, the buffer layer is selectively removed and thereby exposing the carbon-containing layer S4 to heat-treat the crucible substrate and single-crystallizing the carbon-containing layer, thereby forming a Monocrystalline niobium carbide layer 23 200929365 S5 removes the oxide layer formed during the heat treatment, and thereby exposes the monocrystalline niobium carbide layer 51-2 to form a buffer layer 52-2 on the surface of a tantalum substrate to pass carbon ions The buffer layer is implanted in the germanium substrate and formed thereby The carbon-containing layer 53-2 heat-treats the tantalum substrate and single-crystalizes the carbon-containing layer, and thereby forms a single-crystalline tantalum carbide layer 54-2 to selectively remove the buffer layer, and thereby expose the single-crystal tantalum carbide The layer S11 implants carbon ions into the ruthenium substrate and thereby forms a carbon-containing layer S12 to anneal the ruthenium substrate and crystallize the carbon-containing layer, thereby forming a single-crystal ruthenium carbide layer S13 at the single crystal Forming a sacrificial layer S14 on the tantalum carbide layer to selectively remove the buffer layer from the tantalum substrate, and thereby exposing the single crystal tantalum carbide layer S15 to smooth the surface of the exposed single crystal tantalum carbide layer by CMP

Claims (1)

200929365 七、申請專利範圍: 1. 一種製造表面部分係由單晶碳化矽層製成之半導體基材之方 法,其包括以下相繼實施的步驟: 在一矽基材之表面上形成一緩衝層的步驟; 將碳離子經由該緩衝層植入該矽基材内並由此形成一混 有矽與碳之含碳層的步驟; 從該矽基材選擇性除去該緩衝層並由此暴露該含碳層的 步驟;以及 ® 熱處理該矽基材並使該含碳層單晶化,並由此形成一單晶 碳化矽層的步驟。 2. 如請求項1之製造半導體基材之方法,其中該熱處理之氛圍是 非氧化性氛圍。 3. 如請求項1之製造半導體基材之方法,其中該熱處理之氛圍包 含氧氣,並在該熱處理之後,將一在該熱處理期間在該單晶碳 化矽層之表面上所形成的氧化物層除去,並從而暴露該單晶碳 q 化石夕層。 4. 一種製造表面部分係由單晶碳化矽層製成之半導體基材之方 法,其包括以下相繼實施的步驟: 在一矽基材之表面上形成一緩衝層的步驟; 將碳離子經由該緩衝層植入該矽基材内並由此形成一混 有矽與碳之含碳層的步驟; 熱處理該矽基材並使該含碳層單晶化,並由此形成一單晶 碳化矽層的步驟;以及 25 200929365 · 從該矽基材選擇性除去該緩衝層並由此暴露該單晶碳化 矽層的步驟。 5. 如請求項1至4之任一項之製造半導體基材之方法,其中該緩 衝層係通過氣相蝕刻或液相蝕刻而被選擇性除去。 6. 如請求項5之製造半導體基材之方法,其中該緩衝層係由氧化 矽、氮化矽或其組合所構成。 7·如請求項1至4之任一項之製造半導體基材之方法,其中恰在 植入碳離子之後調節離子植入條件,使得在該含碳層與該緩衝 層間的介面中含碳層側的碳原子濃度應為15原子%或更高,且 在該含碳層中之碳原子濃度的最大值應為55原子%或更低。 8. 如請求項7之製造半導體基材之方法,其中該離子植入條件包 括該緩衝層的厚度、碳離子的植入能量和碳離子的植入量之任 意者。 9. 如請求項7之製造半導體基材之方法,其中在該含碳層與該緩 衝層間的介面中含碳層側的碳原子濃度為25原子%或更高。 10. 如請求項1至4之任一項之製造半導體基材之方法,其中係在 將該矽基材加熱至大於或等於400°C且小於或等於l〇〇〇°C的溫 度狀態下進行碳離子的植入。 11. 如請求項1至4之任一項之製造半導體基材之方法,其中該熱 處理的溫度係大於或等於1100°C且低於矽的熔點。 12. 如請求項11之製造半導體基材之方法,其中該熱處理的溫度係 大於或等於1200°C且低於矽的熔點。 26 200929365 13.如請求項12之製造半導體基材之方法,其中該熱處理的溫度係 大於或等於1300°C且低於矽的熔點。200929365 VII. Patent application scope: 1. A method for manufacturing a semiconductor substrate whose surface portion is made of a single crystal yttrium carbide layer, comprising the following steps: forming a buffer layer on the surface of a substrate a step of implanting carbon ions into the crucible substrate via the buffer layer and thereby forming a carbonaceous layer mixed with niobium and carbon; selectively removing the buffer layer from the tantalum substrate and thereby exposing the inclusion a step of carbon layer; and a step of heat-treating the tantalum substrate and single-crystallizing the carbon-containing layer, and thereby forming a monocrystalline niobium carbide layer. 2. The method of claim 1, wherein the atmosphere of the heat treatment is a non-oxidizing atmosphere. 3. The method of claim 1, wherein the heat treatment atmosphere comprises oxygen, and after the heat treatment, an oxide layer formed on the surface of the single crystal ruthenium carbide layer during the heat treatment. The single crystal carbon q fossil layer is removed and thereby exposed. A method of producing a semiconductor substrate having a surface portion made of a single crystal yttrium carbide layer, comprising the steps of: sequentially forming a buffer layer on a surface of a tantalum substrate; a buffer layer is implanted into the ruthenium substrate and thereby forming a carbon-containing layer mixed with ruthenium and carbon; heat-treating the ruthenium substrate and single-crystallizing the carbon-containing layer, thereby forming a single-crystal ruthenium carbide a step of layering; and 25 200929365 - a step of selectively removing the buffer layer from the tantalum substrate and thereby exposing the single crystal tantalum carbide layer. 5. The method of producing a semiconductor substrate according to any one of claims 1 to 4, wherein the buffer layer is selectively removed by vapor phase etching or liquid phase etching. 6. The method of producing a semiconductor substrate according to claim 5, wherein the buffer layer is composed of ruthenium oxide, ruthenium nitride or a combination thereof. The method of producing a semiconductor substrate according to any one of claims 1 to 4, wherein the ion implantation conditions are adjusted just after the implantation of the carbon ions, so that the carbon layer is contained in the interface between the carbonaceous layer and the buffer layer The carbon atom concentration on the side should be 15 atom% or more, and the maximum value of the carbon atom concentration in the carbon-containing layer should be 55 atom% or less. 8. The method of producing a semiconductor substrate according to claim 7, wherein the ion implantation condition comprises any one of a thickness of the buffer layer, an implantation energy of carbon ions, and an implantation amount of carbon ions. 9. The method of producing a semiconductor substrate according to claim 7, wherein a carbon atom concentration on the side of the carbon-containing layer in the interface between the carbon-containing layer and the buffer layer is 25 atom% or more. 10. The method of producing a semiconductor substrate according to any one of claims 1 to 4, wherein the ruthenium substrate is heated to a temperature greater than or equal to 400 ° C and less than or equal to 10 ° C Implantation of carbon ions. 11. The method of producing a semiconductor substrate according to any one of claims 1 to 4, wherein the temperature of the heat treatment is greater than or equal to 1100 ° C and lower than the melting point of ruthenium. 12. The method of claim 11, wherein the temperature of the heat treatment is greater than or equal to 1200 ° C and lower than the melting point of ruthenium. A method of producing a semiconductor substrate according to claim 12, wherein the temperature of the heat treatment is greater than or equal to 1300 ° C and lower than the melting point of ruthenium. 2727
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