TW200919655A - Semiconductor package and packaging method for balancing top and bottom moldflows from window - Google Patents

Semiconductor package and packaging method for balancing top and bottom moldflows from window Download PDF

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Publication number
TW200919655A
TW200919655A TW096140391A TW96140391A TW200919655A TW 200919655 A TW200919655 A TW 200919655A TW 096140391 A TW096140391 A TW 096140391A TW 96140391 A TW96140391 A TW 96140391A TW 200919655 A TW200919655 A TW 200919655A
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TW
Taiwan
Prior art keywords
window
glue
lower mold
molding
substrate
Prior art date
Application number
TW096140391A
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Chinese (zh)
Other versions
TWI347658B (en
Inventor
Kuo-Yuan Lee
Yung-Hsiang Chen
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Walton Advanced Eng Inc
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Application filed by Walton Advanced Eng Inc filed Critical Walton Advanced Eng Inc
Priority to TW096140391A priority Critical patent/TWI347658B/en
Publication of TW200919655A publication Critical patent/TW200919655A/en
Application granted granted Critical
Publication of TWI347658B publication Critical patent/TWI347658B/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/4824Connecting between the body and an opposite side of the item with respect to the body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73215Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

Disclosed are a semiconductor package and a packaging method for balancing top and bottom moldflows from window. The window-type package primarily comprises a substrate having a window slot, a chip and a molding compound. Two ends of the window slot are exposed to form a compound inset and a compound outlet after chip mounting. Therein, the window slot is shifted to be off center so that the compound inset is smaller than the compound outlet. The molding compound has a top portion on the substrate and a bottom portion under the substrate. Accordingly, the moldflow speeds of forming the top and bottom portions can be balanced. Conventional problems of void in the top portion and mold flash of bottom portion on the bottom of the substrate can be solved.

Description

200919655 九、發明說明: 【發明所屬之技術領域】 本發明係有關於窗α型半導體封裝技術,特別係有關於 一種窗口上下模流平衡之封裝構造與封裝方法。 【先前技術】 在眾多積體電路封裝類型中,窗口型封裝構造 (WBGA,Window Ball Grid Array)係利用具有開窗槽孔 之基板承载一晶片於其上並適當封膠之。目前形成模封 膠體係轉移成型(transfer molding)技術形成,其係將該 窗口型封裝構造置於一模具中,對該模具注入模封膠體 前驅物再加以熟化’以密封該窗口型封裝構造之内部元 件’例如晶片與電性連接元件。然而,在注入該模封膠 體時’该模封膠體之基板上模封面積大於該模封膠體之 基板下模封面積,易造成上、下模流速度不均的情形。 此種現象會導致模流速度較快之膠體會在基板表面產 生溢膠問題’而模流速度較慢之膠體則會有填膠之不充 實而形成氣泡或空隙。 如第1圖所示,一種習知窗口型封裝構造100主要 包含一基板1 1 0、一晶片1 2 0、複數個例如鮮線之電性 連接元件1 3 0以及一模封膠體1 4 〇。該基板1 1 〇係具有 一上表面111、一下表面112以及一貫穿該上表面U1 與該下表面1 12之開窗槽孔1 13。如第2圖所示,該基 板1 1 0之該上表面丨1 1係包含有一黏晶區1丨4並在該上 表面1 1 1塗佈一黏晶膠1 1 6,用以黏接該晶片1 20使該 200919655 晶片1 2 0黏固於該基板1 1 0上。該下表面1 1 2係形成有 複數個外接墊1 15(如第1圖所示)。再如第2圖所示, 該開窗槽孔1 1 3之兩端在該黏晶區1 1 4之外是分別形成 為一入膠口 113Α與一出膠口 113Β。如第1及2圖所示, 該晶片1 2 0之一主動面1 2 1係為朝下並6又置於遠黏晶區 114且不遮蓋該入膠口 113Α與該出膠口 113Β。該晶片 120之該主動面121係形成有複數個銲墊123並可藉由 該些電性連接元件1 3 0透過該開窗槽孔1 1 3連接該些銲 墊1 23至該基板11 〇。該模封膠體1 40係包含有一上模 封部1 4 1及一下模封部1 42,其中該上模封部1 4 1係形 成於該上表面Π 1且用以密封該晶片1 2〇 ’該下模封部 1 4 2係形成於該下表面11 2與該開窗槽孔11 3,用以密 封該些電性連接元件13 0。複數個外接端子15 〇係設置 於該基板π 〇之該些外接墊115,用以對外電性連接至 一印刷電路板(圖中未繪出)。在以往的基板架構中,該 開窗槽孔113係為中心配置’即該開窗槽孔113之中心 點對準於每一封裝單元内基板1 1 〇與該晶片1 2 0之中心 點,而該入膠口 1 1 3 Α與該出膠口 1 1 3 Β具有相同開孔 面積。 如第1及3圖所示,在形成該模封膠體140之過程 中,利用〆上模具10與一下模具20夾置該基板110,並注 入該模封膠體140之前驅物’使模封膠體140前驅物流入上 模穴以形成该上模封部141並自該入膠口 11 3 A流往下模穴 以形成該下模封部142。再如第1及3圖所示,由於該下模 200919655 封部1 42之填充空間係小於該上模 ΛΓΓ 褀封。卩14丨,形成該下模封 部142之下模流迷度Μ2Α合大於 + s大於形成该上模封部1 41之上 模流速度1 4 1A,在此情況下,兮丁 丄 • 度况下5亥下模封部142會先填滿下 模穴而比該上模封部I 4 1更早5丨丨冶# b咖 更早到達该出膠口 113B,故該下 模封部U2會通過該出膠口 113B而往該上模封部⑷嗔 出’並持續加麗模流直到該上模封部⑷填滿上模穴,產生 的時間差會導致該下模封部142在該基板㈣之下表面ΜBACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a window alpha semiconductor package technology, and more particularly to a package construction and packaging method for window upper and lower mold flow balance. [Prior Art] Among a plurality of integrated circuit package types, a Window Ball Grid Array (WBGA) uses a substrate having a window opening to carry a wafer thereon and appropriately seal the same. At present, a mold molding system is formed by a transfer molding technique in which the window type package structure is placed in a mold, and the mold seal precursor is injected into the mold and then matured to seal the window type package structure. Internal components 'such as wafers and electrical connection elements. However, when the molding compound is injected, the molding area on the substrate of the molding compound is larger than the molding area of the substrate of the molding compound, which tends to cause uneven upper and lower mold flow speeds. This phenomenon causes the colloid which has a faster mold flow rate to cause a problem of overflowing on the surface of the substrate. The colloid which has a slower mold flow rate will have a lack of filling and form bubbles or voids. As shown in FIG. 1 , a conventional window package structure 100 mainly includes a substrate 110 , a wafer 1 2 0 , a plurality of electrical connecting elements 1 3 0 such as fresh wires, and a molding compound 1 4 〇 . The substrate 1 1 has an upper surface 111, a lower surface 112, and a window opening 1 13 extending through the upper surface U1 and the lower surface 112. As shown in FIG. 2, the upper surface 丨1 1 of the substrate 110 includes a viscous region 1丨4 and a paste 1 1 6 is coated on the upper surface 1 1 1 for bonding. The wafer 1 20 adheres the 200919655 wafer 120 to the substrate 110. The lower surface 1 1 2 is formed with a plurality of external pads 1 15 (as shown in Fig. 1). Further, as shown in FIG. 2, the two ends of the window opening 1 1 3 are formed as a glue inlet 113 Α and a glue outlet 113 之外, respectively, outside the die-bonding zone 1 1 4 . As shown in Figures 1 and 2, one of the active faces 1 2 1 of the wafer 120 is downwardly facing and 6 is placed in the far-adhesive region 114 and does not cover the glue inlet 113 Α and the glue outlet 113 Β. The active surface 121 of the wafer 120 is formed with a plurality of pads 123 and the pads 1 23 are connected to the substrate 11 through the window openings 1 1 3 to the substrate 11 . The molding compound 1 40 includes an upper molding portion 141 and a lower molding portion 1 42, wherein the upper molding portion 141 is formed on the upper surface Π 1 and is used to seal the wafer 1 2 The lower mold portion 142 is formed on the lower surface 11 2 and the sash hole 11 3 for sealing the electrical connection elements 130. A plurality of external terminals 15 are disposed on the substrate π 该 of the external pads 115 for external electrical connection to a printed circuit board (not shown). In the conventional substrate structure, the window opening 113 is centrally disposed, that is, the center point of the window opening 113 is aligned with the center point of the substrate 1 1 〇 and the wafer 1 2 0 in each package unit. The inlet port 1 1 3 Α has the same opening area as the glue outlet 1 1 3 Β. As shown in FIGS. 1 and 3, in the process of forming the molding compound 140, the substrate 110 is sandwiched between the upper mold 10 and the lower mold 20, and the molding compound 140 is injected before the molding compound 140 is molded. The 140 precursor flows into the upper cavity to form the upper molding portion 141 and flows from the glue inlet 11 3 A to the lower cavity to form the lower molding portion 142. Further, as shown in Figs. 1 and 3, the filling space of the lower portion 200919655 of the sealing portion 1 42 is smaller than that of the upper mold.卩14丨, the lower mold cavity Μ2 under the lower mold portion 142 is greater than + s, and the mold flow speed is 1 4 1A above the upper mold portion 1 41. In this case, the 兮In the case of 5 hai, the mold sealing portion 142 will first fill the lower mold cavity and earlier than the upper mold sealing portion I 4 1 5 丨丨 # b 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 咖 113 113 113 113 113 113 113 113 113 113 113 113 U2 will pass through the glue outlet 113B to the upper mold portion (4) and continue to add the mold flow until the upper mold portion (4) fills the upper mold cavity, resulting in a time difference which causes the lower mold portion 142 to be The bottom surface of the substrate (4)

產生溢膠142B(如第1圖所示),甚至覆蓋至該些外接塾 1 1 5 ’使部份外接端子丨5 〇接合 较不良。此外,該下模封部 142會由該出膠口 U3B喷出產生上模流干擾,影響原在上 模穴内空氣的排出’易於該上模封部141内形成氣泡 "IB(如第i圖所示),使得該窗口型封裝構造i⑽的 變差。 【發明内容】 本發月之主要目的係在於提供一種窗口上下模流平衡之 :裝構造與封裝方法’藉由開窗槽孔之位移偏心以形成口 徑狹窄之人膠π,進而減緩下模流之模流速度達到上下模流 平衡之功效,避免下模流之模流速度過快而形成溢膠與氣泡 之缺陷。 本發明之次一目的係在於提供一種窗口上下模流平衡之 封裝構造與封裝方法,以於形成模封膠體之過程中防止該模 封膠體向外溢膠,避免基板受到該模封膠體之污染。 依據本發明之一種窗口上下模流平衡之封裝構造係包含 基板、一晶片、複數個電性連接元件以及一模封膠體。該 200919655 基板係具有一上表面、一下矣 下表面以及至少一開窗槽孔,該上 表面係包含有一黏晶區以B , m ^ 匕以及一包圍該黏晶區與該開窗槽孔 之上模封區,該下表面俜 你包含有一包圍該開窗槽孔之下模封 區,並且該開窗槽孔之兩端传 細係幵y成為一超出該黏晶區之入膠 口以及-超出該黏晶區之出膠口 ’該入膠口係小於該出膠 口。U係没置於該黏晶區並局部覆蓋該開窗槽孔而使該 入膠口與Θ出膠α露出。該些電性連接元件係'透過該開窗槽 孔電性連接該晶片與該基板。該模封膠㈣具有—上模封部 與-下模封部’該上模封部㈣成於該±模封區,該下模封 部係形成於該下模封區與該開窗槽孔,該上模封部與該下模 封部係連接於該入膠口與該出勝口,並且該上模封部係大於 邊下模封部。另揭示前述的窗口型封裝構造之製造方法。 在前述之封t構造巾,該㈣槽孔之巾㈣係可不對準 於該晶片之中心點。 在前述之封裝構造中 在前述之封裝構造中 接元件。 在前述之封裂構造中 澆口’其係鄰近於該入膠口 在前述之封裝構造中 之弧形邊緣。 在前述之封裝構造中 之弧形邊緣。 在前述之封裝構造中 §亥上模封部係可密封該晶片。 該下模封部係可密封該些電性連 该基板之該上表面係可形成有一 係 有—小於半圓形 該出膠口係可具有—概呈半圓形 該基板係可具有複數個外接墊, 8 200919655 其係设於該下表面且在該下模封區之外。 在前述之封裝構造中,可另包含有複數個外接端子,其 係設置於該些外接墊。 【實施方式] 依本發明之一具體實施例,如第4圖所示,一種窗口上 下模流平衡之封裝構造2〇〇係包含一基板210、一晶片22〇、 複數個電性連接元件230以及一模封膠體240。 "玄基板210係具有一上表面211、一相對之下表面212 以及至少—開窗槽孔213,該開窗槽孔213係為狹長狀並由 該上表面211貫穿至該下表面212〇該基板21〇係作為晶片 載體並具有單層或多層線路結構,例如印刷電路板。 如第4圖所示,並請配合參閱第5圖,該基板2ι〇之該 上表面211係包含有一黏晶區214以及一包圍該黏晶區214 與該開窗槽孔213之上模封區215。該黏晶區214係依據該 μ片220在该基板21〇之上表面211的黏貼覆蓋面積所界 定。該上模封區215係依據該模封膠體240在該基板210之 上表面211的覆蓋面積所界定,該上模封區215之外緣可與 該基板210之上表面211對齊或稍小。並且該開窗槽孔213 之兩端係形成為一超出該黏晶區214之入膠口 213A以及一 超出該黏晶區2 14之出膠口 21 3B。如第7圖所示,當該晶 片220貼設於該基板210之上表面211 ’該入膠口 213a與 邊出膠口 2 1 3B係為露出,以供該模封膠體240得順利通過 这入膠口 213 A與該出膠口 2 13B。其中該開窗槽孔21 3係為 偏心设置’以使該開窗槽孔2 1 3之中心點不對準於該黏晶區 200919655 214 ’故該入膠口 213a係小於該出膠口 213b。如第4圖所 示,並清配合參閱第6圖,該下表面212係包含有一包圍該 開由槽孔2 1 3之下模封區2 1 6,其係依據該模封膠體24〇在 該基板210之下表面212的覆蓋面積所界定。 請參閱第4及5圖所示,該基板21〇之該上表面211係 可塗佈有一黏晶膠2丨9 ,以供黏貼固定該晶片22〇,該黏晶 膠219之塗佈範圍係可略大於該黏晶區214(如第5圖所 示)。在本實施例中,該基板210之該上表面211係可形成 有一淹口 217’該澆口 217係鄰近於該入膠口 213A。在不同 實施例中,澆口亦可設於該基板21〇之外的基板條其它區 域。請參閱第6圖所示,該基板2丨〇係可具有複數個外接墊 218,其係設於該下表面212且在該下模封區2丨6之外該 些外接墊2 1 8係可呈多排排列或是格狀陣列型態。 該晶片220係具有一形成有複數個銲墊223之主動面221 以及一相對之背面222 ’其中該些銲墊223係可作為該晶片 220之内部積體電路元件之對外電極端。請參閱第4及7圖 所示,該晶片220之該主動面221係朝下設置於該黏晶區214 並利用該黏晶膠2 1 9固定於該基板2 1 〇上並顯露該些銲墊 223 ’且該晶片220係局部覆蓋該開窗槽孔213而使該入膠 口 213A與該出膠口 213B露出。該開窗槽孔213之中心點 係可不對準於該晶片220之中心點,以使該入膠口 2 1 3 A係 小於該出膠口 2 1 3B。請參閱第7圖所示,在一具體實施例 中,該入膠口 2 1 3 A係可具有一小於半圓形之弧形邊緣,該 出膠口 2 1 3B係可具有一概呈半圓形之弧形邊緣,以便於膠 10 200919655 體導入與排出。 請參閱第4圖所示,該些電性連接元件23〇係透過該開 由槽孔2 1 3電性連接該晶片220與該基板21 0。其中該些電 性連接το件230係可為打線形成之銲線,該些銲線之一端係 連接該晶片220之該些銲墊223,而另一端係連接至該基板 210在該下表面212之接指(圖未繪出),達到該晶片22〇與 該基板210之電性互連。The overflow glue 142B is produced (as shown in Fig. 1), and even covering the external ports 1 1 5 ' makes some of the external terminals 丨5 〇 bond poorly. In addition, the lower molding portion 142 is ejected from the glue outlet U3B to generate an upper mold flow interference, which affects the discharge of air in the upper mold cavity. "It is easy to form a bubble in the upper mold portion 141" (e.g., i As shown in the figure, the window type package structure i (10) is deteriorated. SUMMARY OF THE INVENTION The main purpose of this month is to provide a window upper and lower mold flow balance: loading structure and packaging method 'by eccentricity of the opening of the window slot to form a narrow diameter of the human glue π, thereby slowing down the lower mold flow The mold flow speed reaches the balance of the upper and lower mold flow balance, and the mold flow speed of the lower mold flow is prevented from being too fast to form a defect of overflowing glue and bubbles. A second object of the present invention is to provide a package structure and a package method for balancing the upper and lower mold flow of a window, so as to prevent the sealant from overflowing outward during the process of forming the mold seal, and to prevent the substrate from being contaminated by the mold sealant. A package structure for window upper and lower mold flow balancing according to the present invention comprises a substrate, a wafer, a plurality of electrical connection elements, and a molding compound. The 200919655 substrate has an upper surface, a lower crotch surface, and at least one window opening, the upper surface including a die bonding region B, m ^ 匕 and a surrounding of the die bonding region and the window opening. The upper mold sealing area, the lower surface 俜 includes a molding area surrounding the opening of the window opening, and the two ends of the opening window hole are transferred to the glue inlet of the viscous area and - beyond the glue exit of the viscous zone, the glue inlet is smaller than the glue outlet. The U-system is not placed in the die-bonding region and partially covers the window opening to expose the glue inlet and the glue-out glue α. The electrical connecting elements are electrically connected to the wafer and the substrate through the window opening. The mold sealant (4) has an upper mold portion and a lower mold portion. The upper mold portion (4) is formed in the ± mold seal portion, and the lower mold portion is formed in the lower mold portion and the window opening. The upper mold portion and the lower mold portion are connected to the glue inlet and the outlet, and the upper mold portion is larger than the lower mold portion. A method of manufacturing the aforementioned window type package structure is also disclosed. In the aforementioned t-covering towel, the (four) slotted towel (4) may be out of alignment with the center point of the wafer. In the aforementioned package construction, the components are connected in the aforementioned package configuration. In the aforementioned fracture configuration, the gate ' is adjacent to the arcuate edge of the glue inlet in the aforementioned package configuration. A curved edge in the aforementioned package construction. In the aforementioned package construction, the upper mold portion can seal the wafer. The lower sealing portion can seal the upper surface of the substrate, and the upper surface can be formed with a line-less than a semi-circular shape. The dispensing port can have a substantially semi-circular shape. The substrate system can have a plurality of The outer pad, 8 200919655 is disposed on the lower surface and outside the lower molding zone. In the above package structure, a plurality of external terminals may be further included, which are disposed on the external pads. [Embodiment] According to an embodiment of the present invention, as shown in FIG. 4, a package structure 2 of a window upper and lower mold flow balance includes a substrate 210, a wafer 22, and a plurality of electrical connection elements 230. And a molding encapsulant 240. "Hyun substrate 210 has an upper surface 211, an opposite lower surface 212, and at least a window opening slot 213 which is elongated and extends from the upper surface 211 to the lower surface 212. The substrate 21 is used as a wafer carrier and has a single layer or multilayer wiring structure such as a printed circuit board. As shown in FIG. 4, and referring to FIG. 5, the upper surface 211 of the substrate 2 ι includes a die-bonding region 214 and a mold enclosing the die-bonding region 214 and the window opening 213. Area 215. The die bond region 214 is defined by the adhesion coverage area of the μ piece 220 on the upper surface 211 of the substrate 21〇. The upper molding region 215 is defined by the coverage area of the molding compound 240 on the upper surface 211 of the substrate 210. The outer edge of the upper molding region 215 may be aligned with or slightly smaller than the upper surface 211 of the substrate 210. And the two ends of the window opening 213 are formed as a glue inlet 213A beyond the die-bonding zone 214 and a glue outlet 21 3B beyond the die-bonding zone 2 14 . As shown in FIG. 7, when the wafer 220 is attached to the upper surface 211 of the substrate 210, the glue inlet 213a and the edge glue outlet 2 1 3B are exposed, so that the mold sealing body 240 can pass smoothly. The glue inlet 213 A and the glue outlet 2 13B. The window opening 21 3 is eccentrically disposed such that the center point of the window opening 2 1 3 is not aligned with the die area 200919655 214 ', so the glue inlet 213a is smaller than the glue outlet 213b. As shown in FIG. 4, the lower surface 212 includes a molding region 2 1 6 surrounding the opening 2 1 3 , which is in accordance with the molding compound 24 . The coverage area of the lower surface 212 of the substrate 210 is defined. Referring to FIGS. 4 and 5, the upper surface 211 of the substrate 21 can be coated with an adhesive 2丨9 for adhering the wafer 22, and the coating range of the adhesive 219 is It may be slightly larger than the die bond region 214 (as shown in Fig. 5). In this embodiment, the upper surface 211 of the substrate 210 may be formed with a flood port 217' adjacent to the glue inlet 213A. In various embodiments, the gates may also be provided in other regions of the substrate strip outside of the substrate 21〇. Referring to FIG. 6 , the substrate 2 can have a plurality of external pads 218 disposed on the lower surface 212 and outside the lower molding region 2丨6, the external pads 2 18 Can be arranged in multiple rows or grid arrays. The wafer 220 has an active surface 221 formed with a plurality of pads 223 and an opposite back surface 222', wherein the pads 223 serve as external electrode terminals of the integrated circuit components of the wafer 220. Referring to FIGS. 4 and 7, the active surface 221 of the wafer 220 is disposed downwardly on the die attach region 214 and is fixed on the substrate 2 1 利用 by the adhesive 2 19 and exposes the solder. The pad 223' and the wafer 220 partially cover the window opening 213 to expose the glue inlet 213A and the glue outlet 213B. The center point of the window opening 213 may not be aligned with the center point of the wafer 220 such that the glue inlet 2 1 3 A is smaller than the glue outlet 2 1 3B. Referring to FIG. 7 , in a specific embodiment, the glue inlet 2 1 3 A may have a curved edge smaller than a semicircle, and the glue outlet 2 1 3B may have a semicircle. The curved edge of the shape is used to facilitate the introduction and discharge of the glue 10 200919655. Referring to FIG. 4, the electrical connecting elements 23 are electrically connected to the substrate 220 and the substrate 210 through the opening 212. The electrical connection τ member 230 can be a wire formed by wire bonding, one end of the bonding wire is connected to the pads 223 of the wafer 220, and the other end is connected to the substrate 210 at the lower surface 212. The fingers (not shown) reach the electrical interconnection of the wafer 22 and the substrate 210.

請參閱第4圖所示,該模封膠體24()係具有—上模封部 川與-下模封部242,該上模封部241係形成於該上模封 區215(如第5圖所示),該下模封部242係形成於該下模封 區川與該開窗槽A 213(如第6圖所示),該上模封部241 與-亥下模封部242係連接於該入膠口 2丨3Α與該出膠口 213Β ’並且該上模料241係大於該下模封部。該形成 於該基板21〇之該上表面211之上模封部241係可用以密封 ,晶片220,而該形成於該基板21〇之該下表面212且較少 量之下模封部242則密封該些電性連接元件23〇。 具體而言,該窗口型封|構造2〇〇係可另包含有複數個 外接端子25G,其係設置於該些外接塾218,以供作為輸入 端及/或輸出端以使該窗口型封裝構造2〇〇與外界裝置,如 與一印刷電路板(圖中未繪出)形成電性連接關係。該些外接 端子250係可包含銲球、錫膏、接觸墊或接觸針。 請參閱第4及8圖所示,在該模封膠體24G之形成過程 中’利用一上模具3 0與一 nr松曰,Λ丄 興下模具40夾置該基板210,以令 U 220係容設於該上模具3〇之上模穴中,令該開窗槽 200919655 孔213係對準於該下模具4〇之下模穴。當該模封膠體“ο 之前驅物注入至上模穴時,模封膠體前驅物流往上模穴以形 成該上模封部241 ’並經過該入膠口 213A流往下模穴以形 成6亥下模封部242 ’在固化之後以形成該模封膠體24〇。 因此’請參閱第6及7圖所示’藉由該開窗槽孔21 3位 移偏匕的方式所形成口徑狹窄的該入膠口 2 1 3 A,以減緩該 下模封。卩242之下模流速度242A,使得該下模流速度242A 與该上模封部241之上模流速度241A達到平衡(如第8圖所 不以均勻充填該上模封部241與該下模封部242,使該上 模封部241與該下模封部242中的每一角落均將均勻充填該 模封膠體240而不會有孔洞與溢膠現象(如第4圖所示卜其 中,該上模封部241與該下模封部242之前趨物會同時匯集 到該出膠o 213B,不會有干擾上模流之問題,以避免該模 封膠體240回包形成氣泡之缺陷。 ^此外,當該模封膠體240經由該入膠口 2 1 3 A而流入該下 模=40之模穴時,由於該入膠口 2UA之口徑狹窄而使該模 ί膠體24G之下模流速度242A減緩,縮短了等待該上模封 # 241填滿之時間差,使該模封膠體24〇之該下模封部 溢流入名基板21〇之該下表面212與該下模具4〇表面 之間的壓合間隙中,避免對該些外接墊218產生溢膠污染的 /題故解決了習知基板之外接墊與外接端子接合不良之問 題’進而提昇該窗口型㈣構造細之電性連接與傳輸品質。 本發明另揭示前述的窗口型封裝構造·之製造方法, 其步驟包括,首先提供上述之基板㈣,其係具有—上表面 12 200919655 下表面2 1 2以及至少一開窗槽孔2丨3,該開窗槽孔 2 1 3之兩端係形成為一超出該黏晶區2 14之入膠口 213 A以 及超出6亥黏晶區214之出膠口 213B,並且該入膠口 213A 係小於該出膠口 2 1 3 B。 接著,汉置上述之晶片22〇於該基板2丨〇上,以將該晶 片220之—主動面221朝下接置於該黏晶區214並使該入膠 口 213A與遠出膠口 2ΠΒ露出。在設置該晶片22〇後,形 成複數個電性連接元件23〇 ,例如打線形成之銲線,透過該 竭囪槽孔2 1 3電性連接該晶片220之該些銲塾223與該基板 210 ° 最後,形成一模封膠體240於該基板21〇之該上表面 211開囪槽孔2 1 3與該下表面2 1 2。在形成該模封膠體240 之過程中,如第4及8圖所示,利用一上模具3〇與一下模 具40夾置该基板2 1 〇,並注入該模封膠體24〇之前驅物。該 模封膠體240之上模封部241係形成於該上模封區215以密 封該晶片220,該模封膠體24〇之下模封部242係形成於該 下模封區2 1 6與該開窗槽孔2 1 3以密封該些電性連接元件 230,其中該上模封部241與該下模封部242係連接於該入 膠口 213A與該出膠口 213B’並且該上模封部241係大於該 下模封部242。利用縮小之入膠口 213 A,減緩形成該下模封 部242之下模流速度242A,故形成該上模封部241之上模 流速度241A與該下模流速度242 A可達到平衡,並匯合於 該出膠口 213B,如此可避免習知下模流速度242A過快所產 生的填膠空隙與溢膠問題。請參閱第4及8圖所示,藉由口 13 200919655 位狹乍之該入膠口 213Α?ΓΑ兮nr抬土丄* 242A、“ ΑΊ^該下核封部242之下模流速度 2Α滅緩,使該模封膠體24〇不致溢流至該些外接塾加, 故二有避免曲口型模封溢膠污染之功效’並且能沿用既有封 裝設備進行封裝作業, 程步驟。 要另夕卜⑦置几件,亦不會增加製 以上所述’僅是本發明的較佳實施例而已,並非對本發 = ;:=式上的限制,本發明技術方案範圍當依所附申請 二圍為準。任何熟悉本專業的技術人員可利用上述揭示 ,術内令作出些許更動或修飾為等同變化的等效實施 例’但凡是未脫離本發明技術方案的内容,依據本發 術實質對以上實施例所作 技 3 &例所作的任㈣早修改、等同變化與修 ,=仍屬於本發明技術方案的範圍内。 【圖式簡單說明】 圖1知由口型封裝構造橫切窗口之截面示意圖。 第ST:知窗口型封裝構造中一基板之上表面示意圖。 .習知窗π型封裝構造在模封時沿窗口剖切之基板截 面示音阁。 第4圖 第5圖 第6圓 第7圖 面示意圖。 依據本發明之—具體實施例 橫切窗口之載面示意圖。 依據本發明之一具體實施例 —基板之上表面示意圖。 依據本發明之一具體實施例 模封前之基板下表面示意圖 依據本發明之—具體實施例 ’ 一種窗口型封裝構造 該窗口型封裝構造中 該窗口型封裝構造中 該窗口型封裝構造在 14 200919655 模封前之基板上表面示意圖 〇 第8 圖:依據本發 明之一具體實施例 ,該窗口型封裝構造在 模封時沿 窗口剖切之基板截 面示意圖。 【主要元件符號說明】 10 上模具 2〇下模具 30 上模具 4〇 下模具 100 110 封裝構造 基板 111上表面 112下表面 113 開窗槽孔 113A入膠口 H3B出膠口 114 黏晶區 115外接墊 116黏晶膠 120 晶片 121主動面 122背面 123 130 140 鋒塾 電性連接元件 模封膠體 141上模封部 141A上模流速度 14 1B氣泡 142下模封部 142A下模流速度 142B溢膠 150外接端子 200 210 封裝構造 基板 2 11上表面 212下表面 213 開窗槽孔 2 1 3 A入膠口 213B出膠口 214 黏晶區 215上模封區 216下模封區 217 澆口 218外接墊 2 19黏晶膠 220 晶片 221主動面 222背面 223 230 銲墊 電性連接元件 240模封膠體 15 200919655 241上模封部 241A上模流速度 242下模封部 242A下模流速度 250外接端子Referring to FIG. 4, the molding compound 24() has an upper molding portion and a lower molding portion 242, and the upper molding portion 241 is formed in the upper molding region 215 (eg, the fifth As shown in the figure, the lower molding portion 242 is formed in the lower molding zone and the window opening A 213 (as shown in FIG. 6), and the upper molding portion 241 and the lower molding portion 242 are formed. It is connected to the glue inlet 2丨3Α and the glue outlet 213Β' and the upper molding material 241 is larger than the lower molding portion. The molding portion 241 formed on the upper surface 211 of the substrate 21 can be used to seal the wafer 220, and the lower surface 212 of the substrate 21 is formed with a smaller amount of the lower portion 242. The electrical connecting elements 23 are sealed. Specifically, the window-type package structure 2 can further include a plurality of external terminals 25G disposed on the external ports 218 for inputting and/or outputting the window-type package. The structure 2 is electrically connected to an external device, such as a printed circuit board (not shown). The external terminals 250 can include solder balls, solder paste, contact pads or contact pins. Referring to Figures 4 and 8, during the formation of the molding compound 24G, an upper mold 30 and an nr loose tube are used to sandwich the substrate 210 to make the U 220 system. The hole 213 of the window opening 200919655 is aligned with the cavity below the lower mold 4〇. When the molding compound "ο the precursor is injected into the upper cavity, the molding precursor precursor flows to the upper cavity to form the upper molding portion 241 ' and flows through the rubber inlet 213A to the lower cavity to form 6 Hai. The lower molding portion 242' is formed to form the molding compound 24'' after curing. Therefore, 'see FIGS. 6 and 7' to form a narrow aperture formed by the displacement of the window opening 21 3 The glue port 2 1 3 A is used to slow down the lower mold. The mold flow speed 242A under the 卩242 is balanced such that the lower mold flow speed 242A is balanced with the upper mold flow speed 241A of the upper mold portion 241 (eg, 8th) The upper molding portion 241 and the lower molding portion 242 are not evenly filled, so that each of the upper molding portion 241 and the lower molding portion 242 will uniformly fill the molding compound 240 without There will be holes and overflows (as shown in Fig. 4, the upper molding portion 241 and the lower molding portion 242 will be collected at the same time to the dispensing o 213B, and there is no interference with the upper molding flow. The problem is to avoid the defect that the molding compound 240 is folded back to form bubbles. ^ In addition, when the molding compound 240 passes through the glue inlet 2 1 3 When A flows into the mold hole of the lower mold = 40, the mold flow speed 242A under the mold colloid 24G is slowed due to the narrow diameter of the glue inlet 2UA, and the time difference waiting for the upper mold seal #241 to fill is shortened. The lower sealing portion of the molding compound 24 is overflowed into the pressing gap between the lower surface 212 of the famous substrate 21 and the surface of the lower mold 4 to avoid overflow of the external pads 218. The contamination/inscription solves the problem of poor bonding between the external pads of the conventional substrate and the external terminals, and further improves the electrical connection and transmission quality of the window type (4) structure. The present invention further discloses the manufacture of the window type package structure described above. The method comprises the steps of: first providing the substrate (4) having the upper surface 12 200919655 lower surface 2 1 2 and at least one window opening 2丨3, the two ends of the window opening 2 1 3 being formed The glue inlet 213A beyond the glue crystal region 2 14 and the glue outlet 213B beyond the 6-hole crystal region 214, and the glue inlet 213A is smaller than the glue outlet 2 1 3 B. The wafer 22 is mounted on the substrate 2 to the wafer 220 The active surface 221 is placed downwardly in the die-bonding region 214 and exposes the glue inlet 213A and the far-opening glue port 2. After the wafer 22 is disposed, a plurality of electrical connection elements 23 are formed, for example, wire bonding is formed. a bonding wire through which the soldering pads 223 of the wafer 220 are electrically connected to the substrate 210°, and finally, a molding compound 240 is formed on the upper surface 211 of the substrate 21 The hole 2 1 3 and the lower surface 2 1 2 . During the process of forming the molding compound 240, as shown in FIGS. 4 and 8, the substrate 2 1 夹 is sandwiched by the upper mold 3 and the lower mold 40, And injecting the mold seal 24 〇 before the drive. The mold sealing portion 241 is formed on the upper molding region 215 to seal the wafer 220. The molding compound 24 is formed in the lower molding region 2 16 and The sash hole 213 is for sealing the electrical connection elements 230, wherein the upper molding portion 241 and the lower molding portion 242 are connected to the glue inlet 213A and the glue outlet 213B' The molding portion 241 is larger than the lower molding portion 242. With the reduced glue inlet 213 A, the lower mold flow speed 242A under the lower mold portion 242 is slowed down, so that the upper mold flow speed 241A and the lower mold flow speed 242 A can be balanced. And merged with the glue outlet 213B, so as to avoid the problem of the glue gap and the glue overflow caused by the conventional lower mold flow speed 242A. Please refer to the 4th and 8th drawings, the mouth of the hole is 213Α?ΓΑ兮nr by the mouth 13 200919655. 抬 r r r 242 242 242 242 242 242 242 242 242 242 该 该 该 该 该 该 该 该 该 该 该 该 该 该Slowly, the mold encapsulant 24 does not overflow to the external joints, so the effect of avoiding the contamination of the curved mold seal overflows can be carried out and the packaging operation can be carried out using the existing packaging equipment. The present invention does not add to the above description, which is merely a preferred embodiment of the present invention, and is not limited to the present invention. Any person skilled in the art can use the above disclosure to make a few changes or modifications to the equivalent embodiment of the invention, but the content of the present invention is not deviated from the technical solution of the present invention. Any of the four (4) early modifications, equivalent changes and repairs made by the above embodiments are still within the scope of the technical solution of the present invention. [Simplified Schematic] FIG. 1 is a cross-sectional window formed by a lip-shaped package structure. Schematic diagram of the section. ST: Know the window Schematic diagram of the upper surface of a substrate in the package structure. The conventional window π-type package structure is shown in the window section of the substrate section which is cut along the window during the molding. Fig. 4, Fig. 5, Fig. 6 and Fig. 7 is a schematic view. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A schematic diagram of a carrier surface transverse to a window. A schematic diagram of an upper surface of a substrate in accordance with an embodiment of the present invention. A schematic diagram of a lower surface of a substrate prior to molding in accordance with an embodiment of the present invention is in accordance with the present invention - DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A window-type package structure The window-type package structure of the window-type package structure in the window-type package structure is a schematic diagram of the upper surface of the substrate before the molding of 14 200919655. FIG. 8 is a view of an embodiment of the present invention. The window type package structure is a schematic cross-sectional view of the substrate cut along the window during molding. [Main component symbol description] 10 Upper mold 2 〇 lower mold 30 Upper mold 4 〇 lower mold 100 110 Package construction substrate 111 upper surface 112 lower surface 113 window slot 113A into the glue port H3B glue outlet 114 glue crystal region 115 external pad 116 adhesive glue 120 wafer 121 active surface 12 2 Back surface 123 130 140 Front edge electrical connection element Molding compound 141 Upper molding portion 141A Mold flow speed 14 1B Bubble 142 Lower molding portion 142A Lower mold flow speed 142B Overflow 150 External terminal 200 210 Package structure substrate 2 11 Upper surface 212 lower surface 213 window opening hole 2 1 3 A glue inlet 213B glue outlet 214 glue crystal area 215 upper mold sealing area 216 lower mold sealing area 217 gate 218 external pad 2 19 adhesive crystal 220 wafer 221 active Face 222 back 223 230 pad electrical connection element 240 mold seal 15 200919655 241 upper mold part 241A upper mold flow speed 242 lower mold part 242A lower mold flow speed 250 external terminal

1616

Claims (1)

200919655 十、申請專利範圍: 1、一種窗口上下模流平衡之封裝構造,包含: 一基板,具有—上表面、一下表面以及至少一開窗槽 孔,該上表面係包含有一黏晶區以及一包圍該黏晶區與 該開窗槽孔之上模封區,該下表面係包含有一包圍該開 由槽孔之下模封區’並且該開窗槽孔之兩端係形成為一 Γ200919655 X. Patent application scope: 1. A package structure with a window upper and lower mold flow balance, comprising: a substrate having an upper surface, a lower surface and at least one window opening, the upper surface comprising a die bonding region and a Surrounding the die-bonding region and the molding region above the window opening, the lower surface includes a molding region surrounding the opening and the opening of the slot and the two ends of the window opening are formed 超出該黏晶區之入膠口以及一超出該黏晶區之出膠口, 該入膠口係小於該出膠口; -晶片,設置於該黏晶區並局部覆蓋該開窗槽孔而使該 入膠口與該出膠口露出; 複數個電性連接元件,透過該開窗槽孔電性連接該 與該基板;以及 Ba -模封膠體,具有-上模封部與—下模封部,該上 部係形成於該上模封區,該下模封部㈣成於該下模封 =該=料,該上模封部與該下㈣部係連接於該 2、如由社* 且4上模封部係大於該下模封部。 申明專利範圍第】項 办 ^ 裝槿、生# ^上下模流平衡之封 中心點。 甲點係不對準於該晶片之 如申-專利範圍第i項所述 裝構造,其中續上下模μ +衡之封 Τ。亥上模封部係密封該晶片。 、如申請專利範圍第1或3 + 之封妒構1甘士 項所述之® 口上下模流平衡 于裝構k,其_該τ模 衡 、如申請專利範圍第i項/ 些電性連接元件。 項所述之窗口上下模流平衡之封 17 5 200919655 其係 裝構造,其中該基板之該上表面係形成有一澆 鄰近於該入膠口。 6'如中請專利範圍第i項所述之窗D上下模流平衡之封 裝構造’其中該入勝口係具有一小於半圓形之弧形邊緣。 7、 如申請專利範圍第1或6項所述之窗口上下模流平衡 之封裝構造’其中該出膠σ係具有_概呈半圓形之狐形 邊緣。The glue inlet is beyond the glue outlet of the die-bonding zone, and the glue inlet is smaller than the glue outlet; the wafer is disposed in the die-bonding zone and partially covers the window opening. Exposing the glue inlet and the glue outlet; a plurality of electrical connection elements are electrically connected to the substrate through the window opening; and the Ba-molding body has an upper mold portion and a lower mold a sealing portion, the upper portion is formed in the upper molding portion, the lower molding portion (4) is formed in the lower molding = the material, and the upper molding portion and the lower (four) portion are connected to the second portion, such as * and the upper mold portion is larger than the lower mold portion. Affirmation of the scope of patents] Item ^ Installation, production # ^ upper and lower mold flow balance of the center point. The nail point is not aligned with the wafer as described in the scope of the patent-claim range item i, wherein the upper and lower molds are replaced by the upper and lower molds. The upper mold seal seals the wafer. For example, the upper and lower mold flow balances described in the section 1 or 3 + of the patent application range 1 or 3 + are balanced in the configuration k, which is the τ mode balance, as in the patent application scope item i / some electrical properties Connecting components. The upper and lower mold flow balance seals of the window are described. 17 5 200919655 The mounting structure, wherein the upper surface of the substrate is formed with a pouring adjacent to the glue inlet. 6' The encapsulation structure of the upper and lower mold flow balances of the window D as described in item i of the patent scope, wherein the entrance has a curved edge smaller than a semicircle. 7. The package structure of the upper and lower mold flow balance of the window of claim 1 or 6, wherein the glue σ system has a semi-circular fox-shaped edge. 8、 如申請專利範圍第i項所述之窗π上下模流平衡之封 裝構造,纟中該基板係具有複數個外絲,其係設於該 下表面且在該下模封區之外。 9、 如申請專利範圍第8項所述之窗σ上下模流平衡之封 裝構造m有減個夕卜接端+,其係設置於該些外 接墊。 1、一種窗口上下模流平衡之封裝方法,包含: 提供一基板,具有一上表面、一下表面以及至少—開窗 槽孔,該上表面係包含有一黏晶區以及一包圍該黏晶區 與該開窗槽孔之上模封區,該下表面係包含有一包圍該 開窗槽孔之下模封區,並且該開窗槽孔之兩端係形成為 一超出§玄黏晶區之入膠口以及一超出該黏晶區之出膠 口’該入膠口係小於該出膠口; 設置一晶片於該黏晶區並局部覆蓋該開窗槽孔而使該 入膠口與該出膠口露出; / 形成複數個電性連接元件,透過該開窗槽孔電性連接該 晶片與該基板;以及 18 200919655 形成-模封膠體,具有一上模封部與一 模封部係形成於該上模封區,、D ,該上 , 及下模封部係形成於該下 ㈣區與㈣窗槽孔’該上模封部與訂模封部係連接 膠口與該出膠σ ’並且該上模封部係大於該下模 11封=專::圍第㈣所述之“上下模流平衡之8. The package structure of the window π upper and lower mold flow balance as described in claim i, wherein the substrate has a plurality of outer wires disposed on the lower surface and outside the lower mold region. 9. The package structure m of the upper and lower mold flow balance of the window σ as described in claim 8 of the patent application has a subtraction joint +, which is disposed on the outer pads. A method for packaging a window upper and lower mold flow balance, comprising: providing a substrate having an upper surface, a lower surface, and at least a window opening, the upper surface comprising a die bonding region and a surrounding of the die bonding region a molding area above the window opening, the lower surface includes a molding area surrounding the opening of the window opening, and the two ends of the window opening are formed to be beyond the sigma a glue port and a glue outlet opening beyond the glue crystal region, wherein the glue inlet is smaller than the glue outlet; a wafer is disposed in the die bond region and partially covers the window opening hole to make the glue inlet and the outlet The glue port is exposed; / forming a plurality of electrical connecting elements, electrically connecting the wafer and the substrate through the window opening; and 18 200919655 forming a mold sealing body, having an upper molding portion and a molding portion In the upper molding zone, D, the upper and lower molding portions are formed in the lower (four) zone and the (four) window slot hole, the upper molding portion and the binding die sealing portion are connected with the glue opening and the glue discharge σ 'And the upper mold portion is larger than the lower mold 11 seal = special:: circumference (4) The balance of the lower mold flow 成該上模封部與該下模封部之模流速 度係為平衡,以匯合於該出膠口。 12、如申請專利範圍第1〇 封裝方沬^ * 汁忒之由口上下模流平衡之 …該開窗槽孔…點係不對準於該晶片 U、如申請專利範圍第1〇 封梦太土 ^ 貝所述之固口上下模流平衡之 于裝方法’其t該上模封部係密封該晶片。 ' 專利範圍第…項所述之窗口上下模流平 件。其中該下模封部係密封該些電性連接元 封裝=專Γ範圍第1G項所述之窗口上下模流平衡之 係鄰近於,其中該基板之該上表面係形成有-澆口,其 係鄰近於該入膠口。 :::專利範圍第10項所述之窗口上下模流平衡之 緣。’其中該入膠口係具有-小於半圓形之弧形邊 17、如申請專利範圍第10或16頊所γ 衡之封巢方法,其中該出膠σ传具:;口上下模流平 係具有一概呈半圓形之弧 19 200919655 形邊緣。 18、如中請專利範圍帛iQ項所述之窗口上下模流平衡之 法八中°亥基板係具有複數個外接塾,其係設於 該下表面且在該下模封區之外。 、士申明專利範圍第丨8項所述之窗口上下模流平衡之 封裝方法,另包含有:設置複數個外接端子於該呰外接 塾。 Γ:The mold flow rate of the upper mold portion and the lower mold portion is balanced to meet the glue discharge port. 12. If the scope of the patent application is 1st, the package is 沬^ * The juice is balanced by the upper and lower molds... The window slot is not aligned with the wafer U, as in the patent application. The upper and lower mold flow balances described in the soil shell are balanced by the mounting method 'the upper mold portion seals the wafer. 'The window upper and lower mold flow parts mentioned in the scope of the patent. Wherein the lower molding portion is sealed adjacent to the upper and lower mold flow balances of the window of the first aspect of the first aspect, wherein the upper surface of the substrate is formed with a gate, It is adjacent to the glue inlet. ::: The edge of the upper and lower mold flow balance of the window described in item 10 of the patent scope. Wherein the rubber inlet has a curved edge 17 which is smaller than a semicircular shape, and the sealing method of the gamma balance according to the 10th or 16th patent of the patent application scope, wherein the sigma sigma is: It has a semi-circular arc 19 200919655 shaped edge. 18. The upper and lower mold flow balances of the window described in the patent scope 帛iQ item have a plurality of external rafts which are disposed on the lower surface and outside the lower mold sealing zone. The method for encapsulating the upper and lower mold flow balance of the window described in Item 8 of the patent scope of the patent, further includes: setting a plurality of external terminals to the external connection of the 塾. Γ: 2020
TW096140391A 2007-10-26 2007-10-26 Semiconductor package and packaging method for balancing top and bottom moldflows from window TWI347658B (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115050272A (en) * 2021-03-09 2022-09-13 西安青松光电技术有限公司 COB module processing method, COB module and COB display screen

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115050272A (en) * 2021-03-09 2022-09-13 西安青松光电技术有限公司 COB module processing method, COB module and COB display screen
CN115050272B (en) * 2021-03-09 2023-09-22 西安青松光电技术有限公司 COB module processing method, COB module and COB display screen

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