TW200915447A - Method for manufacturing a semiconductor component and semiconductor component - Google Patents

Method for manufacturing a semiconductor component and semiconductor component Download PDF

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Publication number
TW200915447A
TW200915447A TW97130475A TW97130475A TW200915447A TW 200915447 A TW200915447 A TW 200915447A TW 97130475 A TW97130475 A TW 97130475A TW 97130475 A TW97130475 A TW 97130475A TW 200915447 A TW200915447 A TW 200915447A
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TW
Taiwan
Prior art keywords
semiconductor wafer
semiconductor
manufacturing
grid
carrier
Prior art date
Application number
TW97130475A
Other languages
Chinese (zh)
Inventor
Dieter Eissler
Alexander Heindl
Original Assignee
Osram Opto Semiconductors Gmbh
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Publication date
Application filed by Osram Opto Semiconductors Gmbh filed Critical Osram Opto Semiconductors Gmbh
Publication of TW200915447A publication Critical patent/TW200915447A/en

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Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C41/00—Shaping by coating a mould, core or other substrate, i.e. by depositing material and stripping-off the shaped article; Apparatus therefor
    • B29C41/02—Shaping by coating a mould, core or other substrate, i.e. by depositing material and stripping-off the shaped article; Apparatus therefor for making articles of definite length, i.e. discrete articles
    • B29C41/12—Spreading-out the material on a substrate, e.g. on the surface of a liquid
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C41/00—Shaping by coating a mould, core or other substrate, i.e. by depositing material and stripping-off the shaped article; Apparatus therefor
    • B29C41/02—Shaping by coating a mould, core or other substrate, i.e. by depositing material and stripping-off the shaped article; Apparatus therefor for making articles of definite length, i.e. discrete articles
    • B29C41/20—Shaping by coating a mould, core or other substrate, i.e. by depositing material and stripping-off the shaped article; Apparatus therefor for making articles of definite length, i.e. discrete articles incorporating preformed parts or layers, e.g. moulding inserts or for coating articles
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C41/00—Shaping by coating a mould, core or other substrate, i.e. by depositing material and stripping-off the shaped article; Apparatus therefor
    • B29C41/34—Component parts, details or accessories; Auxiliary operations
    • B29C41/36—Feeding the material on to the mould, core or other substrate
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C41/00—Shaping by coating a mould, core or other substrate, i.e. by depositing material and stripping-off the shaped article; Apparatus therefor
    • B29C41/34—Component parts, details or accessories; Auxiliary operations
    • B29C41/38—Moulds, cores or other substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/568—Temporary substrate used as encapsulation process aid
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/0052—Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52—Encapsulations
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05—Patterning and lithography; Masks; Details of resist
    • H05K2203/0562—Details of resist
    • H05K2203/0582—Coating by resist, i.e. resist used as mask for application of insulating coating or of second resist
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components

Abstract

This invention relates to a method for manufacturing a semiconductor component (9), where a grating (7) is formed on a carrier (1), so that recesses are formed, several semiconductor chips (4) are arranged on the carrier (1), so that the semiconductor chips (4) are positioned inside the recesses; the recesses, in which the semiconductor chips (4) are arranged, are filled with a cover-material (8), so that the recesses are filled till to the height of the grating (7), then the cover-material (8) is hardened and the semiconductor chips (4) are separated from the carrier (1) and the grating (7).

Description

200915447 九、發明說明： 【發明所屬之技術領域】 本發明涉及一種半導體組件之製造方法，其中在半導 體組件之半導體晶片上施加一覆蓋層。例如，需要此種覆 蓋層，以保護該半導體晶片。在一些應用中，由半導體晶 片所產生的光被散射，此時該覆蓋層可具有使光散射的微 粒。在另一些應用中，可將半導體晶片所產生的光之全部 或一部分予以轉換，以較佳地產生混合光。於此，由半導 體晶片所發出的例如藍色的輻射之一部分轉換成黃色光， 使整體上由藍光和黃光所構成的混合輻射可被查覺。在適 當地調整一混合比例和適當地選取波長之下，所發出的混 合光可被視爲白光。 就覆蓋層的施加而言，可有不同的技術。例如，可以 網版印刷法來施加一種層，或一覆蓋材料可設定在晶片表 面上而成爲小板。在另一種技術中，對該半導體晶片進行 澆注，此時該澆注材料含有所希望的微粒。特別是在應產 生一種將光予以轉換的層時，所使用的發光微粒由於其大 小而發生沈積。發光微粒因此在晶片的上側上形成一發光 材料層。此時在該覆蓋材料之其餘的體積中只存在少數的 發光微粒。 實際上’以固定的層厚度來產生多個覆蓋層時是有問 題的。特別是在該覆蓋層具有將光予以轉換用的特性以產 生一種混合光時更是有問題。在一種非均句的層厚度中， 由半導體晶片所產生的輻射和由轉換所得到的輻射之混合 200915447 比例不是在整個晶片表面上都是相同的，因此不能確保在 不同的發射方向中都可發出相同彩色的光。 【先前技術】 由EP 0907969 B1中已知一種半導體組件，其具有厚 度固定的電致發光轉換層。當然，並未設定“可如何簡單地 產生此種層”。 【發明內容】 本發明的目的是提供一種半導體組件之製造方法，藉 此能夠以簡易的方式來產生一種層厚度固定的覆蓋層。 上述目的可另外藉由一種半導體組件之製造方法來達 成’此時一種柵格配置在一載體上，以形成多個凹口；多 個半導體晶片配置在載體上，使半導體晶片定位在凹口 中，各凹口中以一種覆蓋材料來塡入，使凹口被塡滿至該 柵格之高度爲止’然後使該覆蓋材料硬化且將半導體晶片 由該載體和柵格中分離。 藉由本發明所形成的柵格來達成一種高度參考性，以 便在該柵格之凹口中塡入一覆蓋材料時該半導體晶片可具 有一種固定的厚度，且該覆蓋層亦具有一固定的層厚度。 依據上述方法之至少一實施形式，以上述方法在半導 體晶片上所形成的層基本上具有一固定的層厚度。所謂“基 本上”具有·固定的層厚度是指，由製造條件下的波動觀 之，該層具有一平坦、光滑的外表面。 在一較佳的方法中’該柵格由光阻所形成，其在該覆 蓋材料硬化之後又以簡單的方式去除。在本發明之方法的 200915447 另一有利的佈置中’首先製備一種柵格且隨後將該半導體 晶片插入至由柵格所形成的凹口中。 以所期望的數量來施加該覆蓋材料的一種最有·利的可 能性在於’首先以過多的量來施加該覆蓋材料且然後扣除 該概格的局度。 當半導體晶片在該晶片之共同的側面上具有終端時特 別有利’該共同的側面是與具有該覆蓋層之側面相遠離。 然而’亦可應用在相面對的側面上具有接觸區的半導體晶 片上。此時必須設有一種凹入區，以便稍後可與半導體晶 片之一接觸區相接觸。 當柵格兀件之高度及其與半導體晶片之距離選擇成使 所形成的層在上側上和側面上具有相同的層厚度時特別有 利。 當該覆蓋材料具有將光予以轉換的特性（例如，將光轉 換用的微粒）時上述方法是有利的。在此種情況下，特別重 要的是’具有該覆蓋材料之層具有固定的層厚度。 依據上述方法之至少一實施形式，該柵格形成在一種 帶上或一種塑料晶圓上。 依據上述方法之至少一實施形式，該覆蓋材料以刮刀 法或潛浸法來施加而成。 依據上述方法之至少一實施形式，該覆蓋材料首先以 過量的方式施加而成且然後扣除該柵格的高度。 依據上述方法之至少一實施形式，該覆蓋材料以旋塗 法施加而成。 200915447 依據上述方法之至少一實施形式’該覆蓋材料以微劑 量的方式而塡入至個別的凹口中。 依據上述方法之至少一實施形式，該覆蓋材料至少具 有可將光予以轉換的特性。例如，可在該覆蓋材 m竹枓中加入 一種電致發光轉換材料之微粒。 依據上述方法之至少一實施形式’該覆蓋材料具有將 光予以散射的特性。例如，可在該覆蓋材料中加 1 T训入一種將 光予以散射的材料之微粒。 依據上述方法之至少一實施形式，該覆蓋材料具有一 種抗反射性的層。 依據上述方法之至少一實施形式，藉由多次 心成一珊 格且以覆蓋材料來塡入而依序施加多個層。 此外’本發明提供一種半導體組件的製造方法，其中 -在一基板上施加多個依序配置的半導體層序列，其 用來在操作時發出光， ~BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of fabricating a semiconductor device in which a cap layer is applied over a semiconductor wafer of a semiconductor package. For example, such a cover layer is required to protect the semiconductor wafer. In some applications, the light produced by the semiconductor wafer is scattered, at which point the cover layer can have particles that scatter light. In other applications, all or a portion of the light produced by the semiconductor wafer can be converted to preferably produce mixed light. Here, a part of, e.g., blue, radiation emitted by the semiconductor wafer is partially converted into yellow light, so that the mixed radiation composed entirely of blue light and yellow light can be detected. The mixed light emitted can be regarded as white light when the mixing ratio is appropriately adjusted and the wavelength is appropriately selected. There are different techniques for the application of the cover layer. For example, a layer may be applied by screen printing, or a cover material may be set on the surface of the wafer to form a small plate. In another technique, the semiconductor wafer is cast while the potting material contains the desired particles. In particular, when a layer for converting light is to be produced, the luminescent particles used are deposited due to their size. The luminescent particles thus form a layer of luminescent material on the upper side of the wafer. At this time, only a small amount of luminescent particles exist in the remaining volume of the covering material. In fact, it is problematic to produce a plurality of cover layers with a fixed layer thickness. This is especially problematic when the cover layer has the property of converting light to produce a mixed light. In a layer thickness of a non-uniform sentence, the ratio of the mixture of radiation generated by the semiconductor wafer and the radiation obtained by the conversion is not the same across the entire wafer surface, and thus cannot be ensured in different emission directions. Emit the same colored light. A prior art semiconductor assembly is known from EP 0 907 969 B1, which has a permanently fixed electroluminescent conversion layer. Of course, there is no “how to simply create such a layer”. SUMMARY OF THE INVENTION An object of the present invention is to provide a method of manufacturing a semiconductor component, whereby a cover layer having a fixed layer thickness can be produced in a simple manner. The above object can additionally be achieved by a manufacturing method of a semiconductor component. At this time, a grid is disposed on a carrier to form a plurality of recesses; a plurality of semiconductor wafers are disposed on the carrier to position the semiconductor wafer in the recess. Each of the recesses is pierced with a covering material such that the recess is filled to the height of the grid 'then then the covering material is hardened and the semiconductor wafer is separated from the carrier and the grid. A high degree of reference is achieved by the grid formed by the present invention such that the semiconductor wafer can have a fixed thickness when a cover material is inserted into the recess of the grid, and the cover layer also has a fixed layer thickness . According to at least one embodiment of the above method, the layer formed on the semiconductor wafer in the above manner has substantially a fixed layer thickness. By "substantially" having a fixed layer thickness is meant that the layer has a flat, smooth outer surface as a function of fluctuations in the manufacturing conditions. In a preferred method, the grid is formed by a photoresist which is removed in a simple manner after the covering material has hardened. In another advantageous arrangement of the method of the invention of 200915447, a grid is first prepared and subsequently inserted into a recess formed by the grid. One of the most promising possibilities for applying the cover material in the desired amount is that the cover material is first applied in an excessive amount and then the degree of the frame is deducted. It is particularly advantageous when the semiconductor wafer has terminations on the common side of the wafer. The common side is remote from the side having the cover. However, it can also be applied to a semiconductor wafer having a contact region on the facing side. A recessed area must be provided at this point so that it can later come into contact with a contact area of the semiconductor wafer. It is particularly advantageous when the height of the grid element and its distance from the semiconductor wafer are selected such that the layer formed has the same layer thickness on the upper side and on the side. The above method is advantageous when the covering material has a property of converting light (for example, particles for converting light). In this case, it is particularly important that the layer having the covering material has a fixed layer thickness. According to at least one embodiment of the above method, the grid is formed on a strip or on a plastic wafer. According to at least one embodiment of the above method, the covering material is applied by a doctor blade method or a submersible method. According to at least one embodiment of the above method, the covering material is first applied in an excess and then the height of the grid is subtracted. According to at least one embodiment of the above method, the covering material is applied by spin coating. 200915447 According to at least one embodiment of the above method, the covering material is microinjected into individual recesses. According to at least one embodiment of the above method, the covering material has at least the property of converting light. For example, a particle of an electroluminescent conversion material may be added to the cover material m. According to at least one embodiment of the above method, the covering material has a property of scattering light. For example, 1 T can be added to the cover material to train a particle of material that scatters light. According to at least one embodiment of the above method, the covering material has an antireflective layer. According to at least one embodiment of the above method, the plurality of layers are applied in sequence by multiple times the core is formed and the cover material is inserted. Further, the present invention provides a method of fabricating a semiconductor device in which - a plurality of sequentially arranged semiconductor layer sequences are applied on a substrate for emitting light during operation,

-在基板上形成一柵格，以形成多個凹口，M U U中配 置著半導體層序列， -配置著半導體層序列之各凹口中以一種覆蓋材料末 塡入’使凹口被塡滿至該柵格之高度爲止， -使該覆蓋材料硬化， -去除該柵格，以及 -劃分該基板’以獲得個別的半導髀組件，宜患 ^ "、料句基 板α卩、半導體層序列和一由該覆蓋材料所形成的覆蓋元件 本發明以下將依據實施例來描述。 200915447 【實施方式】 第1圖顯示一載體，其上依據本發明的方法配置著一 種柵格和半導體晶片。載體1由硬的第一載體部2和其上 所配置的薄膜3所構成。如第2圖所示’在該載體上設置 半導體晶片4。半導體晶片4本身由基板（例如’藍寶石） 和一種所謂磊晶層6所構成。磊晶層6是一種半導體層序 列，其施加在基板5上且在操作時發出輻射。例如，磊晶 層6是一種鎵-氮化物層。較佳是形成該磊晶層，使其產 ' 生一種波長小於470nm之藍光。依據本實施例’半導體晶 片4配置在該載體1上’使該磊晶層位於該載體1之薄膜 3上。 在另一種佈置中，使用一種無基板之半導體晶片。發 生在基板中的光損耗因此可予以避免。此外，能製成很薄 的半導體組件。 載體1之目的是：將多個半導體晶片4定位在載體1 上，此時在半導體晶片之間保持一種確定的距離a。薄膜3 亦可由多個薄膜層所構成，各薄膜層具有不同的解除 (release)-溫度。藉由一層或多層之薄膜，則半導體組件 在此處所述的製造方法結束之後又可由載體1解除而使半 導體晶片4不會受損。 在下一步驟中，如第3圖所示’在該載體1上施加一 柵格。多個柵格元件7配置在半導體晶片4之間。第3圖 中顯示一設有半導體晶片4和栅格元件7之載體1之橫切 面。第3圖中在一方向中只能辨認一柵格元件7。與此一 200915447 方向成橫向的方向中同樣延伸著多個栅格元件，使每一個 半導體晶片4都由四個柵格元件所圍繞著。須測量各柵格 元件的厚度，以便在柵格元件7和半導體晶片4之間保留 著一距離b。 在一較佳的方法中，柵格元件7是由光阻所形成，此 乃因可利用適當的方法且該光阻稍後又可容易地去除。 第4圖中顯示下一步驟。此步驟中，在整個配置上施 加一種覆蓋材料8，其塡入至多個凹口中，各凹口形成在 各柵格元件7之間。因此，半導體晶片4在全部的側面上 除了一區域之外都由該覆蓋材料所圍繞著，該區域是半導 體晶片4位於載體1上的區域或可設有一結合墊之區域。 此步驟中，甚至須塗布較塡入至凹口中還多的覆蓋材料。 該覆蓋材料8例如以刮刀來塗布。因此，不能準確地分配 該覆蓋材料之數量，以便一方面可完全塡滿各凹口，且另 一方面不會施加過量的覆蓋材料。此種困難性另外與“各柵 格元件7之高度只有數個1〇 μιη至數個1 0 0 μπι，，有關。 若不使用刮刀，則亦可使用一種旋塗方法。於此，由 載體、柵格和柵格中所容納的半導體晶片所形成的配置是 以高黏性的覆蓋材料來沾濕，這是藉由載體以高的角速率 之旋轉來分配而達成的。上述的“扣除高度”通常已不需 要。 在下一步驟中，如第5圖所示，該覆蓋材料在柵格元 件7的高度處被扣除。各柵格元件7因此用作距離支件且允 許在扣除步驟中只去除該突出於柵格元件之高度之覆蓋材 -10- 200915447 料。藉由此種扣除步驟，則可在半導體晶片4上形成一種 由該覆蓋材料8所構成的層，萁具有固定的層厚度。過量 的材料亦可被離心分離。如第5圖所示，半導體晶片4之 間的距離a、半導體晶片之厚度c以及柵格元件7之高度和 寬度之間須互相調整，以便在半導體晶片4之上側和半導 體晶片4之側面上形成多個層，其具有相同的厚度b。 依據不同的方向中所發出的光之所期望的彩色位置， 在各側面上該覆蓋元件可設有較大或較小的厚度。例如， —種沈積過程可使晶片的側面區域中依據比例而在該覆蓋 材料之“對一種轉換不重要，，的區域中只存在很少的發光微 粒。這可藉由一種較大的厚度來達成平衡。 在該覆蓋材料硬化之後進行下一步驟，此時將該由光 阻所構成的柵格元件7去除，如第6圖所示。現在，在該 載體1上存在多個半導體組件，其由半導體晶片4和一覆 蓋材料8所構成的層所形成，此時該層基本上在半導體晶 片之五個側面上延伸。各半導體組件9之間存在著一種距 離，其等於先前之柵格元件7之寬度。 然後’將該已硬化的載體部2去除，如第7圖所示。 半導體組件9現在只存在於該薄膜3上。在此i步驟中， 顯然當該薄膜3是由多個解除—溫度不同的薄膜層構成時 是有利的。朝向該已硬化的載體部2之薄膜層所具有的解 除τ溫度小於半導體組件9所配置的薄膜層的解除-溫度。 在加熱至第一解除-溫度時，可使該已硬化的載體部2被去 除’但該薄膜3仍黏合在半導體組件9上。只有在加熱至 -11- 200915447 第二解除-溫度時，半導體組件9才可輕易地由該薄膜3 中去除。 在另一形式中’使用一適當的黏合劑以取代該薄膜， 此時半導體組件同樣可藉由熱的作用而由載體中去除。亦 可使用一種雷射-剝離（Lift off)方法。 在半導體組件9由該薄膜分離之後，可獲得已製成的 半導體組件’如第8圖所示。此處須注意，第8圖是一種 切面圖，可辨認出該具有基板5和磊晶層6之半導體晶片 4。在一種實際之半導體組件中，亦可在半導體晶片4之此 側面上設置一種由該覆蓋材料8構成的層。 第8圖所示的晶片是用於“可由下側來形成接觸作 用”，即，半導體晶片之至少二個接觸區存在於—共同的側 面上。然而’亦可製成一種半導體晶片，其在二個相對的 側面上具有接觸區’即，在該覆蓋材料8所存在的此側面 上必須可與半導體晶片相接觸。這可藉由該覆蓋材料8中 的凹入區來達成。爲了在該半導體晶片之相對應的接觸面 上產生凹入區，則在第3圖所示的步驟中該上部接觸面上 的區域須以一種光阻元件10來覆蓋。這顯示在第9圖中。 光阻元件1 〇之上側調整至柵格元件7之高度處，使各光阻 元件10位於一種共同的平面中。凹口中以該覆蓋材料來塡 入時’未有任何覆蓋材料可到達該光阻元件1 〇之位置，因 此在光阻被去除之後在該光阻元件1 0之位置處仍在該覆 蓋材料8中保留著一凹入區，如第1 0圖所示。經由此—凹 入區，可使半導體晶片4稍後與一結合線相接觸。 200915447 在隨後的安裝過程中，可經由該凹入區而與半導體晶 片4相接觸。 在本發明的另一種方法中，各柵格元件不是由光阻來 形成而是設有一種載體，載體上則已形成一種柵格。此方 法顯示在第11和12圖中。例如，該載體是一種帶11，其 具有凹口。各凹口之間的隔離壁形成柵格。在第1 2圖所示 的下一步驟中，每一凹口中配置一個或多個半導體晶片。 然後，各凹口中就像先前的實施例一樣以一種覆蓋材料8 來塡入，以便在半導體晶片上形成一種一定厚度的層。在 由載體帶1 1之各凹口中去除這樣所形成的半導體組件之 後’可獲得多個已製成的半導體組件。 多個半導體組件亦可保留在各凹口中且柵格在中央處 穿過而使半導體組件分離，這樣可同時形成一種外殼部。 或亦可將半導體組件保留在該載體的凹口中，以便由多個 半導體組件來形成一種模組。此時在製成該載體時須考慮 半導體晶片之電性連接方式。 本發明不限於所示的實施例。例如，亦可設有一種具 有凹口之塑料晶圓以取代該載體帶u。藉由本方法，則亦 可產生模組’其中隨後藉由該覆蓋材料而將多個半導體晶 片互相連接。於是，由四個柵格元件所形成的凹口中配置 著多個半導體晶片且以該覆蓋材料來圍繞著。亦可藉由旋 塗法、微噴液法或潛浸法來施加該覆蓋材料。 種環氧樹脂或矽樹脂特別適合用作該覆蓋材料’其 可添加其匕成份。因此，如上所述，特別有利的是將發光 200915447 微粒或使光散射用的微粒相混合。然而，亦可使用其它成 份’以例如產生抗反射的特性。爲了產生抗反射的特性， 一種層序列特別有意義，其中個別的層由於材料或其它的 成份而具有不同的折射率。此外，亦可藉由本發明的方法 來施加多個層。於此’在具有該覆蓋材料之第一層硬化之 後設定其它的柵格材料’然後，在所形成的凹口中又以一 種覆盡材料來塡入。當設定其它的柵格元件之前將目前的 栅格元件去除時，則可產生新的柵格元件，其較第一柵格 元件還狹窄。於是，在新的柵格元件和由覆蓋材料所形成 之第一層之間形成一種側面中間區。隨後所施加的第二層 不只在半導體組件之上側上延伸，而且亦覆蓋該側面。 第13至17圖中顯示本發明之方法的另一實施例。本 實施例中該半導體晶片本身之基板用作載體，因此不使用 其它的載體。 在第1 3圖中所示的步驟中，在基板5 (例如，藍寶石） 上施加多個相鄰的區域，其所具有的半導體層序列中在稍、 後操作時將發出光。 半導體層序列6因此藉由光罩而只施加在特定的區域 中或施加在整面上，且藉由稍後的鈾刻而使個別應保留白勺 區域之間的區域被去除。 在第1 4圖所示的下一步驟中，在半導體層序列6之間 施加多個柵格元件7。於是，在基板5上又形成多個凹口， 此時半導體層序列6位於凹口中。 在第15圖所示的步驟中’各凹口中以一種覆蓋材料來 -14- 200915447 塡入至柵格元件之高度處爲止或藉由旋塗法而進行 此種塡入’使該覆蓋材料的數量準確地保留在凹口中，該 數量是將凹口塡充至上部邊緣爲止時所需的數量。 在第16圖所示的下一步驟中，去除各柵格元件7。 在下一步驟1 7中’將半導體組件劃分，此時該基板劃 分成個別的半導體層序列之間的區域。然而，亦可將多個 半導體晶片4 一起形成模組。例如，可在各覆蓋元件8上 形成凹入區’類似於第1 〇圖所示，以便可經由各結合線來 接觸半導體層序列6。因此，可對多個半導體層序列6個 別地進行控制。 第1 3至丨7圖之實施例所顯示的優點是“不需額外的載 體” °其它優點在於，半導體組件9之光未經由基板5而發 出，因此可達成高的效率。 由上述的不同形式所形成的實施例亦屬本發明。 本專利申請案主張德國專利申請案DE 10 2007 046 030.0 和DE 10 2007 〇53 06 7.8之優先權，其已揭示的整個內容在 此一倂作爲參考。 本發明當然不限於依據各實施例中所作的描述。反 之’本發明包含每一新的特徵和各特徵的每一種組合，特 別是包含各申請專利範圍或不同實施例之個別特徵之每一 種組合’當相關的特徵或相關的組合本身未明顯地顯示在 各申請專利範圍中或各實施例中時亦屬本發明。 【圖式簡單說明】 第1至8圖 本發明一種半導體組件之製造方法的各 200915447 步驟。 第9，1 0圖 依據另一方法來製造半導體組件。 第11，12圖 本發明之方法的另一實施例。 第1 3至1 7圖 本發明之方法的一實施例，其中使用 一晶 片_ 基 板 作 爲 載 體 〇 【主 要元 件 符 號 說 明 ] 1 載 體 2 硬 的 載 體 部 3 單 層 或 多 層 的 薄 膜 4 半 導 體 晶 片 5 基 板 6 晶 晶 層 7 柵 格 元 件 8 覆 蓋 材 料 9 半 導 體 組 件 10 光 阻 元 件 11 載 體 帶 17 載 體 帶 之 柵 格 a 半 導 體 晶 片 之 間 的距離 b 轉 換 層 的 厚 度 c 半 導 體 晶 片 之 厚 度Forming a grid on the substrate to form a plurality of recesses, the semiconductor layer sequence is arranged in the MUU, and the recesses are filled in the recesses of the semiconductor layer sequence Up to the height of the grid, - to harden the covering material, - to remove the grid, and - to divide the substrate 'to obtain individual semi-conducting components, preferably ^ ", the substrate α卩, the semiconductor layer sequence and A cover member formed of the cover material will be described below based on the embodiments. [Embodiment] Fig. 1 shows a carrier on which a grid and a semiconductor wafer are arranged in accordance with the method of the present invention. The carrier 1 is composed of a hard first carrier portion 2 and a film 3 disposed thereon. As shown in Fig. 2, the semiconductor wafer 4 is placed on the carrier. The semiconductor wafer 4 itself is composed of a substrate (e.g., 'sapphire) and a so-called epitaxial layer 6. The epitaxial layer 6 is a semiconductor layer sequence which is applied to the substrate 5 and emits radiation upon operation. For example, the epitaxial layer 6 is a gallium-nitride layer. Preferably, the epitaxial layer is formed to produce a blue light having a wavelength of less than 470 nm. According to this embodiment, the semiconductor wafer 4 is disposed on the carrier 1 such that the epitaxial layer is positioned on the film 3 of the carrier 1. In another arrangement, a substrateless semiconductor wafer is used. The loss of light that occurs in the substrate can therefore be avoided. In addition, a very thin semiconductor component can be fabricated. The purpose of the carrier 1 is to position a plurality of semiconductor wafers 4 on the carrier 1 while maintaining a certain distance a between the semiconductor wafers. The film 3 may also be composed of a plurality of film layers each having a different release-temperature. By means of one or more layers of the film, the semiconductor component can be removed by the carrier 1 after the end of the manufacturing process described herein, so that the semiconductor wafer 4 is not damaged. In the next step, a grid is applied to the carrier 1 as shown in Fig. 3. A plurality of grid elements 7 are disposed between the semiconductor wafers 4. Fig. 3 shows a cross section of a carrier 1 provided with a semiconductor wafer 4 and a grid member 7. In Fig. 3, only one grid element 7 can be identified in one direction. A plurality of grid elements are also extended in a direction transverse to the direction of the 200915447, such that each of the semiconductor wafers 4 is surrounded by four grid elements. The thickness of each grid element must be measured to maintain a distance b between the grid element 7 and the semiconductor wafer 4. In a preferred method, the grid member 7 is formed of a photoresist because an appropriate method can be utilized and the photoresist can be easily removed later. The next step is shown in Figure 4. In this step, a covering material 8 is applied over the entire configuration which is inserted into a plurality of recesses, each recess being formed between the respective grid members 7. Therefore, the semiconductor wafer 4 is surrounded by the covering material on all sides except for a region which is a region where the semiconductor wafer 4 is located on the carrier 1 or a region where a bonding pad can be provided. In this step, it is even necessary to apply more covering material than the indentation into the recess. The cover material 8 is applied, for example, with a doctor blade. Therefore, the amount of the covering material cannot be accurately distributed so that on the one hand, the notches can be completely filled, and on the other hand, an excessive covering material is not applied. This difficulty is additionally related to "the height of each grid element 7 is only a few 1 〇 μιη to several 1 0 0 μπι., if a doctor blade is not used, a spin coating method can also be used. Here, the carrier The arrangement of the semiconductor wafers contained in the grids and grids is wetted by a highly viscous cover material, which is achieved by the carrier being dispensed at a high angular rate of rotation. The height is generally not required. In the next step, as shown in Fig. 5, the covering material is subtracted at the height of the grid element 7. Each grid element 7 is thus used as a distance support and is allowed in the deduction step Only the covering material 10-200915447 protruding from the height of the grid member is removed. By this deduction step, a layer composed of the covering material 8 can be formed on the semiconductor wafer 4, and the crucible has a fixed layer. Thickness. Excess material may also be centrifuged. As shown in Fig. 5, the distance a between the semiconductor wafers 4, the thickness c of the semiconductor wafer, and the height and width of the grid elements 7 must be adjusted to each other in order to Wafer 4 A plurality of layers are formed on the upper side and the side of the semiconductor wafer 4, which have the same thickness b. The cover elements may be provided on each side depending on the desired color position of the light emitted in the different directions. A smaller thickness. For example, a deposition process can cause only a small amount of luminescent particles in the region of the side of the wafer that is "important for a conversion" in proportion to the proportion of the covering material. This can be achieved by a larger thickness. After the covering material is hardened, the next step is performed, at which time the grid member 7 composed of the photoresist is removed, as shown in Fig. 6. Now, on the carrier 1, there are a plurality of semiconductor components which are formed by a layer of a semiconductor wafer 4 and a covering material 8, which layer extends substantially on five sides of the semiconductor wafer. There is a distance between the semiconductor components 9 which is equal to the width of the previous grid element 7. Then, the hardened carrier portion 2 is removed as shown in Fig. 7. The semiconductor component 9 is now only present on the film 3. In this i step, it is apparent that it is advantageous when the film 3 is composed of a plurality of film layers having different release-temperatures. The film layer facing the hardened carrier portion 2 has a temperature at which the τ is less than the temperature at which the film layer of the semiconductor device 9 is disposed. Upon heating to the first release-temperature, the hardened carrier portion 2 can be removed' but the film 3 remains bonded to the semiconductor component 9. The semiconductor component 9 can be easily removed from the film 3 only when heated to a second release-temperature of -11-200915447. In another form, a suitable adhesive is used to replace the film, and the semiconductor component can also be removed from the carrier by the action of heat. A laser off-off method can also be used. After the semiconductor component 9 is separated from the film, the fabricated semiconductor component' can be obtained as shown in Fig. 8. It should be noted here that Fig. 8 is a cutaway view showing the semiconductor wafer 4 having the substrate 5 and the epitaxial layer 6. In a practical semiconductor component, a layer of the covering material 8 can also be provided on the side of the semiconductor wafer 4. The wafer shown in Fig. 8 is for "forming contact by the lower side", i.e., at least two contact regions of the semiconductor wafer are present on the common side. However, it is also possible to make a semiconductor wafer having contact areas on two opposite sides, i.e., it must be in contact with the semiconductor wafer on the side where the cover material 8 is present. This can be achieved by the recessed area in the cover material 8. In order to create a recessed area on the corresponding contact surface of the semiconductor wafer, the area on the upper contact surface must be covered by a photoresist element 10 in the step shown in Fig. 3. This is shown in Figure 9. The upper side of the photoresist element 1 is adjusted to the height of the grid element 7, so that the photoresist elements 10 lie in a common plane. When the cover material is indented in the recess, 'no cover material can reach the position of the photoresist element 1 ,, so the cover material 8 is still at the position of the photoresist element 10 after the photoresist is removed. There is a recessed area in it, as shown in Figure 10. Through this - recessed region, the semiconductor wafer 4 can be brought into contact with a bonding wire later. 200915447 In the subsequent mounting process, the semiconductor wafer 4 can be brought into contact via the recessed region. In another method of the invention, each of the grid elements is formed not by a photoresist but by a carrier on which a grid has been formed. This method is shown in Figures 11 and 12. For example, the carrier is a belt 11 having a recess. The partition walls between the recesses form a grid. In the next step shown in Fig. 2, one or more semiconductor wafers are disposed in each of the notches. Then, each of the recesses is infused with a covering material 8 as in the previous embodiment to form a layer of a certain thickness on the semiconductor wafer. A plurality of fabricated semiconductor components can be obtained after the semiconductor components thus formed are removed from the recesses of the carrier tape 1 1 . A plurality of semiconductor components may also remain in each of the recesses and the grid passes through the center to separate the semiconductor components, thereby simultaneously forming an outer casing portion. Alternatively, the semiconductor component can be retained in the recess of the carrier to form a module from a plurality of semiconductor components. At this time, the electrical connection of the semiconductor wafer must be considered when fabricating the carrier. The invention is not limited to the embodiments shown. For example, a plastic wafer having a notch may be provided instead of the carrier tape u. By this method, a module ' can also be produced, in which a plurality of semiconductor wafers are subsequently connected to each other by the covering material. Thus, a plurality of semiconductor wafers are disposed in the recesses formed by the four grid elements and surrounded by the covering material. The covering material can also be applied by spin coating, micro-spraying or immersion. An epoxy resin or a enamel resin is particularly suitable as the covering material, which can be added with its bismuth component. Therefore, as described above, it is particularly advantageous to mix the particles of the light emission 200915447 or the particles for light scattering. However, other components can also be used to, for example, produce anti-reflective properties. In order to produce anti-reflective properties, a layer sequence is of particular interest in which individual layers have different refractive indices due to materials or other components. Furthermore, multiple layers can also be applied by the method of the invention. Here, another grid material is set after the first layer having the covering material is hardened, and then, in the formed recess, a covering material is further inserted. When the current grid element is removed before setting other grid elements, a new grid element can be created that is narrower than the first grid element. Thus, a side intermediate region is formed between the new grid member and the first layer formed of the cover material. The second layer applied subsequently extends not only on the upper side of the semiconductor component but also on the side. Another embodiment of the method of the present invention is shown in Figures 13-17. The substrate of the semiconductor wafer itself in this embodiment is used as a carrier, and thus no other carrier is used. In the step shown in Fig. 13, a plurality of adjacent regions are applied on the substrate 5 (e.g., sapphire), which have a semiconductor layer sequence which emits light during a slight and subsequent operation. The semiconductor layer sequence 6 is thus applied only in a specific area or on the entire surface by means of a reticle, and the area between the individual areas to be retained is removed by later uranium engraving. In the next step shown in Fig. 14, a plurality of grid elements 7 are applied between the semiconductor layer sequences 6. Thus, a plurality of recesses are formed on the substrate 5, in which case the semiconductor layer sequence 6 is located in the recess. In the step shown in Fig. 15, in each of the notches, a cover material is used to break into the height of the grid member by a cover material or by spin coating to make the cover material The quantity is accurately retained in the notch, which is the amount required to fill the notch to the upper edge. In the next step shown in Fig. 16, each grid element 7 is removed. The semiconductor component is divided in the next step 17 when the substrate is divided into regions between individual semiconductor layer sequences. However, a plurality of semiconductor wafers 4 can also be formed together as a module. For example, a recessed region can be formed on each of the cover members 8 similar to that shown in Fig. 1 so that the semiconductor layer sequence 6 can be contacted via the respective bonding wires. Therefore, the plurality of semiconductor layer sequences 6 can be individually controlled. The embodiment shown in Figs. 13 to 7 shows an advantage that "no additional carrier is required". The other advantage is that the light of the semiconductor component 9 is not emitted via the substrate 5, so that high efficiency can be achieved. Embodiments formed from the various forms described above are also within the scope of the invention. The present patent application claims the priority of the German Patent Application No. DE 10 2007 046 030.0 and DE 10 2007 〇 53 06 7.8, the entire disclosure of which is hereby incorporated by reference. The invention is of course not limited to the description made in accordance with the various embodiments. Conversely, the present invention includes each novel feature and each combination of features, and in particular, each combination of the individual features of the various patents or different embodiments, when the relevant features or related combinations are not The invention is also within the scope of each patent application or in various embodiments. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 to Fig. 8 are steps of 200915447 of a method of manufacturing a semiconductor device of the present invention. Figure 9, 10 shows a semiconductor device fabricated according to another method. Figures 11, 12 Another embodiment of the method of the present invention. 13 to 17 show an embodiment of the method of the present invention, in which a wafer_substrate is used as a carrier [main element symbol description] 1 carrier 2 hard carrier portion 3 single layer or multilayer film 4 semiconductor wafer 5 substrate 6 Crystalline layer 7 Grid element 8 Covering material 9 Semiconductor component 10 Photoresist element 11 Carrier tape 17 Carrier tape grid a Distance between semiconductor wafers b Thickness of conversion layer c Thickness of semiconductor wafer

Claims (1)

200915447 十、申請專利範圍： 1. 一種半導體組件（9)之製造方法，其特徵爲： -在一載體（1)上形成一柵格（7)，以形成多個凹口， -在載體（1)上配置多個半導體晶片（4)，使半導體晶片（4) 定位在凹口內， -凹口中配置著半導體晶片（4)，這些凹口中以一種覆蓋 材料（8)來塡入，將凹口塡充至栅格（7)之高度爲止， -使該覆蓋材料（8)硬化， -使半導體晶片（4)及由該覆蓋材料（8)所形成的覆蓋元 件由該載體（1)和柵格（7)中分離。 2. 如申請專利範圍第1項之製造方法，其中每一凹口中配 置著一個半導體晶片（4)。 3 .如申請專利範圍第1或2項之製造方法，其中該柵格（7) 由光阻所形成，光阻在該覆蓋材料（8 )硬化之後去除。 4·如申請專利範圍第1至3項中任一項之製造方法，其中 首先在載體（υ上配置半導體晶片（4)，然後由光阻製成該 柵格（7 )。 5 _如申請專利範圍第1至4項中任—項之製造方法，其中 首先製成-該柵格（7) ’然後在由該柵格（7)所形成的凹口中 配置半導體晶片（4)。 〜π沿刀汰，j 半導體晶片（4)具有二個電性接觸用的培艇^ π 《觸面，其配吾 晶片（4)之一共同的側面上’其中該覆芸絲 復盖材枓U)施加？ 晶片（4)之遠離各接觸面之此側面上。 200915447 7 ·如申請專利範圍第1至6項中任一項之製造方法，其中 半導體晶片（4)具有二個電性接觸用的接觸面，其配置在 晶片（4)之相面對的側面上，其中在該覆蓋層中產生一凹 入區’以便在電性上可接觸該半導體晶片（4)之位於該覆 蓋層之該側面上的接觸面。 8 .如申請專利範圍第1至7項中任一項之製造方法，其中 半導體晶片（4)和柵格元件（7)互相隔開而配置著，使該覆 蓋材料（8)在半導體晶片（4)上形成一側面層。 (' 9.如申請專利範圍第1至8項中任一項之製造方法，其中 柵格元件（7)之高度及其至半導體晶片之距離（b)須互相 調整，使層厚度平坦且在側面上相同。 1 〇.如申請專利範圍第1至6項中任一項之製造方法，其中 該載體0)由硬的載體部（2)和一個-或多個薄膜（3)所構 成，其中半導體晶片（4)設置在薄膜（3)上。 1 1 .如申請專利範圍第1至1 0項中任一項之製造方法，其中 半導體晶片由基板（5)(較佳是藍寶石）和一用來產生光的 \ 半導體層序列（6)所構成’半導體晶片（4)是以半導體層序 歹IJ (6)之此側而設置在該載體（！）之薄膜（3)上。 1 2 .如申請專利範圍第1至1 1項中任一項之製造方法，其中 該載體（1)由一種硬的或軟的載體部（2)所構成’半導體晶 片（4)是以一種黏合劑而固定在該載體（1)上" 1 3 .如申請專利範圍第1至1 2項中任一項之製造方法，其中 使用無基板的半導體晶片作爲半導體晶片（4)。 14. 一種具有半導體晶片（4)之光—半導體組件’其用來在操 200915447 作時發出光，且該光-半導體組件另具有一施加在半導 體晶片（4)之至少一側面上的覆蓋層，其具有固定的層厚 度，其特徵爲：該覆蓋層是以申請專利範圍第1至1 3項 中任一項所述之製造方法施加而成。 1 5 .如申請專利範圍第1 4項之光-半導體組件，其中半導體 晶片之上側上的層厚度和相鄰側面上的層厚度相等。 -19-200915447 X. Patent application scope: 1. A method for manufacturing a semiconductor component (9), characterized in that: - forming a grid (7) on a carrier (1) to form a plurality of recesses, - in the carrier ( 1) arranging a plurality of semiconductor wafers (4), positioning the semiconductor wafers (4) in the recesses, and arranging semiconductor wafers (4) in the recesses, the recesses being inserted into the recesses by a covering material (8), The recess is filled to the height of the grid (7), the cover material (8) is hardened, and the semiconductor wafer (4) and the cover member formed by the cover material (8) are used by the carrier (1) Separated from the grid (7). 2. The manufacturing method of claim 1, wherein a semiconductor wafer (4) is disposed in each of the notches. 3. The manufacturing method of claim 1 or 2, wherein the grid (7) is formed by a photoresist, and the photoresist is removed after the covering material (8) is hardened. 4. The manufacturing method according to any one of claims 1 to 3, wherein the semiconductor wafer (4) is first disposed on a carrier (4), and then the grid (7) is made of a photoresist. The manufacturing method of any one of clauses 1 to 4, wherein the grid (7) is first formed - and then the semiconductor wafer (4) is disposed in a recess formed by the grid (7). Along the knives, the j semiconductor wafer (4) has two electric contact boats π "contact surface, which is on the side of one of the common wafers (4), where the covered silk covering material 枓U ) Apply? The wafer (4) is on this side away from the respective contact faces. The manufacturing method according to any one of claims 1 to 6, wherein the semiconductor wafer (4) has two contact faces for electrical contact, which are disposed on opposite sides of the wafer (4) Above, wherein a recessed region is formed in the cover layer to electrically contact the contact surface of the semiconductor wafer (4) on the side of the cover layer. The manufacturing method according to any one of claims 1 to 7, wherein the semiconductor wafer (4) and the grid member (7) are disposed apart from each other such that the covering material (8) is on the semiconductor wafer ( 4) A side layer is formed on the surface. The manufacturing method of any one of claims 1 to 8, wherein the height of the grid element (7) and its distance to the semiconductor wafer (b) are mutually adjusted to make the layer thickness flat and The manufacturing method according to any one of claims 1 to 6, wherein the carrier 0) is composed of a hard carrier portion (2) and one or more films (3), The semiconductor wafer (4) is disposed on the film (3). The manufacturing method according to any one of claims 1 to 10, wherein the semiconductor wafer is composed of a substrate (5) (preferably sapphire) and a semiconductor layer sequence (6) for generating light. The semiconductor wafer (4) is formed on the film (3) of the carrier (!) on the side of the semiconductor layer 歹IJ (6). The manufacturing method according to any one of claims 1 to 11, wherein the carrier (1) is composed of a hard or soft carrier portion (2), and the semiconductor wafer (4) is a kind A manufacturing method according to any one of claims 1 to 12, wherein a substrate-free semiconductor wafer is used as the semiconductor wafer (4). 14. A light-semiconductor component having a semiconductor wafer (4) for emitting light when operating at 200915447, and having a cover layer applied to at least one side of the semiconductor wafer (4) And having a fixed layer thickness, characterized in that the cover layer is applied by the manufacturing method according to any one of claims 1 to 13. The optical-semiconductor component of claim 14 wherein the layer thickness on the upper side of the semiconductor wafer and the layer thickness on the adjacent side are equal. -19-
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