TW200914653A - Semiconductor wafer and its manufacturing method - Google Patents

Semiconductor wafer and its manufacturing method Download PDF

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Publication number
TW200914653A
TW200914653A TW97131098A TW97131098A TW200914653A TW 200914653 A TW200914653 A TW 200914653A TW 97131098 A TW97131098 A TW 97131098A TW 97131098 A TW97131098 A TW 97131098A TW 200914653 A TW200914653 A TW 200914653A
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Taiwan
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wafer
small
wafers
semiconductor wafer
semiconductor
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TW97131098A
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Chinese (zh)
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Kazushige Takaishi
Seiji Sugimoto
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Sumco Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

A large diameter wafer having a diameter of 450mm or more is manufactured at high yield and low cost. On a circular quartz glass substrate having a diameter of 450mm or more to be a base material substrate, a plurality of rectangular small silicon wafer pieces are bonded by annealing or the like. After bonding, gaps between the small silicon wafer pieces are filled with polysilicon by depositing the polysilicon by CVD. Furthermore, the surfaces of the small silicon wafer pieces are polished to be a device forming surface. Alternately, a device surface is formed by forming an epitaxial layer on the surfaces of the small silicon wafer pieces.

Description

200914653 九、發明說明: 【發明所屬之技術領域】 本發明係關於將複數片小片晶圓黏貼於直徑為45〇mm 以上之1片大支撐板材而製成的半導體晶圓及其製造方法。 【先前技術】 矽晶圓之製造方法,一般係藉由cz(Czochralski:丘克 拉斯基)去拉起單晶晶錠,並從該晶錠經過切片、去角、磨 光、蝕刻、鏡面研磨、及洗淨等各步驟而製成鏡面研磨晶 圓。 曰曰 然而’在藉由CZ法來拉起直徑為450mm之大口徑晶 錠吋’丈拉起之單晶之熱履歷、熔液之對流、溫度分布等 參數,係與直徑為300mm以下之習知品的情況完全不同。 因此’目前藉由CZ法拉起直徑為450mm之大口徑且無差 排之早晶晶鍵係極為困難。 又在藉由CZ法來拉起直徑為450mm之單晶石夕晶鍵 時,相較於直徑為300mm以下之習知單晶矽晶錠,晶錠之 頂部及尾部的重量較大。因此,因切斷除去頂部及尾部所 造成之晶錠損失亦較大。其結果,產品的良率亦會降低。 此外,如專利文獻1所示,已知有一種靶單元,藉由 複數種構件構成沖蝕(er〇si〇n)構件而成者。然而,尚不知有 一種將複數片小片晶圓黏貼於丨片支撐板材而成之半導體 晶圓。 專利文獻1 :日本專利第2635362號公報 200914653 【發明内容】 如以上所述,在大口徑化之半導體晶圓,藉由cz法 來製作構成其原料之無缺陷單晶晶錠係處於困難之狀況。 因此,本發明之目的在於提供半導體晶圓及其製造方 法’可提升直徑為450mm以上之大口徑且幾乎無結晶缺陷 之半導體晶圓的製造良率’其結果,能以低成本製造此種 大口徑晶圓。 申°月專利範圍帛1項之發明,係-種半導體晶圓之製 ^方法*係將複數片由半導體晶圓之小片所構成之小片 晶圓排列配置於直經為45Gmm以上t ι片支承板材之一 面之後加熱配置有該小片晶圓之支承板材,據以將該 等複數片小片晶圓接八 々 σ於該支承板材之一面,以製作以該 等J片日日圓表面為%件形成面的半導體晶圓。 支承板材除了發$ 楚 璃基板等。 日圓“導體Β日圓之外’亦可採用玻 於二片=圓!指石夕晶圓等半導體晶圓之小片,為面積小 、:反之曰曰圓。小片晶圓係使用藉 之單晶矽晶錠所製志^ 之法拉起 教成之矽晶圓等來製作。亦即,各 圓具有既定厚度、 ρ各小片曰日 加工。 弋形狀,且其表面可為經研磨之鏡面 又’小片晶圓可雜士八Α 材。此外,藉由將小 Α之貼σ法等黏貼於支承板 該等接合。在使用2晶懸載於支承板材之一面,以將 導體Β曰圓作為支承板材時,預先將支 200914653 以常溫貼合之 承板材與小片晶圓之貼合面彼此鏡面化 後,藉由進行貼合熱處理即可牢固貼合。 支承板材之直徑’可採用例如45Gmm、675mm等。 支承板材之一面係指支承板材之表面或背面。 申請專利範圍第2項之發明’係中請專利範圍第i項 之半導體晶圓之製造方法,其中,該支承板材為石英玻璃、 該小片晶圓為碎晶圓之小片,將該等重疊之後,藉由加敎 並透過⑦氧化膜將複數片小以圓接合於支承板材之Γ 面0 石英玻璃可使用溶融石英玻璃、合成石英玻璃。藉由 加熱使矽氧化膜成長於石英玻璃製支承板材之表面與矽晶 圓之小片之間,兩者即透過矽氧化膜接合。 申請專利範圍第3項之發明,係申請專利範圍第i或2 項之半導體晶圓之製造方法,其係將多晶發填充於設在該 小片晶圓與小片晶圓間之間隙後,研磨該等小片晶圓表 面,並使蟲晶膜成長於該研磨後之小片晶圓表面。 多晶矽之填充,例如係藉由以小片晶圓表面為遮罩所 進行之CVD法。 小片晶圓之表面研磨,係使用板片式或式批次式之公 知單面研磨裝置來進行。 藉由使磊晶膜成長於包含小片晶圓之半導體晶圓的整 體表面’可將支承板材之整面使用作為磊晶層。又,半導 體晶圓之表面中,亦能將去除小片晶圓之部分加以遮蔽, 而使磊晶膜僅成長於小片晶圓表面。 200914653 申請專利範圍第4項之發明係一種半導體晶圓,其係 將複數片由半導體晶圓之小片所構成之小片晶二 於直徑為450mm以上之}片支承板材的—面,藉此以該等 小片晶圓表面為元件形成面。 々支承板材,除了半導體晶圓之外,亦可使用玻璃基板 等小片曰曰圓可使用矽晶圓、化合物半導體晶圓等。各小 片晶圓其表面之面積係小於支承板材之表面之面積。 中請專利範圍第5項之發明’係申請專利範圍第4項 之半導體晶圓’其中’該支承板材為石英玻璃、該小片晶 圓為石夕晶圓之小片,並透過碎氧化膜將複數片小片晶圓接 合於支承板材之一面。 玻璃基板係使用石英玻璃。此時,可藉由例如退火將 石夕晶圓之小片接合於石英玻璃基板。 申明專利範圍第6項之發明,係申請專利範圍第4或$ 項之半導體晶圓,其係藉由多晶矽填充設於該小片晶圓與 小片晶圓間之間隙後,研磨該等小片晶圓表面,並使磊晶 膜成長於該研磨後之小片晶圓表面。 藉由多晶矽填埋小片晶圓彼此之間隙,可利用該多晶 矽部分作為金屬雜質等之除氣區域。 在將多晶矽填充於該間隙時,藉由研磨除去被覆於小 片晶圓之表面的多晶矽,可將小片晶圓之表面保持為鏡面。 將磊晶膜形成於研磨後之小片晶圓表面。藉此,可容 易製造大口徑之磊晶晶圓。 申請專利範圍第7項之發明,係申請專利範圍第4項 200914653 之半導體晶圓,其中,該支承板材係俯視為圓形,該小片 晶圓為矩形。 a右為圓形之支承板材,即可使用與習知之矽晶圓同等 之製造、加工設備以進行元件形成。 栌據本發明,即使是直徑為45〇mm以上之半導體晶 圓,只要使用幾乎無結晶缺陷之石夕晶圓作為小片晶圓,^曰 可製造幾乎無結晶缺陷之大口徑晶圓。又,可提升大口徑 半導體晶圓之製造良率,其結果,能以低成本製造該晶圓。 制又,本發明中,係利用高平坦度之複數片小片晶圓來 “直㈣450mm以上之大口握晶圓。因此,相較於從大 口控晶鍵來1^乍1片大口徑晶圓,可製作結晶缺陷較少且 千坦度更高之晶圓。從大口徑晶錠所製成之i片大口徑晶 圓係因翹曲等原因導致更高平坦度化極為困難。 夕曰^黏貼小片晶圓時,填充於小片晶圓彼此之間隙的 2石’在7L件製程等可有效發揮除氣部位(㈣e㈣刪 之作用。 再者’藉由將小片晶圓形成A θ y 製造元件晶片β 4為矩形’可容易從石夕晶圓 【實施方式】 圖六下針對本發明之半導體晶圓之-實施形態,使用 本實施形態之半導體晶圓,4片俯視 二石㈣於石英玻璃上而製成。此處,黏貼 ;央玻璃上之石夕晶圓的尺寸(長、寬、厚度)或片數,係視 200914653 所欲製作之元件晶片之尺寸等來適當選定。 以下,針對本實施形態之半導體晶圓,參照圖i、圖2 作說明。 圖1、圖2中’#圓1()係以圓形之石英玻璃基板^ 為支承板材,於石英玻璃基板n表面黏貼有4片正方形之 ^晶SM2, 13, 14, 15。4片%晶圓12〜15,係俯視以石 英玻璃基板11之中以並成點對稱的方式,黏貼於 石英玻璃基板11。 小片晶圓12〜15,係藉由俯視為十字形之多晶矽部分 Μ分離。又,較小片晶圓12〜15之外周緣外側,係藉由大 致半月形之多晶矽部分17所圍繞。 八又此等小片晶圓12〜15之表面,係以與該多晶矽部 分16, 17之表面相同平面所構成。18係厚度為之矽 氧化膜’並介設於石英玻璃基板n與小片晶目 間。 此外,小片晶圓12〜1 5係相同尺寸(邊之長度、厚度) 晶圓。又,小片晶圓12〜15雖可使其雜質濃度皆相同, 但各小片晶圓12〜15可使用變更其導電型者,亦可黏貼變 更其雜質濃度者。 制其次,說明本實施形態之半導體晶圓1〇的製程。首先, 為支承板材之石英玻璃基板1 1。亦即,將石英玻璃BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor wafer produced by adhering a plurality of small wafers to a large supporting plate having a diameter of 45 mm or more and a method of manufacturing the same. [Prior Art] The manufacturing method of the germanium wafer is generally to pull up the single crystal ingot by cz (Czochralski: Czochralski), and to slice, chamfer, polish, etch, and mirror the ingot from the ingot. And polishing, etc., to form a mirror-polished wafer. However, the parameters such as the heat history, the convection of the melt, and the temperature distribution of the single crystal pulled up by the large-diameter ingot of the diameter of 450 mm by the CZ method are related to the conventional products having a diameter of 300 mm or less. The situation is completely different. Therefore, it is extremely difficult to pull up the large-diameter and non-difference early crystal bond system having a diameter of 450 mm by the CZ method. Further, when the single crystal rock crystal bond having a diameter of 450 mm is pulled by the CZ method, the weight of the top and the bottom of the crystal ingot is larger than that of the conventional single crystal twin ingot having a diameter of 300 mm or less. Therefore, the loss of the ingot caused by cutting off the top and the tail is also large. As a result, the yield of the product will also decrease. Further, as disclosed in Patent Document 1, a target unit is known in which an erosive member is formed of a plurality of members. However, it is not known that there is a semiconductor wafer in which a plurality of small wafers are adhered to a ruthenium supporting plate. [Patent Document 1] Japanese Patent No. 2635362 (200914653) SUMMARY OF THE INVENTION As described above, in a semiconductor wafer having a large diameter, it is difficult to produce a defect-free single crystal ingot which constitutes a raw material by the cz method. . Accordingly, an object of the present invention is to provide a semiconductor wafer and a method of manufacturing the same that can improve the manufacturing yield of a semiconductor wafer having a large diameter of 450 mm or more and having almost no crystal defects. As a result, it is possible to manufacture such a large cost at low cost. Caliber wafers. The invention of the patent range 申1, the method of manufacturing a semiconductor wafer is to arrange a plurality of small wafers composed of small pieces of semiconductor wafers in a straight line of 45 Gmm or more. After supporting one of the sheets, the support sheet of the small wafer is heated, and the plurality of small wafers are connected to one side of the support sheet to form a surface of the J-shaped Japanese yen surface. Surface semiconductor wafer. The support plate is made of a glass substrate or the like. The yen "outside the conductor" can also be used in two pieces = round! Refers to a small piece of semiconductor wafer such as Shi Xi wafer, which is small in area, and vice versa. Small wafers are used to borrow single crystals. The method of ingots is used to make the wafers, etc., that is, each circle has a predetermined thickness, and each of the small pieces is processed in a day. The shape is 弋, and the surface can be a polished mirror and a small piece. The wafer may be made of a sapphire. In addition, the yttrium paste is applied to the support plate by the σ method, etc., and the two crystals are suspended on one side of the support plate to round the conductor as a support plate. When the bonding surface of the support sheet and the small wafer which are bonded at room temperature in 200914653 is mirror-finished, the bonding surface can be firmly bonded by heat treatment. The diameter of the supporting sheet can be, for example, 45 Gmm, 675 mm, or the like. The surface of the support plate refers to the surface or the back surface of the support plate. The invention of claim 2, wherein the support plate is quartz glass, the small piece Wafer is broken After the overlap, the plurality of sheets are rounded and bonded to the surface of the supporting sheet by twisting and passing through the 7-oxide film. The quartz glass can be used as the quartz glass or the synthetic quartz glass. The oxide film is grown between the surface of the supporting plate made of quartz glass and the small piece of the silicon wafer, and the two are joined by a tantalum oxide film. The invention of claim 3 is a semiconductor crystal of the i or 2 patent application. The manufacturing method of the circle is to fill the gap between the small wafer and the small wafer after the polycrystalline hair is filled, polish the surface of the small wafer, and grow the insect crystal film on the polished small wafer Surface Filling of polycrystalline germanium, for example, by CVD using a small wafer surface as a mask. Surface polishing of small wafers is performed using a plate-type or batch-type known single-sided polishing apparatus. The entire surface of the supporting plate can be used as an epitaxial layer by growing the epitaxial film on the entire surface of the semiconductor wafer including the small wafer. Further, in the surface of the semiconductor wafer, the small piece can be removed. The portion of the circle is shielded so that the epitaxial film grows only on the surface of the small wafer. The invention of claim 4 is a semiconductor wafer which is a small piece of crystal formed by a small piece of a semiconductor wafer. 2. The surface of the sheet supporting the sheet of 450 mm or more in diameter, thereby forming the surface of the wafer surface as the element. The supporting sheet, in addition to the semiconductor wafer, may also be a small circle such as a glass substrate. A silicon wafer, a compound semiconductor wafer, etc. can be used. The area of the surface of each small wafer is smaller than the surface of the surface of the supporting sheet. The invention of the fifth patent of the patent scope is a semiconductor wafer of the fourth application patent range. 'Where the support plate is quartz glass, the small piece wafer is a small piece of Shi Xi wafer, and a plurality of small pieces of wafer are bonded to one side of the support plate through the broken oxide film. Quartz glass is used for the glass substrate. At this time, a small piece of Shishi wafer can be bonded to the quartz glass substrate by, for example, annealing. The invention of claim 6 is the semiconductor wafer of claim 4 or claim 4, wherein the small wafer is ground by filling a gap between the small wafer and the small wafer by polysilicon. The surface is grown and the epitaxial film is grown on the surface of the polished wafer. The polycrystalline germanium portion can be used as a degassing region for metal impurities or the like by filling the gaps between the small wafers by polysilicon. When the polysilicon is filled in the gap, the surface of the wafer can be kept mirror-finished by polishing to remove the polysilicon coated on the surface of the wafer. An epitaxial film is formed on the surface of the polished wafer. This makes it easy to manufacture large-diameter epitaxial wafers. The invention of claim 7 is the semiconductor wafer of claim 4, wherein the support sheet is circular in plan view and the small wafer is rectangular. a right is a circular support plate, which can be fabricated using the same manufacturing and processing equipment as the conventional silicon wafer. According to the present invention, even a semiconductor wafer having a diameter of 45 Å or more can be used as a small wafer by using a cerambra wafer having almost no crystal defects, and a large-diameter wafer having almost no crystal defects can be produced. Further, the manufacturing yield of the large-diameter semiconductor wafer can be improved, and as a result, the wafer can be manufactured at low cost. In the present invention, a plurality of wafers of high flatness are used to "straight (four) 450 mm or more of the wafer. Therefore, compared to a large-diameter wafer from a large-gated crystal key, It is possible to produce wafers with less crystal defects and higher denier. It is extremely difficult to make a flat film of i-size large-diameter wafers made from large-diameter ingots due to warpage and the like. In the case of a small wafer, the 2 stone 'filled in the gap between the small wafers can effectively function as a degassing part in the 7L process. (Further, the device wafer is fabricated by forming a small wafer into A θ y. β 4 is a rectangle 'Easy from the Shihwa wafer. [Embodiment] In the embodiment of the semiconductor wafer of the present invention, the semiconductor wafer of the present embodiment is used, and four semiconductor layers are placed on the quartz glass. In this case, the size (length, width, thickness) or the number of the wafers on the central glass is appropriately selected depending on the size of the component wafer to be fabricated in 200914653. Semiconductor wafer of the embodiment, see Figure i Fig. 2 is an illustration. In Fig. 1 and Fig. 2, '# circle 1 () is a circular quartz glass substrate ^ as a supporting plate, and four square crystals SM2, 13, 14, are adhered to the surface of the quartz glass substrate n. 15. 4 % of the wafers 12 to 15 are attached to the quartz glass substrate 11 in a plane symmetrical manner in the quartz glass substrate 11 in a plan view. The small wafers 12 to 15 are cross-shaped by a plan view. The polycrystalline germanium is partially separated. Further, the outer periphery of the smaller wafers 12 to 15 is surrounded by a substantially half-moon shaped polysilicon portion 17. The surface of the small wafers 12 to 15 is The surface of the polycrystalline germanium portions 16, 17 is formed by the same plane. The 18-layer thickness is the tantalum oxide film 'and is interposed between the quartz glass substrate n and the small crystal lens. In addition, the small-sized wafers 12 to 15 are the same size (edge Length, thickness) Wafer. Further, the small wafers 12 to 15 can have the same impurity concentration, but each of the small wafers 12 to 15 can be changed by using the conductivity type, or the impurity concentration can be changed. Next, the process of the semiconductor wafer 1A of the present embodiment will be described. First, a quartz glass substrate 1 1 for supporting a sheet. That is, a quartz glass

基板 1 1 >· -EL 其才 母材切斷加工,以製作例如直徑為450mm之圓形 土反。具體而言,將已切片成一邊之長度最低為45〇mm之 正方平且厂 " 厚度為lmm之石英玻璃基板的母材黏貼於雷射加 10 200914653 機之加工口上,將二氧化碳氣體雷射束照射於母材之表 面以切下母材,藉此製作直徑為450mm之圓形基板。此時, 石英玻璃基板11之厚度為1 mm。 其次’對直徑為3GGmm之碎CZ晶圓進行加工,切取 四邊為㈣麵之正方形晶圓12〜15(單面或雙面鏡面研磨 之晶圓)。具體而言,將二氧化碳氣體雷射束、yag*射 束等雷射束照射於直徑為3〇〇mm之石夕晶圓的表面上:其 次’在石夕晶圓之表面上以描繪四邊為15Qmm之正方形的方 式,以雷射束掃描石夕晶圓之表面上。藉此,製得正方形晶 圓12〜15。各晶圓12〜15之厚度為775 /zm。或者,以J 四邊為⑽咖之正方形刻劃於直徑為職之石夕晶圓的表 面上之後,沿刻劃之線使碎晶圓裂離,並以研削加工 磨加工使裂離之4邊平坦化的方法,亦 方形晶圓12〜15。 接著,以石央玻璃基板! i表面之中心、c為中心,以 對稱將正方形晶圓12〜15重疊於該石英玻璃基板U上: 具體之重疊方法,係在Μ麵基板U之中心C,將彼此 正交之表不直徑的線D1及線D2刻劃於石英破璃基板 正方形晶圓12〜15之對角線中任何—條與線叫 或線D2 -致,且使形成於小片晶圓i2〜i 間隙的寬度Μ 8麵的方式配置。藉此,—邊 ^麵且厚度為775…正方形晶…5,即隔著 1 勻之^配置於石英玻璃基板u之表面上的點對稱位置。_ 之< 使用既定熱處理爐將裝载於石英破璃基板η上 200914653 之4片小片晶圓12〜15加熱。具體而言,係以ιι〇〇〜13的 °C在氬等惰性氣體環境氣氛中對各小片晶圓12〜15進行熱 處理。其結果,透過矽氧化m 18,4片矩形小片晶圓12〜 15即接合於石英玻璃基板u。其時,於小片晶圓i2〜b 之間即涵蓋全長而形成寬度w為之十字形間隙(槽)。 其次,將表面接合有小片晶圓之石英玻璃基板u插入 CVD爐,以使多晶矽沉積於其表面。具體而言,係使用常 壓式或減壓式CVD爐,以成長溫度為6〇〇〜7〇〇乞之條件, 製得厚度約為1 mm之多晶石夕層。 該多晶矽係被覆於石英玻璃基板n之表面,直至填滿 ^子形之槽為止。其結果’於小片晶圓12〜15之上面及石 :玻:基板U之上面(氧化膜),亦會沉積多晶矽層Η。其 次:藉由研磨包含小片晶圓12〜15及多晶石夕部分16, 17之 :英玻璃基板u的表面,使小片晶圓12〜15之表面’(鏡面) 路出。具體而言’在將多晶♦部分16,以存在之石英玻 璃基板11的背面’真空吸㈣持於研磨頭之狀態下, 磨劑供應於研磨布,使保持於研磨頭之石英玻璃基板u的 ,面滑接於研磨布。藉此,對小片晶圓12〜15之表面及多 曰曰矽部分16, 17之表面進行鏡面加工。其結 個矩形矽鏡面與圍繞此之多晶矽面所構成之半導:曰由4 i 〇。 僻取 < 牛導體晶圓 丁守體晶圓 — , 穴衣甸邵分(小片足圓^, 二即構成元件形成面。經由之後的元件製程即可:圓半) 日日圓10製作所要之元件。 、 12 200914653 以此方式’丰導體晶目!",俯視石 為圓板,小片晶圓12〜15俜人叶A 4 H 螭基板11 h 十為4片,且俯視為相同尺 寸之正方形狀。而且,使各小片晶圓12〜15之間 各間隙係分別藉由十字形之多晶⑦部分16填埋 :, 正確且容易將4片小片晶圓12〜15定位於直徑為州_: 圓形石英玻璃基板n的表面上。The substrate 1 1 >· -EL is processed by the base material to produce, for example, a circular earth having a diameter of 450 mm. Specifically, the parent material of the quartz glass substrate having a thickness of at least 45 mm and having a length of 45 mm is bonded to the processing port of the laser plus 10 200914653 machine, and the carbon dioxide gas is laser-jetted. The beam was irradiated onto the surface of the base material to cut the base material, thereby producing a circular substrate having a diameter of 450 mm. At this time, the thickness of the quartz glass substrate 11 was 1 mm. Next, the chip CZ wafer having a diameter of 3 GGmm was processed, and square wafers 12 to 15 (one-sided or double-sided mirror-polished wafer) having four sides as (four) faces were cut. Specifically, a laser beam such as a carbon dioxide gas laser beam or a yag* beam is irradiated onto the surface of a 3 mm-diameter Shi Xi wafer: secondly, on the surface of the Shi Xi wafer, four sides are depicted. The 15Qmm square method is used to scan the surface of the Shi Xi wafer with a laser beam. Thereby, square crystal circles 12 to 15 were obtained. The thickness of each of the wafers 12 to 15 is 775 /zm. Or, after the square of the (10) coffee of J is scribed on the surface of the diameter of the Shishi wafer, the broken wafer is cracked along the scribe line, and the cracked four sides are ground by grinding. The method of planarization is also square wafer 12~15. Next, take the Shiyang glass substrate! The center of the i surface, c is the center, and the square wafers 12 to 15 are superposed on the quartz glass substrate U symmetrically: The specific overlapping method is at the center C of the kneading substrate U, and the diameters of the surfaces orthogonal to each other are orthogonal to each other. The line D1 and the line D2 are scribed on any of the diagonal lines of the quartz glass substrate square wafer 12-15, and the line or line D2 is formed, and the width formed in the gap between the small wafers i2 and i is Μ 8-sided configuration. Thereby, the surface is 775... square crystal...5, which is a point symmetrical position disposed on the surface of the quartz glass substrate u via a uniform layer. _< The four small-sized wafers 12 to 15 loaded on the quartz glass substrate η 200914653 are heated by a predetermined heat treatment furnace. Specifically, each of the small-sized wafers 12 to 15 is thermally treated in an inert gas atmosphere such as argon at a temperature of 135 ° 13 °C. As a result, four pieces of rectangular die wafers 12 to 15 are bonded to the quartz glass substrate u through the yttrium oxide m 18 . At this time, the entire length is covered between the small wafers i2 to b, and a cross-shaped gap (groove) having a width w is formed. Next, a quartz glass substrate u having a small wafer bonded to the surface thereof is inserted into a CVD furnace to deposit polycrystalline germanium on the surface thereof. Specifically, a polycrystalline stone layer having a thickness of about 1 mm is obtained by using a normal pressure type or a reduced pressure type CVD furnace at a growth temperature of 6 Torr to 7 Torr. The polycrystalline lanthanum is coated on the surface of the quartz glass substrate n until it fills the sub-shaped groove. As a result, a polycrystalline germanium layer is deposited on the top of the small wafers 12 to 15 and on the surface of the glass:glass U (oxide film). Secondly, the surface '(mirror surface) of the small wafers 12 to 15 is made to pass out by grinding the surface of the glass substrate u including the small wafers 12 to 15 and the polycrystalline silicon portions 16, 17 . Specifically, in the state where the polycrystalline portion 16 is held by the back surface of the existing quartz glass substrate 11 by vacuum suction (four), the abrasive is supplied to the polishing cloth to maintain the quartz glass substrate u of the polishing head. The surface is slid to the polishing cloth. Thereby, the surfaces of the die wafers 12 to 15 and the surfaces of the plurality of turns 16 and 17 are mirror-finished. It consists of a rectangular 矽 mirror surface and a semi-conducting surface surrounded by polycrystalline germanium: 曰 by 4 i 〇. The secluded < cattle conductor wafer Ding Shouwa wafer — , the hole clothing Shao Shao (small piece round ^, the second is the component forming surface. After the component process can be: round half) Japan yen 10 production of the required components. , 12 200914653 In this way 'Feng conductor crystal! ", overlooking the stone is a circular plate, a small piece of wafer 12~15 俜 human leaves A 4 H 螭 substrate 11 h ten is four pieces, and the square shape of the same size is seen from the top. Moreover, the gaps between the small wafers 12-15 are respectively filled by the cross-shaped polycrystalline 7 portion 16: correctly and easily, the four small wafers 12-15 are positioned at a diameter of the state _: circle On the surface of the quartz glass substrate n.

k 亦即,在石英玻璃基板U表面之中心c,係使 圓12〜15之對角線中任何一條與彼此正交之表示直徑的: D1或線D2之其中一條一致。而且’使存在於線d :;之上:小片晶圓12〜15的角落部重疊於以石英玻璃基板 曰。中、C為中心的同心圓上。藉此,可容易將4片小片 曰曰圓12〜15疋位於石英玻璃基板u表面上之均等間隔位 置。 立又,小片晶圓12〜15之各鄰接之間隙,係藉由多晶矽 部^ 16填埋。因此,可將多晶料分16利用為捕獲各小 片晶圓12〜15之金屬雜質的除氣區域。又,由於將小片晶 圓12製成俯視為正方形,因此晶圓之晶片化亦變得容易。 而且,由於使用圓形之支承板材,因此可使用與習知之矽 B曰圓同4之製造、加工設備來進行元件形成。 圖3係表示另一實施形態之半導體晶圓的製程。本實 施形態係製作作為大口徑支承板材之基板(S2i〜S23),其中 該支承板材係將多晶矽晶錠切片所形成。多晶矽基板之表 面係施以鏡面研磨而預先予以鏡面化。 接著’針對藉由通常之cz法拉起之直徑為3〇〇mm之 13 200914653 石夕單晶晶錠(載面為圓形),分塊切斷後從其圓柱部側面之4 個方向進行側面研磨或切削,以製作戴面為方形之單晶晶 鍵塊,〜S〇2)。晶錠塊之截面係-邊為2〇5職之正方形。 之後,使用鋼絲鋸等將晶錠塊切片成厚度為775 # m(S03) ’並依序施以磨光、研削、及蝕刻等加工(s〇4、sw、 S 0 6)。其皆係以晶圓加工之公知方法進行。 蝕刻後,藉由雷射將矩形矽晶圓進行4分割(s〇7)。具 f k 體之方法,係將二氧化碳氣體雷射束、YAG雷射束等雷射 束照射於石夕晶圓之表面上,並藉由以雷射束掃描石夕^之 表面上來進行4分割。或者,將正方形刻劃於矽晶圓之表 面上後,沿刻劃線使石夕晶圓裂離,並以研削加工或研磨加 工使裂離後之矽晶圓之4邊平坦化,亦可進行4分割。 /之後,對此等兩面實施鏡面研磨(S08)。其結果,可製 得4片矩形之小片晶圓。 上其次’在常溫下將此等小片矩形晶圓之研磨面,重疊 於該大口徑多晶梦基板之研磨面以進行貼合(8〇9)。該貼: 係以公知之貼合方法進行,之後,進行多晶硬基板與各: 片矩形晶圓之貼合強化熱處理。貼合強化熱處理之條件, 例如為圃〜12_、氬等惰性氣體環境氣氛中。 之後,於貼合有小片矩形晶圓之多晶石夕基板的表面, 施以既定洗淨陶,藉由⑽將多晶石夕被覆於其表面 ⑻1)。其結果,小片彼此之間隙即藉由多晶石夕所填埋。之 後’於多晶矽被覆表面施以既定研磨(CMp)⑻2),並進一 步藉由洗淨(S13),即製成其表面切面(分割之4面)的半 200914653 導體晶圓。 如此,藉由將複數片矽B圓— 乃吵曰日圓之小片排列黏貼於多晶矽 基板之表面’可製造更大口徑之矽晶圓。 夕此時之製造方法,亦可將複數片石夕晶圓之小片排列於 夕晶石夕基板之表面並予以退火,藉此黏貼於石夕氧化膜(例如 石英玻璃上)。 ^ b上述凡成貼合後,以多晶矽填充鄰接之小片晶 圓的間隙。多晶矽係例如具有除氣區域的功能。 小片晶圓係正方形或長方形、或其他形狀亦可。又, 亦不拘黏貼於多晶石夕基板之小片晶圓的片數。 將各小片晶圓黏貼於多晶石夕基板之後,以多晶石夕填充 介設於小片晶圓間之間隙:。之後,對附有小片之多晶石夕基 板表面或表面背面施以鏡面研磨。對表面背面施以鏡面研 磨時,相較於僅對表面施以鏡面研磨,可進一步提高平坦 度。或者,亦可使磊晶膜成長於各小片晶圓之表面。此時, 係以矽磊晶膜為元件形成面。 【圖式簡單說明】 圖1係表示本發明之第1實施形態之半導體晶圓之概 略構成的俯視圖。 圖2係表示第丨實施形態之半導體晶圓之一部分的截 面圖。 圖3係表示本發明之第2實施形態之半導體晶圓之製 造方法的流程圖。 15 200914653 【主要元件符號說明】 10 半導體晶圓 11 石英玻璃基板 12 〜15 小片晶圓 17 多晶矽部分 / 1' k 16k, that is, at the center c of the surface of the quartz glass substrate U, any one of the diagonals of the circles 12 to 15 is orthogonal to each other: one of D1 or one of the lines D2. Further, 'on the line d:;: the corner portions of the small wafers 12 to 15 are overlapped on the quartz glass substrate. Center and C are centered on the concentric circle. Thereby, the four small pieces of the circle 12 to 15 疋 can be easily placed at equal intervals on the surface of the quartz glass substrate u. Further, the adjacent gaps of the small wafers 12 to 15 are filled by the polysilicon portion 16 . Therefore, the polycrystalline material fraction 16 can be utilized as a degassing region for trapping metal impurities of the respective wafer wafers 12 to 15. Further, since the small-sized wafer 12 is formed in a square shape in plan view, wafer formation of the wafer is also easy. Further, since a circular support plate is used, it is possible to form an element using a manufacturing and processing apparatus similar to that of the conventional one. Fig. 3 is a view showing the process of a semiconductor wafer of another embodiment. In this embodiment, a substrate (S2i to S23) as a large-diameter supporting sheet is formed, wherein the supporting sheet is formed by slicing a polycrystalline ingot. The surface of the polycrystalline germanium substrate is mirror-polished and mirrored in advance. Then, '13.14653, a diameter of 3〇〇mm, which was pulled by the usual cz method, 200914653 Shixi single crystal ingot (the circular surface is circular), and the side surface is ground in four directions from the side of the cylindrical portion after the block is cut. Or cutting to make a single crystal key block with a square surface, ~S〇2). The section of the ingot block is a square of 2〇5 positions. Thereafter, the ingot block is sliced to a thickness of 775 # m(S03) ' using a wire saw or the like, and processing such as buffing, grinding, and etching is sequentially performed (s〇4, sw, S 0 6). They are all carried out by a known method of wafer processing. After etching, the rectangular germanium wafer is divided into four by laser (s〇7). In the method of f k body, a laser beam such as a carbon dioxide gas laser beam or a YAG laser beam is irradiated onto the surface of the Shi Xi wafer, and 4 segments are formed by scanning the surface of the stone beam with a laser beam. Alternatively, after the square is scored on the surface of the germanium wafer, the stone wafer is cracked along the scribe line, and the four sides of the cracked wafer are planarized by grinding or polishing. Perform 4 splits. / After that, mirror polishing is performed on both sides (S08). As a result, four rectangular wafer wafers can be produced. Next, the polished surface of the small rectangular wafers is superimposed on the polished surface of the large-diameter polycrystalline dream substrate at room temperature for bonding (8〇9). The bonding is carried out by a known bonding method, and then, a bonding hardening heat treatment is performed between the polycrystalline hard substrate and each of the rectangular wafers. The conditions for bonding and strengthening the heat treatment are, for example, an inert gas atmosphere such as 圃12-12 or argon. Thereafter, on the surface of the polycrystalline substrate to which a small rectangular wafer is attached, a predetermined cleaning potter is applied, and (10) the polycrystalline stone is coated on the surface (8) 1). As a result, the gap between the small pieces is filled by the polycrystalline stone. Thereafter, a predetermined polishing (CMp) (8) 2) is applied to the surface of the polycrystalline silicon coating, and further washed (S13) to form a semi-200914653 conductor wafer whose surface is cut (4 sides). Thus, a larger diameter 矽 wafer can be fabricated by arranging a plurality of 矽B circles, which are arranged on the surface of the polycrystalline germanium substrate. In the case of the manufacturing method at this time, a plurality of small pieces of Shi Xi wafers may be arranged on the surface of the ceramsite substrate and annealed to adhere to the stone oxide film (for example, quartz glass). ^ b After the above-mentioned bonding, the gap between the adjacent small crystal circles is filled with polycrystalline germanium. The polycrystalline lanthanide has, for example, a function of a degassing region. Small wafers are square or rectangular, or other shapes. Moreover, the number of small wafers adhered to the polycrystalline substrate is not limited. After the small wafers are adhered to the polycrystalline substrate, the polycrystalline silicon wafer is filled in the gap between the small wafers: Thereafter, the surface or the back surface of the polycrystalline slab with the small piece is mirror-polished. When the surface of the back surface is mirror-finished, the flatness can be further improved as compared with mirror-only grinding of the surface. Alternatively, the epitaxial film may be grown on the surface of each of the wafer wafers. At this time, a germanium epitaxial film was used as the element forming surface. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a plan view showing a schematic configuration of a semiconductor wafer according to a first embodiment of the present invention. Fig. 2 is a cross-sectional view showing a part of a semiconductor wafer of a second embodiment. Fig. 3 is a flow chart showing a method of manufacturing a semiconductor wafer according to a second embodiment of the present invention. 15 200914653 [Description of main component symbols] 10 Semiconductor wafer 11 Quartz glass substrate 12 to 15 Small wafer 17 Polycrystalline germanium / 1' k 16

Claims (1)

200914653 十、申請專利範面: 1種半導體晶圓之製造方法,係將複數片由半導體 日日圓之小片戶斤構成之小片b日日圓排列配置於直徑為㈣_以 上之1片支承板材之一面,之後,加熱配置有該小片晶圓 之支承板材,據以將該等複數片小片晶圓接合於該支承板 材之一面,以製作以該等小片晶圓表面為元件形成面的半 導體晶圓。 2、 如申請專利範圍第丨項之半導體晶圓之製造方法, 其中,該支承板材為石英玻璃、該小片晶圓為矽晶圓之小 片,將忒等重疊之後,藉由加熱並透過矽氧化膜將複數片 小片晶圓接合於支承板材之一面。 3、 如申請專利範圍第1或2項之半導體晶圓之製造方 法,其係將多晶矽填充於設在該小片晶圓與小片晶圓間之 間隙後’研磨該等小片晶圓表面,並使磊晶膜成長於該研 磨後之小片晶圓表面。 4、 一種半導體晶圓,係將複數片由半導體晶圓之小片 所構成之小片晶圓排列黏貼於直徑為450mm以上之1片支 承板材的一面’藉此以該等小片晶圓表面為元件形成面。 5、 如申請專利範圍第4項之半導體晶圓,其中,該支 承板材為石英玻璃、該小片晶圓為矽晶圓之小片,透過砂 氧化膜將複數片小片晶圓接合於支承板材之一面。 6、 如申請專利範圍第4或5項之半導體晶圓,其中, 在以多晶矽填充設於該小片晶圓與小片晶圓間之間隙後, 研磨該等小片晶圓表面’並使站晶膜成長於該研磨後之小 17 200914653 片晶圓表面。 7、如申請專利範圍第4項之半導體晶圓,其中,該支 承板材俯視為圓形*該小片晶圓為矩形。 十一、圖式: 如次頁。200914653 X. Patent application: One method for manufacturing a semiconductor wafer is to arrange a plurality of small pieces of semiconductor wafers, which are composed of small pieces of semiconductor yen, to be arranged on one of the supporting plates of diameter (4)_above. Thereafter, the support sheet on which the small wafer is placed is heated, and the plurality of small wafers are bonded to one side of the support sheet to form a semiconductor wafer having the surface of the small wafer as an element formation surface. 2. The method of manufacturing a semiconductor wafer according to the scope of the patent application, wherein the supporting plate is quartz glass, the small piece of wafer is a small piece of a silicon wafer, and the germanium is superposed by heating and passing through the germanium. The film bonds a plurality of small wafers to one side of the support sheet. 3. The method of fabricating a semiconductor wafer according to claim 1 or 2, wherein the polycrystalline silicon is filled in a gap between the small wafer and the small wafer, and the surface of the small wafer is polished and The epitaxial film is grown on the surface of the polished wafer. 4. A semiconductor wafer in which a plurality of small wafers consisting of small pieces of a semiconductor wafer are adhered to one side of a supporting sheet having a diameter of 450 mm or more, thereby forming the surface of the small wafers as components. surface. 5. The semiconductor wafer of claim 4, wherein the supporting plate is quartz glass, the small piece of wafer is a small piece of a silicon wafer, and a plurality of small pieces of wafer are bonded to one side of the supporting plate through a sand oxide film. . 6. The semiconductor wafer of claim 4 or 5, wherein after filling the gap between the small wafer and the small wafer with a polysilicon crucible, grinding the surface of the small wafer and making the crystal film Growing on the surface of the small 17 200914653 wafer after grinding. 7. The semiconductor wafer of claim 4, wherein the support plate is circular in plan view; the die wafer is rectangular. XI. Schema: As the next page. 1818
TW97131098A 2007-08-24 2008-08-15 Semiconductor wafer and its manufacturing method TW200914653A (en)

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