TW200914640A - Sputtering method - Google Patents

Sputtering method Download PDF

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Publication number
TW200914640A
TW200914640A TW97131734A TW97131734A TW200914640A TW 200914640 A TW200914640 A TW 200914640A TW 97131734 A TW97131734 A TW 97131734A TW 97131734 A TW97131734 A TW 97131734A TW 200914640 A TW200914640 A TW 200914640A
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Taiwan
Prior art keywords
sputtering
target
substrate
power
targets
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TW97131734A
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Chinese (zh)
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TWI518194B (en
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Makoto Arai
Junya Kiyota
Yuuji Ichihashi
Takeshi Kojima
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Ulvac Inc
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    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/34Sputtering
    • C23C14/35Sputtering by application of a magnetic field, e.g. magnetron sputtering
    • C23C14/352Sputtering by application of a magnetic field, e.g. magnetron sputtering using more than one target

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  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Physical Vapour Deposition (AREA)
  • Manufacturing Of Electric Cables (AREA)

Abstract

Provided is a sputtering method by which a thin film forming speed is prevented from greatly increasing and an excellent thin film is formed on a large area substrate to be processed, while suppressing abnormal discharge due to charge-up of the substrate. A plurality of targets (41a-41h) face a substrate (S) to be processed and are arranged in parallel at prescribed intervals in a sputter chamber (12). Power is supplied to each pair of targets at a prescribed frequency by alternately changing the polarity, and each target is alternately switched to an anode electrode and a cathode electrode to generate glow discharge between the anode electrode and the cathode electrode and form plasma atmosphere. Then, sputtering is performed to each target. While sputtering is performed, power supply to each target is intermittently reduced.

Description

200914640 九、發明說明 【發明所屬之技術領域】 本發明,係有關於用以在處 薄膜之濺鍍方法,特別是有關於 【先前技術】 作爲在玻璃或是矽晶圓等的 的薄膜之方法的其中之一,係有 鑛」)。此濺鍍法,係將電漿氛 對應於欲在處理基板表面成膜的 形狀的標靶衝擊,並使濺鍍粒子 基板之表面附著、堆積並形成特 平面面板顯示器(FPD)之製造 面積爲大之處理基板而形成ITO 作爲對於大面積之處理基板 地形成薄膜者,係週知有下述一 此濺鍍裝置,係具備有:在真空 向並以等間隔而並排設置之複數 對於並排設置之標靶中的分別成 來交互地改變極性並施加交流電 面在真空中導入特定之濺鍍氣體 成對之標靶投入電力,並將各標 、陰極電極,而在陽極電極以及 產生,並形成電漿氛圍,而對各 理基板表面上形成特定的 使用有交流電源者。 處理基板表面上形成特定 濺鍍法(以下,稱爲「濺 圍中之離子加速,使其向 薄膜之組成而製作爲特定 (標靶原子)飛散,而在 定之薄膜者,於近年,在 工程中,係被利用在對於 等之薄膜一事中。 而以一定之膜厚來有效率 般之濺鍍裝置。亦即是, 處理室內與處理基板相對 枚的相同形狀之標靶、和 對之標靶而以特定之頻率 壓的交流電源。而後,一 ,一面經由交流電源而對 靶交互地切換爲陽極電極 陰極電極之間使輝光放電 標靶作濺鍍(例如,專利 -5- 200914640 文獻1 )。 [專利文獻1]日本特開2005-290550號公報 【發明內容】 [發明所欲解決之課題] 在上述使用有交流電源之濺鍍裝置中,於濺鍍中,滯 留在標靶表面處之充電電荷,當被施加有相反之相位電壓 時,係會被抵消。因此,就算是在使用氧化物等之標靶的 情況中,起因於標靶之充電的異常放電(弧狀放電)的發 生亦係被抑制。另一方面,在濺鍍室內之電位性絕緣又或 是浮動(floating )狀態下的處理基板,亦會被充電,但 是,通常,處理基板表面之充電電何,係經由例如灘鑛粒 子或是電離後之濺鍍氣體離子而被中和並消失。 然而,當爲了提高濺鍍速度,而將對於標靶之投入電 力增大、或是將標靶表面之磁場強度增強而提昇標靶表面 附近之電漿密度的情況時,每單位時間之對於處理基板表 面的充電電荷會增加,而成爲容易滯留於處理基板表面。 又,例如在FPD製造工程中,在被形成有構成電極之金屬 膜或是絕緣膜的處理基板表面上形成ITO等之透明導電膜 的情況時,在處理基板表面之絕緣膜處,充電電荷係成爲 容易滯留。 若是在處理基板(又或是被形成於處理基板表面上之 絕緣膜)處滯留有充電電荷,則,例如,在處理基板與被 配置於此處理基板之周邊部的接地之遮罩平板(mask -6 - 200914640 plate )間的鄰接部處,會有由於電位差而使 地移動至遮罩平板處的情況’而起因於此, 電(弧狀放電)。若是發生異常放電,則會 板表面之膜受到損傷而造成製品不良、或是 之問題,而對良好之薄膜形成造成阻礙。 因此,本發明之課題,係有鑑於上述之 種:對起因於處理基板之充電的異常放電之 並對於大面積之處理基板而能夠良好地形成 法。 [用以解決課題之手段] 爲了解決上述課題,申請專利範圍第1 鍍方法,係爲一面在濺鍍室內導入製程氣體 濺鍍室內而與處理基板相對向且空出有特定 排設置的複數枚標靶中之分別成對的標靶, 來交互地改變極性而投入電力,來將各標靶 極電極、陰極電極,並在陽極電極以及陰極 光放電產生而形成電漿氛圍,而對各標靶作 理基板之表面上形成特定之薄膜的濺鍍方法 在濺鍍中,將對於各標靶之投入電力,以特 其減少。 若藉由本發明,則在濺鍍中,就算是在 電離之電子或是藉由濺鍍所產生之二次電子 板表面並滯留有充電電荷,亦由於係將對於 充電電荷瞬間 會產生異常放 產生·處理基 產生有粒子等 點,而提供一 發生作抑制, 薄膜之濺鍍方 項所記載之濺 ,一面對於在 之間隔地被並 以特定之頻率 交互切換爲陽 電極之間使輝 濺鍍,並在處 ,其特徵爲: 定之間隔來使 標靶之前方所 移動至處理基 各標靶之投入 -7- 200914640 電力以特定之間隔來分別作減少,因此在對各標靶之投入 電力的減少狀態下,朝向處理基板而移動之電離電子或是 二次電子之量係減少,且處理基板(又或是被形成於處理 基板表面處之絕緣膜)之充電電荷係經由濺鍍粒子或是電 離後之濺鍍氣體離子而被中和等並消失,故而能夠顯著地 抑制對於處理基板表面之充電電荷的滯留。其結果,伴隨 於處理基板之充電的異常放電之發生係被防止,就算是在 對於在表面上被形成有絕緣膜之處理基板而進而形成另外 之薄膜的情況中,亦成爲能夠進行良好之薄膜形成。另外 ,就算是在對於各標靶之投入電力的減少狀態下,濺鑛亦 係爲繼續,而進行有薄膜之形成,因此,爲了以特定之膜 厚來形成薄膜所需要的濺鍍時間,係不會變得過長。 又,只要將前述減少,設爲對於並排設置之所有的標 靶而以一定之週期來同時進行即可。藉由此,在濺鍍所致 之薄膜形成中,藉由將投入電力減少而定期地製作出使朝 向處理基板之電離電子或是二次電子的量變少的狀態,能 夠確實地減低處理基板表面之充電電荷的滯留,並確實地 防止異常放電之發生。 在本發明中,爲了一面繼續濺鍍而維持薄膜形成之進 行的狀態,一面有效率地抑制對於處理基板表面之充電電 荷的滯留,係以將前述減少時之投入電力,設爲通常電力 投入時之5〜50%的範圍爲理想。 又,係以將相對於前述通常電力投入時之濺鍍時間的 前述投入電力減少時之濺鍍時間的比,設定爲2以下爲理 200914640 想。若是上述比超過了 2,則會有濺鍍時間變得過長之虞 〇 又,在本發明中,爲了有效率地抑制對於處理基板表 面之充電電荷的滯留,只要將前述投入電力減少時之濺鑊 時間設爲0.5秒以上即可。 又,若是作爲前述標靶,係使用銦以及錫之氧化物標 靶、又或是銦以及錫之合金標靶,而作爲導入至處理室內 之製程氣體,係包含有H20氣體、又或是H20氣體以及 〇2氣體,並在處理基板之表面,形成由銦、錫以及氧所構 成之透明導電膜,則就算是例如在FPD製造工程中而在被 形成有構成電極之金屬膜或是絕緣膜的處理基板表面上而 形成ITO等之透明電極的情況時,亦能夠藉由對起因於絕 緣膜之充電所致的異常放電之發生作抑制,而提昇製品之 良率。又,在對於各標靶之投入電力的間歇減少時,藉由 將導入至處理室內之H2o氣體(反應性氣體)並不使其被 局部性地消耗而涵蓋處理基板背面全體地作供給,能夠防 止透明電極局部性地微結晶化,而能夠的到更爲安定之非 晶質的透明導電膜。 進而,亦可爲以下一般之構成:作爲前述標靶’係使 用銦以及鋅之氧化物標靶、又或是銦以及鋅之合金標靶’ 作爲導入至處理室內之製程氣體,係包含有〇2氣體’並 在處理基板之表面,形成由銦、鋅以及氧所構成之透明導 電膜。 200914640 [發明之效果] 如上述所說明一般,在本發明之濺鍍方法中’係在藉 由使用有交流電源之濺鍍來對大面積之處理基板形成薄膜 的情況時,對起因於處理基板之充電的異常放電之發生作 抑制,而可達到能夠良好地形成薄膜之效果。 【實施方式】 參考圖1,1係爲本發明之磁控管方式的濺鍍裝置( 以下,稱爲「濺鍍裝置」)。濺鍍裝置1,例如係爲連續 (in_line )式,具有經由旋轉式幫浦、渦輪分子幫浦等之 真空排氣手段(未圖示)而能保持特定之真空度(例如, l(T5Pa)的真空處理室11,而構成濺鍍室(處理室)12。 於真空處理室1 1之上部,係設置有基板搬送手段2。此基 板搬送手段2,係具有週知的構造,舉例而言,具有以電 位性之浮動狀態來將處理基板S作保持之載台2 1,藉由 間歇地驅動未圖示之驅動手段,能依序將處理基板S搬送 至與後述標靶相對向的位置。 又,在濺鍍室1 2中,爲了在對於被搬送至與標靶相 對向之位置處的處理基板S而形成薄膜時,防止在載體 21之表面等處附著有濺鍍粒子,而在基板搬送手段2與標 耙之間,安裝被形成有面臨處理基板S之開口 1 3 a的接地 之遮罩板13。又’於真空處理室11內,係設置有將製程 氣體導入至濺鍍室12內之氣體導入手段3。 氣體導入手段3 ’例如係具備有被一端爲被安裝在真 -10- 200914640 空處理室11之側壁處的氣體管31,氣體管31之另外一端 ,係經由質量流控制器3 2而通連於氣體源3 3。作爲製程 氣體,係包含有:由Ar等之希有氣體所成之濺鍍氣體、 和當藉由反應性濺鍍而形成特定之薄膜的情況時’因應於 欲形成於處理基板S之表面上的薄膜之組成而被適宜選擇 之〇2、N2或是H20等之反應性氣體。進而’於真空處理 室11之下側,係被配置有陰極電極C。 陰極電極C,係具備有以能夠對於大面積之基板s而 有效率地形成薄膜的方式而與基板S相對向並以等間隔而 作配置之複數枚(在本實施形態中,係爲8枚)的標靶 41a乃至41h。各標靶41a乃至41h,係由Al、Ti、Mo、 銦以及錫之氧化物(IΤ Ο )、或是銦以及錫之合金等的因 應於欲形成在基板S之表面處的薄膜之組成而藉由週知之 方法所製作者,並係被形成爲例如略直方體(俯視時爲長 方形)等的相同形狀。各標靶41 a乃至41 h ’係在濺鍍中 ,藉由銦或是錫等之焊接材料,而被接合與用以將標靶 41a乃至41h作冷卻的背板42上。各標靶41a乃至41h, 係以使未使用時之濺鍍面4 1 1位置於與基板S平行之同— 平面上的方式,而經由絕緣構件來安裝於陰極電極C之框 架(未圖示)上’在並排設置之標靶41a乃至41h之周圍 ,係被設置有接地之遮蔽板(shield ) 43。 又,陰極電極c,係具備有分別位置於標靶41a乃至 41 h之後方(與濺鍍面4 U相背向之側)的磁石組裝體5 。相同構造之磁石組裝體5,係具備有與各標靶4 1 a乃至 -11 - 200914640 4 1 h平行地被設置之支持板(軛)5 1。當I 41h由正面視之而爲長方形時,支持板51, 4 1 a乃至4 1 h之橫幅爲小,而沿標靶4 1 a乃 方向朝其兩側延伸出去的方式所形成之長方 構成,而係爲可將磁石之吸著力增幅的磁性 持板5 1上,將於其中央部而沿著長度方向 之中央磁石52,和以包圍中央磁石52之周 著支持板5 1之外周所配置的周邊磁石5 3 4 1 1側之極性作改變的方式而設置。 將中央磁石5 2換算爲同磁化後之體積 計爲成爲和將周邊磁石5 3之換算爲同磁化 (周邊磁石:中心磁石:周邊磁石=1 : 2 : ,在各標靶41a乃至41h之濺鍍面411的前 形成有相平衡之閉迴圈狀的隧道狀磁束。藉 捉在各標靶41a乃至41h之前方(濺鍍面4] 的電子及經由濺鍍所產生之二次電子,而能 41a乃至41h的前方之電子密度,並提局電 夠提高濺鍍速率。各磁石組裝體5,係分別 達或是空氣汽缸等所構成之驅動手段D的驅 在沿著標靶41a乃至41h之並排設置方向的 ,可以平行且等速地進行一體化之往復運動 能夠對濺鍍速率變高之區域作改變’而涵蓋: 至4 1 h之全面來得到均等的侵鈾區域。 各標靶41a乃至41h,係以相鄰之2枚 票靶4 1 a乃至 係以較各標靶 至41h之長度 形狀的平板所 材料製。在支 來配置爲線狀 圍的方式而沿 ,以對濺鍍面 ,例如係被設 後的體積之和 1 )成爲相同 方,係分別被 由此,藉由捕 11側)所電離 提高在各標靶 漿密度,而能 被連接於由馬 動軸D1處, 兩處位置之間 。藉由此,係 §•標靶41a乃 來構成一對之 -12- 200914640 標靶(41a 與 41b、 41c 與 41d、 41e 與 41f、 41g 與 41h) ,並對於各個一對之標靶,而分配設置有交流電源E 1乃 至E4,從交流電源E1乃至E4而來之輸出纜線ΚΙ、K2, 係被連接於一對的標靶4 1 a、4 1 b ( 4 1 c以及4 1 d、4 1 e以 及41f、41g以及41h)(參考圖2)。藉由此,經由交流 電源E1乃至E4,對於各個一對之標靶41a乃至41h而交 互地改變極性並施加交流電壓。 交流電源E 1乃至E4,係爲相同之構造,而由可進行 電力之供給的電力供給部6、和以特定之頻率而交互地改 變極性並將交流電壓輸出至一對之標靶4 1 a、4 1 b ( 4 1 c以 及41d、41e以及41f、41g以及41h)處的振盪部7所構 成。關於對各標靶4 1 a乃至4 1 h所輸出之輸出電壓的波形 ,係爲略正弦波,但是,係並不限定於此,而例如亦可爲 略方形波。以下,針對交流電源E1之構成,參考圖2來 作說明。 電力供給部6,係具備有:對其之動作進行控制之第 1CPU電路61、和被輸入有商用之交流電力(3相AC200V 又或是400V)的輸入部62、和將所輸入之交流電力作整 流並變換爲直流電力之6個的二極體63,並經由直流電力 線64a、64b來將直流電力輸出至振盪部7處。 又,在電力供給部6處,係被設置有:被設置在直流 電力線64a、64之間的切換電晶體65、和被可自由通訊地 連接於第1CPU電路61處,並對切換電晶體65之動作進 行控制而對輸出至振盪部7處之輸出電壓又或是輸出電流 -13- 200914640 作控制的第1驅動電路66a以及第1 PMW控制電路66b, 藉由該輸出電壓又或是輸出電流,而決定在一對之標靶 4 1 a、4 1 b間的投入電力。於此情況,係被設置有具備電流 檢測器以及電壓檢測變壓器並對直流電力線64a、64b間 之電流、電壓作檢測的檢測電路67a、以及AD變換電路 67b,並成爲經由檢測電路67a以及AD變換電路67b而被 輸入至CPU電路61處。 另一方面,在振盪部7處,係被設置有:可自由通訊 地被連接於第1CPU電路61處之第2CPU電路71、和被 設置在直流電力線64a、64b的構成振盪用切換電路72之 4個的第1乃至第4切換電晶體72a、72b、72c、72d,和 可自由通訊地被連接於第2 C P U電路7 1,並對各切換電晶 體72a、72b、72c、72d之動作進行控制的第2驅動電路 73a以及第2PMW控制電路73b。 而後,若是經由第2驅動電路7 3 a以及第2 P M W控制 電路73b,而例如以使第1以及第4切換電晶體72a、72d 和第2以及第3切換電晶體72b、72c之導通.斷路的時 機反轉的方式,而對各切換電晶體72a、72b、72c、72 d 之動作進行控制,則能夠經由從振盪用切換電路72而來 之交流電力線74a、74b,來輸出正弦波之交流電力。於此 情況’係被設置有檢測出振盪電流之檢測電路75a以及 AD變換電路75b ’並成爲經由檢測電路75a以及ad變換 電路75b而被輸入至第2CPU電路71處。 父流電力線7 4 a、7 4 b,係經由串聯或者是並聯又或是 -14- 200914640 將此些作了組合後之共振用LC電路,而被連接於具備有 週知之構造的輸出變壓器76處,而從輸出變壓器76而來 之輸出纜線κ 1、K 2,係分別被連接於一對之標靶41、4 1 b 處。於此情況,係被設置有具備電流檢測器以及電壓檢測 變壓器並對一對之標靶4 1 a、4 1 b間之輸出電流、輸出電 壓作檢測的檢測電路77a、以及AD變換電路77b,並成爲 經由檢測電路77a以及AD變換電路77b而被輸入至第 2 CPU電路71處。藉由此,在濺鍍中,係可經由交流電源 E 1乃至E 4 ’而以一定之頻率來交互地改變極性,並對一 對之標靶4 1 a、4 1 b而投入任意設定之一定的電力。 另外,各交流電源E1乃至E4之第1CPU電路61,係 相互被可自由通訊地作連接,並可藉由從任一者之1個的 CPU電路61而來之輸出訊號,來將各交流電源E1乃至 E4作同步運轉。 當在處理基板S表面上形成特定之薄膜的情況時,係 經由基板搬送手段2來將處理基板S搬送至與各標靶4 1 a 乃至41h相對向之位置處,並在濺鍍室12到達了特定之 真空壓後,經由氣體導入手段3而導入特定之濺鍍氣體( 以及反應性氣體)。接下來,使交流電源E 1乃至E4作動 ,而對各一對之標靶4 1 a乃至4 1 h施加交流電壓,並將各 標靶41a乃至41h交互地切換爲陽極電極、陰極電極,而 在陽極電極以及陰極電極之間使輝光放電產生,並形成電 漿氛圍。藉由此,電漿氛圍中之離子’係朝向成爲陰極電 極之其中一方的標靶41a乃至41h而被加速並衝擊,並使 -15- 200914640 濺鍍粒子飛散,藉由此’而在處理基板S表面上形成薄膜 〇 然而,若是如同上述一般地構成濺鍍裝置1,則滯留 在標靶41a乃至41h之表面處的充電電荷,係在被施加有 相反之相位的電壓時被抵消,而能夠防止起因於標靶4 1 a 乃至41h之充電所造成的異常放電之發生。另一方面,由 於浮動狀態之處理基板S表面係亦被充電,因此,特別是 在FPD製造工程中,當在被形成有構成電極之金屬膜或是 絕緣膜的處理基板表面上形成ITO等之透明導電膜的情況 時,在此絕緣膜處,充電電荷係成爲容易滯留,故而,有 必要使其成爲不會發生起因於處理基板S之充電所造成的 異常放電。 在本實施形態中,係設爲在濺鍍中,藉由從任一之一 個的第1CPU電路61而來之輸出訊號,而經由各交流電 源E1乃至E4之PMW控制電路66b來對切換電晶體65作 控制,並從濺鍍開始起,而以一定之週期來將對於各標靶 4 1 a乃至4 1 h的電力投入同時地減少(參考圖3 )。於此 ,所謂同時地減少,係指存在有對於所有標靶4 1 a乃至 4 1 h之投入電力在一定時間內而被減少的狀態,而並非爲 要求將投入電力之減少開始時期或是再度之於設定電壓下 的電力投入開始時期在各交流電源E 1乃至E4處設爲相互 一致者(亦即是,投入電力之減少開始時期或是再度之於 設定電壓下的電力投入開始時期,在各交流電源E 1乃至 E4處係亦可爲不一致)。 -16- 200914640 藉由此,在濺鍍中,就算是在標靶41a乃至41h之前 方所電離之電子或是藉由濺鍍所產生之二次電子被作供給 並將處理基板S充電,在定期性的對於所有標靶4 1 a乃至 4 1 h之投入電力減少狀態下,由於朝向處理基板S而移動 之電離電子或是二次電子之量係減少,且處理基板S表面 之充電電荷係經由濺鍍粒子或是電離後之濺鍍氣體離子而 被中和並消失,故而能夠顯著地抑制處理基板S表面處之 充電電荷的滯留。其結果,伴隨於處理基板S之充電所產 生的異常放電之發生係被防止,而成爲能夠進行良好的薄 膜形成。 於此,減少時之投入電力、使投入電力減少之時間或 是週期(在濺鍍中之投入電力減少的次數),係因應於標 靶之種類或是處理基板S之種類而被適宜設定,但是,爲 了不使在標靶前方所產生之電漿有一旦消失的情況,且同 時對處理基板表面之充電電荷的滯留有效率地作抑制,係 以將投入電力的減少量,設爲通常電力投入時之5〜50% 的範圍爲理想。 另一方面,使投入電量減少之時間,係只要設爲〇.5 秒以上,較理想係設爲2. 〇秒以下即可,又,在濺鍍中之 投入電力減少的週期,係只要設定爲1 . 5〜4.0秒即可。於 此情況,係以將相對於前述通常電力投入時之濺鍍時間的 前述投入電力減少時之濺鍍時間的比,設定爲2以下爲理 想。若是上述比超過了 2,則會有濺鍍時間變得過長之虞 -17- 200914640 於此’若是以:作爲標靶4 1 a乃至4 1 h,係使用銦以 及錫之氧化物,並在被形成有構成電極之金屬膜或是絕緣 膜的處理基板S表面上以5 00人之膜厚形成ITO之透明導 電膜的情況爲例來作說明,則若是將設定投入電力設爲20 〜30kW,將減少時之投入電力設爲2.5〜10kW,將使投入 電量減少之時間設爲0.5〜1.5秒,並將週期設爲1.5〜3.5 秒,則直到標靶之壽命結束爲止,在處理基板S處之弧狀 放電的發生係被抑制,而能夠形成良好之薄膜。 然而,當作爲標靶41a乃至41h而使用銦以及錫之氧 化物標靶又或是銦以及錫之合金標靶,並作爲反應性氣體 而使用包含有H20氣體又或是包含有H20氣體以及02氣 體之混合氣體,並藉由反應性濺鍍而形成ITO膜時,若是 被導入至濺鍍室1 2中之H20氣體係局部性地被消耗,則 在被形成於處理基板表面上之ITO膜處,係會局部性地產 生微結晶化之場所。若是在ITO膜處局部性地產生有微結 晶化之場所,則不僅會使導電性降低,在後續工程中,當 對I TO膜進行鈾刻時,在處理基板面內,每單位時間之蝕 刻速度會有成爲不均勻的情況,如此一來,生產性係不佳 〇 於此情況,若是將對於各標靶4 1 a乃至4 1 h之投入電 力間歇性的減少,則當投入電力減少時,被導入至濺鍍室 12內之H20氣體係涵蓋處理基板S表面之全體而被供給 ,其結果,係防止透明導電膜之局部性的微結晶化’而能 夠更爲安定地得到非晶質之透明導電膜’同時’在後續工 -18- 200914640 程中,就算是對ITO膜進行蝕刻,亦能夠將每單位時間之 蝕刻速度在處理基板面內設爲略均等。另一方面,當作爲 反應性氣體而使用包含有〇2氣體之氣體,而形成ΙΖΟ膜 的情況時,亦能夠得到與上述相同之效果。 另外,在本實施形態中,雖係針對使用8枚之標靶, 並對每一相鄰之標靶而分配交流電源,來將電力投入者作 了說明’但是,係並不限定於此,標靶之枚數或是成對之 標靶的組合,係可因應於薄膜形成製程而適宜作設定。 [實施例1] 於本實施例1中,係使用圖1所示之濺鍍裝置,而經 由濺鍍來在處理基板S上形成了 IΤ 0膜。於此情況,作爲 標靶41 a乃至41 h ’係使用ΙΤΟ,而作爲處理基板S,係 使用玻璃基板,標靶以及處理基板間之距離,係設定爲 1 5 0mm。作爲濺鍍條件,以將真空處理室1 1內的壓力保 持爲〇.7Pa的方式,來控制質量流控制器而將Ar導入, 並將從交流電源E1乃至E4而對於標靶之投入電力設定爲 25kW 〇 而後,將處理基板S依序搬送至與標靶相對向之位置 處’並設定爲在各玻璃基板各得到500A之膜厚的ITO膜 (濺鍍時間,約爲1 4秒)。對於投入電力,在每一秒鐘 ’將一秒間之投入電力在設定電壓之〇〜1 〇 〇 %的範圍內依 序一次減少1 〇 % ’並進行濺鍍直到對於標靶之積算投入電 力達到了 30kWh爲止。 -19 - 200914640 在上述實施例1中,當減少時之對於標靶的投入電力 係較設定投入電力之5 0 %爲更高時(1 5 kw以上),則爲 了得到上述膜厚之ITO膜所需的濺鍍時間,係僅增加了 4 秒,但是,若是積算投入電力增加,則在處理基板周邊處 之弧狀放電的發生係變多,隨情況之不同,會有由於弧狀 放電而無法形成良好之薄膜的情況。 相對於此,當減少時之對於標靶的投入電力係爲 1 2.5kW (設定投入電力之50%的電力)時,則爲了得到上 述膜厚之ITO膜所需的濺鍍時間,係僅增加了 6秒,並且 ,一直到積算投入電力到達了 3 Ok Wh爲止,在處理基板 周邊處之弧狀放電係幾乎不會發生,而能夠形成良好之薄 膜。另一方面,當減少時之對於標靶的投入電力係爲 1 · 2 k W (未滿設定投入電力之5 %的電力)時,則雖然在處 理基板周邊處之弧狀放電係幾乎沒有發生,但是擺鍍電源 之控制係成爲不安定,而無法對ITO膜之厚度作控制。 [實施例2] 於本實施例2中,與上述實施例1同樣的。使用圖1 所示之濺鍍裝置,並藉由相同之濺鍍條件,而經由上述實 施例濺鍍來在處理基板S上形成了 ITO膜。但是’係將從 交流電源E1乃至E4而對於標靶之投入電力’設定爲 2 5k W,同時,在每一特定之時間(0.1〜4.0秒)中’在一 秒間將投入電力減少至2 0 % ( 5 k W ),並進行濺鍍直到各 標靶之積算投入電力達到了 30kWh爲止。 -20- 200914640 在上述實施例2中,當上述時間係爲3.0秒以下時, 在處理基板周邊處之弧狀放電的發生次數係變多,隨著情 況之不同,會有由於弧狀放電而無法形成良好之薄膜的情 況。相對於此,當上述時間係爲0.5秒時,則爲了得到上 述膜厚之ΙΤΟ膜所需的濺鍍時間,係增加了 1 6秒,但是 ,一直到積算投入電力到達了 30kWh爲止,弧狀放電係 幾乎不會發生,而能夠形成良好之薄膜。另一方面,當上 述時間係爲0.4秒時,則爲了得到上述膜厚之ITO膜所需 的濺鍍時間,係增加了 2 1秒,若是對生產性作考慮,則 係並不希望將上述時間設定爲較〇. 5秒(全體之濺鍍時間 係爲3 0秒)更短。 [實施例3 ] 於本實施例3中,與上述實施例1同樣的。使用圖1 所示之濺鍍裝置,並藉由相同之濺鍍條件,而經由上述實 施例濺鍍來在處理基板S上形成了 ITO膜。但是’係將從 交流電源E1乃至E4而對於標靶之投入電力,設定爲 2 5 k W,同時,在每一特定之時間(0. 1〜2秒)中,將投 入電力減少至20% ( 5kW ),並進行濺鍍直到各標靶之積 算投入電力達到了 30kWh爲止。 在上述實施例3中,當上述時間係爲0.4秒以下時’ 在處理基板周邊處之弧狀放電的發生次數係變多’隨著情 況之不同,會有由於弧狀放電而無法形成良好之薄膜的情 況。相對於此’當上述時間係爲〇. 5秒時,則爲了得到上 -21 - 200914640 述膜厚之ITO膜所需的濺鍍時間,係增加了 3秒,但是, 一直到積算投入電力到達了 3 OkWh爲止,弧狀放電係幾 乎不會發生,而能夠形成良好之薄膜。另一方面,當上述 時間係爲2秒時,則爲了得到上述膜厚之ITO膜所需的濺 鍍時間,係增加了 1 6秒,若是對生產性作考慮,則係並 不希望將上述時間設定爲超過2秒(全體之濺鍍時間係爲 30 秒)。 【圖式簡單說明】 [圖1 ]將本發明之濺鍍裝置作模式性展示的圖。 [圖2 ]對在圖1中所示之濺鍍裝置的交流電源作說明 之圖。 [圖3]對從交流電源而對於標靶之電力投入的控制作 說明之圖。 【主要元件符號說明】 1 :濺鍍裝置 12 :濺鍍室 3 :氣體導入手段 41a乃至41h:標祀 E1乃至E4 :交流電源 6 5 :切換元件 S :處理基板 -22 -200914640 IX. INSTRUCTIONS OF THE INVENTION [Technical Field] The present invention relates to a sputtering method for a film there, and more particularly to a method of using a prior art as a film on a glass or a germanium wafer or the like. One of them is mine.) In the sputtering method, the plasma atmosphere corresponds to a target impact of a shape to be formed on the surface of the substrate to be processed, and the surface of the sputtered particle substrate is adhered and deposited to form a manufacturing area of a special flat panel display (FPD). The ITO is formed by processing the substrate as a film for forming a large-area processing substrate. It is known that the sputtering device is provided with a plurality of side-by-side arrangement in a vacuum direction at equal intervals. The respective components in the target alternately change the polarity and apply an alternating current surface to introduce a specific sputtering gas into the target in a vacuum to input the power to the target, and the respective electrodes, the cathode electrode, and the anode electrode are generated and formed The plasma atmosphere, while forming a specific use on the surface of each substrate has AC power. A specific sputtering method is formed on the surface of the substrate (hereinafter, it is called "the ion acceleration in the sputtering process, and the specific composition (target atom) is scattered to the composition of the film, and in the case of the film, in recent years, in engineering In the case of the film of the same type, the sputtering device is efficiently used with a certain film thickness, that is, the target of the same shape opposite to the processing substrate in the processing chamber, and the target The target is an AC power source that is pressed at a specific frequency. Then, one side is alternately switched between the anode electrode and the anode electrode via the AC power source to cause the glow discharge target to be sputtered (for example, Patent-5-200914640 Document 1 [Problem to be Solved by the Invention] In the above-described sputtering apparatus using an AC power source, it is retained at the surface of the target during sputtering. The charge charge is canceled when the opposite phase voltage is applied. Therefore, even in the case of using a target such as an oxide, an abnormal discharge due to charging of the target is caused. The occurrence of arc discharge is also suppressed. On the other hand, the processing substrate in the potential insulation or floating state in the sputtering chamber is also charged, but usually, the surface of the substrate is charged. The electricity is neutralized and disappeared by, for example, beachite particles or ionized sputtering gas ions. However, when the sputtering rate is increased, the input power to the target is increased, or the target is targeted. When the magnetic field strength of the surface is increased to increase the plasma density near the surface of the target, the charge charge per unit time for the surface of the substrate is increased, and it becomes easy to stay on the surface of the substrate. Also, for example, in the FPD manufacturing process. When a transparent conductive film such as ITO is formed on the surface of the processed substrate on which the metal film or the insulating film constituting the electrode is formed, the charge is easily retained in the insulating film on the surface of the substrate. (Alternatively, the insulating film formed on the surface of the processing substrate) retains a charging charge, for example, in processing the substrate and being configured The adjacent portion between the grounded mask plate (mask -6 - 200914640 plate ) of the peripheral portion of the substrate may be moved to the mask plate due to the potential difference. If an abnormal discharge occurs, the film on the surface of the plate is damaged to cause a defect in the product or a problem, which hinders the formation of a good film. Therefore, the object of the present invention is in view of the above: In the case of abnormal discharge due to charging of the processing substrate, the method can be favorably formed for a large-area processing substrate. [Means for Solving the Problem] In order to solve the above problems, the first plating method of the patent application is one side. The sputtering chamber is introduced into the process gas sputtering chamber to face the processing substrate and vacate the respective pairs of the plurality of targets arranged in a specific row, thereby alternately changing the polarity and inputting electric power to input the respective targets. a pole electrode and a cathode electrode are formed by photodischarge at the anode electrode and the cathode to form a plasma atmosphere, and a specific surface is formed on the surface of each target substrate. Sputtering method in a sputtering film, the targets for each of the input power, in order to reduce its Laid. According to the present invention, even in the case of sputtering, even on the surface of the secondary electron plate generated by ionization of electrons or by sputtering, a charge charge is retained, and an abnormal discharge occurs for the charge charge instantaneously. The treatment group produces particles with equal points, and provides a suppression, the sputtering described in the sputtering of the film, and the sputtering is performed at intervals and at a specific frequency to switch between the anode electrodes and the sputtering. And at the same time, it is characterized by: the interval is to make the target move to the target of each target in the processing base. -7- 200914640 The power is reduced at specific intervals, so the power is applied to each target. In the reduced state, the amount of ionized electrons or secondary electrons moving toward the processing substrate is reduced, and the charge charge of the processing substrate (or the insulating film formed at the surface of the processing substrate) is via sputtering particles or It is neutralized or the like by the sputtering of the gas ions after the ionization, so that the retention of the charged charges on the surface of the substrate can be remarkably suppressed. As a result, the occurrence of abnormal discharge accompanying charging of the processing substrate is prevented, and even in the case where a separate film is formed on the substrate on which the insulating film is formed on the surface, a good film can be formed. form. In addition, even in the state where the input power to each target is reduced, the sputtering is continued, and the formation of a thin film is performed. Therefore, the sputtering time required to form the thin film with a specific film thickness is It won't get too long. Further, as long as the above-described reduction is performed, it is sufficient to perform all of the targets arranged side by side at a predetermined period. In the film formation by sputtering, the amount of ionized electrons or secondary electrons toward the processing substrate is periodically reduced by reducing the amount of input electric power, and the surface of the processing substrate can be surely reduced. The retention of the charge is positive and prevents the occurrence of abnormal discharge. In the present invention, in order to maintain the state in which the film formation is continued while continuing the sputtering, the retention of the charge on the surface of the substrate is effectively suppressed, and the power input at the time of the reduction is set as the normal power input. The range of 5 to 50% is ideal. In addition, the ratio of the sputtering time when the input power is reduced with respect to the sputtering time at the time of the normal power input is set to 2 or less. When the ratio exceeds 2, the sputtering time becomes too long. In the present invention, in order to efficiently suppress the retention of the charge on the surface of the substrate, the amount of the input power is reduced. The splash time can be set to 0.5 seconds or more. Further, as the target, an indium and tin oxide target or an alloy target of indium and tin is used, and the process gas introduced into the processing chamber contains H20 gas or H20. a gas and a ruthenium 2 gas, and a transparent conductive film made of indium, tin, and oxygen is formed on the surface of the substrate, and the metal film or the insulating film constituting the electrode is formed, for example, in the FPD manufacturing process. When a transparent electrode such as ITO is formed on the surface of the substrate, it is also possible to suppress the occurrence of abnormal discharge due to charging of the insulating film, thereby improving the yield of the product. In addition, when the intermittent input of the power to the target is reduced, the H2o gas (reactive gas) introduced into the processing chamber is not partially consumed, and the entire back surface of the processing substrate is supplied. It is possible to prevent the transparent electrode from being locally crystallized, and it is possible to achieve a more stable amorphous transparent conductive film. Further, it may be a general configuration in which the target 'based on an indium and zinc oxide target or an alloy target of indium and zinc' is used as a process gas introduced into the processing chamber, and includes a crucible. 2 gas 'and on the surface of the substrate to form a transparent conductive film composed of indium, zinc and oxygen. 200914640 [Effect of the Invention] As described above, in the sputtering method of the present invention, when a film is formed on a large-area processed substrate by sputtering using an alternating current power source, the substrate is processed. The occurrence of the abnormal discharge of the charge is suppressed, and the effect of forming the film well can be achieved. [Embodiment] Referring to Fig. 1, reference numeral 1 is a magnetron type sputtering device (hereinafter referred to as "sputtering device") of the present invention. The sputtering apparatus 1 is, for example, a continuous (in_line) type, and has a vacuum degree (not shown) via a rotary pump, a turbo molecular pump or the like to maintain a specific degree of vacuum (for example, l(T5Pa). The vacuum processing chamber 11 constitutes a sputtering chamber (processing chamber) 12. The upper portion of the vacuum processing chamber 1 is provided with a substrate transporting means 2. The substrate transporting means 2 has a well-known structure, for example, The stage 2 for holding the processing substrate S in a floating state in a potential state can intermittently drive a driving means (not shown) to sequentially transport the processing substrate S to a position facing a target to be described later. Further, in the sputtering chamber 12, in order to form a film on the processing substrate S at a position facing the target, it is possible to prevent the sputtering particles from adhering to the surface of the carrier 21 or the like. A mask plate 13 formed with a ground facing the opening 13 a of the processing substrate S is mounted between the substrate transfer means 2 and the label. Further, in the vacuum processing chamber 11, a process gas is introduced into the sputtering. The gas introduction means 3 in the chamber 12. The introduction means 3' is provided, for example, with a gas pipe 31 having one end mounted at the side wall of the true-10-200914640 empty processing chamber 11, and the other end of the gas pipe 31 is connected to the mass flow controller 3 2 The gas source 33 includes, as a process gas, a sputtering gas formed of a gas such as Ar, and a case where a specific thin film is formed by reactive sputtering, in response to formation of a substrate to be processed. The composition of the film on the surface of S is suitably selected as a reactive gas such as 〇2, N2 or H20. Further, 'the cathode electrode C is disposed on the lower side of the vacuum processing chamber 11. Cathode electrode C, The target 41a having a plurality of (eight in the present embodiment) arranged at equal intervals with respect to the substrate S so as to form a thin film efficiently over a large area of the substrate s is provided. Or 41h. Each target 41a or 41h is an oxide of Al, Ti, Mo, indium, and tin oxide (IΤ Ο ), or an alloy of indium and tin, etc., which is formed on the surface of the substrate S. The composition is made by a well-known method And the same shape is formed, for example, in a substantially rectangular parallelepiped shape (rectangular shape in plan view), and each target 41 a to 41 h ' is in the sputtering, and is bonded by a solder material such as indium or tin. And the backing plate 42 for cooling the target 41a or 41h. Each of the targets 41a or 41h is arranged such that the unused sputtering surface 41 is positioned in parallel with the substrate S. On the frame (not shown) of the cathode electrode C via an insulating member, 'shield 43 is provided around the targets 41a or 41h arranged side by side. Further, the cathode electrode c The magnet assembly 5 is disposed at a position opposite to the target 41a or even 41 h (the side opposite to the sputtering surface 4 U). The magnet assembly 5 having the same structure is provided with a support plate (yoke) 51 which is provided in parallel with each of the targets 4 1 a to -11 - 200914640 4 1 h. When I 41h is rectangular from the front, the banner of the support plate 51, 4 1 a or 4 1 h is small, and the rectangular shape formed by extending the target 4 1 a toward both sides thereof In the magnetic holding plate 51 which can increase the suction force of the magnet, the central magnet 52 along the longitudinal direction at the central portion thereof, and the outer periphery of the support plate 5 1 surrounding the central magnet 52 The polarity of the side magnet 5 3 4 1 1 side is set to be changed. The central magnet 5 2 is converted into the same magnetization as the volume and the peripheral magnet 5 3 is converted into the same magnetization (peripheral magnet: central magnet: peripheral magnet = 1: 2 :, splashing at each target 41a or 41h) A tunnel-shaped magnetic flux having a closed-loop shape in a balanced phase is formed in front of the plating surface 411. The electrons in the front side (sputtering surface 4) of each target 41a or 41h and the secondary electrons generated by sputtering are captured. The electron density in front of 41a or 41h can be increased, and the sputtering rate can be increased. Each of the magnet assemblies 5 is driven by a driving means D composed of an air cylinder or the like, along the target 41a or 41h. The side-by-side direction of the parallel movement and the constant speed of the reciprocating motion can change the area where the sputtering rate becomes higher' and covers: to 4 1 h to obtain an equal uranium enrichment area. 41a or even 41h, which is made of two adjacent ticket targets, 4 1 a, or even a flat plate having a length of more than 41h from each target. In the way of being arranged in a line-like manner, the edge is splashed. The plating surface, for example, the sum of the volumes after being set 1) Fang, are based Accordingly, by catch 11 side) is ionized to improve the targets slurry density, and can be connected to the shaft by a horse at D1, between the two positions. By this, the target 41a is used to form a pair of -12-200914640 targets (41a and 41b, 41c and 41d, 41e and 41f, 41g and 41h), and for each pair of targets, The AC power source E 1 or E4 is distributed, and the output cables ΚΙ and K2 from the AC power source E1 to E4 are connected to a pair of targets 4 1 a, 4 1 b ( 4 1 c and 4 1 d). , 4 1 e and 41f, 41g and 41h) (refer to Figure 2). Thereby, the polarity is changed and the alternating voltage is applied to each of the pair of targets 41a or 41h via the alternating current power source E1 or E4. The AC power sources E1 and E4 are of the same configuration, and the power supply unit 6 that can supply power and the polarity are alternately changed at a specific frequency and the AC voltage is output to a pair of targets 4 1 a The oscillation portion 7 at 4 1 b ( 4 1 c and 41d, 41e and 41f, 41g, and 41h) is formed. The waveform of the output voltage outputted from each of the targets 4 1 a to 4 1 h is a slightly sinusoidal wave. However, the waveform is not limited thereto, and may be, for example, a square wave. Hereinafter, the configuration of the AC power supply E1 will be described with reference to Fig. 2 . The power supply unit 6 includes a first CPU circuit 61 that controls the operation thereof, an input unit 62 to which commercial alternating current power (three-phase AC 200V or 400 V) is input, and an input AC power to be input. The diodes 63 are rectified and converted into six DC powers, and DC power is output to the oscillation unit 7 via the DC power lines 64a and 64b. Further, the power supply unit 6 is provided with a switching transistor 65 provided between the DC power lines 64a and 64, and is communicably connected to the first CPU circuit 61, and switches the transistor 65. The operation is controlled to control the output voltage output to the oscillating portion 7 or the first driving circuit 66a and the first PMW control circuit 66b that control the output current-13-200914640 by the output voltage or the output current. And determine the input power between the pair of targets 4 1 a, 4 1 b. In this case, the detection circuit 67a and the AD conversion circuit 67b including the current detector and the voltage detection transformer and detecting the current and voltage between the DC power lines 64a and 64b are provided, and the detection circuit 67a and the AD conversion are provided. The circuit 67b is input to the CPU circuit 61. On the other hand, the oscillation unit 7 is provided with a second CPU circuit 71 that is connected to the first CPU circuit 61 in a freely communicable manner, and an oscillation switching circuit 72 that is provided in the DC power lines 64a and 64b. The four first to fourth switching transistors 72a, 72b, 72c, and 72d are connected to the second CPU circuit 171 in a freely communicable manner, and the operations of the switching transistors 72a, 72b, 72c, and 72d are performed. The second drive circuit 73a and the second PMW control circuit 73b are controlled. Then, the first and fourth switching transistors 72a and 72d and the second and third switching transistors 72b and 72c are turned on and off, for example, via the second driving circuit 733a and the second PMW control circuit 73b. When the timing of the switching transistors is reversed, the operation of each of the switching transistors 72a, 72b, 72c, and 72d is controlled, and the sinusoidal communication can be output via the AC power lines 74a and 74b from the oscillation switching circuit 72. electric power. In this case, the detection circuit 75a and the AD conversion circuit 75b' for detecting the oscillation current are provided, and are input to the second CPU circuit 71 via the detection circuit 75a and the ad conversion circuit 75b. The parent power line 7 4 a, 7 4 b is connected to the output transformer 76 having a well-known structure by combining the LC circuits of the resonances in series or in parallel or 14-200914640. The output cables κ 1 and K 2 from the output transformer 76 are connected to a pair of targets 41 and 4 1 b, respectively. In this case, a detection circuit 77a and an AD conversion circuit 77b including a current detector and a voltage detecting transformer and detecting an output current and an output voltage between the pair of targets 4 1 a and 4 1 b are provided. This is input to the second CPU circuit 71 via the detection circuit 77a and the AD conversion circuit 77b. Thereby, in the sputtering, the polarity can be alternately changed at a certain frequency via the AC power source E 1 or E 4 ′, and the pair of targets 4 1 a, 4 1 b can be arbitrarily set. A certain amount of electricity. Further, the first CPU circuits 61 of the AC power supplies E1 and E4 are connected to each other in a freely communicable manner, and the AC power sources can be outputted by the CPU circuit 61 from either one. E1 and E4 operate synchronously. When a specific thin film is formed on the surface of the processing substrate S, the processing substrate S is transported to a position opposed to each of the targets 4 1 a or 41h via the substrate transfer means 2, and reaches in the sputtering chamber 12 After the specific vacuum pressure, a specific sputtering gas (and a reactive gas) is introduced through the gas introduction means 3. Next, the AC power sources E 1 and E4 are actuated, and an alternating voltage is applied to each of the pair of targets 4 1 a to 4 1 h, and the respective targets 41a or 41h are alternately switched to the anode electrode and the cathode electrode. A glow discharge is generated between the anode electrode and the cathode electrode to form a plasma atmosphere. Thereby, the ions in the plasma atmosphere are accelerated and impacted toward the target 41a or 41h which is one of the cathode electrodes, and the -15-200914640 sputtered particles are scattered, thereby processing the substrate. A film is formed on the surface of the S. However, if the sputtering apparatus 1 is configured as described above, the charge charge remaining on the surface of the target 41a or 41h is canceled when a voltage of the opposite phase is applied, and Prevent the occurrence of abnormal discharge caused by charging of the target 4 1 a or even 41 h. On the other hand, since the surface of the processing substrate S in the floating state is also charged, particularly in the FPD manufacturing process, ITO or the like is formed on the surface of the processing substrate on which the metal film or the insulating film constituting the electrode is formed. In the case of a transparent conductive film, the charge charge is likely to remain in the insulating film, so that it is necessary to cause abnormal discharge due to charging of the handle substrate S. In the present embodiment, in the sputtering, the output signal is transmitted from either of the first CPU circuits 61, and the switching transistor is switched via the PMW control circuit 66b of each of the AC power supplies E1 to E4. 65 is controlled, and from the start of sputtering, the power input for each target 4 1 a or 4 1 h is simultaneously reduced in a certain period (refer to FIG. 3 ). Here, the simultaneous reduction means that there is a state in which the input power for all the targets 4 1 a to 4 1 h is reduced for a certain period of time, and it is not required to start or reduce the input power reduction period. At the start of the power-on at the set voltage, the AC power sources E1 to E4 are mutually coincident (that is, the start period of the reduction of the input power or the power-on start period of the set voltage again). The AC power sources E 1 and E4 may also be inconsistent). -16- 200914640 whereby, in the sputtering, even the electrons ionized before the target 41a or even 41h or the secondary electrons generated by the sputtering are supplied and the processing substrate S is charged. Periodically, for all targets 4 1 a to 4 1 h, the amount of ionized electrons or secondary electrons moving toward the processing substrate S is reduced, and the charged electric charge on the surface of the substrate S is processed. The particles are neutralized and disappeared by the sputtered particles or the ionized sputtering gas ions, so that the retention of the charge at the surface of the substrate S can be remarkably suppressed. As a result, the occurrence of abnormal discharge caused by the charging of the processing substrate S is prevented, and good film formation can be achieved. Here, the time during which the power is reduced, the time during which the input power is reduced, or the period (the number of times the input power is reduced during the sputtering) is appropriately set depending on the type of the target or the type of the processing substrate S. However, in order to prevent the plasma generated in front of the target from disappearing and to effectively suppress the retention of the charge on the surface of the substrate, the amount of reduction in the input power is set to the normal power. The range of 5 to 50% at the time of input is ideal. On the other hand, the time for reducing the amount of input power is set to 〇.5 seconds or longer, and it is preferably set to 2. 〇 seconds or less, and the cycle of reducing the input power during sputtering is set only. It can be 1.5 to 4.0 seconds. In this case, it is desirable to set the ratio of the sputtering time when the input power is reduced with respect to the sputtering time at the time of the normal power input. If the ratio exceeds 2, the sputtering time becomes too long. -17- 200914640 Here, if the target is 4 1 a or 4 1 h, indium and tin oxide are used. In the case where a transparent conductive film of ITO is formed on the surface of a substrate S on which a metal film or an insulating film constituting an electrode is formed, a film thickness of 500 Å is used as an example, if the set input power is 20 〜 30 kW, the input power is reduced to 2.5 to 10 kW, the time for reducing the input power is set to 0.5 to 1.5 seconds, and the period is set to 1.5 to 3.5 seconds, until the end of the life of the target, the substrate is processed. The occurrence of the arc discharge at S is suppressed, and a good film can be formed. However, when used as the target 41a or even 41h, an indium and tin oxide target or an alloy target of indium and tin is used, and as a reactive gas, H20 gas or H20 gas and 02 are used. When a mixed gas of a gas is formed by reactive sputtering to form an ITO film, if the H20 gas system introduced into the sputtering chamber 12 is locally consumed, the ITO film formed on the surface of the processing substrate is formed. At the site, the site of microcrystallization is locally generated. If a place where microcrystallization is locally generated at the ITO film, not only the conductivity is lowered, but in the subsequent engineering, when the I TO film is subjected to uranium engraving, etching is performed per unit time in the surface of the substrate to be processed. The speed may become uneven. As a result, the productivity is not good. In this case, if the input power for each target is 4 1 a to 4 1 h, the power is reduced. The H20 gas system introduced into the sputtering chamber 12 is supplied to cover the entire surface of the substrate S, and as a result, local microcrystallization of the transparent conductive film is prevented, and amorphousness can be obtained more stably. The transparent conductive film 'simultaneously' can be used to etch the ITO film even in the subsequent process -18-200914640, and the etching rate per unit time can be set to be evenly uniform in the surface of the processing substrate. On the other hand, when a gas containing ruthenium gas is used as the reactive gas to form a ruthenium film, the same effects as described above can be obtained. In addition, in the present embodiment, the power source is explained by using eight target targets and distributing AC power to each adjacent target. However, the present invention is not limited thereto. The number of targets or the combination of the targets can be set according to the film formation process. [Embodiment 1] In the first embodiment, a sputtering apparatus shown in Fig. 1 was used, and an I Τ 0 film was formed on the processing substrate S by sputtering. In this case, ΙΤΟ is used as the target 41 a or 41 h ', and the glass substrate is used as the processing substrate S, and the distance between the target and the processing substrate is set to 150 mm. As a sputtering condition, the mass flow controller is controlled to introduce Ar into the mass flow controller so that the pressure in the vacuum processing chamber 1 1 is maintained at 77 Pa, and the input power to the target is set from the AC power source E1 to E4. After 25 kW, the substrate S was sequentially transferred to a position facing the target, and an ITO film having a film thickness of 500 A was obtained for each glass substrate (sputtering time: about 14 seconds). For the input power, the input power of one second is reduced by 1 〇% in the range of 〇1 to 〇〇% of the set voltage every second and the sputtering is performed until the integrated power is reached for the target. It is 30kWh. -19 - 200914640 In the above-described first embodiment, when the input power to the target is reduced to be higher than 50% of the set input power (15 kw or more), the ITO film having the above film thickness is obtained. The required sputtering time is only increased by 4 seconds. However, if the total input power is increased, the occurrence of arc discharge at the periphery of the substrate is increased, and depending on the situation, there may be an arc discharge. It is impossible to form a good film. On the other hand, when the input power to the target is reduced to 12.5 kW (power for setting 50% of the input power), the sputtering time required to obtain the ITO film of the above film thickness is increased only. For 6 seconds, until the integrated input power reaches 3 Ok Wh, the arc-shaped discharge system at the periphery of the processing substrate hardly occurs, and a good film can be formed. On the other hand, when the input power to the target is reduced to 1 · 2 k W (the power of less than 5% of the set input power), the arc discharge system at the periphery of the processing substrate hardly occurs. However, the control system of the pendulum power supply is unstable, and the thickness of the ITO film cannot be controlled. [Embodiment 2] In the second embodiment, the same as in the first embodiment. An ITO film was formed on the handle substrate S by the above-described embodiment sputtering using the sputtering apparatus shown in Fig. 1 by the same sputtering conditions. However, 'the input power from the AC power supply E1 to E4 and the target' is set to 25 kW, and at each specific time (0.1 to 4.0 seconds), the input power is reduced to 20 in one second. % ( 5 k W ), and sputtering is performed until the integrated input power of each target reaches 30 kWh. -20- 200914640 In the above-described second embodiment, when the time is 3.0 seconds or less, the number of occurrences of arc discharge at the periphery of the substrate is increased, and depending on the situation, there may be an arc discharge. It is impossible to form a good film. On the other hand, when the time is 0.5 second, the sputtering time required to obtain the film thickness of the film thickness is increased by 16 seconds. However, until the integrated input power reaches 30 kWh, it is curved. The discharge system hardly occurs, and a good film can be formed. On the other hand, when the above time is 0.4 seconds, the sputtering time required for obtaining the ITO film of the above film thickness is increased by 21 seconds, and if it is considered for productivity, it is not desirable to The time is set to be shorter. 5 seconds (the total sputtering time is 30 seconds) is shorter. [Embodiment 3] In the third embodiment, the same as in the first embodiment. An ITO film was formed on the handle substrate S by the above-described embodiment sputtering using the sputtering apparatus shown in Fig. 1 by the same sputtering conditions. However, 'the input power from the AC power supply E1 to E4 for the target is set to 2 5 k W, and the input power is reduced to 20% at each specific time (0.1 to 2 seconds). (5 kW), and sputtering was performed until the integrated input power of each target reached 30 kWh. In the above-described third embodiment, when the time is 0.4 seconds or less, the number of occurrences of the arc discharge at the periphery of the processing substrate is increased. As the case is different, the arc discharge may not be formed well. The case of the film. On the other hand, when the time is 〇. 5 seconds, the sputtering time required to obtain the ITO film of the film thickness of 21 - 200914640 is increased by 3 seconds, but until the integrated input power arrives Up to 3 OkWh, the arc-shaped discharge system hardly occurs, and a good film can be formed. On the other hand, when the above time is 2 seconds, the sputtering time required for obtaining the ITO film of the above film thickness is increased by 16 seconds, and if it is considered for productivity, it is not desirable to The time is set to more than 2 seconds (the total sputtering time is 30 seconds). BRIEF DESCRIPTION OF THE DRAWINGS [Fig. 1] A schematic view of a sputtering apparatus of the present invention. Fig. 2 is a view for explaining an AC power supply of the sputtering apparatus shown in Fig. 1. Fig. 3 is a diagram for explaining control of power input to a target from an AC power source. [Main component symbol description] 1 : Sputtering device 12 : Sputtering chamber 3 : Gas introduction means 41a or 41h: Standard E1 or E4 : AC power supply 6 5 : Switching element S : Processing substrate -22 -

Claims (1)

200914640 十、申請專利範圍 1· 一種濺鍍方法,係爲一面在濺鍍室內導入製程氣 體’一面對於在濺鍍室內而與處理基板相對向且空出有特 定之間隔地被並排設置的複數枚標靶中之分別成對的標靶 ’以特定之頻率來交互地改變極性而投入電力,來將各標 靶交互切換爲陽極電極、陰極電極,並在陽極電極以及陰 極電極之間使輝光放電產生而形成電漿氛圍,而對各標靶 作濺鍍,並在處理基板之表面上形成特定之薄膜的濺鍍方 法, 其特徵爲: 在濺鍍中,將對於各標靶之投入電力,以特定之間隔 來使其減少。 2 ·如申請專利範圍第1項所記載之濺鍍方法,其中 ,將前述減少,對於並排設置之所有的標靶而以一定之週 期來同時進行。 3. 如申請專利範圍第1項又或是第2項所記載之濺 鍍方法,其中,將前述減少時之投入電力,設爲通常電力 投入時之5〜5 0 %的範圍內。 4. 如申請專利範圍第1項乃至第3項中之任一項所 記載之濺鍍方法,其中,將相對於前述通常電力投入時之 濺鍍時間的前述投入電力減少時之濺鍍時間的比,設定爲 2以下。 5. 如申請專利範圍第4項所記載之濺鍍方法,其中 ,將前述投入電力減少時之濺鍍時間,設爲〇 · 5秒以上。 -23- 200914640 6 ·如申請專利範圍第1項乃至第5項中之任一項所 I己載之濺鍍方法,其中,作爲前述標靶,係使用銦以及錫 之氧化物標靶、又或是銦以及錫之合金標靶,作爲導入至 處理室內之製程氣體,係包含有H20氣體、又或是h2〇 氣體以及〇2氣體,並在處理基板之表面,形成由銦、錫 以及氧所構成之透明導電膜。 1 如申請專利範圍第1項乃至第5項中之任一項所 記載之濺鍍方法,其中,作爲前述標靶,係使用銦以及鋅 之氧化物標靶、又或是銦以及鋅之合金標靶,作爲導入至 處理室內之製程氣體,係包含有〇2氣體’並在處理基板 之表面,形成由銦、鋅以及氧所構成之透明導電膜。 -24-200914640 X. Patent Application No. 1 A sputtering method is a method in which a process gas is introduced into a sputtering chamber, and a plurality of pieces are arranged side by side with respect to a processing substrate in a sputtering chamber at a predetermined interval. The paired targets in the target 'electrically change the polarity at a specific frequency and input power to switch the targets to the anode electrode and the cathode electrode, and to discharge the glow between the anode electrode and the cathode electrode. a sputtering method for forming a plasma atmosphere, sputtering a target, and forming a specific thin film on the surface of the processing substrate, wherein: in sputtering, power is applied to each target, Reduce it at specific intervals. 2. The sputtering method according to claim 1, wherein the reduction is performed simultaneously for all the targets arranged side by side at a predetermined period. 3. The sputtering method according to the first or second aspect of the invention, wherein the input power at the time of the reduction is within a range of 5 to 50% of the normal power input. 4. The sputtering method according to any one of the preceding claims, wherein the sputtering time is reduced when the input power is reduced with respect to the sputtering time at the time of normal power input. The ratio is set to 2 or less. 5. The sputtering method according to the fourth aspect of the invention, wherein the sputtering time when the input power is reduced is set to 〇 5 seconds or longer. -23- 200914640 6 · A sputtering method according to any one of the first to fifth aspects of the patent application, wherein the target is an indium and tin oxide target, Or indium and tin alloy targets, as process gases introduced into the processing chamber, containing H20 gas, or h2 gas and 〇2 gas, and formed on the surface of the substrate, formed by indium, tin and oxygen A transparent conductive film is formed. The sputtering method according to any one of the first to fifth aspects of the invention, wherein the target is an indium and zinc oxide target, or an alloy of indium and zinc. The target, as a process gas introduced into the processing chamber, contains a ruthenium gas, and forms a transparent conductive film made of indium, zinc, and oxygen on the surface of the substrate. -twenty four-
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