TWI433950B - Film forming method - Google Patents

Film forming method Download PDF

Info

Publication number
TWI433950B
TWI433950B TW097130421A TW97130421A TWI433950B TW I433950 B TWI433950 B TW I433950B TW 097130421 A TW097130421 A TW 097130421A TW 97130421 A TW97130421 A TW 97130421A TW I433950 B TWI433950 B TW I433950B
Authority
TW
Taiwan
Prior art keywords
film
sputtering
forming
substrate
power
Prior art date
Application number
TW097130421A
Other languages
Chinese (zh)
Other versions
TW200912022A (en
Inventor
Yasuhiko Akamatsu
Yuichi Oishi
Makoto Arai
Junya Kiyota
Satoru Ishibashi
Original Assignee
Ulvac Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ulvac Inc filed Critical Ulvac Inc
Publication of TW200912022A publication Critical patent/TW200912022A/en
Application granted granted Critical
Publication of TWI433950B publication Critical patent/TWI433950B/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/02631Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/0021Reactive sputtering or evaporation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/34Gas-filled discharge tubes operating with cathodic sputtering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/34Gas-filled discharge tubes operating with cathodic sputtering
    • H01J37/3411Constructional aspects of the reactor
    • H01J37/3444Associated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02266Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by physical ablation of a target, e.g. sputtering, reactive sputtering, physical vapour deposition or pulsed laser deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Plasma & Fusion (AREA)
  • Analytical Chemistry (AREA)
  • Optics & Photonics (AREA)
  • Physical Vapour Deposition (AREA)
  • Thin Film Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)

Description

薄膜形成方法Film forming method

本發明,係有關於藉由濺鍍法而在應處理之基板表面上形成特定的薄膜之薄膜形成方法。The present invention relates to a film forming method for forming a specific film on the surface of a substrate to be processed by a sputtering method.

作為在玻璃或是矽晶圓等的基板表面上形成特定的薄膜之方法的其中之一,係有濺鍍法(以下,稱為「濺鍍」)。此濺鍍法,係將電漿氛圍中之離子加速,使其向對應於欲在處理基板之表面成膜的薄膜之組成而製作的標靶衝擊,並使濺鍍粒子(標靶原子)飛散,而在基板之表面附著、堆積並形成特定之薄膜者。此時,係有將氧或是氮等之反應氣體同時導入,並藉由反應性濺鍍而得到該當薄膜的情況。One of the methods of forming a specific thin film on the surface of a substrate such as glass or tantalum wafer is a sputtering method (hereinafter referred to as "sputtering"). This sputtering method accelerates the ions in the plasma atmosphere to cause a target impact to be produced corresponding to the composition of the film to be formed on the surface of the substrate to be processed, and causes the sputtering particles (target atoms) to scatter. And a specific film is attached, deposited, and formed on the surface of the substrate. In this case, a reaction film in which oxygen or nitrogen is introduced at the same time is introduced, and the film is obtained by reactive sputtering.

此種濺鍍法所致之薄膜形成方法,在近年,於使用有TFT(薄膜電晶體)之液晶顯示器(FPD)的製造工程中,當在玻璃基板表面而形成例如作為閘極電極之電性傳導特性為佳的Cu等之金屬膜時,亦被作利用。In the film forming method by the sputtering method, in recent years, in the manufacturing process of a liquid crystal display (FPD) using a TFT (Thin Film Transistor), electrical properties such as a gate electrode are formed on the surface of the glass substrate. When a metal film such as Cu is used as the conductive property, it is also used.

於此,當在玻璃基板表面上直接形成Cu膜時,使對於玻璃表面之該當Cu膜的密著性提昇一事,係成為重要的課題。作為此種課題之解決方法的其中之一,藉由專利文獻1,係週知有:在基板表面上,使作為燒結輔助劑的氧化物露出,而後,藉由濺鍍法等之PVD法來形成Cu膜,並確保銅的相對於露出在基板表層處之由燒結輔助劑所Here, when the Cu film is directly formed on the surface of the glass substrate, it is an important issue to improve the adhesion of the Cu film to the glass surface. As one of the solutions to such a problem, Patent Document 1 discloses that an oxide as a sintering aid is exposed on the surface of a substrate, and then a PVD method such as a sputtering method is used. Forming a Cu film and ensuring that the copper is exposed to the surface layer of the substrate by the sintering aid

成的氧化物之高密著強度之方法。A method of high density of oxides formed.

〔專利文獻1〕日本特開2003-3884號公報[Patent Document 1] Japanese Patent Laid-Open Publication No. 2003-3884

然而,在TFT基板之製作工程中,當於玻璃基板表面形成由Cu所成之閘極電極的情況時,依據上述專利文獻1所記載之方法,係成為藉由反應性濺鍍來形成包含有Cu之氧化物膜以及藉由濺鍍來形成包含有Cu之金屬膜。但是,在得到了上述閘極電極後,於下一工程中,在該當閘極電極上,一般係使用電漿CVD法而形成由SiNx所成之絕緣膜。當藉由此電漿CVD法而形成薄膜時,作為導入至處理室內之製程氣體,係使用有N2 、NH3 以及SiH4 之混合氣體。However, in the case of forming a gate electrode made of Cu on the surface of a glass substrate in the fabrication of a TFT substrate, the method described in Patent Document 1 is formed by reactive sputtering. An oxide film of Cu and a metal film containing Cu are formed by sputtering. However, after the gate electrode is obtained, in the next process, an insulating film made of SiNx is generally formed on the gate electrode by a plasma CVD method. When a thin film is formed by the plasma CVD method, a mixed gas of N 2 , NH 3 , and SiH 4 is used as a process gas introduced into the processing chamber.

若是如此這般地藉由CVD法來形成薄膜,則由於電漿之輻射熱等而使玻璃基板被加熱,在氧化物膜中之氧係會擴散,且另一方面,係會藉由因電漿而被分解之氫或是NH3 、SiH4 而被還元,並被放出至膜外,其結果,在氧化物膜中之氧濃度(反應性氣體成分之含有濃度)係會降低。此時,若是氧化物膜與玻璃基板間之界面附近的氧濃度降低至特定之臨限值,則會有密著強度顯著地降低之問題。於此情況,雖然亦可考慮在氧化物膜之形成時將膜中的氧濃度提高,但是,如此一來,氧化物膜之比電阻值係會變得過高。If the film is formed by the CVD method as described above, the glass substrate is heated by the radiant heat of the plasma or the like, and the oxygen in the oxide film is diffused, and on the other hand, the plasma is caused by the plasma. On the other hand, the decomposed hydrogen or NH 3 or SiH 4 is reducted and released to the outside of the membrane. As a result, the oxygen concentration (concentration of the reactive gas component) in the oxide film is lowered. At this time, if the oxygen concentration in the vicinity of the interface between the oxide film and the glass substrate is lowered to a specific threshold value, there is a problem that the adhesion strength is remarkably lowered. In this case, it is also conceivable to increase the oxygen concentration in the film at the time of formation of the oxide film, but in this case, the specific resistance value of the oxide film may become too high.

因此,本發明之課題,係有鑑於上述之點,而提供一種:就算是當在下一工程中會進行以CVD法所致之薄膜形成一般的情況時,亦能夠防止在氧化物膜與基板間之界面附近處的氧濃度之降低,而不會導致基板與氧化物膜間之密著強度的下降之薄膜形成方法。Therefore, in view of the above, it is possible to provide a method for preventing the formation of a film by a CVD method in the next process, and also between the oxide film and the substrate. A film forming method in which the oxygen concentration in the vicinity of the interface is lowered without causing a decrease in the adhesion strength between the substrate and the oxide film.

為了解決上述課題,申請項1中所記載之薄膜形成方法,係為一面將濺鍍氣體以及反應氣體導入至真空氛圍中之濺鍍室內,一面對於在濺鍍室內而與應處理之基板作對向配置的標靶投入電力,而藉由電漿氛圍中之離子來對標靶作濺鍍,以藉由反應性濺鍍來在基板表面上形成特定的薄膜之薄膜形成方法,其特徵為:在直到前述薄膜達到了特定之膜厚為止的期間中,形成反應氣體成分之含有濃度為高之區域。In order to solve the above problems, the film forming method according to the first aspect of the invention is directed to a sputtering chamber in which a sputtering gas and a reaction gas are introduced into a vacuum atmosphere, and is opposed to a substrate to be processed in a sputtering chamber. A method of forming a thin film by sputtering a target by sputtering ions in a plasma atmosphere to form a specific thin film on the surface of the substrate by reactive sputtering, characterized in that: A period in which the concentration of the reaction gas component is high is formed until the film reaches a specific film thickness.

若藉由本發明,則由於係在直到前述薄膜達到了特定之膜厚為止的期間中,形成反應氣體成分之含有濃度為高之區域,並在該當薄膜中,從基板之界面而朝向膜厚增加方向來對反應氣體成分之含有濃度賦予梯度,因此,例如對於形成有氧化物膜之玻璃基板,就算是在下一工程中,於可能會產生擴散與還元反應一般之條件下而被實施有特定之處理,在氧化物膜與基板間之界面附近處的氧之擴散亦係被抑制,而在該當界面附近處之氧濃度的降低係被防止。According to the present invention, the concentration of the reaction gas component is high in the period until the film reaches a specific film thickness, and the film thickness increases from the interface of the substrate toward the film thickness. Since the direction is applied to the concentration of the reaction gas component, the glass substrate on which the oxide film is formed is, for example, implemented in the next process under conditions in which diffusion and restitution reactions are possible. The treatment, the diffusion of oxygen near the interface between the oxide film and the substrate is also suppressed, and the decrease in the oxygen concentration at the vicinity of the interface is prevented.

在本發明中,若是將前述含有濃度為高之區域的形成,以藉由在濺鍍中,一面將導入至濺鍍室內之反應氣體的流量保持為一定,一面將對於標靶之投入電力從高電力而切換至低電力的方式來進行,則僅要對於既存之濺鍍裝置的電源之控制作改變,即可在藉由特定之膜厚來形成薄膜的途中,使濺鍍速率降低,而能夠實現將膜中之反應氣體成分的含有濃度提高一事。In the present invention, when the region containing the concentration is high, the amount of the reaction gas to be supplied to the sputtering chamber is kept constant during the sputtering, and the input power to the target is obtained. When the high power is switched to the low power mode, the sputtering rate can be reduced while the film is formed by the specific film thickness only by changing the control of the power source of the existing sputtering device. It is possible to increase the concentration of the reaction gas component in the film.

又,若是將前述投入電力之切換以一定之週期來進行,則能夠將含有濃度為高之區域局部性地作複數之形成,並且,若是將低電力時之濺鍍時間縮短,則亦能夠對在以特定之膜厚來形成薄膜時所需要之濺鍍時間的增長作抑制。Further, if the switching of the input power is performed in a predetermined cycle, the region having the high concentration can be locally formed in plural, and if the sputtering time at the time of low power is shortened, the same can be performed. The increase in sputtering time required to form a film with a specific film thickness is suppressed.

前述含有濃度為高之區域的形成,係亦可採用藉由在濺鍍中,一面將對於標靶之投入電力保持為一定,一面將導入至濺鍍室內之反應氣體的流量從低流量而切換至高流量來進行之構成。In the formation of the region having a high concentration, it is also possible to switch the flow rate of the reaction gas introduced into the sputtering chamber from a low flow rate while maintaining the input power to the target while sputtering. The composition of the highest flow rate.

於此情況,亦可將前述反應氣體流量之切換以一定之週期來進行。In this case, the switching of the flow rate of the reaction gas may be performed in a predetermined cycle.

進而,在本發明中,為了對於面積大之基板而有效率地形成特定之薄膜,係可將前述標靶藉由在濺鍍室內空出有特定之間隔而並列設置之具備有相同組成的複數枚之標靶來構成,並將前述反應氣體先在標靶之背面側的空間處一旦使其擴散,而後再通過各標靶相互間之間隙而朝向基板作供給。藉由此,而能夠以簡單的構成,來防止反應氣 體對於基板而被偏向導入,並能夠防止在基板面內於反應性上產生有不均而在基板面內使比電阻值等之膜質成為不均勻。Further, in the present invention, in order to efficiently form a specific thin film for a substrate having a large area, the target may be provided in parallel with a predetermined interval by vacating a specific interval in the sputtering chamber. The target gas is configured such that the reaction gas is first diffused in the space on the back side of the target, and then supplied to the substrate through the gap between the targets. By this, it is possible to prevent the reaction gas with a simple configuration. The body is deflected and introduced into the substrate, and it is possible to prevent unevenness in reactivity in the surface of the substrate and to make the film quality such as the specific resistance value uneven in the substrate surface.

另外,亦可適用下述一般之薄膜形成方法,其特徵為,包含有:作為反應氣體而使用包含有氧者,並藉由上述申請項1乃至申請項6中之任一項所記載之薄膜形成方法,來在基板表面上形成包含有Cu之氧化物膜的工程;和在此氧化物膜表面,藉由PVD法而形成包含有Cu之金屬膜的工程;和在此金屬膜表面上,使用特定之製程氣體而藉由CVD法來形成絕緣膜的工程。In addition, the following general film forming method may be applied, and the method of using the film according to any one of the above-mentioned items 1 to 6 is used as the reaction gas. a method of forming an oxide film containing Cu on a surface of a substrate; and a process of forming a metal film containing Cu by a PVD method on the surface of the oxide film; and on the surface of the metal film, A process of forming an insulating film by a CVD method using a specific process gas.

藉由此,在TFT基板之製作工程中,當在適用本發明之薄膜形成方法而形成了含有Cu之氧化物膜後,層積包含有Cu之金屬膜而形成閘極電極,並在下一個工程中使用電漿CVD法而形成由SiNx所成之絕緣膜的情況時,係能夠防止在基板之界面附近處的氧濃度之降低,並能夠確保對於被形成在基板表面之氧化物的銅之高密著強度。並且,此係僅為在薄膜形成之途中形成氧濃度為高之區域,而該當氧化物膜之比電阻值係並不會變得過高。In the fabrication of the TFT substrate, when the oxide film containing Cu is formed by applying the thin film formation method of the present invention, a metal film containing Cu is laminated to form a gate electrode, and the next project is performed. When the insulating film formed of SiNx is formed by the plasma CVD method, it is possible to prevent a decrease in the oxygen concentration in the vicinity of the interface of the substrate, and to secure a high density of copper for the oxide formed on the surface of the substrate. Strength. Further, this is only a region where the oxygen concentration is high in the middle of film formation, and the specific resistance value of the oxide film does not become too high.

若參考圖1來作說明,則1係為本發明之磁控管方式的濺鍍裝置(以下,稱為「濺鍍裝置」)。濺鍍裝置1,係為連續(in-line)式,具有經由旋轉式幫浦、渦輪分子幫浦等之真空排氣手段(未圖示)而能保持特定之真空度 的真空處理室11。於真空處理室11之上部,係設置有基板搬送手段2。此基板搬送手段2,係具有週知的構造,舉例而言,具有裝著有玻璃基板等之基板S之載台21,藉由間歇地驅動未圖示之驅動手段,能依序將處理基板S搬送至與後述之標靶對向的位置。1 is a magnetron type sputtering apparatus (hereinafter referred to as "sputtering apparatus") of the present invention. The sputtering apparatus 1 is of an in-line type and has a specific vacuum degree by a vacuum exhausting means (not shown) such as a rotary pump or a turbo molecular pump. Vacuum processing chamber 11. A substrate transfer means 2 is provided above the vacuum processing chamber 11. The substrate transfer means 2 has a well-known structure. For example, the stage 21 having a substrate S on which a glass substrate or the like is mounted is used to intermittently drive a driving means (not shown) to sequentially process the substrate. S is transported to a position facing the target to be described later.

在真空處理室11內,當對於被搬送至與標靶相對向之位置處的基板S而藉由濺鍍來形成特定之薄膜時,為了防止濺鍍粒子附著在載台21之表面或是真空處理室11之側壁等之上,係在位置於基板搬送手段2與標靶之間的位置處,設置被形成有面臨基板S之開口31a的第1遮蔽板31,而第1遮蔽板31之下端,係延伸至後述之第2遮蔽板的近旁處。而,於真空處理室11之下側,係被配置有陰極電極C。In the vacuum processing chamber 11, when a specific film is formed by sputtering for the substrate S being conveyed to a position opposite to the target, in order to prevent the sputtering particles from adhering to the surface of the stage 21 or vacuum On the side wall or the like of the processing chamber 11, a first shielding plate 31 formed with an opening 31a facing the substrate S is provided at a position between the substrate transfer means 2 and the target, and the first shielding plate 31 is provided. The lower end extends to the vicinity of the second shielding plate to be described later. On the lower side of the vacuum processing chamber 11, a cathode electrode C is disposed.

陰極電極C,係具備有以能夠對於大面積之基板S而有效率地形成薄膜的方式而與基板S相對向並以等間隔而作配置之複數枚(在本實施形態中,係為8枚)的標靶41a乃至41h。各標靶41a乃至41h,係由Cu、Al、Ti、Mo又或是此些之合金、或者是銦以及錫之氧化物(ITO)等的因應於欲形成在基板S之表面處的薄膜之組成而藉由週知之方法所製作者,並係被形成為例如略直方體(俯視時為長方形)等的相同形狀。各標靶41a乃至41h,係在濺鍍中,藉由銦或是錫等之焊接材料,而被接合與用以將標靶41a乃至41h作冷卻的背板42上。The cathode electrode C is provided with a plurality of pieces that are arranged at equal intervals with respect to the substrate S so as to form a thin film efficiently for a large-area substrate S (in the present embodiment, eight pieces are provided). Target 41a or even 41h. Each of the targets 41a or 41h is made of Cu, Al, Ti, Mo or an alloy thereof, or an indium and tin oxide (ITO) or the like which is formed on the surface of the substrate S. The composition is produced by a known method, and is formed into the same shape such as a substantially rectangular parallelepiped (rectangular in plan view). Each of the targets 41a to 41h is bonded to the backing plate 42 for cooling the target 41a or 41h by sputtering of indium or tin.

各標靶41a乃至41h,係以使未使用時之濺鍍面411 位置於與基板S平行之同一平面上的方式,而經由絕緣構件來安裝於陰極電極C之框架(未圖示)上。又,在並排設置之標靶41a乃至41h的周圍處,係被配置有第2遮蔽板32,在真空處理室11內,藉由第1以及第2遮蔽板31、32所圍繞之空間,係構成濺鍍室11a。Each target 41a or 41h is such that the sputter surface 411 when not in use The device is mounted on a frame (not shown) of the cathode electrode C via an insulating member so as to be positioned on the same plane as the substrate S. Further, in the vicinity of the targets 41a to 41h arranged side by side, the second shielding plate 32 is disposed, and in the vacuum processing chamber 11, the space surrounded by the first and second shielding plates 31 and 32 is The sputtering chamber 11a is formed.

又,陰極電極C,係具備有分別位置於標靶41a乃至41h之後方(與濺鍍面411相背向之側)的磁石組裝體5。相同構造之磁石組裝体5,係具備有與各標靶41a乃至41h平行地被設置之支持板(軛)51。當標靶41a乃至41h由正面視之而為長方形時,支持板51,係以較各標靶41a乃至41h之橫幅為小,而沿標靶41a乃至41h之長度方向朝其兩側延伸出去的方式所形成之長方形狀的平板所構成,而係為可將磁石之吸著力增幅的磁性材料製。在支持板51上,將於其中央部而沿著長度方向來配置為線狀之中央磁石52,和以包圍中央磁石52之周圍的方式而沿著支持板51之外周所配置的周邊磁石53,以對濺鍍面411側之極性作改變的方式而設置。Further, the cathode electrode C is provided with a magnet assembly 5 positioned at a position rearward of the target 41a or 41h (on the side opposite to the sputtering surface 411). The magnet assembly 5 having the same structure is provided with a support plate (yoke) 51 provided in parallel with the respective targets 41a or 41h. When the target 41a or 41h is rectangular from the front, the support plate 51 is smaller than the banner of each target 41a or 41h, and extends toward the both sides along the length of the target 41a or 41h. The rectangular flat plate formed by the method is made of a magnetic material capable of increasing the adsorption force of the magnet. In the support plate 51, a central magnet 52 which is linearly arranged along the longitudinal direction at the center portion thereof, and a peripheral magnet 53 which is disposed along the outer periphery of the support plate 51 so as to surround the periphery of the central magnet 52 are provided. It is provided in such a manner as to change the polarity of the side of the sputtering surface 411.

將中央磁石52換算為同磁化時之體積,例如係被設計為成為和將周邊磁石53之換算為同磁化時的體積之和(周邊磁石:中心磁石:周邊磁石=1:2:1)成為相同,在各標靶41a乃至41h之濺鍍面411的前方,係分別被形成有相平衡之閉迴圈狀的隧道狀磁束。藉由此,藉由捕捉在各標靶41a乃至41h之前方(濺鍍面411側)所電離的電子及經由濺鍍所產生之二次電子,而能提高在各標靶 41a乃至41h的前方之電子密度,並提高電漿密度,而能夠提高濺鍍速率。When the central magnet 52 is converted into a volume at the same magnetization, for example, it is designed to be the sum of the volume when the peripheral magnet 53 is converted into the same magnetization (peripheral magnet: center magnet: peripheral magnet = 1:2:1). Similarly, in front of the sputtering surface 411 of each of the targets 41a to 41h, a tunnel-shaped magnetic flux having a closed-loop shape in which the phases are balanced is formed. By capturing electrons ionized in front of each target 41a or 41h (on the side of the sputtering surface 411) and secondary electrons generated by sputtering, the target can be improved. The electron density in front of 41a or even 41h, and increase the plasma density, can increase the sputtering rate.

各磁石組裝體5,係分別被連接於由馬達或是空氣汽缸等所構成之驅動手段D的驅動軸D1處,在沿著標靶41a乃至41h之並排設置方向的兩處位置之間,可以平行且等速地進行一體化之往復運動。藉由此,係能夠對濺鍍速率變高之區域作改變,而涵蓋各標靶41a乃至41h之全面來得到均等的侵蝕區域。Each of the magnet assemblies 5 is connected to a drive shaft D1 of a drive means D composed of a motor or an air cylinder, and is disposed between two positions along the direction in which the targets 41a or 41h are arranged side by side. The reciprocating motion is integrated in parallel and at a constant speed. Thereby, it is possible to change the region where the sputtering rate becomes high, and to cover the entire range of the targets 41a or 41h to obtain an equal erosion region.

各標靶41a乃至41h,係以相鄰之2枚來構成一對之標靶(41a與41b、41c與41d、41e與41f、41g與41h),並對於各個一對之標靶,而分配設置有交流電源E1乃至E4,從交流電源E1乃至E4而來之輸出纜線K1、K2,係被連接於一對的標靶41a、41b(41c以及41d、41e以及41f、41g以及41h)。而後,經由交流電源E1乃至E4,對於各個一對之標靶41a乃至41h而交互地改變極性並施加交流電壓。Each of the targets 41a to 41h is formed by a pair of adjacent targets (41a and 41b, 41c and 41d, 41e and 41f, 41g and 41h), and is assigned to each pair of targets. The AC power sources E1 and E4 are provided, and the output cables K1 and K2 from the AC power source E1 to E4 are connected to the pair of targets 41a and 41b (41c and 41d, 41e and 41f, 41g, and 41h). Then, the polarity is alternately changed and an alternating voltage is applied to each of the pair of targets 41a or 41h via the alternating current power source E1 or E4.

交流電源E1乃至E4,係為相同之構造,而由可進行電力之供給的電力供給部6、和以特定之頻率而交互地改變極性並將交流電壓輸出至一對之標靶41a、41b(41c以及41d、41e以及41f、41g以及41h)處的震盪部7所構成。關於對各標靶41a乃至41h所輸出之輸出電壓的波形,係為略正弦波,但是,係並不限定於此,而例如亦可為略方形波。以下,針對交流電源E1之構成,參考圖2來作說明。The AC power sources E1 and E4 have the same configuration, and the power supply unit 6 that can supply power and the polarity are alternately changed at a specific frequency and the AC voltage is output to the pair of targets 41a and 41b ( The oscillating portion 7 at 41c and 41d, 41e and 41f, 41g, and 41h) is formed. The waveform of the output voltage outputted to each of the targets 41a or 41h is a slightly sinusoidal wave. However, the waveform is not limited thereto, and may be, for example, a slightly square wave. Hereinafter, the configuration of the AC power supply E1 will be described with reference to FIG. 2.

電力供給部6,係具備有:對其之動作進行控制之第1CPU電路61、和被輸入有商用之交流電力(3相AC200V又或是400V)的輸入部62、和將所輸入之交流電力作整流並變換為直流電力之6個的二極體63,並經由直流電力線64a、64b來將直流電力輸出至震盪部7處。The power supply unit 6 includes a first CPU circuit 61 that controls the operation thereof, an input unit 62 to which commercial alternating current power (three-phase AC 200V or 400 V) is input, and an input AC power to be input. The diodes 63 are rectified and converted into six DC powers, and DC power is output to the oscillation unit 7 via the DC power lines 64a and 64b.

又,在電力供給部6處,係被設置有:被設置在直流電力線64a、64之間的切換電晶體65、和被可自由通訊地連接於第1CPU電路61處,並對切換電晶體65之動作進行控制而對輸出至震盪部7處之輸出電壓又或是輸出電流作控制的第1驅動電路66a以及第1PMW控制電路66b,藉由該輸出電壓又或是輸出電流,而決定在一對之標靶41a、41b間的投入電力。於此情況,係被設置有具備電流檢測器以及電壓檢測變壓器並對直流電力線64a、64b間之電流、電壓作檢測的檢測電路67a、以及AD變換電路67b,並成為經由檢測電路67a以及AD變換電路67b而被輸入至CPU電路61處。Further, the power supply unit 6 is provided with a switching transistor 65 provided between the DC power lines 64a and 64, and is communicably connected to the first CPU circuit 61, and switches the transistor 65. The operation of the first drive circuit 66a and the first PMW control circuit 66b for controlling the output voltage output to the oscillation unit 7 or the output current is controlled by the output voltage or the output current. The input power between the targets 41a and 41b. In this case, the detection circuit 67a and the AD conversion circuit 67b including the current detector and the voltage detection transformer and detecting the current and voltage between the DC power lines 64a and 64b are provided, and the detection circuit 67a and the AD conversion are provided. The circuit 67b is input to the CPU circuit 61.

另一方面,在震盪部7處,係被設置有:可自由通訊地被連接於第1CPU電路61處之第2CPU電路71、和被設置在直流電力線64a、64b的構成震盪用切換電路72之4個的第1乃至第4切換電晶體72a、72b、72c、72d,和可自由通訊地被連接於第2CPU電路71,並對各切換電晶體72a、72b、72c、72d之動作進行控制的第2驅動電路73a以及第2PMW控制電路73b。On the other hand, the oscillation unit 7 is provided with a second CPU circuit 71 that is connected to the first CPU circuit 61 in a freely communicable manner, and a oscillation switching circuit 72 that is provided in the DC power lines 64a and 64b. The four first to fourth switching transistors 72a, 72b, 72c, and 72d are connected to the second CPU circuit 71 in a freely communicable manner, and control the operations of the switching transistors 72a, 72b, 72c, and 72d. The second drive circuit 73a and the second PMW control circuit 73b.

而後,若是經由第2驅動電路73a以及第2PMW控制 電路73b,而例如以使第1以及第4切換電晶體72a、72d和第2以及第3切換電晶體72b、72c之導通.斷路的時機反轉的方式,而對各切換電晶體72a、72b、72c、72d之動作進行控制,則能夠經由從震盪用切換電路72而來之交流電力線74a、74b,來輸出正弦波之交流電力。於此情況,係被設置有檢測出震盪電流之檢測電路75a以及AD變換電路75b,並成為經由檢測電路75a以及AD變換電路75b而被輸入至第2CPU電路71處。Then, if it is controlled via the second drive circuit 73a and the second PMW The circuit 73b is, for example, such that the first and fourth switching transistors 72a, 72d and the second and third switching transistors 72b, 72c are turned on. When the timing of the disconnection is reversed, the operation of each of the switching transistors 72a, 72b, 72c, and 72d is controlled, and the sinusoidal communication can be output via the AC power lines 74a and 74b from the oscillation switching circuit 72. electric power. In this case, the detection circuit 75a and the AD conversion circuit 75b that detect the oscillating current are provided, and are input to the second CPU circuit 71 via the detection circuit 75a and the AD conversion circuit 75b.

交流電力線74a、74b,係經由串聯或者是並聯又或是將此些作了組合後之共振用LC電路,而被連接於具備有週知之構造的輸出變壓器76處,而從輸出變壓器76而來之輸出纜線K1、K2,係分別被連接於一對之標靶41a、41b處。於此情況,係被設置有具備電流檢測器以及電壓檢測變壓器並對一對之標靶41a、41b間之輸出電流、輸出電壓作檢測的檢測電路77a、以及AD變換電路77b,並成為經由檢測電路77a以及AD變換電路77b而被輸入至第2CPU電路71處。藉由此,在濺鍍中,係可經由交流電源E1乃至E4,而以一定之頻率來交互地改變極性,並對一對之標靶41a、41b而投入任意設定之一定的電力。The AC power lines 74a and 74b are connected to the output transformer 76 having a well-known structure via series or parallel or resonant LC circuits, and are connected from the output transformer 76. The output cables K1, K2 are connected to a pair of targets 41a, 41b, respectively. In this case, the detection circuit 77a and the AD conversion circuit 77b including the current detector and the voltage detection transformer and detecting the output current and the output voltage between the pair of targets 41a and 41b are provided and detected. The circuit 77a and the AD conversion circuit 77b are input to the second CPU circuit 71. Thereby, in the sputtering, the polarity can be alternately changed at a constant frequency via the AC power source E1 or E4, and a predetermined set of electric power can be input to the pair of targets 41a and 41b.

另外,各交流電源E1乃至E4之第1CPU電路61,係相互被可自由通訊地作連接,並可藉由從任一者之1個的CPU電路61而來之輸出訊號,來將各交流電源E1乃至E4作同步運轉。Further, the first CPU circuits 61 of the AC power supplies E1 and E4 are connected to each other in a freely communicable manner, and the AC power sources can be outputted by the CPU circuit 61 from either one. E1 and E4 operate synchronously.

又,在真空處理室11處,係被設置有將由Ar等之希 有氣體所成之濺鍍氣體、和因應於欲在基板S之表面上所形成的薄膜之組成而適宜選擇的氧或是氮等之反應氣體導入至濺鍍室內之氣體導入手段8(參考圖1)。氣體導入手段8,係具備有被安裝於真空處理室11之側壁處的氣體管81,氣體管81,係經由質量流控制器82a、82b而分別通連於濺鍍氣體以及反應氣體之氣體源83a、83b處。Moreover, at the vacuum processing chamber 11, it is provided with a A gas introduction means 8 for introducing a reaction gas such as oxygen or nitrogen, which is suitably selected in accordance with a composition of a film to be formed on the surface of the substrate S, into the sputtering chamber (refer to the figure) 1). The gas introduction means 8 is provided with a gas pipe 81 attached to the side wall of the vacuum processing chamber 11, and the gas pipe 81 is connected to the gas source of the sputtering gas and the reaction gas via the mass flow controllers 82a and 82b, respectively. 83a, 83b.

又,氣體管81中之用於供給反應氣體的部分,係在質量流控制器82b之下流側而被分歧,並被連接於以從各標靶41a乃至41h而相分離的方式而在各磁石組裝體5之背面側處以標靶41a乃至41h之並排設置方向來通過各標靶之中心而延伸的1根之氣體供給管84處。氣體供給管84,係以成為與並排設置之標靶41a乃至41h之全部寬幅為同等之長度又或是較其為更長之長度的方式而被制訂尺寸,在該標靶41a乃至41h側之面處,係在位於各標靶41a乃至41h相互間之間隙的下方之位置處,被形成有複數個的噴射口84a。Further, the portion of the gas pipe 81 for supplying the reaction gas is branched on the flow side below the mass flow controller 82b, and is connected to each of the magnets so as to be separated from each of the targets 41a to 41h. At the back side of the assembly 5, a gas supply pipe 84 extending through the center of each target is placed in a direction in which the targets 41a or 41h are arranged side by side. The gas supply pipe 84 is sized to have the same length as the entire width of the targets 41a or 41h arranged side by side or a longer length thereof, and is on the side of the target 41a or 41h. The surface is formed at a position below the gap between the respective targets 41a and 41h, and a plurality of injection ports 84a are formed.

而後,若是使質量流控制器82a、82b作動,則濺鍍氣體係通過第1以及第2之各遮蔽板31、32間、以及第1遮蔽板31與基板搬送手段2之間的間隙,而被導入至濺鍍室11a內。反應氣體,主要係在各標靶41a乃至41h之背面側的空間處一度被擴散,並成為通過各標靶41a乃至41h相互間之間隙而朝向基板S作供給。藉由此,不會有對於基板S而使反應氣體被作偏向供給之情況,在基板S之標靶41a乃至41h側的空間中,反應氣體係略均等地存 在,此反應氣體,係與朝向基板S而從標靶41a乃至41h飛散並經由電漿而被活性化的濺鍍粒子產生反應,並附著.堆積於基板之表面。其結果,能夠防止在基板面S內而於反應性上產生有不均並使基板S面內的比電阻值等之膜質成為不均勻。Then, when the mass flow controllers 82a and 82b are actuated, the sputtering gas system passes through the gap between the first and second shielding plates 31 and 32 and between the first shielding plate 31 and the substrate conveying device 2, and It is introduced into the sputtering chamber 11a. The reaction gas is mainly diffused once in the space on the back side of each of the targets 41a or 41h, and is supplied to the substrate S through the gap between the respective targets 41a to 41h. Therefore, the reaction gas is not biased to the substrate S, and the reaction gas system is slightly uniformly stored in the space on the side of the target 41a or 41h of the substrate S. The reaction gas reacts with the sputtering particles that are scattered toward the substrate S and are scattered from the target 41a or 41h and are activated by the plasma, and are attached. Stacked on the surface of the substrate. As a result, it is possible to prevent unevenness in reactivity in the substrate surface S and to cause unevenness in film quality such as specific resistance in the surface of the substrate S.

接下來,作為本發明之薄膜形成方法的其中一例,針對在TFT基板的製作工程中會被利用之對於玻璃基板表面之含有Cu的氧化物膜、含有Cu之金屬膜、以及由SiNx所成之絕緣膜的形成(參考圖3)作說明。Next, as an example of the method for forming a thin film of the present invention, an oxide film containing Cu on the surface of a glass substrate, a metal film containing Cu, and a SiNx are used in the fabrication of a TFT substrate. The formation of an insulating film (refer to FIG. 3) will be described.

使用圖1中所示之濺鍍裝置1,首先在玻璃基板S表面上,形成含有Cu之氧化物膜。於此情況,作為標靶41a乃至41h,係使用在Cu中添加有Mg的Cu合金標靶。Using the sputtering apparatus 1 shown in Fig. 1, first, an oxide film containing Cu is formed on the surface of the glass substrate S. In this case, as the target 41a or 41h, a Cu alloy target in which Mg is added to Cu is used.

接下來,將真空處理室11內排氣至特定之真空度(例如10-5 Pa),並經由基板搬送手段2而將玻璃基板S搬送至與標靶41a乃至41h相對向之位置。而後,經由氣體導入手段8,而將Ar氣體以及氧氣以一定之流量來導入至濺鍍室11a內,並經由交流電源E1乃至E4,來對於分別成對之標靶41a乃至41h而分別施加交流電壓(投入電力,例如係為20kW)。投入電力,係對為了得到特定之膜厚所必要之濺鍍時間以及量產性作考慮,而被適宜地設定。又,氧氣之氣體流量,係以使起因於氧化物膜中之氧濃度的比電阻值成為特定的範圍內之值的方式而被適宜設定。Next, the inside of the vacuum processing chamber 11 is evacuated to a specific degree of vacuum (for example, 10 -5 Pa), and the glass substrate S is transported to a position facing the targets 41a or 41h via the substrate transfer means 2. Then, Ar gas and oxygen gas are introduced into the sputtering chamber 11a at a constant flow rate via the gas introduction means 8, and alternating current is applied to the respective pairs of targets 41a to 41h via the AC power sources E1 to E4. Voltage (input power, for example, 20 kW). The input of electric power is appropriately set in consideration of the sputtering time and mass productivity necessary for obtaining a specific film thickness. In addition, the gas flow rate of the oxygen gas is appropriately set so that the specific resistance value of the oxygen concentration in the oxide film is within a specific range.

若是在各標靶41a乃至41h被投入有電力,則各標靶41a乃至41h係在陽極電極、陰極電極之間作切替,並在陽極電極以及陰極電極之間產生輝光放電,並形成電漿氛圍。而後,電漿氛圍中之離子,係朝向成為陰極電極之其中一方的標靶41a乃至41h加速並衝擊,並使標靶原子(濺鍍粒子)飛散,而經由電漿而被活性化之濺鍍粒子,係與氧反應而附著.堆積於玻璃基板S之表面,並以特定之膜厚而形成CuMgO膜。When power is supplied to each of the targets 41a or 41h, each of the targets 41a to 41h is switched between the anode electrode and the cathode electrode, and glow discharge is generated between the anode electrode and the cathode electrode to form a plasma atmosphere. . Then, the ions in the plasma atmosphere are accelerated and impacted toward the target 41a or 41h which becomes one of the cathode electrodes, and the target atoms (sputtering particles) are scattered, and the sputtering is activated by the plasma. Particles, which react with oxygen and adhere. It is deposited on the surface of the glass substrate S, and a CuMgO film is formed with a specific film thickness.

於此,在上述濺鍍裝置1中,係藉由第1以及第2之各遮蔽板(shield)31、32還有基板搬送手段2來作圍繞而構成濺鍍室11a。因此,若是導入至濺鍍室11a內之氧氣的流量係為一定,則依存於對各標靶41a乃至41h之投入電力,會有相對於濺鍍粒子之飛散量而氧之供給成為不足之虞。於此情況,CuMgO膜中之氧濃度(在膜中之反應氣體成分的含有濃度)係隨著該膜厚之變厚而減少(在此種CuMgO膜中,其與玻璃基板S之界面附近的氧係成為易於朝向CuMgO膜表層而擴散)。Here, in the sputtering apparatus 1, the sputtering chambers 11a are formed by surrounding the first and second shields 31 and 32 and the substrate transporting means 2. Therefore, if the flow rate of oxygen introduced into the sputtering chamber 11a is constant, depending on the amount of electric power input to each of the targets 41a to 41h, the supply of oxygen may be insufficient with respect to the amount of scattering of the sputtered particles. . In this case, the oxygen concentration in the CuMgO film (the concentration of the reaction gas component in the film) decreases as the film thickness becomes thicker (in the CuMgO film, the vicinity of the interface with the glass substrate S) Oxygen is easily diffused toward the surface layer of the CuMgO film.

因此,在本實施形態中,係於濺鍍中,一面將被導入至濺鍍室11a內之反應氣體的流量保持於一定,一面經由各交流電源E1乃至E4之PWM控制電路66b來對切換電晶體65進行控制,而將對於標靶41a乃至41h之投入電力,從通常濺鍍時之投入電力而切換為較通常濺鍍時之投入電力更低之電力(低電力)(參考圖4)。於此,低電力時之投入電力,係為通常濺鍍時之投入電力的5~90% 之範圍內,較理想係設定為25%(5kW)。又,投入電力之切換時期,係在濺鍍時間之5~95%的範圍內而被適宜作設定。Therefore, in the present embodiment, during the sputtering, the flow rate of the reaction gas introduced into the sputtering chamber 11a is kept constant, and the switching is performed via the PWM control circuit 66b of each of the AC power supplies E1 to E4. The crystal 65 is controlled, and the input power to the target 41a or 41h is switched from the power input at the time of normal sputtering to the electric power (low power) which is lower than the input power at the time of normal sputtering (refer to FIG. 4). Here, the input power at the time of low power is 5 to 90% of the power input during normal sputtering. Within the range, it is ideally set to 25% (5 kW). Further, the switching period of the input electric power is appropriately set within the range of 5 to 95% of the sputtering time.

藉由此,在直到CuMgO膜達到了特定之膜厚為止的期間中,藉由將投入電力切換為低電力來減少濺鍍粒子之飛散量,在CuMgO膜中,係被形成有相較於通常濺鍍時其氧濃度係成為較高的區域。另外,在超過投入電力之90%的電力下,係無法有效地製作該當區域,又,在較5%為更小之電力下,濺鍍時間係變得過長,而不適合於量產。另一方面,在超過濺鍍時間之95%的時間下來切換電力,係無法有效地製作該當區域,又,在較5%為更短之時間下,濺鍍時間係變得過長,而不適合於量產。By this, in the period until the CuMgO film reaches a specific film thickness, the amount of scattering of the sputter particles is reduced by switching the input electric power to low electric power, and the CuMgO film is formed in comparison with the usual At the time of sputtering, the oxygen concentration becomes a high region. In addition, when the power exceeds 90% of the input power, the area cannot be efficiently produced, and the sputtering time becomes too long at a power of less than 5%, which is not suitable for mass production. On the other hand, when the power is switched over 95% of the sputtering time, the area cannot be effectively produced, and the sputtering time becomes too long at a time shorter than 5%, which is not suitable. In mass production.

接下來,若是CuMgO膜達到了特定之膜厚(設定濺鍍時間),則係停止氧氣之供給,同時,將對於標靶41a乃至41h之投入電力再度切換為高電力。藉由此,在CuMgO膜表面處,係附著.堆積有飛散之標靶原子,而相當於含有Cu之金屬膜的CuMg膜,係以特定之膜厚而被形成。Next, if the CuMgO film reaches a specific film thickness (set sputtering time), the supply of oxygen is stopped, and the input power to the target 41a or 41h is again switched to high power. By this, at the surface of the CuMgO film, it is attached. The CuMg film corresponding to the scattered target atoms and corresponding to the metal film containing Cu is formed with a specific film thickness.

接下來,在CuMgO膜以及CuMg膜以特定之膜厚而被形成後,經由基板搬送手段2,來將玻璃基板S搬送至未圖示之電漿CVD裝置中,並形成由SiNx所成之絕緣膜。電漿CVD裝置,係具備有週知的構造,將玻璃基板之處理溫度設定為300℃,並作為製程氣體而使用N2 、NH3 以及SiH4 之混合氣體,來形成上述絕緣膜。Next, after the CuMgO film and the CuMg film are formed with a specific film thickness, the glass substrate S is transferred to a plasma CVD apparatus (not shown) via the substrate transfer means 2, and insulation formed by SiNx is formed. membrane. The plasma CVD apparatus has a well-known structure, and the processing temperature of the glass substrate is set to 300 ° C, and a mixed gas of N 2 , NH 3 , and SiH 4 is used as a process gas to form the insulating film.

於此,在形成絕緣膜時,係藉由以電漿之輻射熱等來對基板S加熱,而使CuMgO膜中之氧擴散,並藉由以電漿所分解之氫或是NH3 、SiH4 而被還元,並被放出至膜外。然而,在CuMgO膜中,由於係使氧濃度為高之區域存在,並在該當薄膜中從其與基板S間之界面起而朝向膜厚增加之方向來賦予有濃度梯度,因此,在CuMgO膜與玻璃基板S間之界面附近處的氧之擴散係被抑制,而防止在該當界面附近處之氧濃度的降低。其結果,能夠確保對於被形成在基板背面處之氧化物的銅之高密著強度。除此之外,由於僅係在CuMgO膜之形成途中而提昇氧濃度,因此,CuMgo膜之比電阻值係並不會變得過高。Here, in forming the insulating film, the substrate S is heated by radiant heat of plasma or the like, and oxygen in the CuMgO film is diffused, and hydrogen decomposed by plasma or NH 3 or SiH 4 is used. It was repaid and released to the outside of the membrane. However, in the CuMgO film, since a region having a high oxygen concentration is present, and a concentration gradient is imparted in a direction in which the film thickness increases from the interface between the film and the substrate S, the CuMgO film is applied to the CuMgO film. The diffusion of oxygen near the interface between the glass substrate S and the glass substrate S is suppressed, and the decrease in the oxygen concentration at the vicinity of the interface is prevented. As a result, it is possible to ensure high adhesion strength to copper which is formed on the back surface of the substrate. In addition, since the oxygen concentration is increased only in the middle of formation of the CuMgO film, the specific resistance value of the CuMgo film does not become excessively high.

另外,在本實施形態中,係於濺鍍中,一面將被導入至濺鍍室11a內之反應氣體的流量保持於一定,一面將對於標靶41a乃至41h之投入電力,從高電力而切換為低電力,但是,係並不限定於此,亦可將從交流電源E1乃至E4而來之投入電力,設為在高電力以及低電力之間而以脈衝狀來交互作切換(參考圖5)。藉由此,在絕緣膜中,氧濃度局部性變高之區域係以特定之週期而被形成,而為理想。此時,雖然係以不使直到以特定之膜厚而得到CuMgo膜為止的濺鍍時間變長之方式,來對低電力時之投入電力與濺鍍時間作適宜之設定,但是,依存於在CuMgO膜中所欲得到之氧濃度,亦可在不使濺鍍時間變長的範圍內,將低電力時之投入電力設為0。In addition, in the present embodiment, the flow rate of the reaction gas introduced into the sputtering chamber 11a is kept constant during the sputtering, and the input power to the target 41a or 41h is switched from high power. In order to reduce the power, the power is not limited to this, and the input power from the AC power source E1 to the E4 may be switched between the high power and the low power in a pulsed manner (refer to FIG. 5). ). Therefore, in the insulating film, a region where the oxygen concentration is locally increased is formed in a specific cycle, which is preferable. In this case, although the sputtering time until the CuMgo film is obtained at a specific film thickness is increased, the input power and the sputtering time at the time of low power are appropriately set, but depending on The oxygen concentration to be obtained in the CuMgO film may be set to zero in the case of low power generation without increasing the sputtering time.

又,在本實施形態中,係於濺鍍中,一面將被導入至 濺鍍室11內之反應氣體的流量保持於一定,一面將對於標靶41a乃至41h之投入電力作切換,但是,係並不限定於此,而亦可對質量流控制器82a、82b作控制,而將氧氣之流量從通常濺鍍時之氣體流量(低流量:10~500sccm)來切換為較通常濺鍍時之投入電力為更多的流量(高流量:500~1000sccm)(參考圖6)。此時,亦可將前述反應氣體供給量之增加以一定之週期來進行。Further, in the present embodiment, it is introduced into the sputtering process. The flow rate of the reaction gas in the sputtering chamber 11 is kept constant, and the input power to the target 41a or 41h is switched. However, the present invention is not limited thereto, and the mass flow controllers 82a and 82b may be controlled. The flow rate of oxygen is switched from the gas flow rate at the time of normal sputtering (low flow rate: 10 to 500 sccm) to more flow rate than the usual input power at the time of sputtering (high flow rate: 500 to 1000 sccm) (refer to Fig. 6) ). At this time, the increase in the supply amount of the reaction gas may be performed in a predetermined cycle.

進而,在本實施形態中,雖係針對在TFT基板的製作工程中會被利用之對於玻璃基板表面之含有Cu的氧化物膜、含有Cu之金屬膜、以及由SiNx所成之絕緣膜的形成為例而作了說明,但是,係並不被限定於此,而亦可適用在作為TFT基板之源極或是汲極而形成特定之金屬膜一般的情況中。Further, in the present embodiment, the oxide film containing Cu on the surface of the glass substrate, the metal film containing Cu, and the formation of the insulating film made of SiNx which are used in the fabrication of the TFT substrate are used. Although it is illustrated as an example, it is not limited to this, and it is applicable also in the case where a specific metal film is formed as a source or a drain of a TFT substrate.

〔實施例1〕[Example 1]

於本實施例中,係使用圖1所示之濺鍍裝置1,而經由反應性濺鍍來在玻璃基板S上形成了CuMgO膜。於此情況,作為標靶,係使用組成為0.7wt%之CuMg,並藉由週知之方法來成形,而接合於背板32處。In the present embodiment, the sputtering apparatus 1 shown in FIG. 1 was used, and a CuMgO film was formed on the glass substrate S via reactive sputtering. In this case, as a target, CuMg having a composition of 0.7% by weight was used and formed by a known method to be bonded to the back sheet 32.

作為反應性濺鍍條件,係對質量流控制器作控制,而將Ar氣體之氣體流量設為890sccm,將氧氣之流量設為240~700sccm之範圍內,並導入至真空處理室內。而後,將高電力時之投入電力設為20kW,將低電力時之投入電力設為5kW,並對投入電力適宜作切換,而以能夠得到 300之膜厚的方式來設定了濺鍍時間。As the reactive sputtering conditions, the mass flow controller was controlled, and the gas flow rate of the Ar gas was set to 890 sccm, and the flow rate of the oxygen gas was set to be in the range of 240 to 700 sccm, and introduced into the vacuum processing chamber. Then, the input power at the time of high power is 20 kW, and the input power at the time of low power is 5 kW, and the input power is appropriately switched, so that 300 can be obtained. The film thickness is set to set the sputtering time.

於此,試料# 1以及# 2,係為將投入電力設為高電力並保持於一定,並使氧氣之流量作變化後所得者(比較例),試料# 3,係為將投入電力設為低電力並保持於一定者(比較例)。另一方面,試料# 4乃至# 6,係為將投入電力在高電力與低電力間作適宜切換所得者(實施例)。另外,在試料# 4中,係以在高電力下而得到150、在低電力下得到150之膜厚的方式,來設定了電力切換時間(參考圖4)。Here, the samples #1 and #2 are obtained by setting the input electric power to a high electric power and keeping it constant, and changing the flow rate of the oxygen gas (comparative example), and the sample #3 is for setting the input electric power. Low power and kept at a certain level (comparative example). On the other hand, Samples #4 to #6 are those in which the input electric power is appropriately switched between high electric power and low electric power (Example). In addition, in sample #4, 150 is obtained under high power. Get 150 under low power The film thickness is set to set the power switching time (refer to FIG. 4).

接下來,對於以上述條件而在玻璃基板表面形成有CuMgO膜之試料# 1乃至# 6,接著藉由上述濺鍍裝置而形成了CuMg膜。作為濺鍍條件,係對質量流控制器作控制,而將Ar氣體之氣體流量設為890sccm,並導入至真空處理室內。而後,將投入電力設定為75kW,並以能夠得到3000之膜厚的方式而設定了濺鍍時間。Next, for the samples #1 to #6 in which the CuMgO film was formed on the surface of the glass substrate under the above conditions, a CuMg film was formed by the above sputtering apparatus. As the sputtering condition, the mass flow controller was controlled, and the gas flow rate of the Ar gas was set to 890 sccm, and introduced into the vacuum processing chamber. Then, set the input power to 75kW and get 3000. The sputtering time is set in the manner of the film thickness.

接下來,對於形成了CuMgO膜以及CuMg膜之試料# 1乃至# 6,藉由週知之構造的電漿CVD裝置而形成了SiNx膜。作為電漿CVD之條件,將基板溫度設定為300℃,並作為製程氣體而使用N2 、NH3 以及SiH4 之混合氣體,來以3000之膜厚而形成之。圖7,係為對藉由上述方式所製作的試料# 1乃至# 6之CuMgO膜單膜下的比電阻值、和CuMg/CuMgO層積膜,其兩者間的關係作展示的表。於此,密著性,係藉由下述一般之所謂的帶測試(tape test)法而作了評價。亦即是,對於如同上述一般 所得到之試料# 1乃至# 6,藉由鑽石切刀,來在水平方向以及垂直方向上以一定之間隔而分別設置10根之切缺線,接下來,在設置有此些之切缺線的區域處,貼附黏著膠帶,並使其剝離。而後,在被切缺線所圍繞之膜中,當僅有5%以下之面積被附著於膠帶上的情況時,則評價為密著性良好。另一方面,比電阻值係藉由週知的方法而作了測定。Next, for the samples #1 to #6 in which the CuMgO film and the CuMg film were formed, a SiNx film was formed by a plasma CVD apparatus having a known structure. As a condition of plasma CVD, the substrate temperature is set to 300 ° C, and a mixed gas of N 2 , NH 3 , and SiH 4 is used as a process gas to 3000 The film is formed to be thick. Fig. 7 is a table showing the relationship between the specific resistance value under the single film of the CuMgO film of the sample #1 to #6 produced by the above-described method and the CuMg/CuMgO laminated film. Here, the adhesion is evaluated by the following general tape test method. That is, for the samples #1 to #6 obtained as described above, by using a diamond cutter, 10 cutting lines are respectively provided at regular intervals in the horizontal direction and the vertical direction, and then, Adhesive tape is attached and peeled off at the area where the cut lines are provided. Then, in the case where only 5% or less of the film surrounded by the cut line is attached to the tape, the adhesion is evaluated to be good. On the other hand, the specific resistance value was measured by a known method.

若藉由此,則可以得知:若是反應性濺鍍時之氣體流量為少,則係無法得到充分的密著性(試料# 1),另一方面,若是氣體流量變多,則雖然密著性係被改善,但是比電阻值係變高(試料# 2)。又,若是以低電力來進行反應性濺鍍,則雖然在能夠得到充分之密著性的同時,亦能夠使比電阻值變低,但是,濺鍍時間係成為32秒,而不適合於量產。According to this, it can be seen that if the gas flow rate at the time of reactive sputtering is small, sufficient adhesion (sample #1) cannot be obtained, and if the gas flow rate is increased, the density is small. The sexual system was improved, but the specific resistance was higher (sample # 2). Further, when the reactive sputtering is performed with low electric power, the specific resistance can be obtained, and the specific resistance value can be lowered. However, the sputtering time is 32 seconds, which is not suitable for mass production. .

相對於此,若是對反應性濺鍍時之投入電力作切換,則能夠得到充分之密著性的同時,亦能夠使比電阻值變低,並且,濺鍍時間亦為20秒,而能夠縮短。特別是,在試料# 4中,相較於試料# 2,可以得知,係能夠使其成為約1/6的比電阻值。On the other hand, if the input electric power at the time of reactive sputtering is switched, sufficient adhesion can be obtained, the specific resistance value can be made low, and the sputtering time can be 20 seconds, which can be shortened. . In particular, in sample #4, it was found that the sample #2 was able to have a specific resistance value of about 1/6.

1‧‧‧濺鍍裝置1‧‧‧Sputtering device

11a‧‧‧濺鍍室11a‧‧‧ Sputtering room

31、32‧‧‧遮蔽板31, 32‧‧‧ shielding board

41a乃至41h‧‧‧標靶41a or even 41h‧‧ targets

65‧‧‧切換元件65‧‧‧Switching components

8‧‧‧氣體導入手段8‧‧‧ gas introduction means

E1乃至E4‧‧‧交流電源E1 and even E4‧‧‧ AC power supply

S‧‧‧基板S‧‧‧Substrate

〔圖1〕實施本發明之薄膜形成方法的濺鍍裝置之模式剖面圖〔圖2〕對在圖1中所示之濺鍍裝置中所使用的交流 電源之構成作說明之圖〔圖3〕對在TFT基板製作工程中之薄膜形成作說明的圖〔圖4〕對實施本發明之薄膜形成方法的情況時之對於投入電力與反應氣體流量之控制作說明的圖〔圖5〕對實施本發明之薄膜形成方法的情況時之對於投入電力與反應氣體流量之控制的變形例作說明的圖〔圖6〕對實施本發明之薄膜形成方法的情況時之對於投入電力與反應氣體流量之控制的變形例作說明的圖〔圖7〕展示藉由實施例1所製作之試料的薄膜形成條件、與比電阻值以及密著性之試驗結果的表[Fig. 1] A schematic cross-sectional view of a sputtering apparatus for carrying out the film forming method of the present invention (Fig. 2) for the alternating current used in the sputtering apparatus shown in Fig. 1. FIG. 3 is a diagram for explaining the formation of a thin film in a TFT substrate fabrication process. FIG. 4 is a view showing control of input power and reaction gas flow rate in the case of implementing the thin film formation method of the present invention. (Fig. 5) A diagram for explaining a modification of the control of the input electric power and the flow rate of the reaction gas in the case of carrying out the method for forming a thin film of the present invention. Fig. 6 is a view showing a method of forming the thin film of the present invention. A diagram explaining the modification of the control of the input electric power and the flow rate of the reaction gas (Fig. 7) shows the results of the film formation conditions, the specific resistance value, and the adhesion test results of the sample produced in Example 1.

1‧‧‧濺鍍裝置1‧‧‧Sputtering device

2‧‧‧基板搬送手段2‧‧‧Substrate transport means

5‧‧‧磁石組裝體5‧‧‧Magnetic assembly

8‧‧‧氣體導入手段8‧‧‧ gas introduction means

11‧‧‧真空處理室11‧‧‧vacuum processing room

21‧‧‧載體21‧‧‧ Carrier

31‧‧‧第1遮蔽板31‧‧‧1st shielding board

31a‧‧‧開口31a‧‧‧ Opening

32‧‧‧第2遮蔽板32‧‧‧2nd shielding board

41a~41h‧‧‧標靶41a~41h‧‧‧ Target

42‧‧‧擋板42‧‧‧Baffle

411‧‧‧濺鍍面411‧‧‧ Splashing surface

51‧‧‧支持板51‧‧‧Support board

52‧‧‧中央磁石52‧‧‧Central Magnet

53‧‧‧周邊磁石53‧‧‧Surround magnet

81‧‧‧氣體管81‧‧‧ gas pipe

82a‧‧‧質量流控制器82a‧‧‧mass flow controller

82b‧‧‧質量流控制器82b‧‧‧mass flow controller

83a‧‧‧氣體源83a‧‧‧ gas source

83b‧‧‧氣體源83b‧‧‧ gas source

84a‧‧‧噴射口84a‧‧‧jet

E1~E4‧‧‧交流電源E1~E4‧‧‧AC power supply

K1、K2‧‧‧輸出纜線K1, K2‧‧‧ output cable

C‧‧‧陰極電極C‧‧‧Cathode electrode

D‧‧‧驅動手段D‧‧‧ drive means

D1‧‧‧驅動軸D1‧‧‧ drive shaft

S‧‧‧基板S‧‧‧Substrate

Claims (7)

一種薄膜形成方法,係為一面將濺鍍氣體以及反應氣體導入至真空氛圍中之濺鍍室內,一面對於在濺鍍室內而與應處理之玻璃基板作對向配置的標靶投入電力,而藉由電漿氛圍中之離子來對標靶作濺鍍,以藉由反應性濺鍍來在玻璃基板表面上形成特定的薄膜之薄膜形成方法,其特徵為:在直到前述薄膜達到了特定之膜厚為止的期間中,形成反應氣體成分之含有濃度為高之區域。 A method for forming a thin film by introducing a sputtering gas and a reaction gas into a sputtering chamber in a vacuum atmosphere, and applying electric power to a target disposed opposite to a glass substrate to be processed in a sputtering chamber. A method of forming a thin film on a surface of a glass substrate by reactive sputtering by ionizing ions in a plasma atmosphere, characterized in that a film thickness is reached until the film reaches a specific film thickness In the period until the end, a region in which the concentration of the reaction gas component is high is formed. 如申請專利範圍第1項所記載之薄膜形成方法,其中,前述含有濃度為高之區域的形成,係藉由在濺鍍中,一面將導入至濺鍍室內之反應氣體的流量保持為一定,一面將對於標靶之投入電力從高電力而切換至低電力來進行。 The method for forming a thin film according to the first aspect of the invention, wherein the formation of the region having a high concentration is such that the flow rate of the reaction gas introduced into the sputtering chamber is kept constant during sputtering. The switching of the input power to the target is performed from high power to low power. 如申請專利範圍第2項所記載之薄膜形成方法,其中,將前述投入電力之切換,以一定之週期來進行。 The method for forming a thin film according to the second aspect of the invention, wherein the switching of the input electric power is performed in a predetermined cycle. 如申請專利範圍第1項所記載之薄膜形成方法,其中,前述含有濃度為高之區域的形成,係藉由在濺鍍中,一面將對於標靶之投入電力保持為一定,一面將導入至濺鍍室內之反應氣體的流量從低流量而切換至高流量來進行。 The method for forming a thin film according to the first aspect of the invention, wherein the formation of the region having a high concentration is introduced into the sputtering device while maintaining the input power to the target. The flow rate of the reaction gas in the sputtering chamber is switched from a low flow rate to a high flow rate. 如申請專利範圍第4項所記載之薄膜形成方法,其 中,將前述反應氣體供給量之增加,以一定之週期來進行。 a method for forming a film according to item 4 of the patent application, which In the meantime, the increase in the supply amount of the reaction gas is performed in a predetermined cycle. 如申請專利範圍第1項乃至第5項中之任一項所記載之薄膜形成方法,其中,將前述標靶藉由在濺鍍室內空出有特定之間隔而並列設置之具備有相同組成的複數枚之標靶來構成,並將前述反應氣體先在標靶之背面側的空間處一旦使其擴散,而後再通過各標靶相互間之間隙而朝向基板作供給。 The method for forming a thin film according to any one of claims 1 to 5, wherein the target has the same composition by being placed in a predetermined interval in the sputtering chamber. A plurality of targets are formed, and the reaction gas is first diffused in a space on the back side of the target, and then supplied to the substrate through a gap between the targets. 一種薄膜形成方法,其特徵為,包含有:作為反應氣體而使用包含有氧者,並藉由上述申請項1乃至申請項5中之任一項所記載之薄膜形成方法,來在基板表面上形成包含有Cu之氧化物膜的工程;和在此氧化物膜表面,藉由PVD法而形成包含有Cu之金屬膜的工程;和在此金屬膜表面上,使用特定之製程氣體而藉由CVD法來形成絕緣膜的工程。 A method of forming a film, comprising: using a method of forming a film according to any one of the above-mentioned items 1 to 5, on the surface of the substrate Forming an oxide film containing Cu; and forming a metal film containing Cu on the surface of the oxide film by a PVD method; and using a specific process gas on the surface of the metal film The CVD method is used to form an insulating film.
TW097130421A 2007-08-10 2008-08-08 Film forming method TWI433950B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007208789A JP5186152B2 (en) 2007-08-10 2007-08-10 Thin film formation method

Publications (2)

Publication Number Publication Date
TW200912022A TW200912022A (en) 2009-03-16
TWI433950B true TWI433950B (en) 2014-04-11

Family

ID=40350627

Family Applications (1)

Application Number Title Priority Date Filing Date
TW097130421A TWI433950B (en) 2007-08-10 2008-08-08 Film forming method

Country Status (5)

Country Link
JP (1) JP5186152B2 (en)
KR (1) KR101209019B1 (en)
CN (1) CN101778962B (en)
TW (1) TWI433950B (en)
WO (1) WO2009022573A1 (en)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5339965B2 (en) 2009-03-02 2013-11-13 株式会社アルバック AC power supply for sputtering equipment
JP5604056B2 (en) * 2009-05-15 2014-10-08 関東化学株式会社 Etching solution for copper-containing laminated film
WO2012157202A1 (en) * 2011-05-13 2012-11-22 シャープ株式会社 Thin film-forming method
CN102978570B (en) * 2012-11-26 2014-10-08 蔡莳铨 Metal evaporation film and intermediate for preparing metal evaporation film and related preparation method of metal evaporation film
CN104064454A (en) 2014-06-11 2014-09-24 京东方科技集团股份有限公司 Thin film and array substrate preparation method and array substrate
KR101673224B1 (en) * 2014-11-17 2016-11-16 전영권 Solar cells and manufacturing method for the same
KR102376098B1 (en) * 2018-03-16 2022-03-18 가부시키가이샤 알박 film formation method

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63114965A (en) * 1986-11-01 1988-05-19 Tosoh Corp Production of laminated film
JP2001192822A (en) 2000-01-07 2001-07-17 Nippon Sheet Glass Co Ltd Film deposition method, and article obtained by the same
JP4071020B2 (en) * 2002-03-18 2008-04-02 株式会社アルバック Photocatalyst layer forming method
JP4780972B2 (en) * 2004-03-11 2011-09-28 株式会社アルバック Sputtering equipment
JP2006302975A (en) * 2005-04-15 2006-11-02 Toshiba Corp Semiconductor device and manufacturing method thereof
JP4669992B2 (en) * 2005-09-28 2011-04-13 Dowaホールディングス株式会社 Nitrogen-containing chromium coating, method for producing the same, and mechanical member
CN1966758A (en) * 2005-11-18 2007-05-23 电子科技大学 Process for preparing vanadium oxide film
JP5291907B2 (en) * 2007-08-31 2013-09-18 株式会社アルバック Sputtering equipment

Also Published As

Publication number Publication date
CN101778962A (en) 2010-07-14
JP2009041082A (en) 2009-02-26
TW200912022A (en) 2009-03-16
WO2009022573A1 (en) 2009-02-19
KR101209019B1 (en) 2012-12-10
JP5186152B2 (en) 2013-04-17
CN101778962B (en) 2012-11-28
KR20100041821A (en) 2010-04-22

Similar Documents

Publication Publication Date Title
KR101196650B1 (en) Sputtering apparatus
TWI433950B (en) Film forming method
TWI427170B (en) Film forming method and thin film forming apparatus
TWI401333B (en) Sputtering apparatus and sputtering method
TWI593819B (en) Sputtering method
KR101050121B1 (en) Sputtering Device and Sputtering Method
JP5322234B2 (en) Sputtering method and sputtering apparatus
TWI518194B (en) Sputtering method
TWI393797B (en) Sputtering electrodes and sputtering devices with sputtering electrodes
TWI444490B (en) Sputtering method
KR102123455B1 (en) Sputtering apparatus and method for sputtering of oxide semiconductor material
TW201131004A (en) Magnet unit for magnetron sputtering electrode and sputtering device
TWI736839B (en) Film forming method
KR20070021919A (en) Sputter electrode and sputtering apparutus having the sputter electrode