TW200905905A - Method of manufacture of light emitting diode - Google Patents

Method of manufacture of light emitting diode Download PDF

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Publication number
TW200905905A
TW200905905A TW096126250A TW96126250A TW200905905A TW 200905905 A TW200905905 A TW 200905905A TW 096126250 A TW096126250 A TW 096126250A TW 96126250 A TW96126250 A TW 96126250A TW 200905905 A TW200905905 A TW 200905905A
Authority
TW
Taiwan
Prior art keywords
light
emitting diode
manufacturing
metal layer
wafer
Prior art date
Application number
TW096126250A
Other languages
Chinese (zh)
Inventor
Chih-Yung Ting
Original Assignee
Lee Ko Hsin
Sun Tseng Pao
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lee Ko Hsin, Sun Tseng Pao filed Critical Lee Ko Hsin
Priority to TW096126250A priority Critical patent/TW200905905A/en
Priority to GB0812352A priority patent/GB2451168B/en
Priority to DE102008032170A priority patent/DE102008032170A1/en
Priority to FR0803972A priority patent/FR2919116A1/en
Publication of TW200905905A publication Critical patent/TW200905905A/en

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0201Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203Cooling of mounted components
    • H05K1/0209External configuration of printed circuit board adapted for heat dissipation, e.g. lay-out of conductors, coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/58Optical field-shaping elements
    • H01L33/60Reflective elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/64Heat extraction or cooling elements
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0201Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203Cooling of mounted components
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H01L2224/48228Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item the bond pad being disposed in a recess of the surface of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00011Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0033Processes relating to semiconductor body packages
    • H01L2933/0075Processes relating to semiconductor body packages relating to heat extraction or cooling elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/483Containers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/05Insulated conductive substrates, e.g. insulated metal substrate
    • H05K1/056Insulated conductive substrates, e.g. insulated metal substrate the metal substrate being covered by an organic insulating layer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09781Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007Types of components
    • H05K2201/10106Light emitting diode [LED]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10954Other details of electrical connections
    • H05K2201/10969Metallic case or integral heatsink of component electrically connected to a pad on PCB
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/20Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
    • H05K2201/2054Light-reflecting surface, e.g. conductors, substrates, coatings, dielectrics

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Led Device Packages (AREA)

Abstract

This invention relates to a method of manufacture of a light emitting diode and more particularly to a manufacturing method which may facilitate heat dissipation and light utilization of a chip, the method including: disposing an etched circuit metal layer on a surface of a highly heat conductive substrate; covering the circuit metal layer with a soldering-proof protection film and exposing necessary wire bonding regions; performing a high-reflection surface treatment to an area between wire bonding regions to form a chip-embedded region; bonding the light emitting diode chip in the chip-embedded region; electrically connecting the chip to the solder-joints of the wire bonding regions with wires; and coating an adhesive on the surface of the entire substrate including the chip-embedded region and the wire bonding regions, to accomplish a chip wiring process which is followed by a packaging operation of the light emitting diode. Therefore, good heat conduction is provided, the light extraction effect of reflection is improved, and the utility of the light emitting diode is increased.

Description

200905905 九、發明說明: 【發明所屬之技術領域】 曰本發明係提供—種發光二極體之製造方法,尤指可輔助 曰曰片快速散熱及提高歧射效能之製造方法,為利用植晶區 之金屬層辅U達到橫向擴散之散熱、且藉由其高反射表 面以提高光利用率,並可增益發光二極體出光之實用效能。 【先前技術】 按’由於現今高科技的蓬勃發展,許多科技產品都具有 相當卓越的功能,不論是卫作上或日常生活中,科技產品提 供^者在使懸品時的快速與便捷,也彡丨領人們享有科技 產—來的舒献活,在各式各樣的科技產品裡,普遍裝設 ^曰片封衣7L件,以增韻品之功能’傳統晶#採直接封裂 =lp 〇n B〇ard;簡稱c〇B),是積體電 美/相—種方式,其將裸晶片直接㈣、雕於印刷電路 細上,並結合有三項基本縣:晶㈣植、導線連接 =護等,可有效將ί㈣造過程中的封裝與測試步驟,直 妾轉制電路板絲階段,這種封料術其實是小型化的表 =者技術,至於魏料部相_導線將晶片的_ ^到電祕絲板之接虹,形錢路賴 封膠技術予以覆蓋。 ‘用 而傳統晶片之JL接封裝(c ◦ β )結構,若以發光晶月 200905905 視c’r閱第七圖所示,係細發光物之側 爲3心定位於金職㈣(錄板或銅基板 層之固晶位置31上,並由上連接導線200905905 IX. INSTRUCTIONS: [Technical Fields According to the Invention] The present invention provides a method for manufacturing a light-emitting diode, and more particularly to a manufacturing method capable of assisting rapid heat dissipation of a chip and improving the efficiency of the beam. The metal layer auxiliary U of the region reaches the heat dissipation of the lateral diffusion, and the high-reflection surface thereof improves the light utilization efficiency, and can gain the practical performance of the light-emitting diode light-emitting. [Prior Art] According to the booming of today's high-tech, many technology products have quite excellent functions. Whether it is in the work or in daily life, the technology products provide the quick and convenient time to make the suspension. In the various kinds of scientific and technological products, the 曰 活 活 , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Lp 〇n B〇ard; abbreviated as c〇B), is an integrated body of the United States / phase - the way, the bare wafer directly (four), carved on the printed circuit, and combined with three basic counties: crystal (four) plant, wire Connection = protection, etc., can effectively carry out the packaging and testing steps in the process of manufacturing, and directly convert the circuit board to the wire stage. This kind of sealing technology is actually a miniaturized table technology. As for the wafer phase, the wire will be wafer The _ ^ to the electric wire board to pick up the rainbow, the shape of the money Lai sealing technology to cover. 'Use the traditional chip JL package (c ◦ β) structure, if the light crystal moon 200905905 see c'r as shown in the seventh figure, the side of the fine illuminant is 3 hearts positioned in the gold position (four) (recording board) Or the solid crystal position 31 of the copper substrate layer, and the upper connecting wire

2至絕緣層β4上之焊_2、B3,再於金屬A 板B表面封裝膠劑c,而完成 ^ 遭並盔輔肋枵舶—碰^ 而日日片A周 1辅助辦之般,致使賴能力降低,麟 斷畜熱而影響產品之可靠性。 里而如弟八圖所不,係為另一習用發光晶片封裝之側視剖 面圖,其將晶片A穿過絕緣層B 4之洞孔β 5直奴位於全 屬基板B上,並由上連設導線A1、A2至焊塾Μ 、B 3 ’於晶片A外封裝膠劑C,即完成另-發光晶片A封 裝’雖可將“ A所產生之熱傳遞至金屬基板3上,但表面 反射能力差。 < 晶片A固植於防銲保護層之固晶位置3丄上,在發光 4 ’其所產生之熱不諸散,财部份熱能以縱向方 式經金屬基板B向外擴散,使得晶片A因散熱差而導 致溫度升高’影響其效能及使用壽命。 晶片A固植於下挖至金屬基㈣之圓孔,其發光時因 輔助其反射光線的設計差,導致晶片A的亮光大多被 金屬吸收或散射後陷於凹凸不平之表面,並無法提^ 亮度,且出光效果差。 200905905 疋以’針對導熱良好、快速散熱、發光亮度提高之整體 構ie叹。十及製造方法等考量’即為從事此產業之相關廠商所 亟欲研究改善之方向所在。 【發明内容】 故,發明人有鑑於上述缺失,乃搜集相關資料,經由多 ^平估及考1,並以從事於此行業累積之多年經驗,經由不 斷式作及I改,始设计出此種可增益發光亮度之發光二極體 之製造方法的發明專利者。 本發明之主要目的乃在於其製造方法之流程,係將於熱 傳導效能之基板表_設電路層,再於電路金屬層上以钱刻 2工作業形成至少一個以上之銲線區,且銲線區周邊之電路 A屬層上進行高反射表面作飾成植晶區,即可於植晶區内 固植發光二極體晶# ’並彻導線將“分別作電性連接至 鋒線區之銲點上,再將整體基板表面,含植晶區、銲線區進 行k佈膠劑之加工作業,以完成發光二極體之晶片封裝,並 達到政熱良好、提高光反射率之出級果之目的,並能增益 發光二極體之實用效能。 曰皿 【實施方式】 為達成上述目的及功效,本發明所採用之技術手段及其 構造,就本發明之齡實施辯加_其特徵與功能 如下,俾利完全瞭解。 200905905 請參閱第-、二、三圖所示,係為本發明之製造方法流 程圖、立體分解圖、立體外觀圖,由圖中所示可崎楚看^ ,本發明發光二極體之製造方法,至少包括有基板丄、高軌 傳導絕緣層2、電路金屬層3、、防銲保護膜層5等 所組成’其製造方法之流程可為: (1〇〇)將具有高度熱傳導效能之基,於其表面為附 設有熱傳導良好之絕緣層2。 (1〇1)再於絕緣層2上固設已預設電路佈局電路金屬層 3,且電路金屬層3材質多為銅箔3工。 (1 0 2 )基板1上方之電路金屬層3進練刻加工作業, 形成露出基板1表面之銲線區32,而位於鲜線 區3 2周邊固植發光二極體晶片位置的區域,即 口又為植晶區3 3 〇 (1 0 3 )則可於植晶區3 3的表面,進行高統射表面處 理之加工作業。 (10 4)且在電路金屬層3的表面植晶區3 3上,固植發 光二極體晶片4。 0 5 )在曰曰片4上利用導線4 1分別電性連接至銲線區 3 2内。 (1〇 6) %成發光二極體之晶片4佈線後,即可進行後續 的封裝之加工作業。 200905905 这本毛月之製造方法,其發光 ,係為具冑賴料效能U推p騎制之基板1 傳導阿私翁f或具高熱 傳導效此之非金屬材質;而於 屬,3,利用_ 、板1、絕緣層2上的電路金 屬層3 _蝕刻所形成至少一個 電路金屬層3表面形成植曰μ q 知線& 3 2,亚在 拋#力工心 33,則可於植晶區33利用 也先加工、鑛加工或濺鑛加工等 理加工作業,且其電鑛加工 = 丁而光反射表面處 電鑛銀白W侧,祕吻=糊材質表面 鉻或鍍紹等電鑛作業。 “之材質則可為鍍銀、鑛 極分佈方式的不同,植晶區⑹亦可覆以一 高_導之漆料、防鲜漆或膠料之膜 曰,且糾、麵之相基幻表轉 保護膜層5,則可視發光二極料良好之_ 曰區m心 娜曰曰片4電極分佈方式,其植 Ί原來之電路金屬層3表面,或進—步塗佈有 熱傳導良好之防銲保護膜層5。 怖有 請參閱第三、四圖所示,筏 、係為本發明立體外觀圖、第三 圖之A-A杳j面圖’於電路 — 片4的植曰iFJ 9 i 、,屬g 3表面形成可供固植晶 ’雜晶區3 3的面積係至少五倍於曰片 4的面積,且植晶區3 3 於曰曰片 片4之亮光,再反射表面處理,係可反射晶 加工㈣/ 行設置防銲保護膜層5之 乍業,係可於電路金屬層3表面塗佈有白色系、具高熱 200905905 料ym、防銲漆或膠料所形成之防銲保護膜層5,且防 銲保護膜層5具高熱傳導之漆料、畴漆或膠料,係為具有 二化=^2〇3)、氧化鋅(以〇)、氮化硼(训 —減鈦(τ 1 〇2 )等化合物之材質,而形成白色系 式之防雜護财5,並具有良好狀射树之出光效果 〇 h閱第―、四、五圖所示,係為本發明之立 吾第三圖之A—A,勤圖、俯視圖,由圖中所示可以= 本毛月之兔光一極體晶片4,係固植於電路金屬層3 上’則可在晶片4使用時因發光而產生熱能,將 曰曰片4產生的熱能藉由電路金屬層3之_31,往橫向的 7週擴散熱能,以辅助晶片4達到快速的散熱功效,並可 2防止⑼4因熱能集聚而影響其使用效能;且電路金屬 層3上所形成之銲線區32、植晶區33,再於銲線區π ώ植晶區33之外側週邊,為塗佈有防鮮保護膜層5,則藉 護膜層5之漆料、防銲漆或膠料所添加之白色系高 了可,力植晶區3 3的晶片键,並可 曰曰4¾光…以植晶區3 3之高光反射表面處理、配合 ^呆護膜層5而形成良好的亮光反射效能,將晶片4的發 ^⑽出外部’而能提高晶片4的發光利用率、提昇出光功 猎以提升發光二極體的實用功效、延長其使用壽命,且 200905905 更符合經濟效益。 再清麥閱第三、五、六所示係為本發明之立體外觀 舰圖、較佳實施例之側視剖關,_中所示可以^ 出,本發明之基W、絕緣層2上的電路 = =加工方式,製成單一個銲線區32,並保留= 32外的固植晶片位置之電路金屬層3 片4面積之植晶區3 3,且植晶區 曰 理,則於植晶區33固植晶片4後,利^ j4l_接於銲線區3 2,再於整體基板i之表面塗佈 有防銲保護膜層5,則藉由防銲保護膜層5之漆料、防聯 或膠料所含之白色系高埶傳導 ' h,、、科化合物’除了可以辅助植晶區 1的^ 4勝並恤物树,以植晶區3 3之 =反射表_、配合__ 5而形成_光反 射起,將晶片4的光反射出外部 利用率、使嫩她。u4的發光 ^以’上述本發批發光二極體之魏方法,係在基板 晶 電路金屬層3的_31,形成植晶區33以可供植設2 to the solder layer _2, B3 on the insulating layer β4, and then encapsulate the glue c on the surface of the metal A board B, and complete the ^ 遭 盔 辅 辅 辅 辅 而 而 而 而 而 而 而 而 而 而 而 而 日 日 日 日 日 日 日 日 日 日 日 日As a result, the ability to reduce the ability to reduce the heat of the product and affect the reliability of the product. In the same way as the other, it is a side cross-sectional view of another conventional light-emitting chip package, which passes the wafer A through the hole β 5 of the insulating layer B 4 and is located on the entire substrate B. Connecting the wires A1, A2 to the solder 、, B 3 'packaging the adhesive C outside the wafer A, that is, completing the other-light-emitting wafer A package', although the heat generated by "A" can be transferred to the metal substrate 3, but the surface The reflection ability is poor. < Wafer A is fixed on the solid crystal position 3丄 of the solder resist layer, and the heat generated in the light 4' is not scattered, and the heat is diffused outward through the metal substrate B in the longitudinal direction. Therefore, the temperature rise of the wafer A due to poor heat dissipation' affects its performance and service life. The wafer A is fixed in a circular hole that is dug down to the metal base (4), and the light-emitting design is poor in assisting the light reflected by the wafer A. Most of the light is absorbed or scattered by the metal and then trapped on the uneven surface, and the brightness is not improved, and the light output is poor. 200905905 疋 ' 针对 针对 针对 针对 针对 针对 针对 针对 针对 针对 针对 针对 针对 针对 针对 针对 针对 针对 针对 针对 针对 针对 针对 针对 针对 针对 针对 针对 针对 针对 针对 针对 针对 针对 针对 针对 十Etc. 'is related to the industry The manufacturer is eager to study the direction of improvement. [Invention] Therefore, in view of the above-mentioned shortcomings, the inventors collected relevant information, passed the assessment and test 1, and accumulated many years of experience in the industry. The invention and the I modification, the invention patent of the manufacturing method of the light-emitting diode capable of gaining the luminous brightness. The main purpose of the invention is the flow of the manufacturing method, which is the substrate table of the heat conduction performance _ The circuit layer is formed, and at least one wire bonding area is formed on the circuit metal layer by the money engraving 2 work, and the high reflection surface is arranged on the circuit A layer around the bonding wire area to be decorated into the crystallization zone. The illuminating diode body is fixed in the crystallization area and the wire is electrically connected to the solder joints of the front line area, and then the whole substrate surface, including the crystallization area and the bonding line area, is used for k-dispersion. The processing operation is completed to complete the chip package of the light-emitting diode, and achieve the purpose of good political heat and improved light reflectivity, and can enhance the practical performance of the light-emitting diode. [Embodiment] In order to achieve the above object and effect, the technical means and structure of the present invention are applied to the implementation of the age of the present invention. The features and functions thereof are as follows, and the benefits are fully understood. 200905905 Please refer to the first, second and third figures, which is a flow chart, an exploded view and a three-dimensional external view of the manufacturing method of the present invention, which can be seen from the figure, and the manufacture of the light-emitting diode of the present invention. The method comprises at least a substrate 丄, a high-rail conductive insulating layer 2, a circuit metal layer 3, a solder resist film layer 5, etc. The flow of the manufacturing method can be: (1〇〇) will have high heat conduction performance The base is provided with an insulating layer 2 with good heat conduction on its surface. (1〇1) The predetermined circuit layout circuit metal layer 3 is fixed on the insulating layer 2, and the circuit metal layer 3 is mostly made of copper foil. (1 0 2 ) The circuit metal layer 3 above the substrate 1 is subjected to a processing operation to form a bonding wire region 32 exposing the surface of the substrate 1, and a region where the position of the light-emitting diode wafer is fixed around the fresh-line region 32, that is, The mouth is also a crystallization zone 3 3 〇 (1 0 3 ), which can be processed on the surface of the phytocrystallized zone 3 3 . (10 4) and on the surface seeding region 3 3 of the circuit metal layer 3, the light-emitting diode wafer 4 is fixed. 0 5 ) The wires 4 1 are electrically connected to the bonding wire region 3 2 on the cymbal 4, respectively. After (1〇6) % of the wafer 4 of the light-emitting diode is wired, the subsequent packaging processing can be performed. 200905905 The manufacturing method of this Maoyue, its illuminating, is based on the performance of the U-pushing substrate, the conduction of the scorpion f or the non-metallic material with high thermal conductivity; and the genus, 3, the use _, board 1, circuit metal layer 3 on the insulating layer 2 _ etching formed at least one circuit metal layer 3 surface forming a planting 曰 μ q know line & 3 2, Ya in throwing #力工心33, then can be planted The crystal zone 33 utilizes processing operations such as processing, ore processing or splashing processing, and its electric ore processing = electric light and silver white W side on the surface of the light reflecting surface of the light, and the electric mine operation such as chromium or plating on the surface of the paste material. "The material can be silver-plated and the distribution of the ore is different. The planting area (6) can also be covered with a high-grade paint, anti-fresh paint or film of the rubber, and the phase of the face The surface of the protective film layer 5, the visible light-emitting diode is good _ 曰 m 心 心 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 Anti-welding protective film layer 5. For the horror, please refer to the third and fourth figures, 筏, is the three-dimensional appearance of the invention, the third drawing of the AA杳j surface drawing 'in the circuit - the planting of the sheet 4 iFJ 9 i , the surface of the g 3 surface is formed to be solid crystal, the area of the heterogeneous region 3 3 is at least five times the area of the crotch sheet 4, and the epitaxial region 3 3 is bright on the chopping sheet 4, and the reflective surface treatment is performed. , can be reflective crystal processing (four) / line set of anti-welding protective film layer 5, can be coated on the surface of the circuit metal layer 3 with white, with high heat 200905905 material ym, anti-welding paint or rubber formed by the defense The protective film layer 5 is welded, and the solder resist film layer 5 has a high heat-transfer paint, domain paint or rubber, and has a zinc oxide = zinc dioxide (for ), boron nitride (training - reducing titanium (τ 1 〇 2) and other compounds, and forming a white line of anti-mixing wealth 5, and has a good shape of the tree light effect 〇 h read the first -, four, As shown in the fifth figure, it is the A-A of the third figure of the present invention, the diligent diagram and the top view, as shown in the figure, the rabbit photo-polar wafer 4 of the Maoyue is fixed in the circuit metal layer. 3 'on' can generate thermal energy due to illuminating when the wafer 4 is used, and the thermal energy generated by the cymbal 4 is diffused by the _31 of the circuit metal layer 3 to the lateral 7 weeks to assist the wafer 4 to achieve rapid heat dissipation. Efficacy, and 2 prevents (9) 4 from affecting the use efficiency due to thermal energy accumulation; and the bonding wire region 32, the crystallization region 33 formed on the circuit metal layer 3, and then the outer periphery of the bonding region π ώ crystallization region 33, In order to apply the anti-fresh protective film layer 5, the white color added by the paint, the solder resist or the rubber compound of the adhesive film layer 5 is high, and the wafer bond of the crystal region 3 3 is strong, and 43⁄4 light... The high-light reflection surface treatment of the crystallization area 3 3 is combined with the film layer 5 to form a good light reflection performance, and the wafer 4 is emitted. Out of the 'can improve the light-emitting utilization of the wafer 4, enhance the light-powered hunting to enhance the practical effect of the light-emitting diode, and extend its service life, and 200005905 is more economical. Re-clearing the third, fifth and sixth The invention is a three-dimensional appearance ship chart of the present invention, and a side view of the preferred embodiment, which can be shown in the figure _, the circuit W of the invention, the circuit on the insulating layer 2 = = processing mode, made into a single one The wire bonding area 32, and retaining the circuit metal layer 3 of the solidified wafer position outside the 32, and the crystallization area 3 of the 4 area, and the crystallization area is processed, after the wafer 4 is fixed in the crystallization area 33, ^ j4l_ is connected to the bonding wire region 32, and the surface of the whole substrate i is coated with the solder resist film layer 5, and the white paint contained in the paint, the anti-tie or the rubber compound of the solder resist layer 5 The sorghum conduction 'h,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, The light of the wafer 4 is reflected out of the external utilization rate to make it tender. The luminescence of u4 is formed by the above-mentioned method of the wholesale photodiode of the present invention, which is formed in the _31 of the metal layer 3 of the substrate crystal circuit to form a crystallization region 33 for planting.

’且植晶區33利用高光反射表面處理,並可進一步 在基板1表面塗佈防銲保護膜声R 敎 干仟賴層5,而能辅助晶片4快速散 了“ 之目的’非因此即舰本發明之專利範圍 而使s日片4在銅&3 i具有橫向擴散排熱的效能、晶片 200905905 4七光¥可糟由植晶區3 2之高歧射表面處理與防銲保護 膜層5之白色系,所共同產生的良好反射光線之出光特性, 可使晶片4發光時具良賴熱_,碑益其贱利用率的 反射效能’以有效提昇晶片4的使㈣效,故舉凡運用本發 明說明書及圖式内容所為之簡易修飾及等效結構變化,摘 同理包含於本發明之專利範圍内,合予陳明。 〜 上述本發明之發光二極體之製造方法於實際使用時,為 具有下列各項優點,如: (-)晶片4發光時’可透過電路金屬層3之銅箱3工以橫 向擴散式的排散熱能,並利用基板1、防銲保護膜層 5等具高熱傳導作用材f,輔助晶片顿熱,而使晶 片4具有良好的散熱效能。 (二)電路麵層3之植晶區33_過高狀射表面處理 ,再搭配基板1表面塗佈之白色系防輝保護膜層5, 而具有良好的光反射效能,可在晶片4發光時,由植 晶區3 3及防輝保護膜層5辅助反射光線,以提高晶 片4之發光利用率’增益其出光效能。 三)晶片4具有良好的散熱效用’並可產生增益發光之反 射效能,而可提升發光二極體的實用功效、亦可增長 其使用壽命,更符合經濟效益。 故’本翻為主要針對發光二極體之晶㈣散熱、高光 200905905 織’㈣嶋墙層,面辅助晶片 ::::歧射表面處理及可進—步塗佈白色系防銲 保相層可反射錢紅要倾魅,使以郭光時 所產生之熱能,麵銅純與防録保護膜層輔助躺^利 用_保_層所添加之白色綺f,達到提高光反射率、 =發光、出光效能之優勢’惟,以上所述僅為本發明之較 =關而已,非因此即舰本發明之專利範圍,故舉凡運 用本發明㈣書及_内容所為之及等效結 ’均應同縣含财剌之專纖朗,合予陳明。 綜上所述,本發明上述之發光二極體之製造方法於實施 用運用時,柄實能達到其功效及目的,故本發明誠為_;實 :性優異之發明,為符合㈣專叙申請要件,纽法提出 ^月,盼•委早日賜准本案,以保障發明人之辛苦研發, 倘若釣局審委有任何稽疑,請不吝來函指示,發明人定當 竭力配合,實感德便。 13 200905905 【圖式簡單說明】 第一圖係為本發明之製造方法流程圖。 第二圖係為本發明之立體分解圖。 第三圖係為本發明之立體外觀圖。 第四圖係為本發明第三圖之A — A’剖面圖。 第五圖係為本發明之俯視圖。 第六圖係為本發明較佳實施例之側視剖面圖。 第七圖係為習用發光晶片封裝之侧視剖面圖。 第八圖係為另一習用發光晶片封裝之側視剖面圖。 【主要元件符號說明】 1、 基板 2、 絕緣層 3、 電路金屬層 31、銅fl 33、植晶區 3 2、銲線區 14 200905905 4、 晶片 4 1、導線 5、 防銲保護膜層 A、 晶片 A 2、導線 B 4、絕緣層 B 5、洞孔 A 1、導線 B、 金屬基板 B 1、防銲保護層之固晶位置 B 2、焊墊 B 3、焊墊 C、 膠劑 15'And the crystallizing area 33 is treated with a high-light reflective surface, and the surface of the substrate 1 can be further coated with a solder resist film R R dry layer 5, which can assist the wafer 4 to quickly disperse the purpose of the ship. The patent scope of the invention enables the s-day film 4 to have the effect of lateral diffusion heat removal in the copper & 3 i, the wafer 200905905 4 七光光, the high-dissection surface treatment and the solder mask of the crystallization zone 32 The white color of the layer 5, the light-emitting characteristics of the well-reflected light produced together, can make the wafer 4 have a good heat when it emits light, and the reflection efficiency of the utilization of the wafer is effectively improved to improve the effect of the wafer 4 (four). The simple modification and equivalent structural changes which are made by using the specification and the contents of the present invention are included in the scope of the patent of the present invention and are combined with Chen Ming. The manufacturing method of the above-mentioned light-emitting diode of the present invention is practical. In use, it has the following advantages, such as: (-) When the wafer 4 emits light, the copper box 3 that can pass through the circuit metal layer 3 can dissipate heat in the lateral diffusion type, and utilize the substrate 1 and the solder resist layer. 5, etc. with high heat conduction material f, auxiliary The wafer is heated up, so that the wafer 4 has good heat dissipation performance. (2) The crystallized region 33_ of the circuit surface layer 3 is processed by the surface of the substrate, and the white anti-glaze protective film layer 5 is coated on the surface of the substrate 1. And having good light reflection performance, when the wafer 4 emits light, the crystallized area 3 3 and the anti-glare protective film layer 5 assist in reflecting light to improve the light-emitting utilization of the wafer 4 to gain its light-emitting efficiency. 4 has a good heat dissipation effect' and can produce the reflection effect of gain illuminance, which can improve the practical effect of the light-emitting diode, and can also increase its service life, which is more economical. Therefore, this is mainly for the light-emitting diode. Crystal (4) Heat Dissipation, High Light 200905905 Weaving '(4) 嶋 Wall Layer, Surface Auxiliary Wafer::::Disparity Surface Treatment and Progressive Step Coating White Anti-welding Phase Protection Layer Can Reflect Money Red to Embrace, Make Guo Guangshi The generated thermal energy, the surface copper pure and the anti-recording protective film layer are used to assist the lie, and the white 绮f added by the _保_ layer is used to improve the light reflectivity, the illuminating and the light-emitting efficiency. The comparison of the present invention is only Therefore, the scope of the patent of the present invention is the same as that of the invention, and the equivalent of the book and the contents of the invention shall be the same as that of the county. When the manufacturing method of the above-mentioned light-emitting diode is used for implementation, the handle can achieve its efficacy and purpose, so the invention is sincerely true; the invention of the invention is excellent in conformity with the requirements of (4) specialization application, New Zealand proposed ^ In the month, I hope that the committee will grant this case as soon as possible to protect the hard work of the inventor. If there is any doubt in the Bureau of the fishing bureau, please do not hesitate to give instructions to the inventor, and the inventor will try his best to cooperate with him. 13 200905905 [Simplified illustration The first drawing is a perspective view of a manufacturing method of the present invention. The second drawing is an exploded perspective view of the present invention. The third drawing is a three-dimensional external view of the present invention. The fourth drawing is a cross-sectional view of A-A' of the third drawing of the present invention. The fifth drawing is a plan view of the present invention. Figure 6 is a side cross-sectional view of a preferred embodiment of the present invention. The seventh figure is a side cross-sectional view of a conventional light emitting chip package. Figure 8 is a side cross-sectional view of another conventional light emitting chip package. [Description of main component symbols] 1. Substrate 2, insulating layer 3, circuit metal layer 31, copper fl 33, crystallization region 3, bonding wire region 14 200905905 4. Wafer 4 1 , wire 5, solder resist film layer A , wafer A 2, wire B 4, insulating layer B 5, hole A 1 , wire B, metal substrate B 1 , solid crystal position B of solder resist layer 2, pad B 3 , pad C, glue 15

Claims (1)

200905905 十、申請專利範圍: 1種魚光-極體之製造方法,尤指具有良好散熱功能並可提 高發光反神讀造方法,其製造方法之流程係可為: (-)具高度熱料效能之基板,表面為附設有熱傳導良好 之絕緣層; (二)再於絕緣層上固設電路金屬層; (二)基板上方之電路金屬層進行_加工作業,形成露出 基板表面之銲絲,而於_發光二極體晶片位置之 電路金屬層的保留區域,不予_去除即設為植晶區 _ ^叫适仃向无反射表面處理作業; (五) 於植晶區内固植發光二極體晶片; (六) 在晶片上利用導線分別電性連接至鮮線區; 2 (七) 完成發光二極體之晶片佈線。 、^請專利範圍第1項所述發光二極體之製造方法,其中該 =内:露出之電路金屬層表面,則可利用拋光加工、電 ,又且 1植方式進行高光反射表面處理的加工作業 可進一步塗佈轉保護膜層之加工作業邊〃卜路之表面, 如申請專利範圍苐2項 知尤一極體之製造方法,苴中唁 …工觸可軸銀㈣之_層,祕白色系^ 16 200905905 材貝則可為鍍銀、鑛鉻或鑛銘等電鑛作業。 4、 如申請專利範圍第h所述發光二極體之製造方法,其中兮 基板係可為高度熱轉導漏,而高度熱能料材料係4 金屬材質或具高熱傳導效能之非金屬材質。 σ為 5、 如申請專纖_4項所述發光二極體之製造方法, 電路金屬層表面為塗佈有白色系之防娜護膜層,係;5亥 高熱傳導之漆料或膠料。 马〃、 6、 如申請專利範_ 5顧述發光二極體之製造方法, 具高熱傳導之漆料或膠料,係為具有氧化銘(Α丨2〇〇 3亥 氧化辞(Ζ η 〇)、氮化蝴(Β Ν)和二氧化鈦(丁/ )等化合物之材質。 2 7、 如申請翻範_卜騎述發光二極體之製造方法, 晶片位置下方的電路金屬層之植晶區,其面積;;;; 於晶片之面積。 1σ 8、如申請專利範圍料項所述發光二極體之製造方法,其幢 電路金屬層為可_侧加工作#,形成至少—個以上 基板表面之銲線區。 5 17200905905 X. Patent application scope: 1 method for manufacturing fish-polar body, especially for having good heat dissipation function and improving illuminating anti-theft method. The manufacturing process can be: (-) with high heat efficiency The substrate is provided with an insulating layer with good heat conduction; (2) the circuit metal layer is fixed on the insulating layer; (2) the circuit metal layer above the substrate is processed to form a wire exposing the surface of the substrate, and The reserved area of the circuit metal layer at the position of the illuminating diode chip is set to be a crystallization area without being removed, and is preferably a non-reflective surface treatment operation; (5) fixing the illuminating surface in the crystallization area (6) electrically connected to the fresh line region by wires on the wafer; 2 (7) completing the wiring of the light emitting diode. The method for manufacturing the light-emitting diode according to the first aspect of the patent, wherein the inner surface of the exposed circuit metal layer can be processed by polishing, electric, and high-light reflective surface treatment. The work can be further coated with the surface of the processing of the protective film layer, such as the patent application scope 苐 2 items of the manufacturing method of the first pole, the 苴 唁 工 工 工 工 工 工 工 工 工 工 工 工White system ^ 16 200905905 The material can be used for electroplating operations such as silver plating, ore chrome or mine. 4. The method for manufacturing a light-emitting diode according to the invention of claim h, wherein the 基板 substrate is a high thermal transducing leak, and the high thermal material is a metal material or a non-metal material having high heat transfer performance. σ is 5, for example, the method for manufacturing the light-emitting diode of the special fiber _4, the surface of the circuit metal layer is coated with a white-based anti-protective film layer, and the system is coated with a paint or a rubber material. . Ma Wei, 6, such as the application of the patent _ 5 to describe the manufacturing method of the light-emitting diode, the paint or rubber with high heat conduction, is the oxidation of the Α丨 (〇〇2〇〇3海氧化辞 (Ζ η 〇 ), the material of the compound such as nitriding butterfly (二 Ν) and titanium dioxide (butyl hydride). 2 7. If the application method is applied to the manufacturing method of the light-emitting diode, the crystal field of the circuit metal layer below the wafer position The area of the wafer; 1; 8, the manufacturing method of the light-emitting diode according to the claim of the patent application, the circuit metal layer of the circuit is _ side plus work #, forming at least one or more substrates Welding wire area on the surface. 5 17
TW096126250A 2007-07-18 2007-07-18 Method of manufacture of light emitting diode TW200905905A (en)

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GB0812352A GB2451168B (en) 2007-07-18 2008-07-07 Manufacturing method of a light emitting diode
DE102008032170A DE102008032170A1 (en) 2007-07-18 2008-07-08 A manufacturing method of a light emitting diode
FR0803972A FR2919116A1 (en) 2007-07-18 2008-07-11 METHOD FOR PRODUCING AN ELECTROLUMINESCENT DIODE

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