200836317 九、發明說明： 【發明所屬之技術領域】 【0001】 本發明係有，應用在各種電機機器的半導體封裝 (package)麟路絲及其製造方法，制是有關於顧在薄型 顯示器（display) 薄膜覆晶封裂⑽）用線路基板及其製 造方法。 【先前技術】 【0002】 〜薄膜覆晶封裝（Chip QfFilm;⑽用線路基板，係聚醯亞 月女薄膜（pGlyimide film)等的絕緣細的單側面上，形成一端 有内引腳（inner lead)、另-端有外引腳（〇uter㈣）的金屬 線路，所做成_麵基板；主要制作驗晶顯示器的驅動程 式（driver)半導體裝置的線路材料。 【0003】 過去’此紐覆晶封伽線路基板，係如_三所示的方法 製造出來的。 、百先，在聚醯亞胺薄膜！和銅荡2所做成的基材表面上，形 成光阻層（photoresist) 3 (附圖三(a))。 接著在所形成的光阻層3，以屏蔽（腿成）為介質，照射 紫外線，使預期的圖型（pattern)感光（附圖三⑹）。、… 200836317 然後，將光阻層3顯影，形成光阻圖型4(_oresist pattern)(附圖三（c))。 然後，將光_型4的開口部分露出的鋪2加以 成銅線路圖型5，其後，移除光阻圖型4 (附圖三⑷）。夕 接下來，在銅線路圖型5的表面上，形成用來接合半導體突 件電極墊的鍍錫或鍍金層6 (附圖三化））。 - 然後，在最後，形成露出㈣腳和外⑽㈣ 阻抗膜（沒有圖示）。 4<保°蔓 【0004] 使用像這樣製造出來的薄膜覆晶封裝用線路基板，得 覆晶封裝中，如__所示，在料體零件7的電極墊所开、 的突起（_)8與内引腳9接合，更進—步用封裝樹脂⑻口 以封裝。因此，機料7_軸表面，魏用 脂10和聚醯亞胺薄膜1覆蓋起來的構造。 【發明内容】 【本發明所欲解決的問題】 【0005】 但是，半導體零件7在運⑽會產生熱，為了正常地運作， 所產生的熱要釋放到_覆晶封裝的外部，必須要使半導體 7的溫度不能變成高溫。因為半導體零件一旦纖 1 " ， ~^交战南溫’不但發 玍錯誤運作而且在極端情形下造成破損不可挽回。 一又 200836317 因為半導體零件運作而產生的熱的 向外靜钟T外引腳_ ’從搭載_晶封裝的線路板 精r ΓηΓ/此剩餘的部份從半導體零件7的表面傳導至封 【_曰6】"魏亞胺薄膜1，從聚酿亞胺薄膜1向外部發散熱。 縣她b、_度化，加_膜覆晶 路其 「AA地增加起來。同時，薄職晶封裝用線 引^:路’部因小型化、高密度化的要求而趨向微細化，内 ::Γ至逐峨15微米_細小。因此，前述以突起、 法逐漸演變:==效_’使半導體零件的散熱方 【0007】 體itir善像這樣料導體零件的散朗題，在絕緣膜的半導 t 和相對側的絕緣膜面上，配置散熱板。改善來自絕 並=的放熱效率的方法，係在特開__觀56號中作出建議。 ㈣可以期待散熱效率的改善，但是因為配置散熱板， 、设日日封裝的厚度和重量增加’卻與薄膜覆晶封 輕量化的要求背道而驰。 【0008】 200836317 又 ’在半導體料的相對儀絕緣邮比半導 範圍’進行半，於該 法’已藉蝴開2_-嶋23號提出，於該文件之建議， 導體零件的電極和内引腳，以凸起為介f、進行熱壓縮（匕邮 C〇mPreSSiQn)接合之際，絕輔酬來加熱的加熱u (t00l) 祕緣膜’不會發生融接，作為其目的；亦即，藉由這樣的作法， 從加熱工制㈣腳，熱的傳導很容易，因此，加私具的溫度 可以降低至不會和絕緣麻接。因此，在前述部位必須形成= 腳，或者一定要包含在形成的範圍内。 雖說如此’將絕緣膜的厚度變薄，從加熱工具來的溫度較容 易傳導至半純零件側這—點來看，也可以說是使絕緣膜的熱阻 (thermal resistance)低下，改善散熱性。 【0009】 一= 調來’如_述—般，近年的細覆晶封裝用線路基板 -直向微細化演進，此結果，為了不使相鄰的接合部份之間隙發 生接合不良’裝設在半導體零件的雜處的突触㈣腳接合之 際，各接合部分必須均衡地施加壓力，在絕_層必須要有很高 的平坦性。絕緣膜的厚度，在半飿刻而變薄以後的區域，膜本身 持有厚度的赫狀，再加上_絕緣層變騎加工稀落狀，因為 平:Μ生又顺害’全部接合部份的接合可靠性變低，有這樣的問 200836317 [0010] 本發明係鑑於前述之事實所發展出來的，其目的，係提供滿 足薄膜復曰曰封裝所要求的小型輕量化、且在微細線路的内引腳和 突起的接合方面，與過去相同的高可靠性的薄膜覆晶封裝用線路 基板及其製造方法、以及應用該基板的薄膜覆晶封裝。 【本發明解決問題所採方法】 【0011】 為了達到前述目的，依據本發明之薄膜覆晶封裝用線路基 板’在絕緣膜的單側面上形成有金屬線路，前述金屬線路，係放 在具有用來與轉體零件之雜合_引腳㈣來與外部基 板接口的外引腳的薄膜覆晶封制線路基板上，搭載前述半導體 ^件的區域且/又有則述内引腳的區域的前述絕賴的厚度，比起 未L載刚述料體零件的區域的前述絕緣膜的厚度，形成較薄的 情形，以此為其特徵。 【0012] 依據本餐明’魏絕緣膜的材質，係聚醯亞胺（pcilyiiuide)， 以此為特徵。 【0013】 依據本發明之薄膜霜s 壯 n m ^ 犋设日日封裝，係使用前述薄膜覆晶封裝用繞 路基板裝配起來的。 深 9 200836317 [0014] 依縣㈣之_覆钟_魏敍 溥膜覆晶封装用線路基板方面 以在則达 化學峨，將絕緣膜作蝴，彳==2—側，藉由 的更薄，以此作為特徵。轉度，比其他區域的厚度，要來 【發明之成果】 【0015】 又有腳的區域之絕賴部分，因為伟刻而變 用的^=果 &供散熱性良好的半導體封裝、以及有 f樣用線路基板。形成内引腳的區域，因為沒有 不會發生絕緣膜的加謂落狀，因此沒有接合可靠 性的楨告。 【實施方式】 【本發明之最佳實施例】 【0016】 以下，利用圖示說明本發明之實施狀態。 附圖一係依據本發明的線路基板之製造作業之一個例示。圖 中，在過去實例說明過的與實質上同一的材料及部分，均使用同 一符號加以說明。 200836317 [0017】 首先，如附圖-(a)所示，與從前技術相同地，作為絕緣 聚醯亞胺膜1和鋪2所構成的基材的_表面上，形成光阻層 3 °作為可以使用的聚酸亞胺膜，例如宇部興產公司製造的θ ϋ Pilex、東立杜邦公司製造的Capt〇n等可列舉例示。、 【0018】 其次，如附圖一⑹所示，在所形成之光阻層3，以以屏蔽 (mask)為介質’照射紫外線，使預期的圖型（邮咖）感 【0019】 〜 再其次’如附圖一(c)所示，將光阻顯影，形成光阻圖型4。 【0020】 再其次，如附圖一（d)所示，從光阻圖型4露出的銅箔部份加 _刻’形成包含㈣腳9的銅線路關5，然後除去光阻層。 【0021】 9 再其次，如附圖一（e)所示，在形成聚醯亞胺膜i的銅箔2的 之相對側的表面上’形成光阻層1 1，此處所使用的光阻物， 必須選用耐聚酿亞胺侧液的物質，例如，使用市售的聚酿亞胺 餘刻液TPE—_ (東再工程公司製造）的情形時，可以使用乾膜 阻（dry fllm resist) AQ-3058 (旭化成公司製造）。 【0022】 接下來，如附圖一（0所示，將光阻層1 1曝光、顯影，在形 11 200836317 成^醯亞胺膜1的銅線路_ 5的_之相對侧上，形成光 口部分1 la。此時所形成的光阻開口部本汗 件的位詈的F^ 丄丄a係搭載丰導體零 / q、並且必須比㈣㈣更_形成。此種情形， 在形成銅線^型5的該側，為了保護從親亞義刻液的侵 钱’要做成製品的範圍的全部，就需用光阻物覆莫。200836317 IX. Description of the Invention: [Technical Field of the Invention] [0001] The present invention relates to a semiconductor package for use in various motor machines, and a method for manufacturing the same, which is related to a thin display (display) A circuit board for film flip-chip (10)) and a method for producing the same. [Prior Art] [0002] A thin film flip chip package (Chip QfFilm; (10) a circuit board, a pGlyimide film, etc., on an insulating thin single side, forming an inner lead at one end (inner lead) ), the other end has a metal wire of the outer pin (〇 uter (4)), which is made into a _ surface substrate; the circuit material of the driver semiconductor device which mainly manufactures the crystal display display. [0003] The sealing circuit substrate is manufactured by the method shown in _3. The first photoresist is formed on the surface of the substrate made of polyimide film and copper slab 2 (attached) Fig. 3(a)) Next, in the formed photoresist layer 3, a shield (leg formation) is used as a medium, and ultraviolet rays are irradiated to make a desired pattern sensitive (Fig. 3(6))., ... 200836317 Then, The photoresist layer 3 is developed to form a photoresist pattern 4 (Fig. 3(c)). Then, the trench 2 exposed by the opening portion of the light_type 4 is formed into a copper wiring pattern 5, and thereafter , remove the photoresist pattern 4 (Figure 3 (4)). Next, in the copper line pattern On the surface of 5, a tin-plated or gold-plated layer 6 (Fig. 3) for bonding the semiconductor bump electrode pads is formed. - Then, at the end, an exposed (four) foot and outer (10) (four) impedance film (not shown) is formed. 4<保°蔓 [0004] The circuit substrate for film flip-chip mounting thus manufactured is used in a flip chip package, as shown by __, the protrusion (_) of the electrode pad of the material part 7 is opened. 8 is bonded to the inner lead 9 and further encapsulated with the sealing resin (8) port. Therefore, the surface of the material 7_axis, the structure in which the grease 10 and the polyimide film 1 are covered. SUMMARY OF THE INVENTION [Problems to be Solved by the Invention] [0005] However, the semiconductor component 7 generates heat during operation (10), and in order to operate normally, the generated heat is released to the outside of the flip chip package, and must be made. The temperature of the semiconductor 7 cannot be changed to a high temperature. Because the semiconductor parts once fiber 1 ", ~^ warned Nanwen' not only failed to operate, but also caused damage in extreme cases irreparable. And 200836317 because of the operation of the semiconductor parts, the heat of the external static clock T external pin _ 'from the board of the mounting _ crystal package fine r Γ Γ / this remaining part from the surface of the semiconductor part 7 conduction to the seal [_曰6]"Weiyaimine film 1, heats up from the polyimide film 1 to the outside. In the county, she b, _ degree, plus _ film covering the crystal road, its "AA increased. At the same time, the thin line of the customer's packaging line: the road' minimization, high density requirements tend to be fine, inside ::Γ到峨15微米_小小. Therefore, the above-mentioned protrusions, the law gradually evolved: ==effect_' so that the heat dissipation side of the semiconductor part [0007] body itir good like this material conductor parts of the problem, insulation The semi-conducting t of the film and the insulating film surface on the opposite side are arranged with a heat dissipating plate. The method for improving the exothermic efficiency from the extinction = is recommended in the special __ view No. 56. (4) It is expected that the heat dissipation efficiency can be improved. However, because of the configuration of the heat sink, and the increase in the thickness and weight of the day-to-day package, it is contrary to the requirement of lightweight film-coated crystal seals. [0008] 200836317 And 'half the semi-conductive range of the relative insulation of the semiconductor material' In the law, it has been proposed by the opening of 2_-嶋23. In the proposal of the document, the electrode and the inner lead of the conductor part are joined by a heat transfer (C〇mPreSSiQn). , the auxiliary heating to heat the heating u (t00l) secret film The fusion does not occur as its purpose; that is, by such a method, heat conduction is easy from the heating process (four) feet, and therefore, the temperature of the private device can be lowered to not be in contact with the insulation. In the above-mentioned part, it is necessary to form a = foot, or it must be included in the range of formation. Although the thickness of the insulating film is thinned, the temperature from the heating tool is easily transmitted to the side of the semi-pure part. It can also be said that the thermal resistance of the insulating film is lowered, and the heat dissipation property is improved. [0009] A = "to", in recent years, the circuit board for fine flip chip packaging has been linearly refined, As a result, in order to prevent the gap between the adjacent joint portions from being joined, the joint portion must be uniformly applied with pressure at the joint of the semiconductor device (four), and the joint portion must have a pressure. High flatness. The thickness of the insulating film, in the area after thinning and thinning, the film itself holds the thickness of the film, and the _insulating layer becomes rough and thin, because the flat: twins Shun 'all joints Part of the joint reliability becomes low, and there is such a question 200836317 [0010] The present invention has been developed in view of the foregoing facts, and the object thereof is to provide a small size and light weight required for a film retanning package, and to be fine The circuit board for thin film flip chip packaging and the method for manufacturing the same, and the film flip chip package using the same, which are the same as the past, and the method for solving the problem of the present invention. [0011] In order to achieve the above object, a circuit board for a film flip chip package according to the present invention has a metal line formed on one side of the insulating film, and the metal line is placed to have a hybrid with the rotating part. The thickness of the above-mentioned semiconductor device in the region where the semiconductor device is mounted on the thin-film over-cladding circuit board on which the external lead is connected to the external substrate, and the thickness of the inner lead is not the same as The thickness of the aforementioned insulating film in the region where the material member is just described is formed in a thinner case. [0012] According to the material of the "Wei insulating film", it is characterized by polypyridinium (pcilyiiuide). [0013] The film cream according to the present invention is assembled by using the above-mentioned film flip chip packaging circuit board.深9 200836317 [0014] According to the county (four) _ 钟 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ This is a feature. The degree of rotation is greater than the thickness of other areas. [Results of the invention] [0015] The part of the area with the foot, the ^=fruit & There is a circuit board for f-type. The area where the inner leads are formed, since there is no occurrence of the addition of the insulating film, there is no obstruction of the bonding reliability. [Embodiment] [Best Embodiment of the Invention] [0016] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is an illustration of the manufacturing operation of a circuit substrate in accordance with the present invention. In the drawings, substantially the same materials and portions as those described in the past examples are denoted by the same reference numerals. 200836317 [0017] First, as shown in the drawing - (a), as in the prior art, a photoresist layer 3 is formed as a surface of a substrate composed of an insulating polyimide film 1 and a laminate 2 A polyimide film which can be used, for example, θ ϋ Pilex manufactured by Ube Industries, Inc., Capt〇n manufactured by Toray Industries, Inc., and the like can be exemplified. [0018] Next, as shown in FIG. 1 (6), in the formed photoresist layer 3, ultraviolet rays are irradiated with a mask as a medium to make the expected pattern (mail) feel [0019]~ Next, as shown in FIG. 1(c), the photoresist is developed to form a photoresist pattern 4. Further, as shown in Fig. 1(d), the portion of the copper foil exposed from the photoresist pattern 4 is etched to form a copper line 5 including the (four) leg 9, and then the photoresist layer is removed. [0021] 9 Next, as shown in FIG. 1(e), the photoresist layer 1 is formed on the surface on the opposite side of the copper foil 2 on which the polyimide film i is formed, and the photoresist used here is used. For substances, it is necessary to use a material resistant to the side of the brewed imine. For example, when using a commercially available polytetramine remnant TPE-_ (manufactured by Toki Engineering Co., Ltd.), a dry film resistance (dry fllm resist) can be used. ) AQ-3058 (made by Asahi Kasei Corporation). [0022] Next, as shown in FIG. 1 (0, the photoresist layer 11 is exposed and developed, and light is formed on the opposite side of the copper line _ 5 of the shape 11 200836317. The port portion 1 la. The F^ 丄丄a of the position of the photoresist opening portion at this time is mounted with a bulk conductor zero/q, and must be formed more than (4) (four). In this case, a copper wire is formed. On the side of the type 5, in order to protect the entire range of products from the pro-Asian engraving, it is necessary to use a photoresist to cover the surface.
【0023】 I 接下來如附圖_(g)所示，將光阻開口部分1 h露出的聚 酿亞麵作伟刻，其後剝離光阻。因為半_而㈣的部份la 的聚醯亞麵的厚度，若考慮辭導體轉的賴性，薄一點比 較好’但過薄的話則膜的強度不足，容易發生膜的破損。因此， 因為半侧所留下的膜的厚度，希望要有5微米以上，例如，使 用厚度38微米的魏亞賴作為讀料的情形時，半侧後的膜 厚度選擇5〜30微米的範圍較好。 【0024】 又，在聚醯亞胺臈的半⑽中，可以使用前述市售的聚酿亞 祕刻液⑽-_)或_ (drazine)的水溶液。舉例來說， 使用聚醯亞胺侧料為TPE—議，聚輕麵是東立杜邦公司 製造的Capton，作半兹刻的情形時，液體溫度6〇〜啊，浸潰時 間為30〜120秒的範圍’可以得到5〜3〇微米的聚酿亞胺膜厚度。 【0025】 又 其次，銅線路難的表面上，為了與半導體零件的電極塾接 12 200836317 合，形成錫、金等的鍍層。 【0026】 然後，在最後為了使内引腳和外引腳露出，形成 護阻抗膜。 /主的保 【0027】 使用依此所製造的薄膜覆晶封裝用線路基板的半導體封裝的 切面構造如關二所*。半導體零件7，其f極墊所形成的免起 8與線路基板的内引腳9相接合，聚酿亞胺膜1與半導體零件7 的間隙處’充填封裝樹脂1 0，變成保護突起8和㈣㈣的接 合部份及半導體零件表面的保護構造。 【0028】 ;疋乎使用因本發明之薄膜覆晶封裝用線路基板的半導體 、衣’如附圖二所示，覆於搭載半導體零件的 膜成為薄的構造。 域亞私 【0029】 區域由亞贿的賴域，比未經半_的 胺膜= ，從半導趙零件的表*傳導至聚醒亞 、放㈣外㈣職之散触率也贿。又 份的聚酿亞胺咖;^ Μ 顿㈣腳4 半_所生加：=料的膜厚度，因為不會增加由 合性，不會發生損害 ㈣和半導财件㈣極塾之接 13 200836317 【圖式簡單說明】 [0030] 【圖-】係依據本發明之薄職晶龍用線路基板之製造作業 的一個實施例之作業圖。 【圖二】係使用關-所示之_覆晶封裝用線路基板的半導 體封裝的一個實施例之切面圖。 【圖二】係過去之薄膜覆晶封裝用線路絲之製造作業的一個 實施例之作業圖。 【圖四】係使用過去之薄膜覆晶封裝用線路基板 的一個實施例之切面圖。 干净體封衣 【主要元件符號說明】 【0031】 1 聚酿亞胺膜（p〇lyimide film) 1 a 由於半蝕刻變薄的部份 2 銅箔 3、1 1 光阻層（photo resist layer) 4 光阻圖型 5 銅線路圖型 6 鍍層 7 半導體零件 8 突起（bump) 14 200836317 9 内引腳（inner lead) 10 封裝樹脂 1 la 光阻開口部分 15[0023] I Next, as shown in Fig._(g), the polyhedral surface exposed by the photoresist opening portion 1h is made to be etched, and then the photoresist is peeled off. Because the thickness of the poly-sub-surface of the partial la of the half-and (four) is considered to be better than the thickness of the conductor turn, the thinness is better than that. However, if the thickness is too thin, the strength of the film is insufficient, and the film is likely to be damaged. Therefore, since the thickness of the film left on the half side is desirably 5 μm or more, for example, when Wei Yalai having a thickness of 38 μm is used as a reading material, the film thickness after the half side is selected to be in the range of 5 to 30 μm. better. Further, in the half (10) of the polyimine oxime, an aqueous solution of the above-mentioned commercially available polystyrene (10)--) or _ (drazine) may be used. For example, the polythene imide side material is TPE--, and the poly-light surface is Capton manufactured by Dongli DuPont. When the temperature is half-cut, the liquid temperature is 6〇~ah, and the dipping time is 30~120. The range of seconds 'can give a thickness of 5 to 3 μm of the polyimide film. [0025] Next, on the surface where the copper wiring is difficult, in order to bond with the electrode of the semiconductor component 12 200836317, a plating layer of tin, gold or the like is formed. Then, at the end, in order to expose the inner and outer leads, a resistive film is formed. /Main Protection [0027] The sectional structure of the semiconductor package using the wiring substrate for film-on-film packaging manufactured as described above is as follows. In the semiconductor component 7, the dummy pad 8 formed by the f-pole pad is bonded to the inner lead 9 of the circuit substrate, and the gap between the polyimide film 1 and the semiconductor component 7 is filled with the encapsulating resin 10 to become the protective protrusion 8 and (4) The joint portion of (4) and the protective structure of the surface of the semiconductor component. [0028] As shown in Fig. 2, the semiconductor and the film on which the semiconductor component is mounted are used as a thin structure. Domain sub-private [0029] The area of the sub-bribery Lai domain, than the semi-alloyed amine film =, from the semi-conducting Zhao parts of the table * to the convergence of the Awakening, and the release of the (four) outside (four) posts also bribe. Another part of the brewed yam yam; ^ Μ 顿 (4) foot 4 half _ added: = material thickness of the film, because it will not increase the compatibility, no damage will occur (four) and semi-financed goods (four) 13 200836317 [Brief Description of the Drawings] [FIG.] is an operation diagram of an embodiment of a manufacturing operation of a thin substrate for a thin crystal wafer according to the present invention. Fig. 2 is a cross-sectional view showing an embodiment of a semiconductor package using a circuit substrate for a flip chip package. Fig. 2 is an operation diagram of an embodiment of a manufacturing process of a conventional wire for film flip chip packaging. Fig. 4 is a cross-sectional view showing an embodiment of a circuit substrate for a conventional film flip chip package. Clean body seal [Main component symbol description] [0031] 1 Polyimide film 1 a thin portion due to half etching 2 Copper foil 3, 1 1 photo resist layer 4 Photoresist pattern 5 Copper line pattern 6 Plating 7 Semiconductor parts 8 bump 14 200836317 9 Inner lead 10 Encapsulation resin 1 la Resistive opening part 15