200829115 九、發明說明： 【發明所屬之技術領域】 本發明係有關於一種具有複數個金屬配線層之多層印 刷配線板及其製造方法。 【先前技術】 已知一種多層印刷配線板能進行零件的高密度封裝且 能以最短距離連接（意指電性導通，以下簡稱爲連接）零件 間之技術。IV Η (局部層間通孔；I n t e r s t i t i a 1 V i a Η ο 1 e)係一 種能適用於被要求更高密度封裝之多層印刷配線板之製造 的技術，其特徵係對在相鄰層間之開設的孔（通孔）塡充導 電性材料以將相鄰層彼此連接。依據IVH，因爲能只在必 要部分形成層間連接，且在通孔上亦能夠搭載零件，所以 能夠進行自由度高的高密度配線。 在專利文獻1記載一種在盲導通孔塡充導電性膏來進 行層間連接之多層印刷配線板的製造方法。第1圖及第2 圖係該多層印刷配線板的製造流程之流程圖。 首先，係鈾刻在單面具有絕緣性基材1及配線層2(銅 箔）之單面覆銅箔基材3的銅箔面以形成配線層2(第1圖 (b))。接著在絕緣性基材1的相反面層積被覆剝離用薄膜4 後（第1圖（〇)後，進行穿孔而形成肓導通孔5(第1圖（d))。 在該通孔內塡充導電性膏6後，將剝離用薄膜4剝離，而 成爲導電性膏從絕緣性基材表面突出的狀態（第1圖（f))。 對其層積金屬薄膜7(第2圖（a))，並加壓使導電性膏縮 壓而電性連接金屬薄膜7與配線層2，同時使金屬薄膜7 200829115 . 與基材1黏著（第2圖（b))。隨後，藉由將金屬薄膜7飩刻 而形成金屬薄膜7的配線層，能夠得到具有2層配線層之 多層印刷配線板（第2圖（〇)。 又，專利文獻2記載一種未使用導電性膏而是藉電解 電鍍使肓導通孔內析出金屬之多層印刷配線板的製造方 法。第3圖係該多層印刷配線板的製造流程之流程圖。 首先，準備基板11，其含有基材8、設置在基材8的 一面側之第一金屬層9、及設置在另一面側之第二金屬層 ® 1〇(第3圖（a))，之後選擇性地除去第一金屬層9及基材8 而形成到達第二金屬層10之孔12(第3圖（b))。 接著，從第二金屬層10供應電力來進行電解電鍍而在 孔1 2的內部使金屬析出使金屬1 3塡埋孔的內部（第3圖 * (c))。隨後，藉由蝕刻第一金屬層及第二金屬層而形成配線， " 能夠得到具有2層配線層之多層印刷配線板（第3圖（d))。亦 可在形成孔1 2前進行蝕刻第一金屬層。 專利文獻1 :特開200 1 -3 45 5 5 5號公報 ® 專利文獻2 :特開2006- 1 1 47 8 7號公報 【發明內容】 發明所欲解決之課題 導電性膏係將金屬粉末等之導電性塡料分散在g g旨黏 合劑中而成者，含有用以溶解樹脂之溶劑。因此，塗布導 電性膏後藉由加熱或減壓等方式除去溶劑時，_ ^彳生胃白勺 體積減少。又，導電性膏之導電性塡料的塡充率係依壓縮 變高、導電性膏之導電性會提升。因此爲了提高盲導通孔 200829115 連接之連接可靠性’必須塗布比盲導通孔的體積更大的導 電性膏’如同專利文獻1，係有必要以導電性膏可從絕緣 性基材表面突出的狀態之方式塗布導電性膏。 但是，專利文獻1的方法必須將剝離薄膜4貼合及剝 離，會變成複雜的製程。又，配線層2的蝕刻及金屬薄膜 7的飩刻必須在另外的製程進行。爲了提高配線層2與金 屬薄膜7之層間連接性，有必要在加壓導電性膏時作均等 加壓，那是因爲無法使用預先蝕刻處理過的金屬薄膜7的 緣故。 專利文獻2的方法不需要剝離薄膜。但是，在藉由電 鍍使金屬析出時，從盲導通孔的下部成長的電鍍接觸到第 一金屬層9的表面時第一金屬層9亦被供給電力而金屬會 在第一金屬層9的表面析出使金屬層9的厚度變厚，致難 以形成細的配線。爲了防止此種情形，雖可在金屬層1 〇的 表面形成被覆層，但是如此會使該部份的製程變複雜。又， 爲了從金屬層1 0供給電力來進行電鍍，必須連接金屬層 1 〇 ’而要在形成盲導通孔前蝕刻金屬層1 0以形成配線是有 困難的。 有鑒於上述的問題，本發明之目的係提供一種生產力 高的多層印刷配線板之製造方法，能夠藉由簡易的製程製 造連接可靠性優良的多層印刷配線板。又，本發明之目的 係提供一種可靠性優良的多層印刷配線板。 解決課題之手段 本發明係一種多層印刷配線板的製造方法（申請專利 200829115 範圍第1項），其特徵係包含：（1)兩面基板準備製程，其係 準備兩面基板’該兩面基板具有基材、設置在前述基材的 一側的表面上之第一導電層、及設置在前述基材的另一側 表面上之第二導電層；(2)配線形成製程，其係選擇性地除 去前述第一導電層及前述第二導電層來形成配線；（3)盲導 通孔形成製程，其係藉由選擇性地除去前述基材，並形成 以前述第二導電層爲底面、以前述基材及前述第一導電層 爲壁面之盲導通孔；及（4 )導電性膏塗布製程，其係在前述 盲導通孔的外周之第一導電層表面及前述盲導通孔的底 面，以連續的方式塗布導電性膏；前述第一導電層與前述 第二導電層係電性連接。 第4圖（a)〜（d)係本發明的多層印刷配線基板的製造 方法的一個例子之流程度。準備兩面基板1 7，該兩面基板 1 7具有基材1 4、設置在前述基材的一側的表面上之第一導 電層15、及設置在前述基材的另一側表面上之第二導電層 1 6 (第4圖（a))。接著，藉由蝕刻等方法除去選擇性地除去 前述第一導電層15及前述第二導電層16來形成配線（第4 圖（b)) ° 接著’選擇性地除去基材1 4，來形成盲導通孔1 8。盲 導通孔18係以第二導電層16爲底面、以基材14及第一導 電層15爲壁面。而且在所形成的盲導通孔塗布導電性膏 1 9。如第4圖（d)所示，係在該肓導通孔丨8的外周之第一 導電層15表面及該盲導通孔的底面，以連續的方式塗布導 電性膏。隨後，按照必要加熱導電性膏1 9來使其硬化。亦 200829115 • 可邊加壓導電性膏邊使其硬化。藉由以上的製程來電性連 接第一導電層15與第二導電層16。 因爲在盲導通孔的外周之第一導電層15的表面亦塗 布導電性膏，所以不只是盲導通孔的壁面、且第一導電層 15的表面亦與第二導電層16連接。藉此，能提升盲導通 孔的導電性、能夠得到連接可靠性優良之多層印刷配線 板。又，因爲不需要剝離薄膜之貼合或剝離的製程，所以 能夠以簡易的製程來製造多層印刷配線板。 ® 又，因爲能夠在形成第一導電層15及第二導電層16 後，形成盲導通孔1 8，所以能夠同時對第一導電層1 5及 第二導電層1 6進行蝕刻來形成配線。而且，藉由預先形成 配線，亦能夠如第4圖（d)所示，成批層積塗布有導電性膏 - 之基板與其他基板來製造具有3層以上導電層之多層印刷 ' 配線板。又，多層印刷配線板係指導電層具有二層以上之 印刷配線板，亦包含兩面板。 申請專利範圍第2項之發明係如申請專利範圍第1項 ^ 之多層印刷配線板的製造方法，其中該盲導通孔的直徑爲 30微米以上、200微米以下。藉由使前述的盲導通孔直徑 爲3 0微米以上、200微米以下，能夠兼具連接可靠性及高 密度封裝性。又，前述盲導通孔的形狀可以是圓形、橢圓 形、及任意形狀，圓形以外形狀時，係以開口部的最大長 度作爲盲導通孔的直徑。 申請專利範圍第3項之發明係如申請專利範圍第1或 2項之多層印刷配線板的製造方法，其中藉由以被覆該盲 -10- 200829115 * 導通孔的外周整體的方式塗布該導電性膏，能夠良好地連 接第一導電層1 5與第二導電層1 6，能夠得到連接可靠性 優良之多層印刷配線板。 申請專利範圍第4項之發明係如申請專利範圍第3項 之多層印刷配線板的製造方法，其中以該導電性膏的塗布 直徑爲A、以該肓導通孔的直徑爲B時，A與B的差爲20 微米以上、2 0 0微米以下。藉由如此地塗布導電性膏，能 夠兼具連接可靠性及高密度配線。又，導電性膏的塗布形 ^ 狀可以是圓形、橢圓形、及任意形狀，圓形以外形狀時， 係以塗布部的最大長度作爲導電性膏的塗布直徑。 申請專利範圍第5項之發明係如申請專利範圍第1至 4項中任一項之多層印刷配線板的製造方法，其中更含有 * 層積絕緣層之製程，用以被覆前述兩面基板的至少一側的 _ 表面，係在塗布該導電性膏的製程之後，層積該絕緣層， 隨後加壓來使前述絕緣層黏著於該兩面配線基板。 第5圖（a)係申請專利範圍第5項之發明的多層印刷配 ^ 線基板的製造方法的一個例子之流程圖。將具有絕緣性基 材20與黏著層21之絕緣層（覆蓋薄膜）22層積已塗布有導 電性膏之兩面基板17(第5圖（a))。按照必要在層積前預先 將導電性膏加熱、乾燥。隨後，加壓絕緣層與兩面基板的 積層體時藉由黏著層2 1能夠使絕緣層黏著於兩面基板 1 7。加壓多半係在加熱條件進行，藉由該製程能夠一次進 行導電性膏的熱硬化及絕緣層的黏著。藉由能夠提供生產 力優良之多層印刷配線板的製造方法。絕緣層（覆蓋薄膜） -11- 200829115 * 能夠以被覆兩面基板1 7的相反側（被覆第二導電層Π 的方式層積，亦能夠層積於兩面而同時加壓。此時能 提升生產力。 申請專利範圍第6項之發明係一種多層印刷配線 其特徵係具有基材、設置在該基材的一側表面上之第 電層、及設置在前述基材的另外一側表面上之第二 層，且前述第一導電層及前述第二導電層係藉由導電 之硬化物而電性連接之多層印刷配線板，具有以前述 ^ 導電層爲底面、以該基材及前述第一導電層爲壁面之 通孔，且以前述盲導通孔的外周之第一導電層表面與 肓導通孔的底面連接的方式設置有導電性膏的硬化物 爲係以盲導通孔的外周之第一導電層表面與前述盲導 * 的底面連接的方式使用導電性膏的硬化物被覆，所以 導電層與第二導電層係良好地連接，能夠得到連接可 優良之多層印刷配線板。 發明之效果 ^ 本發明能夠提供一種生產力高的多層印刷配線板 '造方法，能夠藉由簡易的製程製造連接可靠性優良的 印刷配線板。能夠提供一種連接可靠性優良的多層印 線板。 【實施方式】 以下，詳細地說明本發明。本發明所使用的基材 使用絕緣性的樹脂薄膜，可例示聚對酞酸乙二酯或聚 胺。若考慮耐熱性時則是以聚醯亞胺爲主體的樹脂薄 ;側） 夠更 板， 一導 導電 性膏 第二 盲導 前述 。因 通孔 第一 靠性 之製 多層 刷配 ‘能夠 丨醯亞 i膜爲 -12- 200829115 • 宜。基材厚度能夠按照多層印刷配線板的用途而適當地選 擇，通常係使用5微米〜5 〇微米左右者。 第一導電層及第二導電層能夠使用金屬箔。若考慮導 電性、耐久性時則是以銅爲主體的金屬箔爲佳，可例示銅、 或以銅爲主成分的合金。除了銅以外亦能夠使用銀、鋁、 鎳等。導電層的厚度能夠按照多層印刷配線板之用途而適 當地選擇，通常係使用5微米〜50微米左右者。導電層與 基材能夠直接或透過黏著劑而貼合。亦可使用在聚醯亞胺 樹脂薄膜的兩面上貼合有銅箔之市售的兩面覆銅基板。 藉飩刻加工將第一導電層及第二導電層選擇性地除去 以形成配線。蝕刻加工可例示化學蝕刻（浸漬式飩刻），其 係在導電層上形成光阻層等之配線圖案後，浸漬於侵蝕導 • 電層用的蝕刻劑，除去配線圖案以外的部份，隨後除去光 ~ 阻層。對第一導電層及第二導電層同時進行蝕刻加工時， 能夠一次進行蝕刻製程，能夠降低製造成本。 對形成有配線之兩面基板，藉由雷射加工等方法選擇 響 性地除去基材或基材與第一導電層而形成盲導通孔。雷射 加工能夠使用UV-YAG雷射、C〇2雷射等之雷射，又，亦 能夠藉雷射加工以外的方法來形成盲導通孔。肓導通孔的 直徑以3 0微米〜200微米爲宜。直徑小於3 0微米時接觸 面積變小，第一導電層與第二導電層之連接電阻變大。又， 使直徑大於2 0 〇微米時，通孔比配線寬度大，無法進行高 密度封裝。更好的是盲導通孔直徑爲50微米〜150微米。 要除去雷射加工後之污點’能夠使用利用鹼及過鐘酸 -13- 200829115 鉀之濕式除污點處理、噴砂處理、使無機粒子分散在: 而進行之濕式噴砂處理、及電漿處理等。 本發明所使用之導電性膏係使金屬粉末等之導電 料分散在黏合劑樹脂者。金屬種類可例示鉑、金、銀、 鈀等，其中特別是使用銀粉末或覆銀之銅粉末時能顯 良的導電性，故較佳。 黏合劑樹脂能夠使用環氧樹脂、酚樹脂、聚酯樹 聚胺基甲酸酯樹脂、丙烯酸樹脂、三聚氰胺樹脂、聚 胺樹脂、及聚醯胺醯亞胺樹脂等。若考慮導電性膏的 性時則是以使用熱固性樹脂爲宜，以使用環氧樹脂 佳。環氧樹脂的種類沒有特別限定，除了雙酚A、F、 AD等爲骨架之雙酚型環氧樹脂等之外，還可例示萘型 樹脂、酚醛清漆型環氧樹脂、聯苯型環氧樹脂、二環 烯環氧樹脂等。又，亦可使用高分子量環氧樹脂之苯 脂。 黏合劑樹脂能夠溶解在溶劑中而使用，能夠使 系、醚系、酮系、醚酯系、醇系、烴系、胺系等有機 作爲溶劑。導電性膏因爲係藉由網版印刷等方法來塡 目導通孔，以印刷性優良的筒沸點溶劑爲宜，具體而 以乙酸卡必醇酯、乙酸丁基卡必醇酯等爲特佳。又， 夠組合複數種此等溶劑而使用。能夠將此等材料藉 輥、旋轉攪拌脫泡機等而混合、分散成爲均勻的狀態 製造導電性膏。 使用網版印刷等方法塗布上述的導電性膏，將導 液中 性塡 銅、 現優 脂、 醯亞 耐熱 爲特 S、 環氧 丁二 氧樹 用酯 溶劑 充於 言， 亦能 由三 ，來 電性 200829115 、 膏塡充在前述肓導通孔內。當以前述肓導通孔的外周之第 一導電層表面與盲導通孔的底面連接的方式塗布導電性膏 時，第一導電層與第二導電層透過導電性膏而被電性連 接。導電性膏係以被覆盲導通孔的外周及底面全部爲宜， 但是只要能電性連接則一部份欠缺亦無妨。 當導電性膏塗布成可被覆肓導通孔的外周整體時，因 連接可靠性變高，故較佳。又，設導電性膏的塗布直徑爲 A、該盲導通孔的直徑爲B時，A與8的差係以20微米以 ^ 上、200微米以下爲宜。導電性膏的塗布直徑小於該値時， 第一導電層與第二導電層的連接電阻變高、連接可靠性降 低。又，導電性膏的塗布直徑大於該値時，相對於連接部 之配線變'大，難以進行高密度封裝。而且，當導電性膏塗 ' 布成被塡充於肓導通孔的內部整體時，能夠降低第一導電 層與第二導電層之連接電阻。 以對既塗布的導電性膏進行預乾燥而除去包含於導電 性膏中之溶劑爲宜。藉由除去導電性膏中的殘餘溶劑，能 . 夠防止在盲導通孔內產生空隙（void.)，能夠降低連接電阻 値。又，在減壓環境中進行預乾燥時，即便降低預乾燥溫 度，亦能夠有效率地除去溶劑，能夠抑制在預乾燥中之黏 合劑樹脂的硬化反應。 隨後，使導電性膏硬化。導電性膏的硬化通常是熱硬 化，但是亦可藉由紫外線硬化等方法來進行。又，在以熱 塑性樹脂作爲黏合劑樹脂之導電性膏的情況，光是使溶劑 乾燥就會使導電性膏固化，在本發明亦將此物稱爲導電性 -15- 200829115 " 膏的硬化物。 又，一邊加壓導電性膏一邊使其硬化時，能夠提高導 電性，故較佳。導電性膏會依加壓而被壓縮，第一導電層 與第二導電層的連接電阻會變小，又，在盲導通孔內亦塡 充有已壓縮的導電性膏。 僅對塗布有導電性膏之兩面基板進行加壓時，能夠得 到透過盲導通孔而連接第一導電層與第二導電層之多層印 刷配線板。層積該配線板與其他的配線板，亦能夠製造具 ^ 有三層以上的配線層之多層印刷配線板。又，在塗布有導 電性膏之兩面基板的單面、或兩面上層積絕緣層（覆蓋薄 膜），亦能夠一次進行覆蓋薄膜的黏著與導電性膏的加壓。 加壓係以在加熱下進行者爲宜。又，在真空狀態下加 - 熱加壓時，能夠防止在導電性膏中產生空隙，故更佳。加 ' 熱溫度係可依導電性膏的種類而適當地選擇，通常爲1 0 0 〇C 〜2 8 0 〇C。 實施例 ® 接著，依據實施例來說明本發明。但是本發明的範圍 非僅限於此等實施例。 "/ —(實施例1) 準備在聚醯亞胺薄膜的兩面上未使用黏著劑而貼合有 銅箔之兩面覆銅基板（聚醯亞胺薄膜厚度：25微米、銅箔厚 度：1 2微米），將兩面的銅箔蝕刻加工以形成配線。然後， 藉由UV-YAG雷射開穿有底的肓導通孔（開口徑1〇〇微 米），並施行濕式噴砂處理。形成1 296個盲導通孔。. 200829115 將70質量份雙酚A型環氧樹脂（環氧樹脂當量7〇〇〇〜 8 5 00)、及30質量份雙酚？型環氧樹脂（環氧樹脂當量160 〜1 7 0 )溶解於乙酸丁基卡必醇酯中。對其添加1 2質量份咪 唑系之潛在性硬化物，進而以佔總固體成分的5 5體積％的 方式添加銀粒子，來製造導電性膏。 藉由網版印刷，將導電性膏塡充於各個盲導通孔。導 電性膏係以被覆盲導通孔整體的方式塗布，且塗布直徑爲 150微米。隨後，在減壓下（1.3 kPa以下）加熱至70°C而預 乾燥，來除去導電性膏中的溶劑。 對塗布有導電性膏之兩面基板進行真空加壓，來製造 以菊花鏈（daisy chain)結構連接1 296個通孔之多層印刷配 線板。此外，加壓條件係溫度220°C、壓力2.0MPa。 (實施例2) 除了在塗布有導電性膏之兩面基板的兩面，層積覆蓋 薄膜（在單面上層積有厚度20微米的黏著劑層之厚度12微 米的聚醯亞胺薄膜），並進行真空加壓以外，其餘條件同實 施例1而來製造以菊化鏈結構連接1 2 9 6個通孔的多層印刷 配線板。 (實施例3) 除了在塗布有導電性膏之兩面基板的兩面’層積覆蓋 薄膜（在單面上層積有厚度20微米的黏著劑層之厚度12微 米的聚醯亞胺薄膜），使導電性膏的塗布直徑爲100微米’ 並進行真空加壓以外，其餘條件同實施例1而來製造以菊 化鏈結構連接1 296個通孔的多層印刷配線板。 200829115 - （實施例4) 除了在塗布有導電性膏之兩面基板的兩面，層積覆蓋 薄膜（在單面上層積有厚度20微米的黏著劑層之厚度12微 米的聚醯亞胺薄膜），使導電性膏的塗布直徑爲3 5 0微米， 並進行真空加壓以外，其餘條件同實施例1，而來製造以 菊化鏈結構連接1 296個通孔而成的多層印刷配線板。 (連接電阻的評估） 就所得到的多層印刷配線板，測定連接電阻。測定係 ® 從菊花鏈的兩端，藉由四端子法測定電阻來實施。又，可 認爲電阻値係塡充於12 96個通孔內之導電性膏的電阻、導 電層的電阻、及導電性膏與導電層之連接電阻的合計。 (可靠性評估） 而且，使多層印刷配線板通過峰値溫度爲2 6 0 °C的回 焊爐6次後，測定連接電阻，求得電阻上升率。 [表 1 ] _ _ 連接電阻（Ω) 初期 回焊後 上升率 實施例1 20.4Ω 20.4Ω 0% 實施例2 20.6Ω 20.6 Ω 0% 實施例3 24.0Ω 25.2Ω 5% 實施例4 22.8Ω 23.2Ω 2% 由表1能夠清楚知道，實施例1〜4的多層印刷配線板 之回焊後的電阻上升率低至5 %以下，得知連接可靠性優 良。 -18» 200829115 【圖式簡單說明】 第1圖（a)〜（f)係顯示以往的多層印刷配線基板的製程 之剖面模式圖。 第2圖（a)〜（c)係顯示以往的多層印刷配線基板的製 程之剖面模式圖。 第3圖（a)〜（d)係顯示以往的多層印刷配線基板的製 程之剖面模式圖。200829115 IX. Description of the Invention: [Technical Field of the Invention] The present invention relates to a multilayer printed wiring board having a plurality of metal wiring layers and a method of manufacturing the same. [Prior Art] A technique in which a multilayer printed wiring board can perform high-density packaging of parts and can be connected at the shortest distance (meaning electrical conduction, hereinafter referred to as connection) is a technique. IV Η (partial interlayer vias; I nterstitia 1 V ia Η ο 1 e) is a technique that can be applied to the fabrication of multilayer printed wiring boards that are required to be packaged in higher density, and is characterized by the opening between adjacent layers. The holes (through holes) are filled with a conductive material to connect adjacent layers to each other. According to IVH, since it is possible to form an interlayer connection only in a necessary portion and to mount a component on the through hole, it is possible to perform high-density wiring with high degree of freedom. Patent Document 1 describes a method of manufacturing a multilayer printed wiring board in which a conductive paste is filled in a blind via hole to perform interlayer connection. Fig. 1 and Fig. 2 are flow charts showing the manufacturing process of the multilayer printed wiring board. First, uranium is formed on the copper foil surface of the single-sided copper clad base material 3 having the insulating base material 1 and the wiring layer 2 (copper foil) on one side to form the wiring layer 2 (Fig. 1(b)). Then, after the peeling film 4 is laminated on the opposite surface of the insulating base material 1 (the first drawing (Fig. 1), perforation is performed to form the conductive via 5 (Fig. 1 (d)). After the conductive paste 6 is filled, the peeling film 4 is peeled off, and the conductive paste protrudes from the surface of the insulating base material (Fig. 1 (f)). The laminated metal film 7 is laminated (Fig. 2 (a) )), pressurizing the conductive paste to electrically connect the metal thin film 7 and the wiring layer 2, and simultaneously bonding the metal thin film 7 200829115 to the substrate 1 (Fig. 2(b)). The wiring layer of the metal thin film 7 is formed by etching the metal thin film 7 to obtain a multilayer printed wiring board having two wiring layers (Fig. 2). Patent Document 2 discloses that the electroless paste is not used but is electrolyzed. A method of manufacturing a multilayer printed wiring board in which a metal is deposited in a via hole. Fig. 3 is a flow chart showing a manufacturing flow of the multilayer printed wiring board. First, a substrate 11 including a substrate 8 and a substrate 8 is provided. The first metal layer 9 on one side and the second metal layer 1 on the other side (Fig. 3) a)), then selectively removing the first metal layer 9 and the substrate 8 to form a hole 12 reaching the second metal layer 10 (Fig. 3(b)). Next, supplying power from the second metal layer 10 is performed. Electrolytic plating causes metal to be deposited inside the hole 12 to bury the inside of the metal 13 (Fig. 3 (c)). Subsequently, wiring is formed by etching the first metal layer and the second metal layer, " A multilayer printed wiring board having two wiring layers can be obtained (Fig. 3(d)). The first metal layer can also be etched before the hole 12 is formed. Patent Document 1: Special Opening 200 1 - 3 45 5 5 SUMMARY OF THE INVENTION PROBLEM TO BE SOLVED BY THE INVENTION The conductive paste is obtained by dispersing a conductive material such as a metal powder in a binder of gg. The composition contains a solvent for dissolving the resin. Therefore, when the conductive paste is applied and the solvent is removed by heating or decompression, the volume of the stomach is reduced. Further, the conductive paste of the conductive paste The charge rate is increased according to the compression, and the conductivity of the conductive paste is improved. Therefore, in order to improve the blind via 200 829115 Connection connection reliability 'It is necessary to apply a conductive paste larger than the blind via hole'. As in Patent Document 1, it is necessary to apply a conductive paste in such a manner that the conductive paste can protrude from the surface of the insulating substrate. However, in the method of Patent Document 1, it is necessary to bond and peel the release film 4, which becomes a complicated process. Further, the etching of the wiring layer 2 and the etching of the metal thin film 7 must be performed in another process. The interlayer connection property with the metal thin film 7 is required to be uniformly pressurized when the conductive paste is pressurized, because the metal thin film 7 which has been previously etched is not used. The method of Patent Document 2 does not require a release film. However, when the metal is deposited by electroplating, the first metal layer 9 is also supplied with electric power while the plating grown from the lower portion of the blind via hole contacts the surface of the first metal layer 9 and the metal is on the surface of the first metal layer 9. The precipitation increases the thickness of the metal layer 9, making it difficult to form a fine wiring. In order to prevent this, a coating layer may be formed on the surface of the metal layer 1 但是, but this will complicate the process of the portion. Further, in order to supply electric power from the metal layer 10, it is necessary to connect the metal layer 1 〇 ' and it is difficult to etch the metal layer 10 to form wiring before forming the blind via. In view of the above problems, an object of the present invention is to provide a method for manufacturing a multilayer printed wiring board having high productivity, and it is possible to manufacture a multilayer printed wiring board having excellent connection reliability by a simple process. Further, an object of the present invention is to provide a multilayer printed wiring board excellent in reliability. Means for Solving the Problems The present invention relates to a method for producing a multilayer printed wiring board (Application No. 200829115, item 1), which is characterized in that: (1) a two-sided substrate preparation process for preparing a two-sided substrate having a substrate a first conductive layer disposed on a surface of one side of the substrate, and a second conductive layer disposed on the other side surface of the substrate; (2) a wiring forming process for selectively removing the foregoing a first conductive layer and the second conductive layer to form a wiring; (3) a blind via forming process for selectively removing the substrate and forming the second conductive layer as a bottom surface and the substrate And the first conductive layer is a blind via hole of the wall surface; and (4) a conductive paste coating process is performed on the surface of the first conductive layer on the outer circumference of the blind via hole and the bottom surface of the blind via hole in a continuous manner A conductive paste is applied; the first conductive layer and the second conductive layer are electrically connected. Fig. 4 (a) to (d) show the degree of flow of an example of the method of manufacturing the multilayer printed wiring board of the present invention. Preparing a double-sided substrate 1 7 having a substrate 14 , a first conductive layer 15 disposed on a surface of one side of the substrate, and a second surface disposed on the other side surface of the substrate Conductive layer 16 (Fig. 4(a)). Then, the first conductive layer 15 and the second conductive layer 16 are selectively removed by etching or the like to form a wiring (Fig. 4(b)). Then, the substrate 14 is selectively removed to form a wiring. Blind vias 18. The blind via hole 18 has a second conductive layer 16 as a bottom surface and a substrate 14 and a first conductive layer 15 as a wall surface. Further, a conductive paste 19 is applied to the formed blind via. As shown in Fig. 4(d), the conductive paste is applied in a continuous manner on the surface of the first conductive layer 15 on the outer circumference of the via hole 8 and the bottom surface of the blind via. Subsequently, the conductive paste 1 9 is heated as necessary to harden it. Also 200829115 • It can be hardened by pressing a conductive paste. The first conductive layer 15 and the second conductive layer 16 are electrically connected by the above process. Since the surface of the first conductive layer 15 on the outer periphery of the blind via hole is also coated with a conductive paste, not only the wall surface of the blind via hole but also the surface of the first conductive layer 15 is also connected to the second conductive layer 16. Thereby, the conductivity of the blind via hole can be improved, and a multilayer printed wiring board excellent in connection reliability can be obtained. Moreover, since the process of bonding or peeling off the film is not required, the multilayer printed wiring board can be manufactured by a simple process. Further, since the blind via holes 18 can be formed after the first conductive layer 15 and the second conductive layer 16 are formed, the first conductive layer 15 and the second conductive layer 16 can be simultaneously etched to form wiring. Further, by forming wiring in advance, as shown in Fig. 4(d), a multilayer printed 'wiring board having three or more conductive layers can be produced by batch-stacking a substrate on which a conductive paste is applied and other substrates. Further, the multilayer printed wiring board is a printed wiring board having two or more layers of the conductive layer, and also includes two panels. The invention of claim 2 is the method for manufacturing a multilayer printed wiring board according to the first aspect of the invention, wherein the blind via hole has a diameter of 30 μm or more and 200 μm or less. By making the above-described blind via hole diameter 30 μm or more and 200 μm or less, it is possible to achieve both connection reliability and high-density packageability. Further, the shape of the blind via hole may be a circular shape, an elliptical shape, or an arbitrary shape. When the shape is other than a circular shape, the maximum length of the opening portion is used as the diameter of the blind via hole. The invention of claim 3 is the method for producing a multilayer printed wiring board according to claim 1 or 2, wherein the conductivity is applied by coating the entire outer circumference of the blind -10-200829115* via hole. The paste can be connected to the first conductive layer 15 and the second conductive layer 16 in a good manner, and a multilayer printed wiring board excellent in connection reliability can be obtained. The invention of claim 4 is the method for producing a multilayer printed wiring board according to claim 3, wherein the coating diameter of the conductive paste is A, and when the diameter of the conductive via is B, A and The difference between B is 20 μm or more and 200 μm or less. By applying the conductive paste in this manner, it is possible to achieve connection reliability and high-density wiring. Further, the application shape of the conductive paste may be a circular shape, an elliptical shape, or an arbitrary shape. When the shape is other than a circular shape, the maximum length of the coating portion is used as the coating diameter of the conductive paste. The invention of claim 5, wherein the method of manufacturing the multilayer printed wiring board according to any one of claims 1 to 4, further comprising: a process of laminating an insulating layer for covering at least the two-sided substrate The surface of one side is laminated after the process of applying the conductive paste, and then the insulating layer is laminated to press the insulating layer to the double-sided wiring substrate. Fig. 5(a) is a flow chart showing an example of a method of manufacturing a multilayer printed wiring board according to the invention of claim 5 of the patent application. The insulating layer (covering film) 22 having the insulating substrate 20 and the adhesive layer 21 is laminated on the both-sided substrate 17 to which the conductive paste has been applied (Fig. 5(a)). The conductive paste is heated and dried in advance before lamination as necessary. Subsequently, when the laminate of the insulating layer and the double-sided substrate is pressed, the insulating layer can be adhered to the double-sided substrate 17 by the adhesive layer 2 1 . Most of the pressurization is carried out under heating conditions, and the process can perform thermal hardening of the conductive paste and adhesion of the insulating layer at one time. A method of manufacturing a multilayer printed wiring board excellent in productivity can be provided. Insulating layer (covering film) -11- 200829115 * It is possible to laminate the opposite side of the coated double-sided substrate 17 (the second conductive layer is covered), and it is also possible to laminate both surfaces and pressurize at the same time. The invention of claim 6 is a multilayer printed wiring characterized by having a substrate, an electric layer disposed on one side surface of the substrate, and a second surface disposed on the other side surface of the substrate And the first conductive layer and the second conductive layer are a multilayer printed wiring board electrically connected by a conductive cured material, having the conductive layer as a bottom surface, the substrate and the first conductive layer a through hole of the wall surface, and a surface of the first conductive layer on the outer circumference of the blind via hole is connected to the bottom surface of the 肓 conductive via hole, and the cured material of the conductive paste is a first conductive layer which is a blind conductive via hole Since the surface is connected to the bottom surface of the blind guide* by the cured material of the conductive paste, the conductive layer and the second conductive layer are well connected, and a multilayer printed wiring board excellent in connection can be obtained. Advantageous Effects of Invention The present invention can provide a method for manufacturing a multilayer printed wiring board having high productivity, and can manufacture a printed wiring board having excellent connection reliability by a simple process, and can provide a multilayer printed wiring board excellent in connection reliability. BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, the present invention will be described in detail. The insulating resin film used in the substrate used in the present invention may, for example, be a polyethylene terephthalate or a polyamine, and if heat resistance is considered, it is a polyimine. The resin of the main body is thin; the side is more than the board, and the second conductive guide of the conductive paste is the second blind guide. Because of the first hole of the through hole, the multi-layer brush is equipped with the ‘capable 丨醯 i i film is -12- 200829115 • should be. The thickness of the substrate can be appropriately selected in accordance with the use of the multilayer printed wiring board, and usually it is about 5 μm to 5 μm. A metal foil can be used for the first conductive layer and the second conductive layer. In consideration of conductivity and durability, a metal foil mainly composed of copper is preferable, and copper or an alloy containing copper as a main component can be exemplified. Silver, aluminum, nickel, etc. can be used in addition to copper. The thickness of the conductive layer can be appropriately selected in accordance with the use of the multilayer printed wiring board, and it is usually used in the range of 5 μm to 50 μm. The conductive layer and the substrate can be bonded directly or through an adhesive. A commercially available double-sided copper-clad substrate in which copper foil is bonded to both surfaces of a polyimide film can also be used. The first conductive layer and the second conductive layer are selectively removed by etch processing to form wiring. The etching process can be exemplified by chemical etching (immersion etching) in which a wiring pattern such as a photoresist layer is formed on a conductive layer, and then etched in an etchant for etching an electric conduction layer to remove a portion other than the wiring pattern, and then Remove the light ~ resist layer. When the first conductive layer and the second conductive layer are simultaneously etched, the etching process can be performed at one time, and the manufacturing cost can be reduced. The double-sided substrate on which the wiring is formed is selectively removed by a laser or the like to form a blind via hole by selectively removing the substrate or the substrate from the first conductive layer. Laser processing can use lasers such as UV-YAG lasers, C〇2 lasers, etc., and blind via holes can be formed by methods other than laser processing. The diameter of the via hole is preferably from 30 μm to 200 μm. When the diameter is less than 30 μm, the contact area becomes small, and the connection resistance between the first conductive layer and the second conductive layer becomes large. Further, when the diameter is larger than 20 μm, the via hole is larger than the wiring width, and high-density packaging cannot be performed. More preferably, the blind vias have a diameter of from 50 micrometers to 150 micrometers. To remove the stain after laser processing', it is possible to use the wet de-staining treatment using alkali and perchloric acid-13-200829115 potassium, sandblasting, dispersing inorganic particles in: wet blasting, and plasma treatment Wait. The conductive paste used in the present invention is one in which a conductive material such as a metal powder is dispersed in a binder resin. The metal species may, for example, be platinum, gold, silver or palladium. Among them, in particular, silver powder or silver-coated copper powder is used, and therefore, it is preferable because it can exhibit excellent conductivity. As the binder resin, an epoxy resin, a phenol resin, a polyester tree urethane resin, an acrylic resin, a melamine resin, a polyamine resin, a polyamidoximine resin, or the like can be used. When considering the properties of the conductive paste, it is preferable to use a thermosetting resin, and it is preferable to use an epoxy resin. The type of the epoxy resin is not particularly limited, and examples thereof include a naphthyl resin, a novolac epoxy resin, and a biphenyl epoxy, in addition to a bisphenol type epoxy resin having a skeleton such as bisphenol A, F, and AD. Resin, dicycloolefin epoxy resin, and the like. Further, a phenol resin of a high molecular weight epoxy resin can also be used. The binder resin can be used by being dissolved in a solvent, and an organic compound such as a solvent, an ether system, a ketone system, an ether ester system, an alcohol system, a hydrocarbon system or an amine system can be used as a solvent. The conductive paste is preferably a tubular boiling point solvent by a method such as screen printing, and is preferably a solvent having a good boiling point of the cartridge, and particularly preferably carbitol acetate or butyl carbitol acetate. Further, it is sufficient to combine a plurality of such solvents and use them. These materials can be mixed and dispersed into a uniform state by a roll, a rotary stirring defoaming machine or the like to produce a conductive paste. Applying the above-mentioned conductive paste by means of screen printing or the like, and charging the liquid conductive neutral beryllium copper, the presently good fat, the bismuth heat-resistant to the special S, and the epoxy butyl oxide ester solvent, can also be used. Incoming call 200829115, the paste is filled in the aforementioned through hole. When the conductive paste is applied so that the surface of the first conductive layer on the outer circumference of the via hole is connected to the bottom surface of the blind via, the first conductive layer and the second conductive layer are electrically connected through the conductive paste. It is preferable that the conductive paste covers all of the outer circumference and the bottom surface of the blind via hole, but it may be omitted if it is electrically connected. When the conductive paste is applied to cover the entire outer periphery of the via hole, it is preferable because the connection reliability is high. Further, when the coating diameter of the conductive paste is A and the diameter of the blind via is B, the difference between A and 8 is preferably 20 μm or more and 200 μm or less. When the coating diameter of the conductive paste is smaller than the crucible, the connection resistance between the first conductive layer and the second conductive layer becomes high, and the connection reliability is lowered. Further, when the coating diameter of the conductive paste is larger than that of the crucible, it becomes larger than the wiring of the connection portion, and it is difficult to perform high-density encapsulation. Further, when the conductive paste is coated to be filled in the entire interior of the via hole, the connection resistance between the first conductive layer and the second conductive layer can be lowered. It is preferred to pretreat the coated conductive paste to remove the solvent contained in the conductive paste. By removing the residual solvent in the conductive paste, it is possible to prevent voids from occurring in the blind via holes, and it is possible to reduce the connection resistance 値. Further, when pre-drying is carried out in a reduced pressure atmosphere, the solvent can be efficiently removed even if the pre-drying temperature is lowered, and the curing reaction of the binder resin during pre-drying can be suppressed. Subsequently, the conductive paste is hardened. The curing of the conductive paste is usually heat hardening, but it can also be carried out by a method such as ultraviolet curing. Further, in the case where a thermoplastic resin is used as the conductive paste of the binder resin, the conductive paste is cured by drying the solvent, and this article is also referred to as conductive -15-200829115 " Things. Further, when the conductive paste is pressed while being cured, the conductivity can be improved, which is preferable. The conductive paste is compressed by pressurization, the connection resistance between the first conductive layer and the second conductive layer is reduced, and the compressed conductive paste is also filled in the blind via. When only the double-sided substrate coated with the conductive paste is pressurized, a multilayer printed wiring board through which the first conductive layer and the second conductive layer are connected can be obtained by passing through the blind via. By laminating the wiring board and other wiring boards, it is also possible to manufacture a multilayer printed wiring board having three or more wiring layers. Further, by laminating an insulating layer (covering a film) on one surface or both surfaces of the double-sided substrate coated with the conductive paste, it is possible to perform adhesion of the cover film and pressurization of the conductive paste at one time. The pressurization is preferably carried out under heating. Further, when the pressure is applied in a vacuum state, it is more preferable to prevent voids from being generated in the conductive paste. The 'heat temperature system' can be appropriately selected depending on the type of the conductive paste, and is usually from 100 〇C to 2,800 〇C. EXAMPLES ® Next, the present invention will be described based on examples. However, the scope of the invention is not limited to the embodiments. "/-(Example 1) Two-sided copper-clad substrate to which copper foil was bonded without using an adhesive on both sides of a polyimide film (polyimide film thickness: 25 μm, copper foil thickness: 1) 2 micrometers), the copper foil on both sides is etched to form wiring. Then, a bottomed crucible via (opening diameter of 1 μm) was opened by a UV-YAG laser and subjected to wet blasting. Form 1 296 blind vias. 200829115 70 parts by mass of bisphenol A type epoxy resin (epoxy resin equivalent 7 〇〇〇 ~ 8 5 00), and 30 parts by mass of bisphenol? The epoxy resin (epoxy equivalent weight 160 to 170) was dissolved in butyl carbitol acetate. To the above, 12 parts by mass of an imidazole-based latent cured product was added, and silver particles were added in an amount of 55 % by volume based on the total solid content to prepare a conductive paste. The conductive paste is filled in each of the blind via holes by screen printing. The conductive paste was applied in such a manner as to cover the entire via hole, and the coating diameter was 150 μm. Subsequently, it was preheated by heating to 70 ° C under reduced pressure (1.3 kPa or less) to remove the solvent in the conductive paste. The two-sided substrate coated with the conductive paste was vacuum-pressed to fabricate a multilayer printed wiring board in which 1,296 through holes were connected in a daisy chain structure. Further, the pressurization conditions were a temperature of 220 ° C and a pressure of 2.0 MPa. (Example 2) A laminate film (a 12 μm thick polyimide film having a thickness of 20 μm on one side) was laminated on both surfaces of a double-sided substrate coated with a conductive paste, and was carried out. In the same manner as in Example 1 except for vacuum pressurization, a multilayer printed wiring board in which 1,269 holes were connected in a daisy chain structure was manufactured. (Example 3) Conductive coating was carried out except that a cover film was laminated on both sides of a double-sided substrate coated with a conductive paste (a polyimide film having a thickness of 20 μm laminated on one side of a 20 μm thick adhesive layer) was used. A multilayer printed wiring board in which 1,296 through holes were connected in a daisy chain structure was produced in the same manner as in Example 1 except that the coating thickness of the paste was 100 μm and vacuum pressure was applied. 200829115 - (Example 4) A laminate film (a 12 μm thick polyimide film having a thickness of 20 μm on one side) was laminated on both sides of a double-sided substrate coated with a conductive paste, A multilayer printed wiring board obtained by connecting 1,296 through holes in a daisy chain structure was produced in the same manner as in Example 1 except that the coating thickness of the conductive paste was 550 μm and vacuum pressure was applied. (Evaluation of Connection Resistance) The connection resistance was measured for the obtained multilayer printed wiring board. The measurement system ® is implemented by measuring the resistance from the both ends of the daisy chain by the four-terminal method. Further, it is considered that the resistance 値 is the total of the resistance of the conductive paste in the 12 96 through holes, the resistance of the conductive layer, and the connection resistance between the conductive paste and the conductive layer. (Reliability evaluation) Further, the multilayer printed wiring board was passed through a reflow furnace having a peak temperature of 260 °C for 6 times, and then the connection resistance was measured to obtain a resistance increase rate. [Table 1] _ _ Connection resistance (Ω) Initial rate of reflow after reflow Example 1 20.4 Ω 20.4 Ω 0% Example 2 20.6 Ω 20.6 Ω 0% Example 3 24.0 Ω 25.2 Ω 5% Example 4 22.8 Ω 23.2 Ω 2% As is clear from Table 1, the resistance increase rate after reflow of the multilayer printed wiring boards of Examples 1 to 4 was as low as 5% or less, and it was found that the connection reliability was excellent. -18» 200829115 [Brief Description of the Drawings] Fig. 1 (a) to (f) are schematic cross-sectional views showing a process of a conventional multilayer printed wiring board. Fig. 2 (a) to (c) are schematic cross-sectional views showing a process of a conventional multilayer printed wiring board. Fig. 3 (a) to (d) are schematic cross-sectional views showing a process of a conventional multilayer printed wiring board.
第4圖（a)〜（d)係顯示本發明的多層印刷配線基板的 製程之剖面模式圖。 第5圖（a)係顯禾本發明的多層印刷配線基板的製程之 剖面模式圖。 【元件符號說明】 1 絕 緣 性 基 材 2 配 線 層 3 單 面 覆 銅 箔_材 4 剝 離 用 薄 膜 5 盲 導 通 孔 6 導 電 性 膏 7 金 屬 薄 膜 8 基 材 9 第 — 金 屬 層 10 第 二 金 屬 層 11 基 板 12 孔 -19- 200829115Fig. 4 (a) to (d) are schematic cross-sectional views showing the process of the multilayer printed wiring board of the present invention. Fig. 5(a) is a schematic cross-sectional view showing the process of the multilayer printed wiring board of the present invention. [Explanation of component symbols] 1 Insulating substrate 2 Wiring layer 3 Single-sided copper clad_Material 4 Peeling film 5 Blind via 6 Conductive paste 7 Metal film 8 Substrate 9 First - Metal layer 10 Second metal layer 11 Substrate 12 hole -19- 200829115
13 金 屬 14 基 材 15 第 一 導 電 層 16 第 二 導 電 層 17 兩 面 基 板 18 盲 導 通 孔 19 導 電 性 膏 20 絕 緣 性 基 材 2 1 黏 著 層 22 絕 緣 層 (覆蓋薄膜） -20-13 metal 14 base material 15 first conductive layer 16 second conductive layer 17 two-sided base plate 18 blind via hole 19 conductive paste 20 insulating substrate 2 1 adhesive layer 22 insulating layer (cover film) -20-