TW200826286A - Sensor semiconductor device and method for fabricating the same - Google Patents

Sensor semiconductor device and method for fabricating the same Download PDF

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Publication number
TW200826286A
TW200826286A TW095146384A TW95146384A TW200826286A TW 200826286 A TW200826286 A TW 200826286A TW 095146384 A TW095146384 A TW 095146384A TW 95146384 A TW95146384 A TW 95146384A TW 200826286 A TW200826286 A TW 200826286A
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Taiwan
Prior art keywords
sensing
colloid
transparent cover
wafer
substrate
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TW095146384A
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Chinese (zh)
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Tse-Wen Chang
Cheng-Yi Chang
Chang-Yueh Chan
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Siliconware Precision Industries Co Ltd
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Priority to TW095146384A priority Critical patent/TW200826286A/en
Publication of TW200826286A publication Critical patent/TW200826286A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909—Post-treatment of the connector or wire bonding area
    • H01L2224/8592—Applying permanent coating, e.g. protective coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/162—Disposition
    • H01L2924/16235—Connecting to a semiconductor or solid-state bodies, i.e. cap-to-chip
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/1815—Shape

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

A sensor semiconductor device and a method for fabricating the same are disclosed. The method includes mounting and wire-bonding a plurality of sensor chips having a transparent covering to substrates of a substrate module, forming first and second encapsulants between the adjacent sensor chips so as to allow the first encapsulant to encapsulate the ends of bonding wires in contact with the sensor chips and flanks of the transparent covering such that the first and second encapsulants together encapsulate the sensor chips and bonding wires but not the transparent covering, and cutting between the substrates. Young's modulus of the first encapsulant is less than that of the second encapsulant, and thermal expansion coefficient of the first encapsulant ranges between that of the second encapsulant and that of the sensor chips and transparent covering, thereby preventing flank-delamination of the transparent covering and neck-severing of ball contacts of the bonding wires.

Description

200826286 九、發明說明： 【發明所屬之技術領域】 本發明係有關於一種半導體裝置及其製法，尤指一種 感測式半導體裝置及其製造方法。 【先前技術】 傳統影像感測式封裝件（Image sensor package)主要係 將感測晶片（Sensor chip)接置於-晶片承載件上，並透過 ，線加以電性連接該感測晶片及晶片承载件後，於該感測 曰曰片上方封盍住一玻璃，以供影像光線能為該感測晶片所 擷取。如此，該完成構裝之影像感測式封裝件即可供系統 廠進行整合至如印刷電路板（PCB)等外部裝置上，以供如 數位相機（DSC)、數位攝影機（DV)、光學滑鼠、行動電話、 指紋辨識器等各式電子產品之應用。 習知如美國專利第 6,060,340、6,262,479、及 6,590,269 號案所揭路之感測式封裝件，係預先製備攔壩結構（dam) 於晶片承載件上，再將感測晶片接著及打線至該晶片承載 件上，並黏置一透光玻璃於攔壩結構上以封蓋住該空間， 惟此感測式封裝件受限於晶片承載件至少必須預留足夠之 空間來置放攔壩結構，使得該感測式封裝件的大小受到限 制，無法進一步縮小。 凊參閱第1A圖，鑑於前述缺失，美國專利US6,995,462 揭示出一種毋需使用攔壩結構之感測式封裝件，其主要係 將玻璃15預先黏置在感測晶片丨〇上，其中該感測晶片工〇 之主動面設有感測區103及電極墊104,並使該玻璃15藉 19608 5 200826286 • 一黏著層14接置於感測晶片10上，以覆蓋且密封該感測 • 區1〇3，避免外在環境之污染粒子（particle)污染該感測晶 片1〇,接著再將該感測晶片10接置於基板11上，並利用 銲線12電性連接該感測晶片1〇及基板11，之後於該基板 • 11上形成包覆感測晶片10及銲線12之封裝材料16,該封 衣材料16係例如為液態封裝化合物（liquid mold compound, LMC)或環氧樹脂（ep〇Xy)。 惟請參閱第1B圖，前述之感測式封裝件中，因該玻 ' 璃15與如液態封裝化合物（LMC)或環氧樹脂（epoxy)等封 裝材料16之熱膨脹係數（CTE)差異過大，易因受熱應力作 用而造成在該玻璃15側邊與封裝材料16接合處發生脫 層、裂損C，甚而導致外在水氣或污染物入侵至該感測晶 片，嚴重影響產品壽命。 再者’復請配合參閱第1C圖，係為對應前述第i圖 之感測式封裝件之局部放大示意圖，同樣地，由於該銲線 % 12(金線）與如液態封裝化合物（LMC)或環氧樹脂（ep〇x力等 封裝材料16之熱膨脹係數（CTE)差異過大，易造成銲線接 置於該感測晶片1〇 一端之所形成球型接點（ball b〇nd)121 上方之頸部（neck)斷裂，而產生不良品問題。 、、因此’如何提供一種感測式半導體裝置及其製法，得 以避免透光蓋體與封裝材料接觸處發生脫層情況，以及銲 線球形接點之頸部發生斷裂等問題，的確為相關領域上所 需迫切面對之課題。 【發明内容】 6 19608 200826286 ' 鑑於前述習知技術之缺失，本發明之主要目的係在提 •供一種於透光蓋體與封裝材料接觸處不易發生脫層之感測 式半導體裝置及其製法。 象 本發明之另一目的係在提供一種感測式半導體裝置 '及其製法，以供電性連接感測晶片與晶片承載件之銲線球 形接點的頸部不易發生斷裂問題。 為達前述及其他目的，本發明之感測式半導體裝置之 製法主要係包括：提供一具複數感測晶片之晶圓，其中該 I感測晶片具有主動面及相對之非主動面，該主動面設有感 測區，於該感測晶片之主動面上接置一透光蓋體並封蓋住 該感測區；切割該晶圓，以形成複數設有透光蓋體之感測 晶片；提供一具複數基板之基板模組片，以對應各該基板 上接置該設有透光蓋體之感測晶片，並利用銲線電性連接 該感測晶片及基板，其中該感測晶片係以非主動面對應接 置於該基板上；形成第一與第二膠體於該感測晶片及基板 、模組片上，其中該第一膠體係包覆該銲線用以電性連接至 該感測晶片之一端與該透光蓋體侧邊，以及該第二膠體係 形成於該基板模組片上相鄰之感測晶片間且相對於第一膠 體之其餘區域，以使該第一與第二膠體包覆該感測晶片及 銲線但未覆蓋該透光蓋體；以及沿各該基板間進行切割， 以形成複數感測式半導體裝置。 於本發明中該第一膠體之楊氏係數係小於該第二膠 體之揚氏係數，且該第一膠體之熱膨脹係數係介於該第二 膠體之熱膨脹係數與該感測晶片及透光蓋體之熱膨脹係數 7 19608 200826286 之間—俾可利用包覆該銲線端及透光蓋體侧邊之低楊氏係 .數的第$體予以保濩該銲線球开》接點之頸部，同時因該 •第#體之熱膨脹係數係介於該第二膠體之熱膨服係數與 該感測a曰片及透光盍體之熱膨脹係數之間，而得以避免習 -知透光蓋體與封裂材料因熱膨脹係數差異過大，受熱應力 作用而造成在該透光蓋體侧邊發生脫層問題。 本發明亦揭露一種感測式半導體裝置，係包括：基 ，板；接置於該基板上之感測晶片，其中該感測晶片具有主 、動面及相對之非主動面，該主動面設有感測區，且該感測 晶片係以其非主動面對應接置於該基板上；透光蓋體，係 置於該感測晶片之主動面上並封蓋該感測區；銲線，係用 以電性連接該感測晶片及該基板；第一膠體，係包覆該銲 線用以電性連接至該感測晶片之一端及該透光蓋體側邊； 以及第二膠體，係形成於該基板上相對於該第一膠體之其 餘區域，以透過該第一與第二膠體包覆該感測晶片及銲 I 線，且未覆蓋至該透光蓋體。 亦即’本發明之感測式半導體裝置及其製法係提供複 數具有透光蓋體之感測晶片，以將其接置於具複數個基板 之基板模組片中對應各該基板上，並藉由銲線電性連接該 感測晶片及該基板，然後形成第一與第二膠體在基板上相 鄰之感測晶片間，以包覆該感測晶片及銲線，其中該第一 膠體係包覆該銲線用以電性連接至該感測晶片之一端及該 透光蓋體侧邊，以及該第二膠體係形成於第一膠體之其餘 區域，該第一與第二膠體係未覆蓋該透光蓋體，以藉由該 8 19608 200826286 第一膠體之楊氏係數係小於該第二膠體之揚氏係數，且該 第一膠體之熱膨脹係數係介於該第二膠體之熱膨脹係數與 該感測晶片及透光蓋體之熱膨脹係數之間，俾可保護該銲 線球形接點之頸部，同時避免透光蓋體侧邊直接與第二膠 體接觸，而因彼此間熱膨脹係數差異過大，易受熱應力作 用而造成在該透光蓋體侧邊發生脫層問題。之後，即可沿 各該基板間進行切割，以形成複數感測式半導體裝置。 【實施方式】 以下係糟由特定的具體實施例說明本發明之實施方 式，熟習此技藝之人士可由本說明書所揭示之内容輕易地 瞭解本發明之其他優點與功效。 請參閱第2A至2F圖，係為本發明之感測式半導體裝 置及其製法第一實施例之剖面示意圖。且以下將以採用批 次方式大量製造生產本發明之感測式半導體裝置作為說 明。 如第2A圖所示，提供一具複數感測晶片2〇之晶圓 200 ’其中該感測晶片20具有主動面201及相對之非主動 面2〇2，該主動面201設有感測區203。 如第2B圖所示，於該感測晶片20之主動面201上接 置例如為玻璃之透光蓋體25以封蓋住該感測區203，接 著切剎該晶圓，以形成複數設有透光蓋體25之感測晶片 20 0 如第2C圖所示，提供一具複數個基板21之基板模組 片210，以對應各該基板21上接置該設有透光蓋體25之 19608 9 200826286 感測晶片20 ’並利用銲線（金線）22電性連接該感測晶片2〇 及基板21 ’其中該感測晶片20係以非主動面202對應接 置於該基板21上。 該銲線22係為金線’其係利用一打線機（wire bonder ) 之銲嘴（未圖示）於該感測晶片上利用銲嘴先形成一球型接 點（ball bond ) 221 ’再移動該銲嘴至該基板21並截斷該 銲線22，以形成該感測晶片20與基板21之電性連接。 如第2D及第2E圖所示，先後形成第一膠體261與第 二膠體262於該感測晶片20及基板模組片210上，其中該 第一膠體261係包覆該銲線22用以電性連接至該感測晶片 20之一端（即包覆該銲線22之球型接點221及其上方之頸 部）及該透光蓋體25側邊，以及該第二膠體262係形成於 該基板模組片210上相鄰之感測晶片2〇間且相對於第一膠 體261之其餘區域，以使該第一與第二膠體261,262包覆 該感測晶片20及銲線22且未覆蓋該透光蓋體25。 該第一膠體261(如矽膠）之揚氏係數係小於該第二膠 體262(如液態封裝化合物或環氧樹脂）之楊氏係數，且使該 第一膠體261之熱膨脹係數介於該第二膠體262之熱膨脹 係數與該感測晶片20及透光蓋體25之熱膨脹係數之間， 並藉由該第一膠體261包覆該銲線22用以電性連接至該感 測晶片20之一端及該透光蓋體25側邊，而得以保護該銲 線球形接點之頸部，同_免習知透光蓋體與封裝材料熱 膨脹係數差異過大時，受減力作用而造成在該透光蓋體 側邊發生脫層問題。 19608 10 200826286 如第2F圖所示，之後即可沿各該基板21間進行切 割，以形成複數感測式半導體裝置。 透過如述之製法’本發明亦揭露一種感測式半導體裝 置’係包括·基板21 ;接置於該基板21上之感測晶片2〇， 其中該感測晶片20具有主動面201及相對之非主動面 202，該主動面201設有感測區203，且該感測晶片2〇係 以其非主動面203對應接置於該基板21上；透光蓋體25， 係置於該感測晶片20之主動面201上並封蓋該感測區 203;銲線22,係用以電性連接該感測晶片2〇及該基板 第一膠體2 6卜係包覆該銲線2 2用以電性連接至該感測晶 片20之一端及該透光蓋體25侧邊；以及第二膠體π]， 係形成於該基板21上相對於該第一膠體261之其餘區域， 以使該第:與第二膠體26 i，262包覆該感測晶片2()及鲜線 22且未覆盍至該透光蓋體25。該第一膠體之揚氏係數 係小於該第二膠體262之揚氏係數，且使該第-膠體261 之熱膨脹係數〃於該第二踢體262之熱膨脹絲與該感測 晶片20及透光蓋體25之熱膨脹係數之間。 一明参閱第^圖，係為顯示本發明之感測式半導體裝置 第二實施例之示意圖’本實施例之感測式半導體裝置食前 述實施例ί致相同’主要差異在於第一膠體361之高度約 = 體35之^面等高’以全面包覆該透光蓋體35 側邊，並包覆銲線32用以電性連接至感測晶片30之-端， 免透光蓋體侧邊發生脫層及鲜線球形接點之頸部 19608 11 200826286 —一请芩閱第4圖，係為顯示本發明之感測式半導體裝置 第一貝施例之不意圖，本實施例之感測式半導體裝置與前 述實施例大致相同，主要差異在於第一膠體461之高度約 略舁透光盍體45之頂面等高，以全面包覆該透光蓋體45 側适同日守全面包覆用以電性連接感測晶片40及基板41 之銲線42,更可有效避免透光蓋體側邊發生脫層及銲線球 形接點之頸部斷裂問題。 、復请芩閱第5A至5C圖，係為顯示本發明之感測式半 $體裝置及其製法第四實施例之示意圖，本實施例之感測 式半‘體裝置及製法與前述實施例大致相同，主要差異係 百先如第5A圖所示，將複數具透光蓋體55之感測晶片％ 對應接置至基板模組片51〇之各基板51上，並利用銲線 52電性連接至該基板51後，先於該基板模組片上相 對各感測晶片50間形成第二膠體562，其中該第二膠體562 亚未接觸至該銲線52用以電性連接至該感測晶片5〇之一 端及該透光盍體55側邊，以界定出供後續形成第—膠體之 區域。 如第5B圖所示，接著形成第一膠體561，並使該第一 膠體561包覆該銲線52用以電性連接至該感測晶片別之 一端及該透光蓋體55側邊。 如第5C圖所示，之後即沿各該基板51間進行切割， 以製得本發明之感測式半導體裝置。 因此，本發明之感測式半導體裝置及其製法係提供複 數具有透光蓋體之感測晶片，以將其接置於具複數個基板 19608 12 200826286 之基板模組片中對應各該基板上，並藉由銲線電性連接該 感測晶片及該基板，然後形成第一與第二膠體在基板上相 鄰之感測晶片間，以包覆該感測晶片及銲線，其中該第一 膠體係包覆該銲線用以電性連接至該感測晶片之一端及該 透光蓋體側邊，以及該第二膠體係形成於第一膠體之其餘 區域，該第一與第二膠體係未覆蓋該透光蓋體，以藉由該 第一膠體之楊氏係數係小於該第二膠體之楊氏係數，且該 第一膠體之熱膨脹係數係介於該第二膠體之熱膨脹係數與 該感測晶片及透光蓋體之熱膨脹係數之間，俾可保護該銲 線球形接點之頸部，同時避免透光蓋體側邊直接與第二膠 體接觸，而因彼此間熱膨脹係數差異過大，易受熱應力作 用而造成在該透光蓋體側邊發生脫層問題。之後，即可沿 各該基板間進行切割，以形成複數感測式半導體裝置。 上述貫施例僅例示性說明本發明之原理及其功效，而 非用於限制本發明，任何熟習此項技藝之人士均可在不違 背本發明之精神及範疇下，對上述實施例進行修飾與改 變。因此，本發明之權利保護範圍，應如後述之申請專利 範圍所列。 【圖式簡單說明】 第1A圖係習知美國專利us6,995,462所揭露之感測 式封裝件剖面示意圖； 第1B圖係習知感測式封裝件於玻璃側處發生脫層現 象之剖面示意圖； 第1C圖係習知感測式封裝件於銲線球形接點之頸部 13 19608 200826286 發生斷裂現象之剖面示意圖； 第2A至2F圖係本發明之感測式半導體裝置及製法第 一實施例之剖面示意圖； 第3圖係本發明之感測式半導體裝置第二實施例之剖 面示意圖； 第4圖係本發明之感測式半導體裝置第三實施例之剖 面示意圖；以及 第5A至5C圖係本發明之感測式半導體裝置及其製法 第四實施例之剖面示意圖。 【主要元件符號說明】 10 感測晶片 103 感測區 104 電極墊 11 基板 12 鲜線 121 球型接點 14 黏著層 15 玻璃 16 封裝材料 20 感測晶片 200 晶圓 201 主動面 202 非主動面 感測區 14 19608 203 200826286 21 基板 210 基板模組片 22 鲜線 221 球型接點 25 透光蓋體 261 第一膠體 262 第二膠體 30 感測晶片 32 鲜線 35 透光蓋體 361 第一膠體 40 感測晶片 41 基板 42 銲線 45 透光盍體 461 第一膠體 50 感測晶片 51 基板 52 焊線 510 基板模組片 55 透光蓋體 561 第一膠體 562 第二膠體 C 脫層BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of fabricating the same, and more particularly to a sensing semiconductor device and a method of fabricating the same. [Previous Art] A conventional image sensor package mainly connects a sensor chip to a wafer carrier, and is electrically connected to the sensing chip and the wafer carrier. After the piece is sealed, a glass is sealed on the sensing cymbal for the image light to be captured by the sensing chip. In this way, the completed image sensing package can be integrated by the system factory into an external device such as a printed circuit board (PCB) for use in, for example, a digital camera (DSC), a digital camera (DV), and an optical slide. Applications for a variety of electronic products such as mice, mobile phones, and fingerprint readers. A sensing package as disclosed in U.S. Patent Nos. 6,060,340, 6,262,479, and 6,590,269, the dam is previously prepared on the wafer carrier, and then the sensing wafer is subsequently and wired to the wafer. A light-transmissive glass is adhered to the dam structure to cover the space, but the sensing package is limited by the wafer carrier, and at least enough space must be reserved for the dam structure. The size of the sensing package is limited and cannot be further reduced. Referring to FIG. 1A, in view of the aforementioned deficiencies, US Pat. No. 6,995, 462 discloses a sensing package that requires the use of a dam structure, which primarily pre-bonds the glass 15 to the sensing wafer stack, wherein The active surface of the sensing wafer process is provided with a sensing region 103 and an electrode pad 104, and the glass 15 is attached to the sensing wafer 10 by an adhesive layer 14 to cover and seal the sensing. In the area 1〇3, the contaminating particles of the external environment are prevented from contaminating the sensing wafer 1 , and then the sensing wafer 10 is placed on the substrate 11 , and the sensing wafer is electrically connected by the bonding wire 12 . After the substrate 11 is formed, an encapsulation material 16 covering the sensing wafer 10 and the bonding wire 12 is formed on the substrate 11. The sealing material 16 is, for example, a liquid mold compound (LMC) or an epoxy. Resin (ep〇Xy). However, referring to FIG. 1B, in the above-mentioned sensing package, the thermal expansion coefficient (CTE) of the glass material 15 and the packaging material 16 such as a liquid encapsulating compound (LMC) or an epoxy resin are too large. It is easy to cause delamination and cracking C at the joint of the side of the glass 15 and the encapsulating material 16 due to thermal stress, and even cause external moisture or contaminants to invade the sensing wafer, which seriously affects the product life. Furthermore, referring to FIG. 1C, it is a partially enlarged schematic view of the sensing package corresponding to the aforementioned i-th diagram, and similarly, the bonding wire % 12 (gold wire) and the liquid encapsulating compound (LMC), for example. Or the difference in thermal expansion coefficient (CTE) of the encapsulant 16 such as epoxy resin (ep〇x force) is too large, and it is easy to cause the ball bond to be formed at the end of the sensing wafer 1 (ball b〇nd). 121 The neck is broken at the top, which causes defective problems. Therefore, 'how to provide a sensing type semiconductor device and its manufacturing method, to avoid delamination of the contact between the transparent cover and the packaging material, and welding The problem that the neck of the ball-shaped joint is broken is indeed an urgent problem to be faced in the related art. [Summary of the Invention] 6 19608 200826286 ' In view of the absence of the aforementioned prior art, the main object of the present invention is to provide A sensing semiconductor device and a method for fabricating the same that are not easily delaminated at a position where the transparent cover is in contact with the encapsulating material. Another object of the present invention is to provide a sensing semiconductor device and a method for manufacturing the same The neck of the ball joint of the soldering wire of the soldering sensor and the wafer carrier is not susceptible to the problem of cracking. To achieve the foregoing and other objects, the method for fabricating the sensing semiconductor device of the present invention mainly comprises: providing a complex sensing a wafer of a wafer, wherein the I sensing wafer has an active surface and a relatively inactive surface, the active surface is provided with a sensing area, and a transparent cover is attached to the active surface of the sensing chip and sealed The sensing area is formed by cutting the wafer to form a plurality of sensing wafers provided with a transparent cover body; and providing a substrate module piece having a plurality of substrates, wherein the transparent cover body is disposed corresponding to each of the substrates Sensing the wafer, and electrically connecting the sensing wafer and the substrate by using a bonding wire, wherein the sensing chip is correspondingly disposed on the substrate by an inactive surface; forming first and second colloids on the sensing chip and On the substrate and the module sheet, the first adhesive system covers the bonding wire for electrically connecting to one end of the sensing chip and the side of the transparent cover body, and the second adhesive system is formed on the substrate module On-chip adjacent sensing wafers and relative to a remaining area of the gel such that the first and second colloids cover the sensing wafer and the bonding wire but not covering the transparent cover; and cutting between the substrates to form a complex sensing semiconductor device In the present invention, the Young's coefficient of the first colloid is less than the Young's modulus of the second colloid, and the thermal expansion coefficient of the first colloid is between the thermal expansion coefficient of the second colloid and the sensing wafer and the light transmission. The thermal expansion coefficient of the cover body is 7 19608. The difference between the length of the cover wire and the lower body of the light-emitting cover body is to protect the wire ball. The neck, at the same time, because the thermal expansion coefficient of the body is between the thermal expansion coefficient of the second colloid and the thermal expansion coefficient of the sensing a-sheet and the light-transmissive body, thereby avoiding The difference between the thermal expansion coefficient of the light cover body and the sealing material is too large, and the delamination problem occurs on the side of the transparent cover body due to the thermal stress. The present invention also discloses a sensing semiconductor device comprising: a substrate, a substrate; a sensing wafer mounted on the substrate, wherein the sensing wafer has a main surface, a moving surface and a relatively inactive surface, the active surface is provided There is a sensing area, and the sensing chip is correspondingly placed on the substrate with its non-active surface; the transparent cover is placed on the active surface of the sensing chip and covers the sensing area; The first colloid is electrically connected to one end of the sensing chip and the side of the transparent cover; and the second colloid is electrically connected to the sensing chip and the substrate; And being formed on the substrate relative to the remaining area of the first colloid to cover the sensing wafer and the soldering I wire through the first and second colloids, and not covering the transparent cover. That is, the sensing semiconductor device of the present invention and the manufacturing method thereof provide a plurality of sensing wafers having a light-transmissive cover body for being attached to corresponding ones of the substrate module sheets having a plurality of substrates, and The sensing wafer and the substrate are electrically connected by a bonding wire, and then the first and second colloids are formed between the sensing wafers adjacent to the substrate to cover the sensing wafer and the bonding wire, wherein the first adhesive The system is coated with the bonding wire for electrically connecting to one end of the sensing chip and the side of the transparent cover, and the second adhesive system is formed in the remaining area of the first colloid, the first and second adhesive systems The light transmissive cover is not covered, so that the Young's coefficient of the first colloid is less than the Young's coefficient of the second colloid by the 8 19608 200826286, and the thermal expansion coefficient of the first colloid is between the thermal expansion of the second colloid Between the coefficient and the thermal expansion coefficient of the sensing wafer and the transparent cover, the crucible can protect the neck of the ball joint of the bonding wire, and prevent the side of the transparent cover from directly contacting the second colloid, and thermally expanding from each other The coefficient difference is too large and is susceptible to thermal stress The problem of delamination occurs on the side of the light-transmissive cover. Thereafter, dicing can be performed between the respective substrates to form a complex sensing type semiconductor device. [Embodiment] The following is a description of the embodiments of the present invention, and those skilled in the art can readily understand other advantages and effects of the present invention from the disclosure of the present disclosure. 2A to 2F are cross-sectional views showing a sensing semiconductor device of the present invention and a first embodiment thereof. Further, the sensing semiconductor device of the present invention will be mass-produced in a batch manner as will be described below. As shown in FIG. 2A, a wafer 200 having a plurality of sensing wafers 2' is provided, wherein the sensing wafer 20 has an active surface 201 and an opposite inactive surface 2〇2, and the active surface 201 is provided with a sensing region. 203. As shown in FIG. 2B, a transparent cover 25 such as glass is attached to the active surface 201 of the sensing chip 20 to cover the sensing region 203, and then the wafer is braked to form a plurality of devices. As shown in FIG. 2C, a substrate module sheet 210 having a plurality of substrates 21 is provided, and the transparent cover body 25 is disposed corresponding to each of the substrates 21. 19608 9 200826286 sensing the wafer 20 ′ and electrically connecting the sensing wafer 2 〇 and the substrate 21 ′ by a bonding wire (gold wire) 22 , wherein the sensing wafer 20 is correspondingly placed on the substrate 21 with the inactive surface 202 on. The bonding wire 22 is a gold wire which is formed by a wire bonder tip (not shown) on the sensing wafer by using a tip to form a ball bond 221 ' The soldering tip is moved to the substrate 21 and the bonding wire 22 is cut to form an electrical connection between the sensing wafer 20 and the substrate 21. As shown in FIG. 2D and FIG. 2E, the first colloid 261 and the second colloid 262 are formed on the sensing wafer 20 and the substrate module sheet 210, wherein the first colloid 261 is used to cover the bonding wire 22 for Electrically connected to one end of the sensing wafer 20 (ie, the spherical contact 221 covering the bonding wire 22 and the neck above it) and the side of the transparent cover 25, and the second colloid 262 is formed The first and second colloids 261, 262 are wrapped around the sensing wafer 20 and the bonding wires 22 on the substrate module sheet 210 adjacent to the sensing wafer 2 and the remaining regions of the first colloid 261. The light transmissive cover 25 is not covered. The Young's coefficient of the first colloid 261 (such as silicone) is smaller than the Young's modulus of the second colloid 262 (such as a liquid encapsulating compound or epoxy resin), and the thermal expansion coefficient of the first colloid 261 is between the second The thermal expansion coefficient of the colloid 262 is between the thermal expansion coefficient of the sensing wafer 20 and the transparent cover 25, and the bonding wire 22 is covered by the first colloid 261 for electrically connecting to one end of the sensing wafer 20. And the side of the transparent cover body 25, to protect the neck of the ball joint of the welding wire, when the difference between the thermal expansion coefficients of the transparent cover body and the packaging material is too large, the effect is reduced. The delamination problem occurs on the side of the light cover body. 19608 10 200826286 As shown in Fig. 2F, it is then possible to cut between the substrates 21 to form a complex sensing semiconductor device. The present invention also discloses a sensing semiconductor device comprising: a substrate 21; a sensing wafer 2A disposed on the substrate 21, wherein the sensing wafer 20 has an active surface 201 and a relative The inactive surface 202 is provided with a sensing area 203, and the sensing wafer 2 is connected to the substrate 21 by its inactive surface 203; the transparent cover 25 is placed on the substrate 21 The sensing surface 203 is mounted on the active surface 201 of the wafer 20; the bonding wire 22 is electrically connected to the sensing wafer 2 and the first colloid 2 6 of the substrate is coated with the bonding wire 2 2 Electrically connected to one end of the sensing wafer 20 and the side of the transparent cover 25; and a second colloid π] formed on the substrate 21 relative to the remaining area of the first colloid 261, so that The first and second colloids 26 i, 262 cover the sensing wafer 2 ( ) and the fresh wire 22 and are not covered to the transparent cover 25 . The Young's coefficient of the first colloid is smaller than the Young's modulus of the second colloid 262, and the thermal expansion coefficient of the first colloid 261 is entangled with the thermal expansion filament of the second kick body 262 and the sensing wafer 20 and the light transmission. Between the thermal expansion coefficients of the cover body 25. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic view showing a second embodiment of a sensing type semiconductor device of the present invention. The sensing semiconductor device of the present embodiment is identical to the above embodiment. The main difference lies in the first colloid 361. The height of the body is equal to the height of the body 35 to completely cover the side of the transparent cover 35, and the bonding wire 32 is electrically connected to the end of the sensing wafer 30, and the transparent cover is provided. The neck of the delamination and the spheroidal joint of the fresh line 19608 11 200826286 - Please refer to FIG. 4 for the purpose of showing the first embodiment of the sensing semiconductor device of the present invention. The sensing semiconductor device is substantially the same as the foregoing embodiment, and the main difference is that the height of the first colloid 461 is approximately equal to the height of the top surface of the transparent light-emitting body 45, so as to fully cover the transparent cover body 45 side. The bonding wire 42 for electrically connecting the sensing wafer 40 and the substrate 41 can effectively avoid the problem of delamination of the side of the transparent cover and neck fracture of the ball joint of the bonding wire. 5A to 5C are schematic diagrams showing a sensing half body device of the present invention and a fourth embodiment thereof, the sensing half body device and the manufacturing method of the present embodiment and the foregoing implementation The main difference is as shown in FIG. 5A. The sensing wafers of the plurality of transparent covers 55 are correspondingly connected to the substrates 51 of the substrate module sheet 51, and the bonding wires 52 are used. After being electrically connected to the substrate 51, a second colloid 562 is formed between the sensing chips 50 on the substrate module sheet, wherein the second colloid 562 is not in contact with the bonding wire 52 for electrically connecting to the substrate. One end of the wafer 5 and the side of the light transmissive body 55 are sensed to define a region for subsequent formation of the first colloid. As shown in FIG. 5B, a first colloid 561 is formed, and the first colloid 561 is coated on the bonding wire 52 for electrically connecting to the other end of the sensing wafer and the side of the transparent cover 55. As shown in Fig. 5C, the dicing is performed along each of the substrates 51 to obtain the sensing type semiconductor device of the present invention. Therefore, the sensing semiconductor device of the present invention and the manufacturing method thereof provide a plurality of sensing wafers having a light-transmissive cover body for being attached to the substrate module sheets having a plurality of substrates 19608 12 200826286 And electrically connecting the sensing chip and the substrate by a bonding wire, and then forming a first and a second colloid between the sensing wafers adjacent to the substrate to cover the sensing wafer and the bonding wire, wherein the first a bonding system is coated with the bonding wire for electrically connecting to one end of the sensing chip and the side of the transparent cover, and the second adhesive system is formed on the remaining area of the first colloid, the first and the second The adhesive system does not cover the transparent cover body, so that the Young's coefficient of the first colloid is smaller than the Young's modulus of the second colloid, and the thermal expansion coefficient of the first colloid is between the thermal expansion coefficients of the second colloid Between the thermal expansion coefficient of the sensing wafer and the transparent cover body, the crucible can protect the neck of the ball joint of the bonding wire, and avoid the side of the transparent cover body directly contacting the second colloid, and the thermal expansion coefficient between each other The difference is too large and is subject to thermal stress The problem of delamination occurs on the side of the light-transmissive cover. Thereafter, dicing can be performed between the respective substrates to form a complex sensing type semiconductor device. The above-described embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the scope of the present invention, and those skilled in the art can modify the above embodiments without departing from the spirit and scope of the invention. And change. Therefore, the scope of protection of the present invention should be as set forth in the scope of the patent application to be described later. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1A is a schematic cross-sectional view of a sensing package disclosed in US Pat. No. 6,995,462; FIG. 1B is a schematic cross-sectional view showing a delamination phenomenon of a conventional sensing package at a glass side. 1C is a schematic cross-sectional view of a conventional sensing package in a neck portion of a ball joint ball joint 13 19608 200826286; 2A to 2F is a first embodiment of the sensing type semiconductor device and method of the present invention 3 is a schematic cross-sectional view of a second embodiment of a sensing semiconductor device of the present invention; FIG. 4 is a cross-sectional view showing a third embodiment of the sensing semiconductor device of the present invention; and 5A to 5C BRIEF DESCRIPTION OF THE DRAWINGS The present invention is a cross-sectional view of a fourth embodiment of a sensing semiconductor device and a method of fabricating the same. [Main component symbol description] 10 sensing wafer 103 sensing region 104 electrode pad 11 substrate 12 fresh wire 121 spherical contact 14 adhesive layer 15 glass 16 packaging material 20 sensing wafer 200 wafer 201 active surface 202 inactive surface feeling Measuring area 14 19608 203 200826286 21 Substrate 210 Substrate module sheet 22 Fresh line 221 Spherical joint 25 Translucent cover 261 First colloid 262 Second colloid 30 Sensing wafer 32 Fresh line 35 Transparent cover 361 First colloid 40 sensing wafer 41 substrate 42 bonding wire 45 light transmitting body 461 first colloid 50 sensing wafer 51 substrate 52 bonding wire 510 substrate module sheet 55 transparent cover 561 first colloid 562 second colloid C delamination

Claims (1)

200826286 十、申請專利範圍·· 1· 一種感測式半導體裝置之製法，包含： 提供一具複數基板之基板模組片，以對應各該基 板上接置設有透光蓋體之感測晶片，並利用銲線電性 連接該感測晶片及基板； 形成弟一與第二膠體於該感測晶片及基板模組片 上’其中該第一膠體係包覆該鋒線用以電性連接至該 感測晶片之一端與該透光蓋體側邊，該第二膠體係形 成於該基板模組片上相鄰之感測晶片間且相對於第一 膠體之其餘區域，以使該第一與第二膠體包覆該感測 晶片及銲線但未覆蓋該透光蓋體；以及 沿各該基板間進行切割，以形成複數感測式半導 體裝置。 2·如申請專利範圍第1項之感測式半導體裝置之製法， 其中，該第一膠體之楊氏係數係小於該第二膠體之揚 氏係數。 3·如申請專利範圍第1項之感測式半導體裝置之製法， 其中，該第一膠體為矽膠，該第二膠體為液態封裝化 合物及環氧樹脂之其中一者。 4·如申請專利範圍第1項之感測式半導體裝置之製法， 其中，該第一膠體之熱膨脹係數介於該第二膠體之熱 膨脹係數與該感測晶片及透光蓋體之熱膨脹係數之 間。 5·如申請專利範圍第1項之感測式半導體裝置之製法， 16 19608 200826286 其中，該設有透光蓋體之感測晶片之製法係包括： 提供一具複數感測晶片之晶圓，其中該感測晶片 具有主動面及相對之非主動面，該主動面設有感測區； 於該感測晶片之主動面上接置透光蓋體，以封蓋 該感測區；以及 切割該晶圓，以形成複數設有透光蓋體之感測晶 片。 6·如申請專利範圍第1項之感測式半導體裝置之製法， 其中’該銲線係利用一打線機（Wi re bonder )之銲嘴 於該感測晶片上利用銲嘴先形成一球型接點（ba ^ j bond)，再移動該銲嘴至該基板並截斷該銲線，以形成 該感測晶片與基板之電性連接。 7.如申請專利範圍第6項之感測式半導體裝置之製法， 其中，該第一膠體係包覆該銲線之球型接點及其上方 之頸部。 8·如申請專利範圍第丨項之感測式半導體裝置之製法， 其中，該第一膠體之高度約與透光蓋體之頂面等高， 以王面包覆該透光蓋體側邊，並包覆銲線用以電性連 接至感測晶片之一端。 9·如申請專利範圍第丨項之感測式半導體裝置之製法， j中，該第一膠體之高度約略與透光蓋體之頂面等 向，以全面包覆該透光蓋體侧邊，同時全面包覆該銲 線。 申明專利範圍第1項之感測式半導體裝置之製法， 19608 17 200826286 其中，先形成包覆該銲線用以電性連接至該感測晶片 之一端與該透光蓋體侧邊之第一膠體，再於該感測晶 片及基板模組片上相對於第一膠體之其餘區域形成第 二膠體。 11·如申請專利範圍第丨項之感測式半導體裝置之製法， 其中，先於該基板模組片上相對各感測晶片間形成第 二膠體，其中該第二膠體並未接觸至該銲線用以電性 連接至該感測晶片之一端及該透光蓋體侧邊，以界定 出供後續形成第一膠體之區域，再形成第一膠體，並 使該第一膠體包覆該銲線用以電性連接至該感測晶片 之一端及該透光蓋體側邊。 12· —種感測式半導體裝置，係包含： 基板； 接置於該基板上之感測晶片，其中該感測晶片具 有主動面及相對之非主動面，該主動面設有感測區， 且該感測晶片係以其非主動面對應接置於該基板上； 透光盍體’係置於該感測晶片之主動面上並封蓋 該感測區； 銲線，係用以電性連接該感測晶片及該基板； 第一膠體，係包覆該銲線用以電性連接至該感測 晶片之一端及該透光蓋體側邊；以及 弟一膠體’係形成於該基板上相對於該第一膠體 之其餘區域，以使該第一與第二膠體包覆該感測晶片 及銲線，且未覆蓋至該透光蓋體。 18 19608 200826286 ' 13. 14. 15. 16. 17. 18· 如申請專利範圍第12項之感測式半導體裝置，其中， 該第一膠體之揚氏係數係小於該第二膠體之揚氏係 數。 ’、 如申請專利範圍第12項之感測式半導體裝置，其中， =第一膠體為矽膠，該第二膠體為液態封裝化合物及 玉衣氧樹脂之其中一者。 如申請專利範圍第丨2項之感測式半導體裝置，其中， 該第一膠體之熱膨脹係數介於該第二膠體之熱膨脹係 數與該感測晶片及透光蓋體之熱膨脹係數之間。 如申請專利範圍第丨2項之感測式半導體裝置，其中， 該銲線係利用一打線機（Wire b〇nder)之銲嘴於該感 測晶片上利用銲嘴先形成一球型接點（baU b()nd)/ 再移動該銲嘴至該基板並截斷該銲線，以形成該感測 晶片與基板之電性連接。 如申請專利範圍第16項之感測式半導體裝置，其中， 該第一膠體係包覆該銲線之球型接點及其上方之頸 部。 如申請專利範圍第12項之感測式半導體裝置，其中， 該第一膠體之高度約與透光蓋體之頂面等高，以全面 包设該透光蓋體側邊，並包覆銲線用以電性連接至感 測晶片之一端。 如申请專利範圍第12項之感測式半導體裝置，其中， 該第一膠體之高度約略與透光蓋體之頂面等高，以全 面包覆該透光蓋體側邊，同時全面包覆該銲線。 19 19608 19.200826286 X. Patent Application Range··1· A method for manufacturing a sensing semiconductor device, comprising: providing a substrate module piece with a plurality of substrates, corresponding to each of the sensing chips on which the transparent cover body is disposed And electrically connecting the sensing chip and the substrate by using a bonding wire; forming a first and second colloid on the sensing chip and the substrate module sheet, wherein the first adhesive system covers the front line for electrically connecting to the Sensing one end of the wafer and the side of the transparent cover body, the second adhesive system is formed on the substrate module sheet adjacent to the sensing wafer and opposite to the remaining area of the first colloid, so that the first and the first The dicolloid covers the sensing wafer and the bonding wire but does not cover the transparent cover; and cuts between the substrates to form a complex sensing semiconductor device. 2. The method of claim 4, wherein the Young's coefficient of the first colloid is less than the Young's modulus of the second colloid. 3. The method of claim 4, wherein the first colloid is tantalum, and the second colloid is one of a liquid encapsulating compound and an epoxy resin. 4. The method of claim 4, wherein the thermal expansion coefficient of the first colloid is between the thermal expansion coefficient of the second colloid and the thermal expansion coefficient of the sensing wafer and the transparent cover. between. 5) The method for manufacturing a sensing semiconductor device according to claim 1, wherein the method for manufacturing a sensing wafer having a transparent cover comprises: providing a wafer with a plurality of sensing wafers; The sensing chip has an active surface and a relatively inactive surface, the active surface is provided with a sensing area; a transparent cover is attached to the active surface of the sensing chip to cover the sensing area; and cutting The wafer is formed to form a plurality of sensing wafers provided with a transparent cover. 6. The method of claim 4, wherein the soldering wire is formed by a tip of a Wire bonder on the sensing wafer by using a tip to form a spherical shape. Contact (ba ^ j bond), then move the tip to the substrate and cut the wire to form an electrical connection between the sensing wafer and the substrate. 7. The method of claim 4, wherein the first glue system covers the ball joint of the wire and the neck above it. 8. The method of claim 4, wherein the height of the first colloid is about the same as the height of the top surface of the transparent cover, and the side of the transparent cover is covered with a king face. And coating the bonding wire for electrically connecting to one end of the sensing chip. 9. The method of claim 4, wherein the height of the first colloid is approximately the same as the top surface of the transparent cover to completely cover the side of the transparent cover. At the same time, the wire is completely covered. A method for fabricating a sensing semiconductor device according to the first aspect of the patent, 19608 17 200826286 wherein first forming the bonding wire for electrically connecting to one end of the sensing chip and the first side of the transparent cover The colloid further forms a second colloid on the sensing wafer and the substrate module sheet relative to the remaining region of the first colloid. The method of claim 4, wherein a second colloid is formed between the sensing chips before the substrate module, wherein the second colloid does not contact the bonding wire. The first colloid is electrically connected to one end of the sensing chip and the side of the transparent cover to define a region for forming a first colloid, and then the first colloid is formed, and the first colloid is coated with the bonding wire. The method is electrically connected to one end of the sensing chip and the side of the transparent cover. A sensing semiconductor device includes: a substrate; a sensing wafer disposed on the substrate, wherein the sensing wafer has an active surface and a relatively inactive surface, the active surface is provided with a sensing region, And the sensing chip is correspondingly placed on the substrate with its inactive surface; the light transmissive body is placed on the active surface of the sensing chip and covers the sensing area; the bonding wire is used for electricity The first colloid is electrically connected to one end of the sensing chip and the side of the transparent cover; and a colloidal body is formed on the sensing chip and the substrate; The remaining area of the first colloid is coated on the substrate such that the first and second colloids cover the sensing wafer and the bonding wire and are not covered to the transparent cover. 18 19608 200826286 ' 13. 14. 15. 16. 17. 18. The sensing semiconductor device of claim 12, wherein the Young's coefficient of the first colloid is less than the Young's modulus of the second colloid . The sensing semiconductor device of claim 12, wherein the first colloid is tantalum, and the second colloid is one of a liquid encapsulating compound and a jade oxygen resin. The sensing semiconductor device of claim 2, wherein the first colloid has a thermal expansion coefficient between the thermal expansion coefficient of the second colloid and a thermal expansion coefficient of the sensing wafer and the transparent cover. The sensing semiconductor device of claim 2, wherein the bonding wire forms a ball joint on the sensing wafer by using a tip of a wire bonding machine (Wire B〇nder) (baU b()nd)/ Move the tip to the substrate and cut the wire to form an electrical connection between the sensing wafer and the substrate. The sensing semiconductor device of claim 16, wherein the first adhesive system covers the ball joint of the bonding wire and the neck portion thereof. The sensing semiconductor device of claim 12, wherein the height of the first colloid is about equal to the height of the top surface of the transparent cover body to completely cover the side of the transparent cover body and to be covered by welding. The wire is electrically connected to one end of the sensing chip. The sensing semiconductor device of claim 12, wherein the height of the first colloid is approximately equal to the height of the top surface of the transparent cover body to completely cover the side of the transparent cover body, and is fully covered at the same time. The wire bond. 19 19608 19.
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Publication number Priority date Publication date Assignee Title
CN114242669A (en) * 2022-02-28 2022-03-25 甬矽电子(宁波)股份有限公司 Stack packaging structure and stack packaging method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114242669A (en) * 2022-02-28 2022-03-25 甬矽电子(宁波)股份有限公司 Stack packaging structure and stack packaging method
CN114242669B (en) * 2022-02-28 2022-07-08 甬矽电子(宁波)股份有限公司 Stack packaging structure and stack packaging method

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