200826031 七、指定代表圖： (一） 本案指定代表圖為：第（12 )圖。 (二） 本代表圖之元件符號簡單說明： Τι 第一薄膜電晶體 T2 第二薄膜電晶體 Cl 液晶電容 C2 對角扭轉電容 Ca 電容 33 畫素電極 34 控制電極 37 共同電極 Di〜 DnH資料線 Gi〜 Gm+l掃描線 600 晝素矩陣 Pi〜 ρπ輸出腳 L輔助線 502 源極驅動器 八、本案若有化學式時，請揭示最能顯示發明特徵的化學式： 九、發明說明： 200826031 秦 【發明所屬之技術領域】 本發明係關於-種液晶顯示面板及其 -種關於改良資料線訊號之提供方式以及㈣，別J 效應的液晶顯示面板及其驅動方法。 〖寄生電容 【先前技術】 隨著液晶顯㈣板的廣泛應用’㈣者對於液晶顯示面 板m高亮度、高對比、高解析度、高顏色飽和度及 快速時間反應等的要求也越來越高。尤其隨著面板面積加 大，使用液晶顯示面板製成家用平面顯示器，如液晶電視， 已：為液晶顯示面板的重要應用。一般傳統液晶顯：：板多 為窄視肖’只有在〉夜晶顯示面板的正面才能觀看到正常的晝 面’若要以較大之㈣觀看時會有顏色失真，甚至會發生= 調反轉（gray inversion)之現象。亦即明處及暗處颠倒的 狀況。因此如何增廣視角已成為製造液晶顯示面板時需要解 決之重要課題。 在眾多增廣視角的方法中，液晶垂直排列（“纣。“ Alignment ; VA)仍為目前市場上的主流技術之一。然當液晶 分子為朝向單一方向垂直排列（m〇n〇—d⑽ain VA)，隨著電 昜旋I方向日寸，因為所有液晶分子都平行，故相反角度的視 角仍然受到偽限而無法觀賞。所以有多區域垂直排列 (multi-domain VA)之技術被廣泛應用及改進，以增進各種角 度的視覺品質。其中日本富士通公司曾嘗試在彩色濾光片上 5又置凸塊（ridge or bump)，利用凸塊產生之傾斜電場以控 200826031 向。然而由於凸塊之設 需要精確對準，並旦在 制液晶分子依照所在區域自動排列轉 汁使彳于衫色濾光片與主動矩陣基板間 over coating)，因此 衫色濾光片上要多增加一層覆蓋物 造成良率不佳與成本增加。 為改善上述多區域垂直排列液晶顯示器之缺點，一種對 角扭轉垂直排^Blas-BendlngVertlcalAUg賺化6圖 之液晶顯示面板係被提出。第！圖係習知對角扭轉垂直排列 之液晶顯示面板之剖面視圖。該液晶顯示面板ι〇包含一彩色 濾光片u、一液晶層12及一主動矩陣基板13，彩色濾光片 11及主動基板13分別具有一透明基板U1及131。彩色濾光 片11上有一共同電極112與主動基板13上有一畫素電極 134,且該共同電極112和畫素電極134之間會形成一主要電 場而主動基板13上之控制電極}33與晝素電極i 34則產生 使液晶分子121形成傾倒角度對稱之電場。另有一絕緣層132 設於控制電極133及畫素電極134之間。 但是當VCE < Vc〇„ <VP，於區域A之中央會產生 disclination線，其中VCE、7咖及Vp分別代表控制電極、共 同電極及畫素電極之電位。該種兩眼外轉（discHnati〇n) 線會造成液晶層1 2之光穿透率降低、反應時間變缓慢及液晶 分子不穩定等現象。為避免此一不良現象產生，因此希望在 極性反轉（polarity inversion)時要能滿足下列條件·· 當晝素為正極性（positive frame)時，則vCE>vP>200826031 VII. Designated representative map: (1) The representative representative of the case is: (12). (2) The symbol of the symbol of this representative diagram is simple: Τι First thin film transistor T2 Second thin film transistor Cl Liquid crystal capacitor C2 Diagonal torsion capacitance Ca Capacitance 33 Picture electrode 34 Control electrode 37 Common electrode Di~ DnH data line Gi ~ Gm+l scan line 600 昼 矩阵 matrix Pi~ ρπ output pin L auxiliary line 502 source driver VIII. If there is a chemical formula in this case, please reveal the chemical formula that best shows the characteristics of the invention: IX. Invention description: 200826031 Qin TECHNICAL FIELD The present invention relates to a liquid crystal display panel and a liquid crystal display panel and a driving method thereof for improving the data line signal and (4), and the J effect. 〖Parasitic capacitance [previous technology] With the wide application of liquid crystal display (four) board '(4), the requirements for high brightness, high contrast, high resolution, high color saturation and fast time response of liquid crystal display panel are also higher. . Especially with the increase of the panel area, the use of a liquid crystal display panel to make a home flat panel display, such as a liquid crystal television, has become an important application of the liquid crystal display panel. Generally, the traditional liquid crystal display: the board is mostly narrow-viewing. 'On the front side of the night crystal display panel, you can see the normal surface.' If you want to watch it with a larger (four) color distortion, it will even happen = reverse The phenomenon of gray inversion. That is, the situation where the clear and dark places are reversed. Therefore, how to widen the viewing angle has become an important issue to be solved when manufacturing a liquid crystal display panel. Among the many methods of widening the viewing angle, the vertical alignment of liquid crystals ("纣" Alignment; VA) is still one of the mainstream technologies on the market today. However, when the liquid crystal molecules are arranged vertically in a single direction (m〇n〇-d(10) ain VA), as the liquid crystal is rotated in the direction of I, since all the liquid crystal molecules are parallel, the angle of view of the opposite angle is still subject to false limits and cannot be viewed. Therefore, multi-domain VA technology is widely used and improved to enhance the visual quality of various angles. Among them, Fujitsu of Japan tried to ridge or bump on the color filter, and used the tilting electric field generated by the bump to control the 200826031 direction. However, since the arrangement of the bumps needs to be precisely aligned, and the liquid crystal molecules are automatically arranged in accordance with the region to be over-coated between the shirt color filter and the active matrix substrate, the number of the shirt color filters is increased. Adding a layer of cover results in poor yield and increased costs. In order to improve the above-mentioned shortcomings of the multi-region vertical alignment liquid crystal display, a liquid crystal display panel in which a diagonally reversed vertical line of Blas-BendlngVertlcalAUg is generated is proposed. The first! The figure is a cross-sectional view of a liquid crystal display panel in which diagonal diagonal alignment is conventionally known. The liquid crystal display panel ι includes a color filter u, a liquid crystal layer 12 and an active matrix substrate 13. The color filter 11 and the active substrate 13 respectively have a transparent substrate U1 and 131. The color filter 11 has a common electrode 112 and a pixel electrode 134 on the active substrate 13, and a main electric field is formed between the common electrode 112 and the pixel electrode 134. The control electrodes on the active substrate 13 are 33 and The element electrode i 34 generates an electric field which causes the liquid crystal molecules 121 to form a tilt angle symmetry. Another insulating layer 132 is disposed between the control electrode 133 and the pixel electrode 134. However, when VCE < Vc〇„ <VP, a disclination line is generated in the center of the area A, wherein VCE, 7 coffee and Vp represent the potentials of the control electrode, the common electrode and the pixel electrode, respectively. The discHnati〇n) line causes a decrease in the light transmittance of the liquid crystal layer 12, a slow reaction time, and instability of the liquid crystal molecules. To avoid this undesirable phenomenon, it is desirable to have a polarity inversion. The following conditions can be satisfied: · When the element is a positive frame, then vCE>vP>
Vco丨丨丨· · · ·（條件一）·，及 當畫素為負極性（negative frame)時，則VCE< vP< 200826031 V c 〇 m 條件二 第2圖係韓國三星電子所提出之畫素結構等效電路圖， 該晝素20之電路將能消除兩眼外轉線之缺點。亦即可滿足上 述條件-及條件二。但由於其每個晝素2Q皆包含三個薄膜電 晶體，故只要其中一個薄膜電晶體損壞’則該晝素即視為失 效，因此製造良率目前仍無法達到可接受之標準。另一方面， 同:條掃描線上連接之薄膜電晶體數量太多，造成掃描訊號 傳送有嚴重的RC延遲（delay )現象。 ,鑒於上述所提各種廣視角液晶顯示器產品之缺點，作者 曾於觀年提出—種垂直排列之廣視角液晶顯示ϋ技術（詳 見台灣專利公告號！239424)。第3圖係此㈣錢列之液晶 』不面板之畫素結構等效電路圖。其中僅示意列出四個相鄰 之畫素’係分別由掃描線36卜362及363 (分別代表” Μ和資料線35卜352及353 (分別代表^和 Dn)又叉形成。每一個畫素包含第一薄膜電晶體^、第二薄 膜電晶體τ” 一控制電極34及—畫素電極33。該第一薄膜 二曰曰體L之第-極端連接至_資料線脱及第二極端連接至 〆里素电極33 ’又其閘極連接至_掃描線脱。肖第二薄膜 電晶體T2之第-極端連接至另_相鄰之資料線脱，其第二 極端連接至該控制電極34,又其閘極連接至另一相鄰之掃描 線362 °晝素電極33及共同電極37間形成液晶電容Cl，控 U电極34及晝素％極33形成對角扭轉電容匕，又控制電極 34及共:電極37ra1也有一電容&形成。 乂弟3圖中〇11與Gl"交又處所在之畫素B(右下角之畫素 7 200826031 區)為例’晝素β係藉由其左右兩側之 下兩側之掃描線362及363所控制，直中+在==353和上 ^ ^ L 刊八〒在晝素操作過程中， ==掃描訊號在兩相鄰水平掃描週期 ::::::讓控制電極34及畫素電…入電位之波 ^“極34因著晝素電極33之電位改變會產 ^ 制电極34之電位極性可隨書素極性33改 變。藉此，在書辛B A m f 33 可控制在高極性時，控制電極34之電… 日士批矣 之電又在畫素B為負極性 ::制電極34之電位Vce將可控制在低於畫素電極Μ之電 所/ Γ相滿足上述條件-及條件：之要求。且如第3圖 斤不’母-晝素中係只包含二個薄臈電晶體( =!製程之良率以及改善畫素之開口率。另一方面，因 a 田線上連接之薄膜電晶體數量減少 訊號傳送之RC延遲之問題。 爹低了抑“ ’、、；而如弟3圖之書音4/L斗 甘斤 φ 一素°又汁其母一晝素係分別由並左右 兩側之資料線和上下兩側之掃描線所控制，亦即每個：素皆 2相合兩條資料線及兩條掃描線；換言之，以整個面板: :一陣區來看，若-晝素矩陣包含η個畫素行及m個畫素 肢中即―職之晝素矩陣），如帛4圖所示，則該晝素矩陣刪 一:州條資料線（D|〜DnH)及—條掃描線（Gi{心以驅動每 -晝素。亦即’畫素矩陣之最外圍左右側將各具有一資 料線’分別為資料、線〇1和資料線以及最外圍上下倒將 各具有一掃描線’分別為掃描線G,及掃描線G，…。然而，就 傳’·先面板内之一 nxm晝素矩陣而言，若其内每—畫素只具一 200826031 薄膜電晶體，則-般而言其只需η條資料線及m條掃描線來 驅動畫素即可，是故其係搭配-能提供η個資料訊號之源極 驅動态及一能提供m個掃描訊號之閘極驅動器。 而如第4圖之畫素矩陣結構因具有n+1條資料線及m+i 條掃描線，因此其需搭配一能提供丨個資料訊號之源極驅 動器及一能提供mH個掃描訊號之閘極驅動器。換言之，傳 統之只能提供η個資料訊號及m個掃描訊號的源極及閉極驅 動器將不再適用’而需額外設計—新的源極及閘極驅動器與 例如以1 024x768之XGV面板為例，傳統之源極驅 動器係提供1G24個資料訊號，然而若如第4圖之晝素矩陣 400’則其將需一能提1〇25個資料訊號之源極驅動器。然而， 士同我們所知，要重新設計—個驅動器尤其是—源極驅動 器’其將耗費相當之成本，有鑑於此亟待針對第4圖之畫素 矩陣400提出-種改良式之液晶顯示面板及驅動方法來解決 此一問題。 【發明内容】 本毛明之一目的係提供一種液晶顯示面板，其具有廣 視^之特性’可使當畫素為正極性時，控制電極之電位將 會馬於畫素電極之雷圭本 ' 在旦素為負極性時，控制電極 之電位低於晝素電極之電位， ， 且具貝枓線之貧料訊號可由 一傳統之源極驅動器所提供。 本毛月之另一目的係提供一種液晶顯示面板，其畫素 矩陣區包含η個書幸并芬 加告主 、 一常仃及m個畫素列，並分別由n+1條資 9 200826031 料、W m^l條掃描、線控制其内之晝素，且其只冑由畫素矩 陣區外部提供n個資料訊號即可驅動該n+1條資料線。 本發明之另一目的係提供一種液晶顯示面板，其具有 n +1备、貝料線用以控制面板内之畫素，而其n+1條資料線之 言fL号虎由 目士 /、有η個資料訊號輸出源之傳統源極驅動器所 提供，不需另外設計一新的源極驅動器。 本發明之再一目的係提供一種液晶顯示面板，具有一 畫素矩陣，其内部資料線之總數多於晝素行之總數，且其 可在未改’交傳統之源極驅動器之結構下來操作内部晝素， 亚且能改善所可能引發之訊號傳送R C延遲與寄生電容不對 稱之問題。 _康上述之目的，本發明提供一種液晶顯示面板，該液晶顯示面板 —* 、矩陣其包含由複數條資料線及複數條掃描線相互交叉所形 、复數们旦素，其中，每一個畫素包含第一薄膜電晶體、第二薄膜電 控㈣極及-畫素電極。該第—薄膜電晶體之第-極端連接至 第:二二弟二極端連接至該晝素電極’又其閘極連接至-掃描線。該 晶體之第一極端連接至另一相鄰之資料線，第二極端連接至 取外圍兩條該資料線之_ 相鄰之資料崎、纽 #邊界貝抖線，该邊界資料線係與另-非 線。該液日ΐ'，且資料線與其相鄰之晝素電_具有一辅助 虚另-=除了具有廣視肖之触外，由__界資線 ”麵敎貧料線連結，故其相對 藉此，其可搭配-傳統之源極驅動器來貝科《可因此而減少； 新的源極驅動器1時，藉由素，而不需另外設計- 稭由邊界資料線與其相鄰之畫素 10 200826031 電極間所設置之輔助線，進而改善了資料訊號於傳送過程 中所可能產生之訊號RC延遲與寄生電容不對稱之問題。 【實施方式】 第5圖係根據本發明第一實施例之液晶顯示面板之等效 電路示意圖，其中該液晶顯示面板5 01包含一 nxm之書素矩 陣5 0 0 ’其整體結構係同於第四圖之晝素矩陣4 〇 〇，具有打 個畫素行及m個畫素列，並由η+ι條資料線及m+1條掃描線 控制其内畫素，而每一晝素内各薄膜電晶體與電容間之連結 方式係與第四圖之連結方式相同，故於此不再贅述，且相同 之元件係以相同之符號表示之。一源極驅動器5〇2具有η個 訊號源輸出腳（signal output pin) Ρι〜Ρη，提供“固資料源 訊號予晝素矩陣500之n+1條資料線。而為解決源極驅動哭 呢資料訊號總數無法與資料線總數匹配之問題，本發㈣ t弟：圖所示，將畫素矩陣咖之左側最外圍之資料線D!， =界資料線，與另-非相鄰之資料線電性連結，如圖中， :料線Dl係與資料線㈣生相連結，換言之，資料線:之 貝枓汛號係由資料線D3所提供 將〇兩n伽次立丨 D木，该nH條資料線 厂而 訊號源’故其將可匹配-傳統之口铲槎供 個資料訊號源之源極驅動器，而不 供n 〜如第5圖之實施例之資料 ：…源極驅動 線_對應之畫素行（即第去連接方式，亦將使得資料 滿足條件-及條件 * n )於晝素顯示操作時’ 501之晝素顯示操作方式將說明=此點U及液晶顯示面板 200826031Vco丨丨丨 · · · · (Condition 1)·, and when the pixel is a negative frame, then VCE<vP< 200826031 V c 〇m Condition 2 Picture 2 is a painting proposed by Samsung Electronics of South Korea The structure equivalent circuit diagram, the circuit of the halogen 20 will be able to eliminate the shortcomings of the external line of the two eyes. The above conditions - and condition two can also be met. However, since each of the halogen 2Q contains three thin film transistors, the halogen is considered to be ineffective as long as one of the thin film transistors is damaged, so the manufacturing yield is still not up to an acceptable standard. On the other hand, the number of thin film transistors connected to the same scanning line is too large, causing a serious RC delay in the scanning signal transmission. In view of the shortcomings of the various wide viewing angle liquid crystal display products mentioned above, the author has proposed a wide-angle liquid crystal display technology (see Taiwan Patent Publication No. 239424). Figure 3 is the equivalent circuit diagram of the pixel structure of the (4) liquid crystal column. Only four adjacent pixel elements are shown schematically by scan lines 36 362 and 363 (respectively representing Μ and data lines 35 352 and 353 (representing ^ and Dn, respectively). The first thin film transistor ^, the second thin film transistor τ" a control electrode 34 and a pixel electrode 33. The first terminal of the first thin film dimer L is connected to the _ data line and the second extreme Connected to the bismuth electrode 33' and its gate is connected to the _scanning line. The first terminal of the second thin film transistor T2 is connected to the other _ adjacent data line, and the second terminal is connected to the control. The electrode 34 is connected to another adjacent scan line 362 ° between the pixel electrode 33 and the common electrode 37 to form a liquid crystal capacitor C1, and the control U electrode 34 and the halogen element pole 33 form a diagonal torsional capacitance 匕, Further, the control electrode 34 and the common electrode 37ra1 also have a capacitance & the formation of the pixel & 乂11 and Gl" in the picture of the pixel B (the lower right corner of the pixel 7 200826031 area) as an example Controlled by scan lines 362 and 363 on the lower and lower sides of the left and right sides, straight + at == 353 and on ^ ^ L magazine gossip During the operation of the prime, the == scan signal is in two adjacent horizontal scanning periods: :::::: let the control electrode 34 and the pixel electricity enter the potential wave ^ "pole 34 due to the potential change of the halogen electrode 33 will produce ^ The polarity of the potential of the electrode 34 can be changed with the polarity of the pixel 33. Thereby, when the book symplectic BA mf 33 can be controlled at a high polarity, the electric power of the electrode 34 is controlled... Negative polarity:: The potential Vce of the electrode 34 can be controlled to be lower than the electromagnet/Γ phase of the pixel electrode to meet the above conditions and conditions: and as shown in Fig. 3, the matrix is not It only contains two thin germanium transistors (=! process yield and improved aperture ratio. On the other hand, the number of thin film transistors connected to the field line reduces the RC delay of signal transmission. "',,; and, as the brother of the 3rd book, the sound of the book 4/L, the 甘 斤 一 素 又 又 又 又 又 又 又 又 又 又 又 又 又 又 又 又 又 又 又 又 又 又 又 又 又 又 又 又 又 又 又That is to say, each: the two are combined with two data lines and two scanning lines; in other words, with the entire panel: : a burst of area, if - the moment The array consists of η pixels and m pixels, which are the 昼 昼 matrix. As shown in Figure 4, the matrix is deleted: the state data line (D|~DnH) and the Scanning line (Gi{heart to drive each - 昼 。. That is, the left and right sides of the 'the outer periphery of the pixel matrix will have a data line' respectively for the data, the line 〇 1 and the data line and the top and bottom will have one The scan line 'is the scan line G, and the scan line G, .... However, in the case of one of the nxm pixel matrices in the front panel, if each pixel has only one 200826031 thin film transistor, then In general, it only needs n data lines and m scan lines to drive the pixels. Therefore, it can be used to provide the source driving state of n data signals and a gate capable of providing m scanning signals. Extreme drive. For example, the pixel matrix structure of FIG. 4 has n+1 data lines and m+i scan lines, so it needs to be matched with a source driver capable of providing one data signal and one capable of providing mH scanning signals. Gate driver. In other words, the traditional source and closed-circuit drivers that can only provide n data signals and m scan signals will no longer be suitable for 'additional design' - new source and gate drivers and XGV panels such as 1 024 x 768 For example, a conventional source driver provides 1G24 data signals. However, if the pixel matrix 400' is as shown in FIG. 4, it will require a source driver capable of providing 1 to 25 data signals. However, as far as we know, it is necessary to redesign a driver, especially a source driver, which will cost a considerable amount of money. In view of this, an improved liquid crystal display panel is proposed for the pixel matrix 400 of FIG. And drive methods to solve this problem. SUMMARY OF THE INVENTION One object of the present invention is to provide a liquid crystal display panel having the characteristics of wide viewing, which can make the potential of the control electrode be the pixel of the pixel when the pixel is positive. When the denier is negative polarity, the potential of the control electrode is lower than the potential of the halogen electrode, and the poor signal with the Bellows line can be provided by a conventional source driver. Another purpose of this month is to provide a liquid crystal display panel, in which the pixel matrix area includes n books, singapore, a common singularity, and m pixel columns, respectively, and n+1 resources 9 200826031 The material, W m^l scan, and the line control the elements therein, and the n+1 data lines can be driven only by providing n data signals outside the pixel matrix area. Another object of the present invention is to provide a liquid crystal display panel having n +1 spare and bead lines for controlling pixels in the panel, and the n+1 data lines of the fL No. Provided by a conventional source driver with n data signal output sources, there is no need to design a new source driver. A further object of the present invention is to provide a liquid crystal display panel having a pixel matrix, the total number of internal data lines being greater than the total number of pixel rows, and which can be operated inside without changing the structure of the conventional source driver. Alizarin, sub-and can improve the signal transmission RC delay and parasitic capacitance asymmetry that may be caused. For the above purpose, the present invention provides a liquid crystal display panel, wherein the matrix comprises a plurality of data lines and a plurality of scanning lines intersecting each other, and a plurality of pixels, wherein each pixel The first thin film transistor, the second thin film electronically controlled (four) pole and the - pixel electrode are included. The first terminal of the first thin film transistor is connected to the second: the second terminal is connected to the halogen electrode and its gate is connected to the - scan line. The first end of the crystal is connected to another adjacent data line, and the second end is connected to the _ adjacent data strip of the data line _ adjacent to the outer boundary of the data line, the boundary data line and the other - Non-line. The liquid ΐ ΐ ', and the data line and its adjacent 昼 电 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ In this way, it can be matched with the traditional source driver to the Beca "can be reduced accordingly; the new source driver 1 is by the prime, without the need for additional design - the straw is bordered by the boundary data line and its adjacent pixels 10 200826031 The auxiliary line provided between the electrodes, thereby improving the problem that the signal signal RC delay and the parasitic capacitance asymmetry may occur during the transmission of the data signal. [Embodiment] FIG. 5 is a first embodiment according to the present invention. An equivalent circuit diagram of a liquid crystal display panel, wherein the liquid crystal display panel 511 includes an nxm pixel matrix 500', and the overall structure is the same as the pixel matrix 4 of the fourth figure, and has a pixel row and m pixel columns, and the internal pixels are controlled by η+ι data lines and m+1 scanning lines, and the connection between the film transistors and capacitors in each element is linked to the fourth figure. The same way, so the details are not repeated here, and the same components The symbol represents the same. 5〇2 a source driver having a signal η source output pin (signal output pin) Ρι~Ρη, to provide "solid source signal data array element to day + n 500 of a data line. In order to solve the problem that the source drive crying data signal can not match the total number of data lines, this issue (4) t brother: as shown in the figure, the data line D!, = the boundary data line on the left side of the pixel matrix coffee, Electrically connected with another non-adjacent data line, as shown in the figure, the material line Dl is connected with the data line (4), in other words, the data line: the Bellow number is provided by the data line D3. n 伽次立丨D木, the nH data line factory and the signal source 'so it will match - the traditional shovel shovel for the source of the source of the signal source, not for n ~ as shown in Figure 5 Example data: ... source drive line _ corresponding pixel line (that is, the first connection mode, will also make the data meet the condition - and condition * n) in the 显示 prime display operation ' 501 昼 显示 display operation mode will explain = This point U and liquid crystal display panel 200826031
第6圖係不意列出第5圖中任意六個相鄰之查素單元， :中包含兩個位於第丨條晝素行之晝素及四個分：位:二 “弟3條晝素行之晝素。第6圖所示之六個相鄰㈣，係 分別由掃描、線56卜562及563 (分別代表掃描線^^和⑴ 和貧料線55卜552、553及554 (分別代表資料線H 匕a罘潯朕電晶體Ti、 一溥膜電晶體τ2、一控制電極34、一書 帝托Q7 、 旦京弘極33、一共同 弘°一、-液晶電容G、-對角扭轉電容&及_電容^，其 中各疋件之連結方式係同如前述。 任取第6圖令非第1條書辛行上 仪♦主乂一 斤旦I仃上之畫素為例，如取第2Figure 6 is not intended to list any six adjacent elemental elements in Figure 5, which contains two elements in the 丨 昼 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及 及The six adjacent (four) shown in Figure 6 are scanned, line 56 562 and 563 respectively (representing the scan line ^^ and (1) and the lean line 55 552, 553 and 554 respectively (representing data respectively) Line H 匕a 罘浔朕 transistor Ti, a 溥 film transistor τ2, a control electrode 34, a book of the Emperor Q7, Danjing Hongji 33, a common Hong °, - liquid crystal capacitor G, - diagonal twist Capacitor & and _capacitor ^, the connection method of each component is the same as the above. Take the 6th order, not the first book, the singer of the singer ♦ Take the second
“旦素行之一畫素D為例，第7圖在J 图係頌不相關驅動訊號應用 :弟6圖畫素D之一例子。Vd2 線咖及553之資料訊號，又w ^刀/代表作用於貧料 rR9 JU Q及VG3为別代表作用於掃描 線562及563之掃描訊號，在每一 形包含於T月τ 士 直知彳田週期内之掃描波 旧下 及心之％間内的第—波形及第二波形。第7圖 -下-列之波形為畫素0的相關電極之電位變化，其"。及 “分別代表畫素D之晝素電極33及控制電極以之電位。 ❹第7圖，當時間係在VG2前半部分之丁 a時間内，因 ”弟—缚膜電晶體T2被 V 、禪而開啟，同時間之資料訊號 Μ έ因此寫入控制電極34， ^ ^ ^ 戈口所不控制電極34之電位由 京本之電位（低於Vcoin)改變為盥 ^卩士门 勹” VD2相冋之電位（高於火⑽）。 问寸因第一薄膜電晶體丁被v , y 伋VG3&擇而開啟，資料訊號VD3之 电位（低於V⑽）會因此寫入書辛 夕τ 士 里京甩極33。又在Vg3後半部分 f日丁間内’因第一薄膜雷曰蝴T ir 潯胲电曰日脰T丨被L選擇而開啟，同時 12 200826031 間之資料訊號V。3之電位（高於y_)會因此寫入畫素電極， 由於此時第二薄膜電晶體T2為闕閉，所以控制電極為浮 動（floating)之狀態，而控制電極34會受到電容耦合之^ 應而提升至更高的電位。 C£ 由弟7圖可清楚看見，在畫素為正極性時，則滿足^ >^>H垂直㈣週期結束後，因晝素之極性改變為 戶負極性’則又滿足WVkl。故第6圖之晝素結構並搭配如 H 皮形’將可使每__畫素單元之操作滿足條件一 (vCE> vP> d及條件二（Vce〈Vkv_)，進而消除兩眼外轉線 、、::一一 η)之問題。然而，本發明之畫素之㈣ 从 时式輕，任域使得畫㈣作滿足條 件一及條件二之驅動方式或、吞 動方式白為適用。此外，要注意的是，以 :素D為例，其畫素電極33之電位係由資料訊號L提供， 主要用以顯不所要求之書面 一 — 故對於畫素電極33的電位大小 料訊號V<A小值）之精準度將 ==4之電位係由資料訊號提供，用以產生使液晶 刀子幵/成傾倒角對稱之電場。 由於技制電極34之電位供給其 的係/、疋為產生一傾倒自帝 + "此其電位之大小值要求 將不而如旦素電極之雷介i七十 弘位要求來得嚴謹。故，大體上來古兒， 對於控制電極之電位要求σ亜甘 大體上；況 μ ^ rj, - /、要/、極性能與畫素電極33之極 性相反（如第7圖所示）， y . v . 了使旦素操作滿足條件一（VCE > ^>^。0 及條件二（VeE>Vp> 杏犄作筮1 & 4 e°m)。疋故同理，如第6圖所示， 田紅作乐1條晝素行上之書 D, ^ ^ ^^ f可垓晝素行兩側資料線⑴及 。k亦須彼此極性相反， 万即與 >、料線Di (即邊界資料 13 200826031 線）相連接之資料線d3，其所提供之訊號之極性必須與資料線 D2之極f生相反。另夕卜，誠如前面所提，由於控制電極34之電 位要求並非如晝素電極33之要求嚴謹，因此本發明主要係採 控制電極34之電位由其它資料線所提供(如資料線κ之電位 係由資料、線D3所提供），然而在其它實施例中，當不排除晝 素電極33之電位由其它資料線提供之可能。 板為解決串音（cross talking) 通常會採取如面反轉（frame inversion)、行反轉（c〇lumn 一般而言，液晶顯示面 或閃爍（f 1 icker)之問題， inversion)、列反轉（r〇w 咖㈣⑽）或點反轉（dQt 等反轉驅動技術，其 中，又以點反轉驅動技術最為常用。而點反轉驅動之特徵之 係為相鄰兩貝料線之訊號極性彼此相反。因此，第&圖戍 弟6圖之液晶顯示面板，若在點反轉驅動之操作下，則資料 t D2與貝料線D3之訊號極性將彼此相反。故，第5圖之實施 例將邊界資料線（資料、線⑴與資料線D3電性相連接於c處， 將可使邊界詩線獲取與資料線D2極性相反之電壓。且由於 邊界資料線與資料線D3之跨距最短，故邊界資料線係與資料 線d3相連結係為較佳，不但可節省所需之線材成本，亦因傳 輸路線較短而使資料線整體之電阻值較小，進而減少訊號延 問題。然而值得注意的是，邊界資料線並非限於連接於 I料、、袭D3，其亦可連結於任何可提供一相反於資料線E»2 (即 、/邊界貝料線相鄰之資料線）之訊號極性的資料線。如第8 圖所示，在另_命：Α 貝％例中，邊界資料線係與資料線m連接於 另外雖然第5圖中邊界資料線與資料線m之連接處 14 200826031 之所在，兑::陣5〇0之外部，然而本發明並未限定連接處c ”亦可设於晝素矩陣5〇〇内之任何位置。 對廡2外’雖然第5圖之面板之掃描線端（問極端）部分，為 音· “ 1 in %描、線’亦需提供m + 1 4固掃描訊號以供驅動晝 \即傳統只能提供,個掃描訊號之閉極驅動器亦將不再適 用。然而’由於閘極驅動器之電路設計一般而言將比源極驅 動益之電路設計來得容易，因此重新設計-閘極驅動器將比 重新設計—源極驅動器所耗之成本來得低廉許多。故，關於 …條掃描線之訊號提供，建議可重新設計—閘極驅動器與 之搭配；而|發明將主要著重在面板之資料訊號之提供方式 的•又口十然而’事實上’在其它實施中’本發明之源極端之 資料訊號之提供方式亦可推廣至閘極端掃描訊號之提供。 第5圖之第一實施例中，係將晝素矩陣5〇〇左邊最外側 貧料線D,定義為一邊界資料線，並將該邊界資料線與資料線 汛電性連接，藉由源極驅動器5〇2之訊號輪出腳同時提供 資料訊號予邊界資料線及資料線。如此一來晝素矩陣5⑽ 即可匹配一傳統之源極驅動器來控制面板。同理可推得，在 另一實施例中，如第9圖所示，亦可定義畫素矩陣6〇〇右邊 最外側資料線Dn+1為一邊界資料線，並將該邊界資料線與資 料線電性連接於F處，或與任何能提供和資料線Dn相反 之訊號極性之資料線電性連結，如此一來原先需要n +丨個資 料訊號之面板’將轉而只需η個資料訊號，故可匹配一傳統 之源極驅動器。至於，畫素矩陣600之訊號波形操作方式係 與第一實施例相似’於此不再贅述。然而，特別注意的是， 15 200826031 為配合第9圖之資料線連接設計，其畫素單元内之元件之連 接方式’係與第5圖内之元件連接方式左右顛倒，亦即以最 後一條資料線内之畫素為例，其第二電晶體&係位於晝素内 之右側並與邊界資料線（資料線Dn+i)連結，而第—電晶體L 係位於畫素内之左侧並連結於資料線Dn，如此一來藉由邊界 貧料線與資料線相連接於F處將可提供控制電極3 4所需之電 位0 ^而，如第10圖所示，在第五圖之面板晝面操作之過程 中每t素行中之每一畫素之畫素電極33與其相鄰之資料 線間，將會產生產生一寄生電容C1，以及每一畫素之控制電 極34與其相鄰之資料線間，亦會產生一寄生電容〇。然而， 如第10圖所示，以- mxn畫素矩陣為例，每一晝素行係包含 m個晝素’且由於每一資料線與其相鄰兩側之晝素電極犯皆 曰產生一寄生電容g及ο，因此源極驅動器502每一輸出腳 所對應之資料線將分別耦合2111個〇及化個C”但由於輸出 腳P2係對應連接於資料線I與邊界資料線，因此，輸出腳 P3所對應之資料線將有別於其它輸出腳而與^個&及化個 Ci耦接。是故，其耦合之總寄生電容值將大於其他輸出腳。 始如此一來，於面板晝面操作中，輸出腳P2所對應的電容 I負載將遠大於其他輸出腳，並造成由輸出腳P2輸出之訊號 於傳輸過程t產生嚴㈣R(:延遲問題。例如，以資料線Db2 與邊：資料線(資料線D1)上之資料訊號傳輸來做比較，第lla 圖與第11b圖為根據第一實施例（第5圖或第i〇圖所示），分 別為貧料線D,與邊界資料線上訊號延遲現象示意圖。第… 16 200826031 圖中G係表示一掃描線之掃描訊號，w。係一從輸出腳ρι發出 之原始§fl號波形，该汛號波形將透過資料線£>2傳輸並配合各 掃描線之驅動而被該行之對應晝素所接收。然而，如前所述， 由於貧料線D2其上之寄生電容效應，將使得訊號傳輸至資料 線末端時產生RC延遲現象，而使得其所對應晝素行末端之畫 素所接收到之訊號波形變形如Wm，即該畫素之有效充電時間 將縮短為TC1。同樣地，第llb圖令Wq係一從輸出腳p2發出 之原始訊號波形，然而，由於輸出腳P2所連結之寄生電容總 值係比其他之輸出腳都來得大，即其Rc延遲效應將比其他資 料線嚴重，因此該行末端之畫素所接收到之訊號波形L其失 真程度（變形程度）將比第lla圖中之1來得嚴重，而其有效 充電時間Tc：2將比Tu更短，造成晝素充電（charging)不足， 而影響顯示品質。 為解決如第lib圖之資料線^^訊號延遲之問題，本發 明基於第5圖實施例之結構更進一部提出一改良設計，如第 12_圖所示。第12圖係本發明之第二實施例，其大部結構係 與第5圖相同，且相同之元件以相同之編號表示，唯差異處 在於第12圖中之晝素矩陣區600之最左側之第1條畫素行$ 之每一晝素内增設一輔助線L，輔助線L係位於邊界資料線 以及與該邊界資料線相鄰之薄膜電晶體L之間。較佳地，輔 助線L係設於邊界資料線及其相鄰之晝素電極3 3或控制電極 3 4之間其結構示思圖如第1 3圖所示。第13圖係第1 2圖 之第1條晝素行内之畫素結構示意圖，然而要注意的是第^ 圖之晝素結構並非以第13圖所示為限，任何與第12圖之電 17 200826031 路：效：畫素結構皆為適用。在第13圖中，第一條畫素行内 之畫素結構中，辅助線L係、位於邊界資料線（Dl)與—晝素帝 極33及控制電極34之間。較佳地，輔助線L係大致平行： 畫素電極33與控制電極34。輔助線L可以為一浮接線或連 結-時變訊號或非時變訊號’其中該非時變訊號可以為—極 性為正之訊號，例如，辅料L可以直接連接-共同電極電 位0 同理第12圖之畫素結構，在面板進行顯示操作時，辅 助線L與晝素電極33間將產一 極34間產生一Ί: 與控制電 、生^今匕，如弟14圖所示。藉由辅助線！^ 之叹汁，將可避免邊界資料線與畫素電極Μ和控 間分別產生寄生電容，亦即，邊界' 34 — 力卩遺界貝枓線將不再耦接寄生電 ^:和^進而广幅降低邊界資料線之電容負載。然而，如 弟圖所π ’右辅助線L與邊界資料線間之間隔過小 會使辅助線L與邊界資料線間另產生一寄生電二 線所示亦將使得邊界資料線之電容/虛 f終究無法改善邊界資料線之Μ載過大之問題。因曰此’’ 在設計時輔助線L與邊界資料線間之間距應至少 距離·第14圖所示)，避免d過小，較佳地， 使得^電容值遠小於⑽k電容值為㈣。、擇係 如兩所述’由於邊界資料綠沾λ 貝抖、'泉與辅助線L間維持_適軎 二’使得邊界資料線與輔助線“，之寄生電容心和 圖之：下了'“、各不计。比較第U圖與第10圖可知，第14 ㈤k界貧料線並無輕接如第10圖之寄生電容qc”因 18 200826031 此將大幅降低輸出腳匕之傳導線 至丄贫llUn 屯奋負載，進而大幅改 善如弟lib圖之訊號延遲問題。 之机舛且右nrui s 弟U圖亦知，輔助線L· 之5又计具有下列兩項主要功能 之圭音帝朽4 丨+ )·將邊界貧料線與其相鄰 極和控制電極間不致產生寄生 、卄I、旦素电 弘谷Cl和C2，進而改善輪出腳 P“fL號傳輸之RC延遲問題⑵·藉由辅助線l之設置，使得辅 二線上：：相鄰之畫素電極33和控制電極％間能分別產生 搞&黾谷Cl和C2，而使第1條蚩去> 禾1條畫素仃内之左右兩側之寄生 電容效應對稱，避|q 避免&成该畫素行與其它晝素行之亮度不 均，而影響書面之顯示品曾 士 …-之，'，、頁不口口貝。然而，在另一實施例中，為求 :::間早並改善訊號Rc延遲之問題，晝素面板之設計亦可 热須没置如第12圖之輔助線L而僅將邊界資料線與畫素電極 、控制％極之間距拉大’使得邊界資料線與晝素電極以及 控制電極間不致產生寄生電容或僅產生微小之寄生電容，如 此亦能改善RC延遲之問題。不過，誠如前述，如此之設計由 於缺乏輔助線L，其將使畫素電極之左右兩側電容益法對 ^ J ”、、貝不口口貝同理，如前所述，在另一實施例 中右疋義I料線Dn+ι為邊界資料線，則亦可仿照上述第二 f施例之實施方式，於第9圖之面板之第n + 1條晝素行切 又辅助線L，而得如第1 5圖所示之設計。 身在第12圖之實施例中，整個nxm晝素矩陣區600亦可定 義為面板之顯示區。然而如第二實施例中所述，由於邊界資 料、泉與輔助線L間之間距須維持一適當之距離d，因此，在 另貝施例中，我們可將邊界資料線直接設置於面板之顯示 19 200826031 區外’藉此拉大邊界資料線與辅助線L間之距離，如第16 圖所不。第16圖係為本發明之第三 分表示整個面板之碩干£ s， ' ' ，虛線之部One example is D, which is an example of the image of D. In the poor material rR9 JU Q and VG3 are the scanning signals acting on the scanning lines 562 and 563, and each shape is included in the old scan wave and the % of the heart in the T. The first waveform and the second waveform. The waveform of the seventh graph-lower column is the potential change of the relevant electrode of the pixel 0, and the " and the potential of the pixel electrode 33 and the control electrode respectively representing the pixel D . ❹Patogram 7, when the time is in the first half of VG2, because the brother-bonded transistor T2 is turned on by V and Zen, the data signal at the same time is written to the control electrode 34, ^ ^ ^ Gekou does not control the potential of the electrode 34 from the potential of Kyomoto (below Vcoin) to the potential of VD2 phase (higher than fire (10)). Because the first thin film transistor is turned on by v, y 汲 VG3 & the potential of the data signal VD3 (below V (10)) will be written into the book Xin Xi 士 士 里 甩 甩 33. In the second half of Vg3, the daytime f is the first film thunder, the T ir 浔胲 浔胲 浔胲 丨 丨 丨 丨 丨 丨 丨 丨 丨 丨 选择 选择 选择 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 2008 The potential of 3 (higher than y_) is thus written into the pixel electrode. Since the second thin film transistor T2 is closed at this time, the control electrode is in a floating state, and the control electrode 34 is capacitively coupled. Should be raised to a higher potential. C£ It can be clearly seen from the brother 7 diagram that when the pixel is positive, it satisfies ^ >^>H. After the end of the vertical (four) period, the polarity of the element changes to the negative polarity of the element, and then WVkl is satisfied. Therefore, the structure of the pixel in Figure 6 and the matching of the H-shape will make the operation of each __ pixel unit satisfy the condition one (vCE> vP> d and condition two (Vce < Vkv_), thereby eliminating the two eyes. Line,, ::: η)). However, the (4) of the pixel of the present invention is light in time, and the field (4) is suitable for the driving method of the condition 1 and the condition 2 or the mode of the swallowing. In addition, it should be noted that, taking the prime D as an example, the potential of the pixel electrode 33 is provided by the data signal L, and is mainly used to indicate the required writing level - so the potential signal of the pixel electrode 33 The accuracy of V<A small value) ==4 potential is provided by the data signal to generate an electric field that makes the liquid crystal knife 幵/pour angle symmetry. Since the potential of the electrode of the technical electrode 34 is supplied to the system, the 疋 is generated by a dumping of the dynasty + " the magnitude of the potential value of the electrode will not be as rigorous as the demand of the sinusoidal electrode. Therefore, in general, in ancient times, the potential of the control electrode is required to be σ亜gan; the condition μ ^ rj, - /, and /, the polar performance is opposite to the polarity of the pixel electrode 33 (as shown in Fig. 7), y v. The operation of the denier meets the condition one (VCE >^>^.0 and condition two (VeE>Vp> apricot 犄1 & 4 e°m). For the same reason, as in the sixth As shown in the figure, Tian Hong’s book, D, ^ ^ ^^ f, can be used on both sides of the data line (1) and .k must also be opposite in polarity to each other, ie, with > Boundary data 13 200826031 Line) The connected data line d3, the polarity of the signal provided must be opposite to the polarity of the data line D2. In addition, as mentioned above, since the potential requirement of the control electrode 34 is not the same as The requirements of the halogen electrode 33 are rigorous. Therefore, in the present invention, the potential of the control electrode 34 is mainly provided by other data lines (for example, the potential of the data line κ is provided by the data and the line D3), but in other embodiments, It is not excluded that the potential of the halogen electrode 33 is provided by other data lines. The board is usually used to solve crosstalk. Will take inversion (frame inversion), line inversion (c〇lumn in general, LCD screen or flicker problem, inversion), column inversion (r〇w coffee (4) (10)) or point Inversion (dQt and other inversion driving techniques, in which point inversion driving technology is most commonly used. The feature of dot inversion driving is that the signal polarities of two adjacent feed lines are opposite to each other. Therefore, the & In the liquid crystal display panel of Figure 6, if the operation of the dot inversion drive is performed, the signal polarities of the data t D2 and the bead line D3 will be opposite to each other. Therefore, the embodiment of Fig. 5 sets the boundary data line (data, The line (1) and the data line D3 are electrically connected to the c, which will make the boundary poetry line obtain the voltage opposite to the polarity of the data line D2. Since the span of the boundary data line and the data line D3 is the shortest, the boundary data line and The data line d3 is better connected, which not only saves the required wire cost, but also reduces the overall resistance of the data line due to the short transmission path, thereby reducing the signal delay problem. However, it is worth noting that the boundary data The line is not limited to being connected to the I material, D3, which can also be connected to any data line that provides a signal polarity opposite to the data line E»2 (ie, the data line adjacent to the borderline). As shown in Figure 8, in another_ Life: In the example of Α贝, the boundary data line is connected to the data line m. Although the boundary between the boundary data line and the data line m in Figure 5 is located at the location of 2008 200831, it is outside the array: The present invention does not limit the connection c ′′ to any position within the pixel matrix 5〇〇. For the 庑2 outside, although the scanning line end (the extreme part) of the panel of the fifth figure is the sound “1” In % tracing, line ' also need to provide m + 1 4 solid scanning signal for driving 昼 \ that is traditionally only available, the scanning device of the scanning signal will no longer apply. However, since the circuit design of the gate driver is generally easier to design than the source driver, the redesign-gate driver will be much less expensive than the redesigned-source driver. Therefore, regarding the signal supply of the ... scan line, it is recommended to redesign - the gate driver is matched with it; and the invention will mainly focus on the way the information signal of the panel is provided. The provision of the information signal of the source of the invention may also be extended to the provision of the extreme scanning signal. In the first embodiment of FIG. 5, the outermost lean line D on the left side of the halogen matrix is defined as a boundary data line, and the boundary data line is electrically connected to the data line by the source. The signal driver of the pole driver 5〇2 provides the data signal to the boundary data line and the data line. In this way, the halogen matrix 5 (10) can match a conventional source driver to control the panel. Similarly, in another embodiment, as shown in FIG. 9, the outermost data line Dn+1 on the right side of the pixel matrix 6〇〇 may be defined as a boundary data line, and the boundary data line may be The data line is electrically connected to the F, or is electrically connected to any data line that can provide the signal polarity opposite to the data line Dn. Thus, the panel that originally needs n + 资料 data signals will be converted to only η The data signal can match a traditional source driver. As for the signal waveform operation mode of the pixel matrix 600, it is similar to the first embodiment, and will not be described again. However, it is particularly important to note that 15 200826031 is designed to match the data line connection design of Figure 9, and the connection method of the components in the pixel unit is reversed from the component connection in Figure 5, that is, the last data is For example, in the line pixel, the second transistor & is located on the right side of the pixel and connected to the boundary data line (data line Dn+i), and the first transistor L is located on the left side of the pixel. And connected to the data line Dn, such that the boundary between the boundary lean line and the data line connected to F will provide the potential 0 ^ required for the control electrode 34, as shown in Fig. 10, in the fifth figure. During the face-to-face operation of the panel, a pixel capacitance C1 is generated between each pixel pixel of each pixel in the t-line and its adjacent data line, and the control electrode 34 of each pixel is opposite thereto. A parasitic capacitance 〇 is also generated between adjacent data lines. However, as shown in Fig. 10, taking the -mxn pixel matrix as an example, each elementary line contains m elements' and because each data line and its adjacent two sides of the pixel electrode are parasitic, a parasitic Capacitors g and ο, therefore, the data lines corresponding to each output pin of the source driver 502 will be coupled to 2111 〇 and C ” respectively, but since the output pin P2 is connected to the data line I and the boundary data line, the output is The data line corresponding to pin P3 will be different from other output pins and coupled with ^ & and Ci. Therefore, the total parasitic capacitance value of the coupling will be greater than other output pins. In the kneading operation, the capacitance I load corresponding to the output pin P2 will be much larger than the other output pins, and the signal outputted by the output pin P2 will produce a strict (four) R (: delay problem) in the transmission process t. For example, with the data line Db2 and the side : The data signal on the data line (data line D1) is transmitted for comparison. The 11a and 11b are according to the first embodiment (Fig. 5 or i 〇), respectively, the poor material line D, Schematic diagram of signal delay phenomenon on the boundary data line.... 16 200826031 In the figure, G is a scanning signal of a scanning line, and w is an original §fl waveform sent from the output pin ρι, and the 汛 waveform will be transmitted through the data line £>2 and driven by the scanning lines. The corresponding pixel of the row is received. However, as mentioned above, due to the parasitic capacitance effect on the lean line D2, the RC delay phenomenon occurs when the signal is transmitted to the end of the data line, so that the end of the corresponding pixel The signal waveform received by the pixel is deformed like Wm, that is, the effective charging time of the pixel is shortened to TC 1. Similarly, the llb command Wq is an original signal waveform sent from the output pin p2, however, due to the output The total value of the parasitic capacitance connected to the pin P2 is larger than that of the other output pins, that is, the Rc delay effect is more serious than other data lines, so the signal waveform received at the end of the line is distorted (distortion) The degree) will be more severe than the 1st in the 11a, and the effective charging time Tc:2 will be shorter than Tu, resulting in insufficient charging and affecting the display quality. To solve the data line as in the lib diagram ^^讯The problem of delay, the present invention further proposes an improved design based on the structure of the embodiment of Fig. 5, as shown in Fig. 12. Fig. 12 is a second embodiment of the present invention, and the majority of the structure and the fifth The figures are the same, and the same elements are denoted by the same reference numerals, except that the difference is that an auxiliary line L is added to each element of the first pixel line $ on the leftmost side of the pixel matrix area 600 in FIG. The line L is located between the boundary data line and the thin film transistor L adjacent to the boundary data line. Preferably, the auxiliary line L is disposed on the boundary data line and its adjacent pixel electrode 33 or control electrode 3. The structure diagram between 4 is shown in Fig. 13. Fig. 13 is a schematic diagram of the pixel structure in the first line of the first picture in Fig. 12. However, it should be noted that the structure of the element in the figure is not To the extent shown in Figure 13, any of the powers of Figure 12 200826, 2011 Road: Effect: The pixel structure is applicable. In Fig. 13, in the pixel structure in the first pixel row, the auxiliary line L is located between the boundary data line (D1) and the halogen element 33 and the control electrode 34. Preferably, the auxiliary line L is substantially parallel: the pixel electrode 33 and the control electrode 34. The auxiliary line L can be a floating line or a connection-time-varying signal or a non-time-varying signal. The non-time-varying signal can be a positive polarity signal. For example, the auxiliary material L can be directly connected - the common electrode potential 0 is the same as the 12th figure. In the pixel structure, when the panel performs the display operation, a line between the auxiliary line L and the halogen electrode 33 will be generated between the poles 34 and the control unit, and the control unit, as shown in FIG. With the auxiliary line! ^ The sigh juice will avoid the parasitic capacitance between the boundary data line and the pixel electrode and the control room, that is, the boundary '34' will not be coupled with the parasitic power ^: and ^ Widely reduce the capacitive load of the boundary data line. However, if the interval between the right auxiliary line L and the boundary data line is too small, the second line between the auxiliary line L and the boundary data line will also cause a capacitance/virtual f of the boundary data line. After all, it is impossible to improve the problem of the boundary data line. Since this should be at least the distance between the auxiliary line L and the boundary data line at the time of design, as shown in Fig. 14, the d is prevented from being too small, and preferably, the capacitance value is much smaller than the (10) k capacitance value (4). The selection system is as follows: 'Because the boundary data is green, λ 抖 、, 'spring and auxiliary line L maintain _ 軎 軎 ' 使得 使得 边界 边界 边界 边界 边界 边界 边界 边界 边界 边界 边界 边界 边界 边界 边界 边界 边界 边界 边界 边界 边界 边界 边界 边界 边界 边界 边界 边界", do not count. Comparing U and 10, we can see that the 14th (f)th k-thin line is not connected as the parasitic capacitance qc of Figure 10. Because 18 200826031, this will greatly reduce the transmission line of the output pin to the poor llUn. , and thus greatly improve the signal delay problem of the brother lib diagram. The machine and the right nrui s brother U map also know that the auxiliary line L· 5 has the following two main functions of the Guiyin emperor 4 丨 + )· The parasitic lean line and its adjacent poles and the control electrode are not caused to generate parasitic, 卄I, denier electric Grids Cl and C2, thereby improving the RC delay problem of the pin-out transmission P"fL number transmission (2) · by the auxiliary line l The setting is such that: the adjacent pixel electrode 33 and the control electrode % can respectively generate & 黾谷Cl and C2, and make the first strip &> The parasitic capacitance effect on the left and right sides is symmetrical, avoiding |q to avoid & the unevenness of the brightness of the pixel line and other elements, and affecting the written display product Zengshi...-,,,,,,,,,,,,, However, in another embodiment, in order to solve the problem of::: early and improve the delay of the signal Rc, the design of the pixel panel may also be hot without the auxiliary line L as shown in FIG. 12 and only the boundary data line and The pixel electrode and the controlled % pole are enlarged to make the parasitic capacitance between the boundary data line and the halogen electrode and the control electrode or generate only a small parasitic capacitance, which can also improve the RC delay. However, as mentioned above, such a design is due to the lack of the auxiliary line L, which will make the left and right sides of the pixel electrode have a good effect on the capacitance, and the same as before, in the other In the embodiment, the right-hand I-line Dn+ι is a boundary data line, and the n-th element of the panel of the figure 9 can be cut and the auxiliary line L can be modeled according to the embodiment of the second embodiment. The design is as shown in Fig. 15. In the embodiment of Fig. 12, the entire nxm pixel matrix area 600 can also be defined as the display area of the panel. However, as described in the second embodiment, The boundary between the boundary data and the spring and the auxiliary line L must be maintained at an appropriate distance d. Therefore, in another example, we can set the boundary data line directly to the panel display 19 200826031 outside the area. The distance between the data line and the auxiliary line L is as shown in Fig. 16. Fig. 16 is the third part of the present invention indicating the whole panel of the skeleton s, ' ', the dotted line
夕冰” 1不“而邊界資料線係設置於顯示區S 卜二弟:6圖中’整個畫素矩陣依然係由η + :+,Γ線所構成…素矩陣，其中第⑽素行； 分割為兩個次畫素行，分別為寬幅為以之 ^；^ 寬幅為d2之一第二次畫素行 、素仃與 内，甘七人本 —，、弟_人旦素行係位於顯示 —3 一里素電極33與控制電極34用以顯示晝素；而 弟一次畫素行位於顯示區s外。 ” 次晝素行内。缺而，在3 助線L係位於第一 線亦可皆設於第二次晝素行内， 界貝枓 ,,.., 輔助線L與邊界資來4 線白位於顯示區S外。在另一每 、"斗 一 卜在另貝知例中，如第16圖所示，第 仃係為由輔助線L與資料㈣所界定之區域 為輔助&與邊界資料線所界定之區域，即，整 個顯4S係為輔助線料線^所界定之區域。 較佳地’在第16圖之實施财，第_次 … dl與第二次畫素行之寬幅d2為相等，且等他： 寬幅；如此之壹去r > 且寻於其他晝素行之 程之… 局，將使畫素區之尺寸規格及書素彭 王之先罩容易設計，增加製程之容易度，且因邊_ 2 甫助線L·之距離至少保持一個書 ) 一 線盥奎幸+扛# + 一京仃之見巾田，而使邊界資料 :素⑦極和控制電極間不致產生寄生電容。另 亦；16圖中之第—次晝素行内之第二電晶體T2 1?圖：_、弟-次晝素行中，亦即設置於顯示區S外，如第 不。同理，如前所述，若定義資料線I為邊界資料 20 200826031 線，則亦可仿照上述第三實施例之實施方式，而得如第μ 圖所不之設計。 如上所述，本發明之特徵與優點在於，其提供一種液晶 顯示面板’具有-晝素矩陣’其内部資料線之總數大於畫素 之L數’且其可在未改變傳統之源極驅動器之結構下來操 作面板畫素’亦即其資料線所需之資料訊號可全由傳統之源 極驅動器所提供，因此不需再重新設計一新的驅動器與之匹 配。同時本發明也同時提出一解決可能存在之訊號延遲之問 題及寄生電容不對稱而致顯示品f不佳之方法。然而，本發 明之設計並非僅限於應用於如第6圖所示之晝素結構，其亦 可應用於任何具有如下之晝素結構特徵之面板：⑴具有η 個晝素行及m個晝素列之晝素矩陣區，其中複數個畫素形成 於》亥至素矩陣區内之n+ Η条資料線和㈣i條掃描線之交叉處 (2)每一畫素單元至少包含兩個電晶體及一晝素電極，且每一 里素單兀係藉由其左右兩側之資料線所提供之訊號控制之。 口此減如上述（1)(2)兩點之晝素結構特徵，本發明亦可應 用於如第2圖所示之具有三個薄膜電晶體之晝素面板。 本^明技術内容及技術特點已揭示如上，然而熟悉本項 =之人士仍可能基於本發明之教示及揭示而作各種不背離 本^明精神之替換及修飾。因此，本發明之保護範圍應不限 ;κ鈿例所揭示者，而應包括各種不背離本發明之替換及修 飾’並為以下之申請專利範圍所涵蓋。 【圖式簡單說明】 弟1圖係習知對角扭轉垂直排列之液晶顯示面板之剖面 視圖； 21 200826031 第2圖係韓國三星電子所提出之晝素等效電路圖； :3圖係本發明之液晶顯示面板之像素等效電路圖； 第4圖係本發明液晶顯示面板之晝素矩陣圖； 第5圖係本發明第一實施例液晶 1 j，仪日日頌不面板之晝素矩陣結 構及源極驅動器之示意圖； 第6圖係根據第5圖之畫素單元示意圖； :7圖係作用於第6圖之畫素之驅動訊號波形圖； 第8圖係根據本發明第—實施例之另—實施例之液晶顯 示面板示意圖； 一第9圖係根據本發日月第—實施例之另—實施例之液晶顯 不面板， 第10圖係顯示第5圖液晶顯示面板於操作過程中所產生 之寄生電容示意圖； 第11圖係顯示第1〇圖液晶顯示面板於操作過程中所產 生之訊號延遲現象示意圖； 第12圖係本發明第二實施例之液晶顯示面板示意圖； 第13圖係根據第12圖之畫素單元之一結構示意圖； 第14圖係顯示第12圖液晶顯示面板於操作過程中所產 生之寄生電容示意圖； 第15圖係根據本發明第二實施例之另一實施例示意圖； 第1 β圖係本發明第三實施例之液晶顯示面板示意圖； 第17圖係根據本發明第三實施例之另一實施例示意 圖；及 第18圖係根據本發明第三實施例之另一實施例示意圖 22 200826031 【主要元件符號說明】 10 液晶顯不面板 11 彩色濾光片 111 、1 31 透明基板 112 共同電極 12 液晶層 121 液晶分子 13 主動基板 132 絕緣層 133 控制電極 134 晝素電極 20 晝素 TV ’ 第一電晶體 T2,， 第二電晶體 CV ’ 液晶電容 (V， 對角扭轉電容 (V ’ 電容 24 畫素電極 251 、2 5 2 掃描線 261 、262 資料線 27 共同電極 Τι 第一薄膜電晶體 T2 第二薄膜電晶體 Cl 液晶電容 C2 對角扭轉電容 〇3 電容 33 畫素電極 34 控制電極 351 、352、353 資料線 361 、362、363 掃描線 37 共同電極 D1〜 DnH資料線 G1〜 G m + 1掃描線 400 畫素矩陣 Pi〜 PnH輸出腳 C連接處 500 晝素矩陣 501 液晶顯不面板 551 〜554資料線 561' 〜5 6 3掃描線 B、 D畫素單元 Vd2〜 V D 3貢料訊號電位 VG2〜 VC3掃描訊號電位 V C 0 ΙΠ 共同電極電位 T CE 驅動時間 23 200826031夕冰”1不” and the boundary data line is set in the display area S. Bu Erdi: In the figure 6 the whole pixel matrix is still composed of η + :+, Γ line...the prime matrix, where the (10) prime line is divided into two The number of times of painting is the width of the film ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ The lining electrode 33 and the control electrode 34 are used to display the halogen; and the first pixel line is located outside the display area s. In the second line of the line, the missing line is located in the second line of the 3 line. The line is also located in the second line. In the other area, in the other case, in the other case, as shown in Fig. 16, the third line is the area defined by the auxiliary line L and the data (4) as the auxiliary & The area defined by the data line, that is, the entire display 4S is the area defined by the auxiliary line ^. Preferably, the implementation of the figure in Fig. 16, the _th... dl and the width of the second line D2 is equal, and wait for him: wide; so go to r > and find the other way of the line... The bureau will make the size specification of the pixel area and the book cover of the king of Peng Wang easy to design, increase the process Ease of ease, and because the distance _ 2 甫 help line L · the distance to keep at least one book) One line 盥 幸 幸 + 扛 + + + + 仃 仃 见 见 见 , , , , , , , , , , , , , , , , , , , , , , , , , , , Parasitic capacitance. In addition, the second transistor T2 1 in the first-order pixel row in the figure is shown in the figure: _, 弟-次昼素行, that is, set to display S, except for the same. As mentioned above, if the data line I is defined as the boundary data 20 200826031 line, the embodiment of the third embodiment can also be modeled, and the design of the second embodiment can be obtained. As described above, a feature and advantage of the present invention is that it provides a liquid crystal display panel having a 昼-matrix matrix whose total number of internal data lines is larger than the L number of pixels' and which can be used without changing the conventional source driver The structure of the operation panel pixel, that is, the data signal required for its data line can be all provided by the traditional source driver, so there is no need to redesign a new driver to match it. At the same time, the invention also proposes a Solving the problem of signal delay that may exist and the method of asymmetry of parasitic capacitance, resulting in poor display product f. However, the design of the present invention is not limited to the application of the halogen structure as shown in Fig. 6, and it can also be applied to any A panel having the following structural features of alizarin: (1) a unitary matrix region having η 昼 行 rows and m 昼 列 columns, wherein a plurality of pixels are formed in the n + Η 矩阵 资The intersection of the line and the (iv) i scanning lines (2) each pixel unit contains at least two transistors and a halogen electrode, and each of the cells is provided by the signal lines provided on the left and right sides thereof. The present invention can also be applied to a halogen panel having three thin film transistors as shown in Fig. 2. The present invention can also be applied to a halogen panel having three thin film transistors as shown in Fig. 2. The content and technical features have been disclosed as above, but those skilled in the art can still make various substitutions and modifications without departing from the spirit and scope of the present invention based on the teachings and disclosures of the present invention. Therefore, the scope of protection of the present invention should not be limited; The disclosures of the present invention are intended to cover various alternatives and modifications without departing from the invention and are covered by the following claims. [Simple Description of the Drawings] Brother 1 is a conventional liquid crystal display panel with diagonally twisted vertical alignment. Sectional view; 21 200826031 Fig. 2 is a diagram of the equivalent circuit of the liquid crystal display panel of the present invention; Fig. 4 is a pixel equivalent circuit diagram of the liquid crystal display panel of the present invention; Matrix diagram 5 is a schematic diagram of a liquid crystal matrix of a liquid crystal 1 j according to a first embodiment of the present invention, and a pixel matrix structure and a source driver of the panel; FIG. 6 is a schematic diagram of a pixel unit according to FIG. 5; FIG. 8 is a schematic diagram of a driving signal waveform of a pixel according to FIG. 6; FIG. 8 is a schematic diagram of a liquid crystal display panel according to another embodiment of the present invention; and a ninth drawing is according to the first embodiment of the present invention. In addition, the liquid crystal display panel of the embodiment, FIG. 10 is a schematic diagram showing the parasitic capacitance generated during the operation of the liquid crystal display panel of FIG. 5; FIG. 11 is a diagram showing the liquid crystal display panel of the first image generated during operation. 12 is a schematic diagram of a liquid crystal display panel according to a second embodiment of the present invention; FIG. 13 is a schematic structural view of a pixel unit according to FIG. 12; and FIG. 14 is a liquid crystal display panel of FIG. FIG. 15 is a schematic view of another embodiment of a second embodiment of the present invention; FIG. 1 is a schematic view of a liquid crystal display panel according to a third embodiment of the present invention; 17 is a schematic view of another embodiment of a third embodiment of the present invention; and FIG. 18 is a schematic diagram of another embodiment of a third embodiment of the present invention. 200826031 [Description of main components] 10 LCD display panel 11 color Filter 111, 1 31 Transparent substrate 112 Common electrode 12 Liquid crystal layer 121 Liquid crystal molecule 13 Active substrate 132 Insulating layer 133 Control electrode 134 Alizarin electrode 20 Alizarin TV 'First transistor T2, Second transistor CV 'LCD Capacitance (V, diagonal torsional capacitance (V 'capacitor 24 pixel electrode 251, 2 5 2 scan line 261, 262 data line 27 common electrode Τ first thin film transistor T2 second thin film transistor Cl liquid crystal capacitor C2 diagonal twist Capacitance 〇3 Capacitor 33 Pixel electrode 34 Control electrode 351, 352, 353 Data line 361, 362, 363 Scan line 37 Common electrode D1~ DnH Data line G1~ G m + 1 Scan line 400 Pixel matrix Pi~ PnH Output pin C connection 500 昼 matrix 501 LCD display panel 551 ~ 554 data line 561' ~ 5 6 3 scan line B, D pixel unit Vd2 ~ VD 3 tribute signal VG2~ VC3 scan signal potential V C 0 ΙΠ potential of the common electrode driving time T CE 23 200 826 031
Tp驅動時間 VCE控制電極電位 600晝素矩陣 F連接處 W〇原始訊號波形 W,延遲訊號波形 700晝素矩陣 d、山、d2間隔距離 S顯示區Tp driving time VCE control electrode potential 600 pixel matrix F connection W〇 original signal waveform W, delay signal waveform 700 pixel matrix d, mountain, d2 separation distance S display area
Vp晝素電極電位 E連接處 6 01液晶顯不面板 Cl〜C3寄生電容 G掃描訊號波形 T C 1、T C 2效充電時間 L輔助線 800畫素矩陣 24Vp 昼 electrode potential E junction 6 01 liquid crystal display panel Cl ~ C3 parasitic capacitance G scan signal waveform T C 1, T C 2 effect charging time L auxiliary line 800 pixel matrix 24