KR101112551B1 - Liquid crystal display and driving method thereof - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device and a method of driving the same, wherein the device generates a gate line, a data line, a switching element, a pixel electrode, a sustain electrode overlapping the pixel electrode, a sustain electrode line connected to the sustain electrode, and a gate signal. And a gate driver for supplying the gate line, a data driver for generating a data voltage and supplying the data line, and a sustain electrode driver for generating a sustain electrode signal and supplying the sustain electrode signal. At this time, the sustain electrode signal changes in voltage level when a gate on voltage is applied and when a predetermined time elapses after the gate off voltage is applied. As described above, according to the present invention, the response speed can be improved by increasing or decreasing the level of the pixel voltage charged in the entire gray level without using the frame memory, and the contrast ratio can be prevented from being increased due to the black luminance.

Liquid crystal display, response speed, PVA mode, sustain electrode signal, sustain electrode

Description

Liquid crystal display and driving method thereof {LIQUID CRYSTAL DISPLAY AND DRIVING METHOD THEREOF}

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

2 is an equivalent circuit diagram of one pixel of a liquid crystal display according to an exemplary embodiment of the present invention.

3 is an example of a layout view of a thin film transistor array panel for a liquid crystal display according to an exemplary embodiment of the present invention.

4 is an example of a layout view of a common electrode display panel for a liquid crystal display according to an exemplary embodiment of the present invention.

FIG. 5 is a layout view of a liquid crystal display including the thin film transistor array panel illustrated in FIG. 3 and the common electrode display panel illustrated in FIG. 4.

6 to 8 are cross-sectional views of the liquid crystal display of FIG. 5 taken along the lines VI-VI ', VII-VII', and VIII-VIII ″, respectively.

9 is a waveform diagram illustrating a method of driving a liquid crystal display according to an exemplary embodiment of the present invention.

10 and 11 are schematic diagrams of sustain electrode lines of a liquid crystal display according to an exemplary embodiment of the present invention.

12 and 13 are schematic views of sustain electrode lines of a liquid crystal display according to another exemplary embodiment of the present invention.

14 is a waveform diagram illustrating a method of driving a liquid crystal display according to another exemplary embodiment of the present invention.

<Description of reference numerals>

3: liquid crystal layer 12, 22: polarizing plate

81, 82, 86: contact aid member

83: holding electrode connection leg 100, 200: display panel

110 and 210: insulating substrates 121 and 129: gate lines

124: gate electrode 131: sustain electrode line

133a-133f: sustain electrode 140: gate insulating film

151 and 154: semiconductors 161, 163 and 165: ohmic contact members

171 and 179: data line 173: source electrode

175: drain electrode 180: protective film

181-186: Contact hole 190: Pixel electrode

191-193: cutout 220: light blocking member

230: color filter 250: overcoat

270: common electrode 271-273: incision

300: liquid crystal panel assembly 400: gate driver

500: data driver 600: signal controller

700: sustain driver 800: gray voltage generator

The present invention relates to a liquid crystal display and a driving method thereof.

The liquid crystal display is one of the most widely used flat panel display devices. The liquid crystal display includes two display panels on which field generating electrodes such as a pixel electrode and a common electrode are formed, and a liquid crystal layer interposed therebetween. Is applied to generate an electric field in the liquid crystal layer, thereby determining the orientation of liquid crystal molecules in the liquid crystal layer and controlling the polarization of incident light to display an image.

Among them, a vertical alignment (VA) mode liquid crystal display device in which the long axis of the liquid crystal molecules is arranged perpendicular to the upper and lower display panels without an electric field applied to the display panel has a high contrast ratio and is easy to implement a wide viewing angle.

Means for implementing a wide viewing angle in a vertical alignment mode liquid crystal display include a method of forming a cutout in the field generating electrode and a method of forming a protrusion on the field generating electrode. Since the direction in which the liquid crystal molecules are inclined by the cutout and the protrusion can be determined, the wide viewing angle can be secured by dispersing the inclination directions of the liquid crystal molecules in various directions. Among them, a patterned vertically aligned (PVA) type liquid crystal display device using an incision is recognized as a wide viewing angle technology that can replace an IPS (in-plane switching) type liquid crystal display device.

Meanwhile, since the liquid crystal display is widely used not only as a display device of a computer but also as a display screen of a television, it is necessary to implement a moving image. However, the conventional liquid crystal display device is difficult to implement a moving picture because the response speed of the liquid crystal is slow.

That is, since the response speed of the liquid crystal molecules is slow, it takes some time for the voltage charged in the liquid crystal capacitor to reach the target voltage, that is, the voltage at which the desired luminance can be obtained, and this time is previously charged in the liquid crystal capacitor. It depends on the difference between the voltages present. Thus, for example, when the difference between the target voltage and the previous voltage is large, if only the target voltage is applied from the beginning, the target voltage may not be reached for one frame of time.

Accordingly, a DCC (dynamic capacitance compensation) method has been proposed to improve the driving method without changing the physical properties of the liquid crystal. That is, the DCC method takes advantage of the fact that the response speed of the liquid crystal becomes faster as the voltage across the liquid crystal capacitor increases, and the data voltage applied to the corresponding pixel (actually, the difference between the data voltage and the common voltage is assumed to be 0 for convenience). ) Is made higher than the target voltage to shorten the time it takes for the luminance display of the liquid crystal to reach the target value.

However, in order to apply the DCC method, a frame memory for storing one or two image signals is required, thereby increasing the cost.

Accordingly, an object of the present invention is to provide a liquid crystal display and a driving method thereof capable of improving a response speed without a frame memory.

According to an exemplary embodiment of the present invention, a liquid crystal display includes a plurality of gate lines, a plurality of data lines intersecting the gate lines, a switching element connected to the gate line and the data line, and the switching element. A gate signal including a plurality of pixel electrodes connected to the plurality of pixel electrodes, a plurality of sustain electrodes overlapping the pixel electrodes, a plurality of sustain electrode lines connected to the sustain electrodes, a gate on voltage, and a gate off voltage are generated. Generating a data voltage corresponding to an external image signal by supplying a gate driver to supply the data line, and generating a sustain electrode signal including a reference voltage, a high voltage greater than the reference voltage and a low voltage smaller than the reference voltage. Sustain electrode sphere to be supplied to the sustain electrode line Comprises parts of the sustain electrode and the gate signal is turned off when the voltage applied to the gate-on voltage is applied to change the voltage level when a predetermined time has elapsed.

When the polarity of the data voltage changes from negative to positive, the sustain electrode signal changes from the reference voltage to the low voltage when the gate on voltage is applied, and from the low voltage to the reference voltage when the predetermined time elapses. Can change.

When the polarity of the data voltage changes from positive to negative, the sustain electrode signal is changed from the reference voltage to the high voltage when the gate-on voltage is applied, and when the predetermined time elapses, the reference voltage is changed from the high voltage to the reference voltage. Can be changed to

The reference voltage may be substantially the same as the common voltage applied to the common electrode opposite to the pixel electrode.

The polarity of the data voltage is preferably inverted.

The storage electrodes of one pixel row may be alternately connected to two neighboring storage electrode lines.

The storage electrode line and the gate line may be alternately arranged, and the storage electrode and the storage electrode line may be connected through at least one connection leg.

The storage electrode line may include a plurality of horizontal parts alternately disposed at upper and lower sides of the gate line, and the upper and lower horizontal parts may be connected through at least one connection leg.

The pixel electrode may be divided into a plurality of regions.

The pixel electrode may include a plurality of cutouts or a plurality of protrusions, and the region may be divided by the cutouts or the protrusions.

When the polarity of the data voltage changes from negative to positive, the sustain electrode signal changes from the reference voltage to the high voltage when the gate-on voltage is applied, and from the high voltage to the reference voltage when the predetermined time elapses. Can change.

When the polarity of the data voltage changes from positive to negative, the sustain electrode signal changes from the reference voltage to the low voltage when the gate on voltage is applied, and from the low voltage to the reference voltage when the predetermined time elapses. Can change.

A driving method of a liquid crystal display according to another exemplary embodiment of the present invention may include applying a gate on voltage, applying a data voltage while applying the gate on voltage, and substantially simultaneously with applying the gate on voltage. A first conversion step of converting a voltage level of the sustain electrode signal having a voltage, a high voltage greater than the reference voltage and a low voltage less than the reference voltage, applying a gate off voltage, and applying a gate off voltage And a second converting step of converting the voltage level of the sustain electrode signal after the elapsed time.

The first conversion step includes converting the sustain electrode signal from the reference voltage to the low voltage when the polarity of the data voltage is changed from negative to positive, and the polarity of the data voltage is changed from positive to negative. In this case, the method may include converting the sustain electrode signal from the reference voltage to the high voltage.

The second converting step may include converting the sustain electrode signal from the low voltage to the reference voltage when the polarity of the data voltage is changed from negative to positive, and the polarity of the data voltage is changed from positive to negative. In this case, the method may include converting the sustain electrode signal from the high voltage to the reference voltage.

The first converting step may include converting the sustain electrode signal from the reference voltage to the high voltage when the polarity of the data voltage is changed from negative to positive, and the polarity of the data voltage is changed from positive to negative. In this case, the method may include converting the sustain electrode signal from the reference voltage to the low voltage.

The second conversion step includes converting the sustain electrode signal from the high voltage to the reference voltage when the polarity of the data voltage is changed from negative to positive, and the polarity of the data voltage is changed from positive to negative. In this case, the method may include converting the sustain electrode signal from the low voltage to the reference voltage.

DETAILED DESCRIPTION Embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification. When a part of a layer, film, region, plate, etc. is said to be "on" another part, this includes not only the other part being "right over" but also another part in the middle. On the contrary, when a part is "just above" another part, there is no other part in the middle.

A liquid crystal display and a driving method thereof according to an embodiment of the present invention will now be described in detail with reference to the drawings.

1 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 2 is an equivalent circuit diagram of one pixel of the liquid crystal display according to an exemplary embodiment of the present invention.

As shown in FIG. 1, a liquid crystal display according to an exemplary embodiment of the present invention includes a liquid crystal panel assembly 300, a gate driver 400, a data driver 500, and a sustain electrode driver connected thereto. 700, a gray voltage generator 800 connected to the data driver 500, and a signal controller 600 for controlling the gray voltage generator 800.

The liquid crystal panel assembly 300, when viewed as an equivalent circuit, includes a plurality of display signal lines G ₁ -G _n , S ₁ -S _n , and D ₁ -D _m , and a plurality of pixels connected to the plurality of display signal lines G ₁ -G _n , S ₁ -S _n , and D ₁ -D _m . Contains (pixels).

The display signal lines G ₁ -G _n , S ₁ -S _n , and D ₁ -D _{m each} include a plurality of gate lines G ₁ -G _n that transmit a gate signal, and a plurality of storage electrode lines that transmit a sustain electrode signal ( S ₁ -S _n ), and data lines D ₁ -D _m that carry data signals. The gate lines G ₁ -G _n extend substantially in the row direction and are substantially parallel to each other, and the data lines D ₁ -D _m extend substantially in the column direction and are substantially parallel to each other. The storage electrode lines S ₁ -S _n extend in the row or column direction.

Each pixel includes a switching element Q connected to the display signal lines G ₁ -G _n , S ₁ -S _n , and D ₁ -D _m , a liquid crystal capacitor C _LC , and a storage capacitor connected thereto. capacitor) (C _ST ).

The switching element Q, such as a thin film transistor, is provided in the lower panel 100, and the control terminal and the input terminal are three-terminal elements, respectively, with gate lines G ₁ -G _n and data lines D ₁ -D _m . The output terminal is connected to a liquid crystal capacitor (C _LC ) and a holding capacitor (C _ST ).

The liquid crystal capacitor C _LC has two terminals, the pixel electrode 190 of the lower panel 100 and the common electrode 270 of the upper panel 200, and the liquid crystal layer 3 between the two electrodes 190 and 270. It functions as a dielectric. The pixel electrode 190 is connected to the switching element Q, and the common electrode 270 is formed on the front surface of the upper panel 200 and receives a common voltage V _com .

In the storage capacitor C _ST , which serves as an auxiliary role of the liquid crystal capacitor C _LC , the storage electrode lines S ₁ -S _n and the pixel electrodes 190 provided on the lower panel 100 overlap each other with an insulator interposed therebetween. The sustain electrode voltage V _S1 -V _Sn is applied to the sustain electrode line.

On the other hand, in order to implement color display, each pixel uniquely displays one of the primary colors (spatial division) or each pixel alternately displays the primary colors according to time (time division) so that the spatial and temporal combination of these primary colors can be achieved. To recognize the desired color. Examples of the primary colors include red, green, and blue, and FIG. 2 illustrates that each pixel includes a red, green, or blue color filter 230 in a region corresponding to the pixel electrode 190. Is showing.

The gray voltage generator 800 generates two sets of gray voltages related to the transmittance of the pixel. One of the two sets has a positive value for the common voltage (V _com ) and the other set has a negative value.

The gate driver 400 is connected to the gate lines G ₁ -G _n of the liquid crystal panel assembly 300 to receive a gate signal formed by a combination of a gate on voltage V _on and a gate off voltage V _off from the outside. It is applied to the gate lines G ₁ -G _n .

The storage electrode driver 700 is connected to the storage electrode lines S ₁ -S _n of the liquid crystal panel assembly 300 to form a combination of a common voltage V _com , a high voltage V _high , and a low voltage V _low from the outside. The made sustain electrode signal is applied to the sustain electrode lines S ₁ -S _n .

The data driver 500 is connected to the data lines D ₁ -D _m of the liquid crystal panel assembly 300 to select the gray voltage from the gray voltage generator 800 and apply the gray voltage to the pixel as a data voltage.

The gate driver 400, the sustain electrode driver 700, or the data driver 500 may be mounted directly on the liquid crystal panel assembly 300 in the form of a plurality of driving integrated circuit chips, or may be a flexible printed circuit film. It may be mounted on (not shown) and attached to the liquid crystal panel assembly 300 in the form of a tape carrier package (TCP). Alternatively, the gate driver 400, the sustain electrode driver 700, or the data driver 500 may be integrated in the liquid crystal panel assembly 300.

The signal controller 600 controls operations of the gate driver 400, the sustain electrode driver 700, the data driver 500, and the like.

Next, the structure of the liquid crystal display will be described in detail with reference to FIGS. 3 to 8.

FIG. 3 is an example of a layout view of a thin film transistor array panel for a liquid crystal display according to an exemplary embodiment, and FIG. 4 is an example of a layout view of a common electrode display panel for a liquid crystal display according to an exemplary embodiment. FIG. 3 is a layout view of a liquid crystal display including the thin film transistor array panel illustrated in FIG. 3 and the common electrode display panel illustrated in FIG. 4. 6 to 8 are cross-sectional views of the liquid crystal display of FIG. 5 taken along the lines VI-VI ', VII-VII', and VIII-VIII ″, respectively.

The liquid crystal display according to the present exemplary embodiment is inserted between the thin film transistor array panel 100 and the common electrode panel 200 facing the thin film transistor display panel 100, and is substantially perpendicular to the surfaces of the two display panels 100 and 200. It consists of a liquid crystal layer 3 containing liquid crystal molecules present.

First, the thin film transistor array panel will be described in detail with reference to FIGS. 3 and 5 to 8.

A plurality of gate lines 121 and a plurality of storage electrode lines 131 are formed on an insulating substrate 110 made of transparent glass or the like.

The gate lines 121 mainly extend in the horizontal direction, are separated from each other, and transmit gate signals. Each gate line 121 has a plurality of protrusions forming the gate electrode 124, and one end portion 129 of the gate line 121 has a large area for connection with an external circuit.

Each storage electrode line 131 extends in a horizontal direction and includes a plurality of sets of branches forming the first storage electrodes 133a-133e and the second storage electrodes 134a-134e, and one end of the storage electrode line 131 is formed. The portion 139 is large in area for connection with external circuitry. The first sustain electrodes 133a-133e and the second sustain electrodes 134a-134e are alternately arranged in pixel units. The storage electrodes 133a and 133b extend in the vertical direction on the left side and the right side of the corresponding pixel, respectively, and the storage electrode 133c extends in the horizontal direction to connect the storage electrode 133a and the storage electrode 133b to each other. The electrodes 133d and 133e extend in an oblique direction to connect the sustain electrode 133a and the sustain electrode 133b. The storage electrodes 134a and 134b also extend in the vertical direction from the left side and the right side of the corresponding pixel, respectively, and the storage electrode 134c also extends in the horizontal direction to connect the storage electrode 134a and the storage electrode 134b to each other. The electrodes 134d and 134e also extend in an oblique direction to connect the sustain electrode 133a and the sustain electrode 133b. The sustain electrode 133a has upper and lower free ends, and the lower free ends have protrusions. The storage electrode 134a has a free end and a fixed end connected to the storage electrode line 131, and the free end has a protrusion. The storage electrodes 133c and 134c form a center line of two adjacent gate lines 121. A sustain electrode signal is applied to each sustain electrode line 131.

The gate line 121 and the storage electrode line 131 may be formed of aluminum-based metals such as aluminum (Al) and aluminum alloys, silver-based metals such as silver (Ag) and silver alloys, and copper-based metals such as copper (Cu) and copper alloys. And molybdenum-based metals such as molybdenum (Mo) and molybdenum alloys, chromium (Cr), titanium (Ti), and tantalum (Ta). However, the gate line 121 and the storage electrode line 131 may have a multilayer structure including two conductive layers (not shown) having different physical properties. One of the conductive films has a low resistivity metal such as an aluminum-based metal, a silver-based metal, or a copper-based metal so as to reduce signal delay or voltage drop between the gate line 121 and the storage electrode line 131. And so on. In contrast, the other conductive layer is made of a material having excellent contact properties with other materials, particularly indium tin oxide (ITO) and indium zinc oxide (IZO), such as molybdenum-based metals, chromium, titanium, tantalum, and the like. A good example of such a combination is a chromium bottom film and an aluminum top film and an aluminum bottom film and a molybdenum top film. However, the gate line 121 and the storage electrode line 131 may be made of various metals and conductors.

In addition, side surfaces of the gate line 121 and the storage electrode line 131 are inclined with respect to the surface of the substrate 110, and the inclination angle thereof is about 20-80 °.

A gate insulating layer 140 made of silicon nitride (SiNx) is formed on the gate line 121 and the storage electrode line 131.

On the gate insulating layer 140, a plurality of linear semiconductors 151 made of hydrogenated amorphous silicon (amorphous silicon is abbreviated a-Si), polycrystalline silicon, or the like are formed. The linear semiconductor 151 extends mainly in the longitudinal direction, from which a plurality of extensions 154 extend toward the gate electrode 124.

A plurality of linear and island ohmic contacts 161 and 165 made of a material such as n + hydrogenated amorphous silicon doped with silicide or n-type impurities at a high concentration are formed on the semiconductor 151. have. The linear contact member 161 has a plurality of protrusions 163, and the protrusions 163 and the island contact members 165 are paired and positioned on the protrusions 154 of the semiconductor 151.

Side surfaces of the semiconductor 151 and the ohmic contacts 161 and 165 are also inclined with respect to the surface of the substrate 110, and the inclination angle is 30-80 °.

A plurality of data lines 171 and a plurality of drain electrodes 175 separated therefrom are formed on the ohmic contacts 161 and 165 and the gate insulating layer 140.

The data line 171 mainly extends in the vertical direction and crosses the gate line 121 and the storage electrode line 131 and transmits a data voltage. Each data line 171 is positioned between the adjacent sustain electrode 133b and the sustain electrode 134a of the sustain electrode line 131 and between the adjacent sustain electrode 134b and the sustain electrode 133a. It includes a wide end portion 179 for the connection of the. A plurality of branches extending from the data line 171 toward the drain electrode 175 forms a source electrode 173. One end of each drain electrode 175 has a large area for connection with another layer, and each source electrode 173 is bent to surround the other end of the drain electrode 175. The gate electrode 124, the source electrode 173, and the drain electrode 175 form a thin film transistor (TFT) together with the protrusion 154 of the semiconductor 151, and the channel of the thin film transistor is a source. A protrusion 154 is formed between the electrode 173 and the drain electrode 175.

The data line 171 and the drain electrode 175 are preferably made of a refractory metal such as chromium or molybdenum-based metal, tantalum and titanium, and a lower layer (not shown) such as molybdenum, molybdenum alloy, and chromium It may have a multilayer structure consisting of an upper film (not shown) that is an aluminum-based metal.

Similar to the gate line 121 and the storage electrode line 131, the data line 171 and the drain electrode 175 are inclined at an angle of about 30 to 80 °, respectively.

The ohmic contacts 161 and 165 exist only between the semiconductor 151 below and the data line 171 and the drain electrode 175 above and serve to lower the contact resistance. The linear semiconductor 151 has a portion exposed between the source electrode 173 and the drain electrode 175 and not covered by the data line 171 and the drain electrode 175.

A passivation layer 180 is formed on the data line 171, the drain electrode 175, and the exposed portion of the semiconductor 151. The passivation layer 180 is formed of an inorganic material made of silicon nitride or silicon oxide, an organic material having excellent planarization characteristics, photosensitivity, or a-Si: C: O formed by plasma enhanced chemical vapor deposition (PECVD), It consists of low dielectric constant insulating materials, such as a-Si: O: F. However, the passivation layer 180 may have a double layer structure of the lower inorganic layer and the upper organic layer in order to protect the exposed portions of the semiconductors 151a and 151b while maintaining excellent characteristics of the organic layer.

The passivation layer 180 is provided with a plurality of contact holes 185 and 182 respectively exposing the end portion of the drain electrode 175 and the end portion 179 of the data line 171, and the gate insulating layer 140. ), The end portion 129 of the gate line 121, the end portion 139 of the storage electrode line 131, the protrusion of the free end of the storage electrode 133a, and the freeness of the storage electrode 133a at the storage electrode line 131. Contact holes 181, 186, 184, and 183 exposing portions close to the protruding portions of the ends are formed. Here, the contact holes 181-186 can be polygonal or circular, the sidewalls of which are oblique.

On the passivation layer 180, a plurality of pixel electrodes 190 made of ITO or IZO, a plurality of contact assistants 81, 82, 86, and a plurality of sustain electrode line connecting legs 83 are formed. It is.

The pixel electrode 190 is physically and electrically connected to the drain electrode 175 through the contact hole 185 to receive a data voltage from the drain electrode 175.

The pixel electrode 190 to which the data voltage is applied generates the electric field together with the common electrode 270 to which the common voltage is applied to reconstruct the liquid crystal molecules of the liquid crystal layer 3 between the two electrodes 190 and 270. Arrange.

In addition, the pixel electrode 190 and the common electrode form a capacitor (hereinafter, referred to as a "liquid crystal capacitor") to maintain an applied voltage even after the thin film transistor is turned off. And another capacitor connected in parallel with it, which is called the "storage electrode". The storage capacitor is made by overlapping the storage electrode line 131 including the pixel electrodes 190 and the storage electrodes 133a-133e / 134a-134e.

Each pixel electrode 190 is chamfered at four corners, and the chamfered hypotenuse forms an angle of about 45 degrees with respect to the gate line 121.

The pixel electrode 190 has a lower cutout 191, a central cutout 192, and an upper cutout 193, and the pixel electrode 190 is divided into a plurality of areas by the cutouts 191-193. do. The cutouts 191-193 have almost inverted symmetry with respect to the sustain electrodes 133c / 134c.

The lower and upper cutouts 191 and 193 extend obliquely from the right side to the left side of the pixel electrode 190 and are disposed on the lower half and the upper half of the pixel electrode 190 divided by the sustain electrodes 133c / 134c. Each is located. The lower and upper cutouts 191 and 193 extend perpendicular to each other at an angle of about 45 degrees with respect to the gate line 121.

The central cutout 192 extends along the storage electrodes 133c and 134c and has an inlet at the right side of the pixel electrode 190. The inlet of the central incision 192 has a pair of hypotenuses that are substantially parallel to the lower incision 191 and the upper incision 193, respectively.

Accordingly, the lower half surface of the pixel electrode 190 is divided into two regions by the lower cutout 191, and the upper half surface is also divided into two regions by the upper cutout 193. At this time, the number of regions or the number of cutouts depends on the design elements such as the size of the pixel, the ratio of the length of the horizontal side to the vertical side of the pixel electrode, and the kind or characteristics of the liquid crystal layer 3.

The contact auxiliary members 81, 82, and 86 are connected to the ends 125 of the gate line 121, the ends 179 of the data line 171, and the storage electrode line 131 through the contact holes 181, 182, and 186. Are respectively connected to the ends 139). The contact auxiliary members 81, 82, and 86 complement adhesiveness between the end portions 129, 179, and 139 of the gate line 121, the data line 171, and the storage electrode line 131 and the external device, and compensate for them. It is not necessary to play a protective role, and their application is optional.

The storage electrode line connecting leg 83 crosses the gate line 121, and the free end protrusion and the storage electrode line of the storage electrode 133a adjacent to each other with the gate line 121 interposed therebetween through the contact holes 184 and 183. Connected to the exposed portion of 131.

Next, the common electrode display panel 200 will be described with reference to FIGS. 4 to 7.

A light blocking member 220 called a black matrix for preventing light leakage is formed on an insulating substrate 210 made of transparent glass, and the light blocking member 220 faces the pixel electrode 190 and faces the pixel electrode 190. It has a plurality of openings having the same shape. Alternatively, the light blocking member 220 may include a portion corresponding to the data line 171 and a portion corresponding to the thin film transistor. However, the light blocking member 220 may have various shapes to block light leakage near the pixel electrode 190 and the thin film transistor.

A plurality of color filters 230 are also formed on the substrate 210 and are mostly located in an area surrounded by the light blocking member 230. The color filter 230 may extend in the vertical direction along the pixel electrode 190. The color filter 230 may display one of primary colors such as red, green, and blue.

An overcoat 250 is formed on the color filter 230 and the light blocking member 220 to prevent the color filter 230 from being exposed and to provide a flat surface.

The common electrode 270 formed of a transparent conductor such as ITO or IZO is formed on the overcoat 250.

The common electrode 270 has a plurality of sets of cutouts 271-273.

The pair of cutouts 271-273 include a lower cutout 271, a center cutout 272, and an upper cutout 273 facing the pixel electrode 190. Each of the cutouts 271-273 is disposed between the adjacent cutouts 191-193 of the pixel electrode 190 or between the cutouts 191 and 193 and the hypotenuse of the pixel electrode 190.

Each of the lower and upper cutouts 271 and 273 overlaps sides along the sides of the pixel electrode 190 from diagonal ends extending from the left side of the pixel electrode 190 toward the upper or lower side, and from each end of the diagonal line. It includes a horizontal portion and a vertical portion extending while forming an obtuse angle with the oblique portion.

The center cutout 272 is a central horizontal portion extending from the left side of the pixel electrode 190 along the storage electrodes 133c / 134c and forms an oblique angle with the central horizontal portion at the end of the central horizontal portion of the pixel electrode 190. A pair of diagonal portions extending toward the right side, and a vertical longitudinal portion extending from the end of each of the diagonal portions overlapping the right side along the right side of the pixel electrode 190 and forming an obtuse angle with the diagonal portion.

The number of the cutouts 271-273 may vary according to design elements, and the light blocking member 220 may overlap the cutouts 271-273 to block light leakage near the cutouts 271-273.

Vertical alignment layers (not shown) are coated on the inner surfaces of the display panels 100 and 200, and polarizing plates 12 and 22 are provided on the outer surfaces thereof. The transmission axes of the two polarizing plates are orthogonal and one of the transmission axes is parallel to the gate line 121. In the case of a reflective liquid crystal display, one of the two polarizing plates 12 and 22 may be omitted.

The liquid crystal display may include at least one retardation film for compensating for the phase delay of the liquid crystal layer 3.

The liquid crystal molecules of the liquid crystal layer 3 are oriented such that their major axes are perpendicular to the surfaces of the two display panels 100 and 200, and the liquid crystal layer 3 has negative dielectric anisotropy.

The cutouts 191-193 and 271-273 control the direction in which the liquid crystal molecules of the liquid crystal layer 3 are inclined. That is, the liquid crystal molecules defined by the adjacent cutouts 191-193 and 271-273 or defined by the hypotenuse of the cutouts 271 and 273 and the pixel electrode 190 are cut outs 191-193. 271-273, inclined in a direction perpendicular to the length direction. The two longest sides of each region are almost parallel to each other and form about 45 degrees with the gate line 121.

At least one cutout 191-193 and 271-273 may be replaced by a protrusion or a depression.

The shape and arrangement of the cutouts 191-193 and 271-273 can be modified.

The storage electrode line connecting leg 83 may be formed of the same layer as the data line 171 and the drain electrode 175.

Next, a display operation and a driving method of the liquid crystal display according to the exemplary embodiment of the present invention will be described in detail with reference to FIG. 9 with reference to FIG. 1.

9 is a waveform diagram illustrating a method of driving a liquid crystal display according to an exemplary embodiment of the present invention.

The signal controller 600 may control the input image signals R, G, and B and their display from an external graphic controller (not shown), for example, a vertical sync signal V _sync and a horizontal sync signal. (H _sync ), a main clock (MCLK), a data enable signal (DE) is provided. The signal controller 600 properly processes the image signals R, G, and B according to the operating conditions of the liquid crystal panel assembly 300 based on the input image signals R, G, and B and the input control signal, and controls the gate control signal. After generating the CONT1, the data control signal CONT2, the sustain electrode control signal CONT3, and the like, the gate control signal CONT1 is sent to the gate driver 400, and the data control signal CONT2 and the processed image signal ( The DAT is sent to the data driver 500, and the sustain electrode control signal CONT3 is sent to the sustain electrode driver 700.

The gate control signal (CONT1) includes at least one clock signal and the like to control the output of the scan start instruction to start the scanning of the gate-on voltage (V _on) signal (STV) and the gate-on voltage (V _on).

The data control signal CONT2 is a common horizontal load start signal STH indicating data transmission of one pixel row and a load signal LOAD for applying a corresponding data voltage V _d to the data lines D ₁ -D _m . An inversion signal RVS and a data clock signal HCLK for inverting the polarity of the data voltage with respect to the voltage V _com (hereinafter, referred to as the "polarity of the data voltage by reducing the polarity of the data voltage with respect to the common voltage"). It includes.

The sustain electrode control signal CONT3 includes a scan start signal STV and at least one clock signal for controlling the output of the _high voltage V _high and the low voltage V _low .

The data driver 500 receives the image data DAT for one row of pixels according to the data control signal CONT2 from the signal controller 600, and displays each image among the gray voltages from the gray voltage generator 800. By selecting the gray scale voltage corresponding to the data DAT, the image data DAT is converted into the corresponding data voltage V _d and then applied to the corresponding data line D ₁ -D _m .

The gate driver 400 applies the gate-on voltage V _on to the gate lines G ₁ -G _n in response to the gate control signal CONT1 from the signal controller 600, thereby applying the gate lines G ₁ -G _n. Turn on the switching element (Q) connected to.

At the same time, the sustain electrode driver 700 converts the sustain electrode signal V _Si from the common voltage V _com to the high voltage V _high or the low voltage V _low according to the sustain electrode control signal CONT3 from the signal controller 600. ) Is applied to the sustain electrode lines S ₁ -S _n . Here, when the polarity of the data voltage is changed from negative (-) to positive (+), it is converted to _low voltage (V _low ), and when it is changed from positive (+) to negative (-), it is converted to _high voltage (V _high ). do. The conversion of the sustain electrode signal V _Si is a preliminary operation to later raise or lower the level of the pixel voltage V _P.

After one horizontal period (or "1H") (one period of the horizontal sync signal H _sync , the data enable signal DE, and the gate clock CPV), the data driver 500, the gate driver 400, and the sustain signal. The electrode driver 700 repeats the same operation for the pixels in the next row.

"으로 표현된다.On the other hand, the sustain electrode driver 700 has the sustain electrode at the time TA when the gate signal V _gi is converted to the gate off voltage V _off and the predetermined time ΔT elapses after the switching element Q is turned off. The signal V _Si is converted from the _high voltage V _high or the low voltage V _low to the common voltage V _com . In this case, when the polarity of the data voltage V _d is changed from negative polarity (−) to positive polarity (+), the sustain electrode signal V _Si is converted from the _low voltage V _low to the common voltage V _com . When the polarity (+) is changed to negative (-), the high voltage (V _high ) is converted into a common voltage (V _com ). A switching element (Q) is turned on when in the off state holding the voltage level of the sensor signal (V _Si) rises hanging the bias on the pixel electrode 190 lift the level of the pixel voltage (V _P) and the sustain electrode signal (V _When the voltage level of _Si decreases, the level of the pixel voltage V _P also decreases. The pixel voltage V _PA at the time point TA is represented by the following [Equation 1], and the variation voltage according to the change of the sustain electrode signal V _Si is "

"Is expressed.

Where V _d is the data voltage, C _ST is the storage capacitance, C _gs is the parasitic capacitance between the gate and source, C _LC is the liquid crystal capacitance, and ΔV _S is the amount of change in the sustain electrode signal.

In this way, the sustain electrode signal (V _Si) changes by a pixel voltage (V _P) level to can be raised and lowered, a data voltage (V _d) by the liquid crystal molecules and the pixel voltage (V _P dropping moving then applied to the ) Can be compensated. Accordingly, the response speed of the liquid crystal molecules can be improved.

The predetermined time ΔT may be arbitrarily set within the time T of one frame. For example, if the frame frequency is 60 Hz and the predetermined time ΔT is 0.5T, the effect of driving the frame frequency at 120 Hz can be obtained. If the predetermined time ΔT is 0.67T, the frame frequency is driven at 90 Hz. The effect can be obtained. That is, in the conventional liquid crystal display device, an inflection point of luminance appears in each frame in a luminance waveform over time. According to the present embodiment, even when driving at 60 Hz, the position of the inflection point is changed similarly to when driving at 120 Hz or 90 Hz. A shortened effect can be obtained.

In this manner, the gate-on voltage V _on is sequentially applied to all the gate lines G ₁ -G _n for one frame to apply the data voltage V _d to all the pixels, and all the storage electrode lines ( The sustain electrode signals V _S1 -V _{Sn are} sequentially applied to S ₁ -S _n ). When one frame ends, the next frame starts and the state of the inversion signal RVS applied to the data driver 500 is controlled so that the polarity of the data voltage V _d applied to each pixel is opposite to the polarity of the previous frame. (“Invert frame”). In this case, the polarity of the data voltage V _d flowing through one data line is changed according to the characteristics of the inversion signal RVS even in one frame (eg, inversion of a row, inversion of a point), or a data voltage of one pixel row ( The polarities of V _d ) can also be different (eg, thermal inversion, point inversion).

The sustain electrode signals V _S1 -V _Sn also change from the high voltage V _high or the low voltage V _low to the common voltage V _com depending on the polarity of the data voltage V _{d in} row and frame units.

Meanwhile, the sustain electrode signals V _S1 -V _Sn may have different voltage levels instead of the common voltage V _com , and the other voltage levels are set to be smaller than the _high voltage V _high and greater than the low voltage V _low .

Next, the arrangement of the storage electrode lines for driving the point inversion in the liquid crystal display according to the exemplary embodiment of the present invention will be described in detail with reference to FIGS. 10 and 11.

10 and 11 are schematic diagrams of sustain electrode lines of a liquid crystal display according to an exemplary embodiment of the present invention.

As shown in FIG. 10, each storage electrode line S ₁ -S _n extends in the horizontal direction and is connected to the storage electrode of a pixel adjacent to the storage electrode line S ₁ -S _n . The storage electrode of each pixel includes two vertical portions extending in the vertical direction from the left and right sides of the pixel and two diagonal portions connecting the two vertical portions. The sustain electrodes of the even-numbered pixels of each row (i) are connected to the sustain electrode lines (S _i ) of the corresponding rows (i), and the sustain electrodes of the odd-numbered pixels are connected to the next row (i + 1) through the connection legs (SC). Is connected to the storage electrode line Si _{+ 1} . Then, the storage electrode of the corresponding row and the storage electrode line S _{i + 1} of the next row may be connected to avoid contact with the gate line G _i extending in the horizontal direction between the two.

Thus one of the sustain electrode lines (S _i), there is the odd-numbered sustain electrode of the first pixel in that row (i) the even-numbered sustain electrode and the previous row (i-1) th pixel of the connection. In the case of dot inversion, the polarity of the data voltage of the even-numbered pixel of the corresponding row (i) and the polarity of the data voltage of the odd-numbered pixel of the previous row (i-1) are the same. Thus can be applied, so raising or lowering the level of a dot inversion driving and the pixel voltage (V _P) to the sustain electrode of the sustain electrode signal (V _Si) is the pixel polarity of a data voltage the same shown in Fig.

On the other hand, the sustain electrode signal may be delayed by the contact resistance of the connecting leg. As shown in FIG. 11, the resistance of the connecting leg is provided by providing a plurality of connecting legs, for example, two connecting legs SC1 and SC2. Can be cut in half.

Next, the arrangement of the storage electrode lines for driving the point inversion in the liquid crystal display according to another exemplary embodiment of the present invention will be described in detail with reference to FIGS. 12 and 13.

12 and 13 are schematic views of sustain electrode lines of a liquid crystal display according to another exemplary embodiment of the present invention.

As shown in FIG. 12, each of the storage electrode lines S ₁ -S _n includes a plurality of horizontal portions extending in the horizontal direction with the gate lines G ₁ -G _n interposed therebetween. Which are arranged adjacent to each horizontal section gate lines (G ₁ -G _n), it is arranged alternately on a pixel-by-pixel basis in the upper and lower portions of the gate lines (G ₁ -G _n) [hereinafter the gate lines (G ₁ -G _n The horizontal part disposed above is called an upper horizontal part, and the horizontal part arranged below is called a lower horizontal part). Both ends of each horizontal portion are connected to sustain electrodes of pixels adjacent thereto. The storage electrode of each pixel includes two vertical portions extending in the vertical direction from the left and right sides of the pixel and two diagonal portions connecting the two vertical portions. Maintaining electrode line (S _i) an upper horizontal portion connected to the sustain electrode in the odd-numbered pixels of the previous row (i-1) of which is connected to the sustain electrode in the even-numbered pixels of the lower horizontal portion that line (i). The upper horizontal portion and the lower horizontal portion are connected through the connecting bridge SC, thereby avoiding contact with the gate line G _i-1 therebetween.

As in the previous embodiment, in accordance with one of the sustain electrode lines (S _i), the sustain electrodes in the odd-numbered pixels in that row (i) even maintenance of the second pixel electrode and the previous row (i-1) of the connection to the embodiment It is. In the case of dot inversion, the polarity of the data voltage of the even-numbered pixel of the corresponding row (i) and the polarity of the data voltage of the odd-numbered pixel of the previous row (i-1) are the same. Thus can be applied, so raising or lowering the level of a dot inversion driving and the pixel voltage (V _P) to the sustain electrode of the sustain electrode signal (V _Si) is the pixel polarity of a data voltage the same shown in Fig.

In addition, as illustrated in FIG. 13, a plurality of connection legs, for example, two connection legs SC1 and SC2 may be provided to reduce resistance by the connection legs.

Next, a method of driving a liquid crystal display according to another exemplary embodiment of the present invention will be described in detail with reference to FIG. 14.

14 is a waveform diagram illustrating a method of driving a liquid crystal display according to another exemplary embodiment of the present invention.

As shown in FIG. 14, the sustain electrode signal V _Si of the driving method according to the present embodiment is inverted in phase with the sustain electrode signal V _Si shown in FIG.

That is, when the gate driver 400 applies the gate-on voltage V _on to the gate lines G ₁ -G _n , when the polarity of the data voltage changes from negative polarity (−) to positive polarity (+), the sustain electrode The driving unit 700 converts the sustain electrode signal V _Si from the common voltage V _com to the high voltage V _high , and applies the sustain electrode signal V _Si to the sustain electrode lines S ₁ -S _n , and the polarity of the data voltage is positive (+). ), The sustain electrode driver 700 converts the sustain electrode signal V _Si from the common voltage V _com to the low voltage V _low to the sustain electrode lines S ₁ -S _n . Is authorized.

In addition, the storage electrode driver 700 maintains at the time TA when the gate signal V _gi is converted to the gate-off voltage V _off and the predetermined time ΔT elapses after the switching element Q is turned off. The electrode signal V _Si is converted from the _high voltage V _high or the low voltage V _low to the common voltage V _com . In this case, when the polarity of the data voltage V _d is changed from negative polarity (−) to positive polarity (+), the sustain electrode signal V _Si is converted from the _high voltage V _high to the common voltage V _com . When the polarity (+) to the negative (-) is changed from the _low voltage (V _low ) to the common voltage (V _com ). Accordingly level of the pixel voltage (V _P) is lowered, if the polarity of the data voltage of the positive polarity (+) and the negative-increases when the ().

To apply this driving method, the data voltage V _d is set to a voltage larger than the voltage representing the target luminance.

In the PVA type liquid crystal display device driven normally black, according to the previous driving method, since the liquid crystal capacitance (C _LC ) becomes larger at high gradation, when the gradation is lower than at high gradation, The fluctuation voltage becomes larger, so that the brightness of the black may increase. However, a phenomenon that by compensating for the pixel voltage (V _P) in a direction to reduce the size of the pixel voltage (V _P) in accordance with the present embodiment, the brightness of black increases does not occur.

Meanwhile, the driving method according to the embodiment of the present invention may be applied not only to a PVA mode liquid crystal display device but also to a liquid crystal display device of a multi-domain vertical alignment (MVA) mode and a super-patterned vertical alignment (SPVA) mode or a super vertical alignment (SVA) mode. The present invention can also be applied to liquid crystal displays of normally white (twisted nematic) mode and OCB (optically compensated birefringence) mode.

As described above, according to the present invention, the response speed can be improved by increasing or decreasing the level of the pixel voltage charged in the entire gray level without using the frame memory, and the contrast ratio can be prevented from being increased due to the black luminance.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

Claims (17)

A plurality of gate lines, A plurality of data lines intersecting the gate lines, A switching element connected to the gate line and the data line, A plurality of pixel electrodes connected to the switching element, A plurality of sustain electrodes overlapping the pixel electrodes; A plurality of storage electrode lines connected to the storage electrodes; A gate driver configured to generate a gate signal including a gate on voltage and a gate off voltage and supply the gate signal to the gate line; A data driver for generating a data voltage corresponding to an external image signal and supplying the data voltage to the data line; A sustain electrode driver configured to generate a sustain electrode signal including a reference voltage, a high voltage larger than the reference voltage, and a low voltage smaller than the reference voltage, and supply the sustain electrode signal to the sustain electrode line. Including;  The sustain electrode signal is changed in voltage level when the gate on voltage is applied and when a predetermined time elapses after the gate off voltage is applied, The storage electrodes of one pixel row are alternately connected to two neighboring storage electrode lines. Liquid crystal display. In claim 1, When the polarity of the data voltage changes from negative to positive, the sustain electrode signal changes from the reference voltage to the low voltage when the gate on voltage is applied, and from the low voltage to the reference voltage when the predetermined time elapses. Changing liquid crystal display. 3. The method of claim 2, When the polarity of the data voltage changes from positive to negative, the sustain electrode signal changes from the reference voltage to the high voltage when the gate on voltage is applied, and from the high voltage to the reference voltage when the predetermined time elapses. Changing liquid crystal display. 4. The method of claim 3, And the reference voltage is substantially the same as the common voltage applied to the common electrode opposite the pixel electrode. 4. The method of claim 3, And a polarity of the data voltage is inverted. delete In claim 1, And the storage electrode line and the gate line are alternately arranged, and the storage electrode and the storage electrode line are connected through at least one connection leg. In claim 1, The storage electrode line includes a plurality of horizontal parts alternately arranged at upper and lower sides of the gate line, and the upper and lower horizontal parts are connected through at least one connection leg. 4. The method of claim 3, And the pixel electrode is divided into a plurality of regions. The method of claim 9, The pixel electrode includes a plurality of cutouts or a plurality of protrusions, and the region is divided by the cutouts or the protrusions. In claim 1, When the polarity of the data voltage changes from negative to positive, the sustain electrode signal changes from the reference voltage to the high voltage when the gate-on voltage is applied, and from the high voltage to the reference voltage when the predetermined time elapses. Changing liquid crystal display. 12. The method of claim 11, When the polarity of the data voltage changes from positive to negative, the sustain electrode signal changes from the reference voltage to the low voltage when the gate on voltage is applied, and from the low voltage to the reference voltage when the predetermined time elapses. Changing liquid crystal display. Applying a gate on voltage, Applying a data voltage while applying the gate-on voltage; A first conversion step of converting a voltage level of a sustain electrode signal having a reference voltage, a high voltage greater than the reference voltage and a low voltage less than the reference voltage substantially simultaneously with the application of the gate on voltage, Applying a gate off voltage, and A second conversion step of converting the voltage level of the sustain electrode signal after the predetermined time elapses after applying the gate-off voltage Including, The first conversion step, Converting the sustain electrode signal from the reference voltage to the low voltage when the polarity of the data voltage changes from negative polarity to positive polarity; and Converting the sustain electrode signal from the reference voltage to the high voltage when the polarity of the data voltage changes from positive polarity to negative polarity Method of driving a liquid crystal display comprising a. delete The method of claim 13, The second conversion step is Converting the sustain electrode signal from the low voltage to the reference voltage when the polarity of the data voltage changes from negative to positive; and Converting the sustain electrode signal from the high voltage to the reference voltage when the polarity of the data voltage changes from positive polarity to negative polarity Method of driving a liquid crystal display comprising a. The method of claim 13, The first conversion step is Converting the sustain electrode signal from the reference voltage to the high voltage when the polarity of the data voltage changes from negative to positive, and Converting the sustain electrode signal from the reference voltage to the low voltage when the polarity of the data voltage changes from positive polarity to negative polarity Method of driving a liquid crystal display comprising a. The method of claim 16, The second conversion step is Converting the sustain electrode signal from the high voltage to the reference voltage when the polarity of the data voltage is changed from negative to positive; and Converting the sustain electrode signal from the low voltage to the reference voltage when the polarity of the data voltage changes from positive polarity to negative polarity Method of driving a liquid crystal display comprising a.

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