長期以來，各種雷Jf姦σ，& & ncr斤舄要的電子電路，被大量1C化， 並隨產品舰增強與增多及體積的縮小，IC $1/0腳數因而增 夕曰乂使件lc製程後的測試’也變得更為困難。測試1C 所需要的探針卡，隨著1㈣的方式，如DWSQFP、 覆曰曰(Flip Chip) ’到目前的覆晶㈣p Q⑹時其w接腳 200813441 九、發明說明： 【發明所屬之技術領域】 本發明有關垂直式探針卡的設計財作，_是指探針、上 導板和下導赫使賴機電飾和輯_製造，喊方式是微 裝配技術。小轉大電路板和_電路細接合方式仙覆 Chip)方式達成。 【先前技術】 隨著半導體科技的進步，積體f路高度積集化，製程朝向更 小的技術邁進。如何設計和製造符合IC 1的要求探針卡標準， 需要仔細分1才_卜探針卡賴作是由__電子領域 相互配合來完成。兩個領域間共同的介面是探針，自動化測試設 備(杨缝如E_赠，)也必須被最佳化處理。測試 的環境、探針卡可綠分析、成本鱗修都是需要純考量的因 素，應用在測試過程才有能力驗證晶片生產的品質。因此，探針 2的又丨必顧。1業使用要求，必須具有高精度、溫度與使用 壽命疲勞試驗’才崎合實_試崎境需求。 7 200813441 已是由陣列佈置方式的銲墊(pad)或凸塊(Bump)所構成，因此原使 用於DIP及QFP等的水伟斜式的騎，並不紐用於覆晶的案 例。所以，因應發展出垂直式的探針卡，如曰本 與美國Wentworth Lab Inc.合作的cobra探針卡，及美國的For a long time, the various electronic circuits of the various squadrons, && ncr, have been greatly 1Cized, and with the product ship enhancement and increase and volume reduction, the IC $1/0 pin number has increased. The test after the lc process has also become more difficult. Test the probe card required by 1C, along with the 1 (four) way, such as DWSQFP, Flip Chip 'to the current flip chip (4) p Q (6), its w pin 200813441 IX, invention description: [Technical field of invention The invention relates to the design of the vertical probe card, _ refers to the probe, the upper guide plate and the lower guide, and the smashing method is micro-assembly technology. Small turn large circuit board and _ circuit fine joint method is achieved by Chip). [Prior Art] With the advancement of semiconductor technology, the accumulation of f-channels is highly integrated, and the process is moving toward smaller technologies. How to design and manufacture the probe card standard that meets the requirements of IC 1 needs to be carefully divided into 1 _ _ probe card is based on the cooperation of __ electronic field. The common interface between the two domains is the probe, and the automated test equipment (Yang Xuan such as E_Gift) must also be optimized. The test environment, probe card green analysis, and cost scale repair are all factors that require pure consideration. The application process is capable of verifying the quality of wafer production. Therefore, the probe 2 must be taken care of. 1 industry requirements, must have high-precision, temperature and service life fatigue test 'Kazaki _ _ test Kazakhstan demand. 7 200813441 It is composed of pads or bumps of the array arrangement. Therefore, the water-slanting rides used for DIP and QFP are not used for flip chip cases. Therefore, in response to the development of vertical probe cards, such as the cobra probe card with the US Wentworth Lab Inc., and the United States
垂直接觸式(Verticalcontact)探針卡等均屬之。無論何種形式的探 針卡，可⑽絕大多數使狀工的方式去編排探針的位置，因此 技術及經驗層次非常高’導致探針卡單㈣高，而且若遇有故障 或磨耗，也奸送回原廠採用人工維修方式處理。為了改善此種 情況’美國補US5869974及US5828226 微機電製程技術來 克服下列· 1·傳統探針卡上的探針共面度不紐成。2•待測晶 圓上的晶轉ie)或IC本身的共面度不佳。3·傳統探針侧久了會 、交形及磨耗或偏差。4·晶粒(die)的測試銲對Test pad)通常有氧化現 象’傳統探針可能得出大力刺穿氧化層，因而破壞測試鮮墊。义 薄膜(memb鹏)式探針卡（美國專卿s 518〇977)的複雜及不便。 美國專利翻69974 ’乃翻微機電製程中體型微加工技術 _kmi_achining)為主。其主要優點是利用背後侧達成彈性 薄膜的侧’缺點是⑴職_她本身較轉彈性，因為石夕 基薄膜-錢形量大狀丨-2微米。而且，⑵探闕製作並不 易複製。，且（3)使用久了，仍有磨耗的問題。 是探針使用懸壁樑的方式 影、蝕刻、電鍍及拋光的 美國專利US5828226，主要的優點 達到有適當撓度。其製程，主要利用微 8 200813441 (:具::生材料為鎳。缺點是⑴製程複雜。(2)探針撓度較小。 :善以上現有技術的缺點，本發明開發出二項重要技術， 針下秘的縣细光_模輯、财配技術，使探 因尺寸大小易於調整，因應未來多而細的探針需求，且 女4有複製性，尺寸精密喊本低廉。2._探針與小轉大電 成反之間的微陣列力量感測器，利用覆晶(Flip Ch⑹封裝方式達 【發明内容】 _目的之—’乃使用微機電製程、微裝配技術製作垂 黃^探針，使其具有較大的_度，可容純作精密的探針 ’使得續的精密探針卡可朗稱低其，減少人為裝配 技術的依賴。 人本备明的目的之二，本探針卡的探針與微陣列力量感測器妹 5 ’若探針卡部分探針的受力較低，可使探針卡下壓，避免因探 t凸塊或㈣未接觸好，祕判晶#電路賴失敗。亦即使精 密的1C電路測試’可因一定的探針接觸力下，得到穩定的電性測 試結果，避免接觸不良的干擾。 '、本發萄目的之三，使探針卡組合，可以提供多種容量的測 試’從單U，多晶片，至晶圓級，只要有配合的測試機台， 9 200813441 即可以單-晶片為基礎拼_方式，達到容量的變化，至於佈線 的密度及複減，以微機電技術，皆胃於完成。 本發明的目的之四’是使探針卡裝配更為簡易，小轉大電路 板與微_力量_器是_覆晶师p Chip)封裝方式達成，而 製作整排《式探針的方式乃是朗厚絲雖後取下，之後整 排探針-次安裝，而非傳統—支—支的人卫安裝，不但可提高探 針共面度，也可減少裝配成本。 本發明的目的之五探針的方式乃是以—排漏直式探 =排組的方式取縱向上導板後，再崎向上導板觀直縱向上 $板的方向插人，讓探針侷限於—個矩形的空間。 本發明的目的之六，為提升元件精度，封裝與定位探針組所 =縱向上導板、橫向上導板、與下導板的製作方式是以微機電 的方法材料為金屬（外層鍍上絕緣層）或以非導體的材料 來加以製作。 士本毛明的目的之七’為使探針卡修復簡易，設計上使修復探 針時’二需將探針卡上層的小轉大電路板連同微陣列感測器拆 下，將壞損的探針逐一抽出更換即可。 如圖-與圖二所示，為本發明之垂直探針卡整體組裝的剖面 圖以及其局部剖職賴，探針卡1，其主要的組件係包含:⑴微 陣列力量感湘2 ;⑵_ ;⑶小轉大電路板4 ; (4)縱向上Vertical contact probe cards and the like are all. Regardless of the type of probe card, (10) the vast majority of the way to shape the probe, so the level of technology and experience is very high 'cause the probe card single (four) high, and in case of failure or wear, It was also sent back to the original factory for manual maintenance. In order to improve this situation, US supplements US5869974 and US5828226 MEMS process technology to overcome the following: 1. The probe coplanarity on the conventional probe card is not good. 2 • The crystal on the crystal to be tested is symmetrical) or the coplanarity of the IC itself is not good. 3. The traditional probe side has a long time, symmetry and wear or deviation. 4. The test solder of the die is usually oxidized. The conventional probe may result in a strong puncture of the oxide layer, thus damaging the test pad. The complexity and inconvenience of the Memb Peng probe card (US s 518 〇 977). The US patent turned 69,974 </ </ s> is the micro-electromechanical process in the body micro-machining technology _kmi_achining). The main advantage is that the side of the elastic film is achieved by the back side. The disadvantage is that (1) the job _ she itself is more flexible, because the Shi Xiji film - the amount of money is large - 2 microns. Moreover, (2) the production of the probe is not easy to copy. And (3) has been used for a long time, there is still a problem of wear. U.S. Patent No. 5,828,226, the use of a cantilever beam for shadowing, etching, electroplating, and polishing, has the primary advantage of achieving proper deflection. Its process mainly uses micro 8 200813441 (: with:: raw material is nickel. The disadvantages are (1) complicated process. (2) The deflection of the probe is small.: The above two short-term technologies have been developed. Under the needle of the county's fine _ model, financial allocation technology, the size of the probe is easy to adjust, in response to the future needs of more and more probes, and the female 4 is replicable, the size of the precision call is cheap. The microarray force sensor between the needle and the small turn to the large electric power, using flip chip (Flip Ch (6) package method to achieve the content of the invention] - the use of micro-electromechanical process, micro-assembly technology to make the yellow It has a large _ degree, which can be used as a precision probe', so that the continuous precision probe card can be called low and reduce the dependence of artificial assembly technology. The second purpose of this book is to explore Needle card probe and microarray force sensor sister 5 'If the probe card part of the probe is less stressed, the probe card can be pressed down, avoiding the bumps or (4) not touching, secret judgment Crystal # circuit Lai failed. Even the precision 1C circuit test 'can be due to a certain probe contact force , to obtain stable electrical test results, to avoid poor contact interference. ', the third purpose of this report, the probe card combination, can provide a variety of capacity test 'from single U, multi-chip, to wafer level, as long as With the matching test machine, 9 200813441 can be single-chip based on the _ way to achieve the change of capacity, as for the density and reduction of wiring, with micro-electromechanical technology, all the stomach is completed. The purpose of the present invention It is to make the probe card assembly easier, the small turn large circuit board and the micro_power_ device are _ flip chipper p chip) package method, and the whole method of making the probe is the thick wire after the After the removal, the entire row of probes-sub-installation, rather than the traditional-branch-supporting installation, can not only improve the coplanarity of the probe, but also reduce the assembly cost. The five-probe method of the object of the present invention is After taking the longitudinal upper guide plate in the manner of draining straight-type probes, the upper guide plate is inserted in the direction of the vertical plate in the longitudinal direction, so that the probe is limited to a rectangular space. The sixth purpose is to improve component accuracy, packaging and positioning Groups = longitudinal upper guides, lateral upper guides, and lower guides are made by means of MEMS methods. The material is made of metal (the outer layer is coated with an insulating layer) or made of a non-conductor material. The purpose of the seventh is to make the probe card easy to repair, the design is to make the repair probe 'two need to remove the small turn large board on the upper layer of the probe card together with the microarray sensor, the damaged probe one by one The replacement of the vertical probe card of the present invention and its partial dissection, as shown in Figure 2 and Figure 2, the probe card 1, the main components of which include: (1) microarray power感湘2; (2) _; (3) small turn large circuit board 4; (4) longitudinally
200813441 導板5 ; (5)探針陣列6 ;⑹下導板7 ;⑺導柘 ♦板支撐殼8 ; (8)固 定螺絲9; (9)横向上導板1〇。 探針陣列6，排脈縱向上導板5之内，為了使探針卡方便 拆卸替換’探針綱直接接觸微_力顏測器2，將探針所量 測的訊號軸财列力量❹化2⑽祕無小轉 里 探針上下變形伸縮可藉由另一設置的縱向上導板5、橫向上導 板二〇及下導板7來引導，分別置於導板支撐殼8之兩端，形成一 可容納探針陣列的空間。且縱向上導板5、橫向上導板⑽及下導 板7各对穿孔’雜針陣列6之探針露轉蓋，以作為引 導捸針連接外部線路及上下變形的通道。 … 縱向上導板5和橫向上導板1〇彼此垂直置於導板支撐殼8上 方，讓探針侷限於-個矩形的空間。主要是讓探針能於垂直方向 變形時滑動且彼此之間不會翻。下導板7則是將探針的底端偈 限於—個矩形的空間，使探針之共面度佳。 .如圖三與圖四所示’將微陣列力量感測器2視同覆晶(Flip c=’以覆晶封裝方式和小轉大電路板4上之凸塊對位後接合， '一十】轉大電路板4具有大接線即可直接連接到測試儀器。圖 -的小轉大電路板及其局部放大眺明U，小轉大電路板之中間 =大圖’小轉大電路板和微陣列力量感·之間封裝乃是透過迴 知後之锡球14來達成’訊絲路11則是絲連接小轉大電路板 11 200813441 4上的覆晶凸塊I]， 於圖上)連接。 並藉覆晶凸塊13與PCB職板(未顯示 定在導合方式將微陣列力量❹指2和小轉錢路板4固 疋在¥板支撐殼8的上方， 頂端接觸。 方咖力湖II靡針陣列6之 【實施方式】 _ 探針卡組合洎fg 實施過直式▲針的製倾料主軸來綱整個探針卡1的 ^抵抗重力而設計的阻擔塊設在探針上方時[圖五㈣ 流程-圖五所示步驟，使用微機電製程技術製造出多組垂直式 探針排組15。 流程二圖六、七、八所示步驟，使用微機電製程技術製作縱向上 • 導板5、橫向上導板10及下導板7。 流程二圖九(a)所示步驟，使用微裝配技術將多組垂直式探針排 組15依序排入縱向上導板5。 流程四圖九(b)所示步驟’以橫向上導板從垂直縱向上導板的方白 插入，讓探針侷限於一個矩形的空間，使其成為一個陣列 探針模組。 流程五圖九(c)所示步驟，將陣列探針模組放入導板支撐殼$中 流程六圖九(d)所示步驟，將下導板7黏合導板支撐殼8的下方 12 200813441 流程七在微陣列力量感測器2的封裝接點處及小轉大電路板4的 訊號線路11上製作覆晶封裝時所需的凸塊。 流程八圖九(e)所示步驟’微陣列力量感測器2和小轉大電路板4 是以覆晶封裝（Flip-Chip)的方式接合。再將固定螺絲9 鎖入裝配孔26固定。 當阻擔塊設在探針下方時[圖五⑻]，其流程與上述實施例相 似’其結果如圖九(f)與(g)所示。 以下所示的實施例，其中所使用的電鑛金屬，以鎳為主的合 金，如鎳鈷或鎳錳，但配合電鍍材質亦可為鎳、鎢、鎢合金，銅、 銅合金等。 探針製作實施例 下列疋本發明之製作垂直式微探針的程序，如圖五所示。 步驟一 ··圖五⑻所示，首先在矽晶圓(siliconWafer)16上製作種子 φ 層(Under，BUMP Layer，UBM)，種子層由兩種不同金屬所 組成’首先鑛上一層鉻或鈦金屬(Cr or Ti)作為與基材接合 的鈍化層(Passivation Layer)17，然後再鍍上銅(Cu)作為晶 種層(Seed Layer) 18。 步驟二：圖五(1>)所示，旋塗一層厚光阻(111^±?11〇1;〇以68丨31;)19。軟 烤(Soft Baking)後，放置於熱板(Hotplate)或烤箱(〇ven)當 中。 13 200813441 步驟三：圖五(c)所示，進行曝光(Exp〇sure)步驟，根據採用光阻的200813441 Guide plate 5; (5) Probe array 6; (6) Lower guide plate 7; (7) Guide pin ♦ Plate support case 8; (8) Fixing screw 9; (9) Lateral upper guide plate 1〇. The probe array 6 is arranged in the longitudinal direction of the guide plate 5. In order to make the probe card easy to disassemble and replace the 'probe direct contact micro-force detector 2, the signal axis strength measured by the probe ❹ The upper and lower deformations of the probe can be guided by another longitudinal longitudinal guide 5, the lateral upper guide 2 and the lower guide 7, respectively, and placed at the two ends of the guide support shell 8 respectively. Forming a space that can accommodate the array of probes. And the longitudinal upper guide 5, the lateral upper guide (10) and the lower guide 7 are respectively paired with the probes of the perforated needle array 6 to be used as a guide pin for connecting the external circuit and the upper and lower deformation passages. The longitudinal upper guide 5 and the lateral upper guide 1 are placed perpendicularly to each other above the guide support case 8, so that the probe is limited to a rectangular space. The main thing is to allow the probe to slide in the vertical direction and not to flip between each other. The lower guide 7 limits the bottom end of the probe to a rectangular space, so that the coplanarity of the probe is good. As shown in Fig. 3 and Fig. 4, 'the microarray force sensor 2 is considered to be flipped (Flip c=', and the bumps on the small circuit board 4 are aligned and then joined. Ten] Turn the large circuit board 4 with large wiring to directly connect to the test instrument. Figure - small turn large circuit board and its partial amplification U U, small turn large circuit board in the middle = large picture 'small turn large circuit board And the micro-array power sense is encapsulated by the solder ball 14 that is known as the 'silk line 11 is the flip-chip bump I on the wire-connected small circuit board 11 200813441 4, on the figure )connection. And the flip-chip bump 13 and the PCB job board (not shown in the guiding manner, the micro-array power finger 2 and the small money transfer board 4 are fixed on the top of the support plate 8 of the board, and the top end is in contact. Lake II needle array 6 [Embodiment] _ Probe card combination 洎fg Implemented a straight ▲ needle tilting spindle to the entire probe card 1 Above the [Figure 5 (4) process - Figure 5 steps, the use of MEMS process technology to create a plurality of sets of vertical probe row set 15. Process two steps 6, 7, and eight steps, using micro-electromechanical process technology to make portrait The upper guide plate 5, the lateral upper guide plate 10 and the lower guide plate 7. In the second step (a) of the flow, the plurality of sets of vertical probe arrays 15 are sequentially discharged into the longitudinal upper guide plate by using micro-assembly technology. 5. Flow 4 Figure 9 (b) shows the step of inserting the lateral guide from the vertical longitudinal guide, allowing the probe to be confined to a rectangular space, making it an array probe module. In the steps shown in Figure 9(c), place the array probe module in the guide support case. Step 6: Step (d) The lower guide plate 7 is bonded to the lower side of the guide support shell 8 200813441. The seventh step is required to make a flip chip package on the package contact of the microarray power sensor 2 and the signal line 11 of the small turn large circuit board 4. The bump shown in Figure VIII (e) shows that the microarray power sensor 2 and the small to large circuit board 4 are joined by a flip chip package (Flip-Chip), and the fixing screws 9 are locked. The assembly hole 26 is fixed. When the resist block is placed under the probe [Fig. 5 (8)], the flow is similar to that of the above embodiment. The results are shown in Figs. 9(f) and (g). The electro-mineral metal used therein is a nickel-based alloy such as nickel-cobalt or nickel-manganese, but the plating material may also be nickel, tungsten, tungsten alloy, copper, copper alloy, etc. The following examples of probe fabrication examples The procedure for fabricating the vertical microprobe of the present invention is shown in Figure 5. Step 1 · Figure 5 (8), firstly, a seed φ layer (Under, BUMP Layer, UBM) is fabricated on the silicon wafer (16). The seed layer consists of two different metals. First, a layer of chromium or titanium (Cr or Ti) is attached to the substrate. Passivation layer 17, and then plated with copper (Cu) as a seed layer 18. Step 2: As shown in Figure 5 (1), spin coating a thick photoresist (111^±? 11〇1;〇68丨31;)19. After soft Baking, place it in a hot plate or oven (〇ven) 13 200813441 Step 3: Figure 5 (c), proceed Exposure step, according to the use of photoresist
形式，因此曝光的位置為留下來的區域D • 步驟四·圖五(d)所示’顯影(Developement)得到光阻19凹穴外型， • 並且連績使用去離子水沖洗，徹底將殘留的顯影劑洗 淨，然後使用氮氣(Nitrogen)吹乾，完成的光阻19凹穴即 為探針外型。完成後進行硬烤(Hard Baking)，放置於熱板 (Hotplate)或烤箱(〇ven)當中。 步驟五·圖五(e)所示，進行電鎊(Electr〇f_㈣步驟，總 須超過光阻19厚度，電鑄材料：Ni_c〇合金。 步驟六·駐②所示，進行研磨步驟將突出光阻19的賴材料與 不平的表面進行研磨至設計厚度，完成探針厚度尺寸的加 工後，去除光阻得到探針外型。 v驟七·圖五(g)、⑻所不，旋塗一層厚光阻19。軟烤後，放置於 ❿ 熱板或烤箱當中。顯影得到光阻封裝形狀，並且連續使用 絲子水沖洗，徹底將朗的顯·洗淨，然後使用氮氣 吹乾，完成的光阻19凹穴即為探針外型。完成後進行硬 烤’放置於熱板或烤箱當中。 步驟八：圖五(0所示，將探針組浸泡在電鍍液當中實施反電鑛步 驟而仏針接在陽極’其目地為將結合在探針底部的晶種 層18去除(Cu)，此時位於種子層底下的純化層吩汾 Tl)i?充當導電層’通電後位於鈍化層n上面的種子層 200813441 金屬會被解離到電鍍液當中而陰極則開始發生沈積現 象，完成種子層金屬去除的步驟。 -步驟九：圖五①所示，原本探針透過晶種層(Cu)18與鈍化層(Cror - Τ〇17與晶圓相結合’因為晶種層(Cu)18已經透過反電鍍 方式去除，因此探針底部變成裸空，會自動脫落完成分 離步驟。 步驟十：圖五«、①、㈣、⑻所示，得到垂直式探針排組15 或未封裝之單根探針。探針的形式有兩種，其分類方法 是阻擒塊在探針的上端[圖五㈣、⑻]或下端[ (1)] 〇 縱向導板彳 縱向上導板5的製作應用微機電技術，製作步驟如下， 圖六所示 (方法一） 參考 圓16上製作種子層，種子層由 步驟一：圖六(a)所*，首先在石夕晶 成’首先錢上-層_金·， 種層18 層17，_再鍍上銅(Cu)作為晶 步驟二：圖六⑼所示，旋塗—層厚光阻… 烤箱當中。 得放置於熱板或 步驟二·圖六_ 不’進仃曝光步驟，根據採㈣細19形式， 15 200813441 因此曝光的位置為留下來的區域。顯影得到光阻凹穴 外型’完成的光阻凹穴即為上導板外型。完成後進行硬 烤，放置於熱板或烤箱當中。 步驟四·圖六⑹所示’進行電鑄(Electroforming)步驟，總高度必 須超過光阻19厚度，電鑄材料：Ni_Co合金。進行研磨 步驟將突出光阻19的電每材料與不平的表面進行研磨至 設計厚度，完成上導板厚度尺寸的加工。 步驟五··圖六(e)〜(g)所示，重複步驟二至步驟四。 步驟六：圖六(h)所示，去除光阻19得到上導板外型。完成後再表 面披覆一層絕緣層(鐵氟龍、陶瓷材料、耐熱材料、 鑽石薄膜、類鑽碳薄膜等）。 步驟七：圖六(i)所示，將探針組浸泡在電鍍液當中實施反電鍍步 驟而探針接在陽極，其目地為將結合在探針底部的晶種層 18去除(Cu)，此時位於晶種層丨8底下的鈍化層(Cr 〇r邛i 7 充當導電層’通電後位於鈍化層17上面的晶種層18金屬 會被解離到電鍍液當中而陰極則開始發生沈積現象，完成 晶種層18金屬去除的步驟。 步驟八：圖六①所示，原本金屬絕緣導板透過種子層(Cu)18與鈍 化層(CrorTi)17與晶圓16相結合，因為晶種層(〇1)18已 經透過反電鍍方式去除，因此上導板底部變成裸空，會自 動脫落完成分離步驟。 200813441 (方法二） 步驟一：圖六(k)所示，先旋塗一層分離層後軟烤後再旋塗一層厚 光阻19，如SU8。軟烤後，放置於熱板或烤箱當中。 步驟二：圖六(1)、（m)所示，進行曝光步驟，根據採用的光阻19 形式，因此曝光的位置為留下來的區域。顯影得到光阻 19凹穴外型’即為探針外型。完成後進行硬烤，放置於 熱板或烤箱當中。 步驟三··圖六(η)、（〇)所示，重複步驟一、步驟二。 步驟四：圖六(Ρ)所示’去除預先树晶圓16是塗佈的分離層 (Omnicoat)使光阻19結構和矽晶圓16分別分離再將兩 部分結構對位後用膠黏合即可。 ^ 橫向導板製作實施例 橫向上導蓋10的製作應用微機電技術，製作步驟如上述縱 導板的（方法一）步驟一至八，只需要電鑄一層即可，故省去牛驟 五；（方法二）的步驟―、二、四，因只要使用1厚光組即 如SU8，最後的橫向上導蓋1〇的外型，參考圖七。 下導板製作實施例 ’參考圖 下導板7的製作應用微機電技術，製作步驟如以 八所示。 下 (方法一） 製作步驟類似上述縱向導板的（方法_)牛 〜至四’與步驟 17 200813441 六至八，僅有光罩圖案不同，另外只需要電鑄—層即可，故省去 步驟五； - (方法二） — 製作步驟類似上述縱向導板的（方法二)步驟一、二、四，因 只要使用一層厚光組即可，如SU8。 (方法三) 步驟一：圖八⑻所示’旋塗一層光阻19，作為實施i化石夕24開 孔的保護罩。 步驟二··圖八(b)所示，進行曝光步驟，根據採用的光阻19形式， 因此未曝光的位置為留下來的區域。 步驟三：圖八(c)所示，顯影得到光阻19凹穴外型，並且使用去離 子水沖洗將殘留在表面的顯影劑徹底洗淨，並且吹乾與 烤乾，此步驟作為實施RIE蝕刻時的檔罩所使用。 φ 步驟四：圖八(d)所示，使用RIE將氮化矽24沒有光阻19保護區 域蝕刻去除，裸露出内部矽基材16。 步驟五：圖八⑻所示，此時受到光阻19保護的氮化石夕％區域， 將作為氳氧化鉀濕式非等向性蝕刻的硬式擋罩，蝕刻深度 大約350μπι，主要目的降低後續Icp製程的成本支出， 如果使用厚度25〇陣的石夕基材16，則不需要此步驟。 步驟六··圖八(f)所示，將晶圓16反轉再配合背對準曝光方式，作 為實施ICP加工時的槽。 18 200813441 步驟七：圖，Mg)所示’使用ICP進行深孔加工直到擊穿形成方形 孔，去除光阻19完成探針下導板7的製作。 ,Μ完成的下導板7的外型，參考圖轉），板上貫穿多個方 形孔。 数座列力詈感測器劁作膏族例 本發明之製作微陣列力量感测器2，如圖十所示。 -般麼阻式力顏晰之麵，主要是惠斯登電橋的作 鲁動原理’於正方形薄膜四周佈置四個虔阻，其中兩個與薄膜邊緣 平行，另兩健薄麵直。當薄較觀形時，錄薄膜兩邊平 行之壓阻將受-侧向拉力（等效於受—壓應力），造成整個壓阻受 壓變短；另外兩個垂直薄膜邊緣的壓阻，則受一拉應力使其長度 拉長。如此連接成惠斯登電橋之四條壓阻，隨力量的施予而會有 兩增兩減的情況。 由以上各式即可以利用電壓的變化來估計電阻的改變量，進 鲁而求得所受的力量大小。安置探針陣列上的微陣列力量感測器是 用互補式金氧半導體(CMOS)技術製作，達到大量價格低不需後製 秋。利用探針接觸力回饋，確實能達到監測探針接觸的狀況。 實施例是以台積電〇·35//m製程設計，如圖十（a)所示。以多 晶矽30為壓阻材料，最後在結構的中間佈入陣列蚀刻孔32，再使 用乾蝕刻將蝕刻孔32完成，並且將矽基材16蝕刻出一個凹洞34, 使其上方形成一力量感測薄膜35，以利施壓後的變形空間，而金 200813441 、接觸層31、連結層28等以填入二氧切Form, so the position of exposure is the remaining area D • Step 4 · Figure 5 (d) shows 'Developement' to get the photoresist 19 recessed shape, and the continuous use of deionized water rinse, completely residual The developer was washed and then blown dry using nitrogen (Nitrogen), and the finished photoresist 19 was the probe profile. Hard Baking is done after completion and placed in a hot plate or oven (〇ven). Step 5 · Figure 5 (e), the electric pound (Electr〇f_ (four) step, always exceed the thickness of the photoresist 19, electroforming material: Ni_c〇 alloy. Step 6 · Station 2, the grinding step will highlight the light The material of the resist 19 and the uneven surface are ground to the design thickness, and after the processing of the thickness of the probe is completed, the photoresist is removed to obtain the shape of the probe. v. 7· Figure 5 (g), (8) No, spin coating Thick photoresist 19. After soft baking, place it in a hot plate or oven. Develop it to form a photoresist package, and rinse it with silk water continuously. Wash it thoroughly and then dry it with nitrogen. The photoresist 19 recess is the probe shape. After completion, it is hard-baked and placed in a hot plate or oven. Step 8: Figure 5 (shown in Figure 10, the probe set is immersed in the plating solution to carry out the anti-mine step The thimble is attached to the anode, the purpose of which is to remove the seed layer 18 (Cu) bonded to the bottom of the probe. At this time, the purification layer under the seed layer is tuned to serve as a conductive layer. n above the seed layer 200813441 metal will be dissociated into the plating solution The deposition process begins to complete the deposition of the seed layer metal. Step 9: As shown in Figure 5-1, the original probe is transmitted through the seed layer (Cu) 18 and the passivation layer (Cror - Τ〇 17 combined with the wafer). 'Because the seed layer (Cu) 18 has been removed by reverse plating, the bottom of the probe becomes bare and will automatically fall off to complete the separation step. Step 10: Figure 5 «, 1, (4), (8), get vertical exploration Needle row group 15 or unpackaged single probe. There are two types of probes, which are classified as the blocker at the upper end of the probe [Fig. 5 (4), (8)] or the lower end [(1)] 〇 Longitudinal guide The slab longitudinal upper guide 5 is fabricated by applying microelectromechanical technology. The manufacturing steps are as follows. Figure 6 shows the seed layer on the reference circle 16. The seed layer is composed of step one: Fig. 6(a)*, first in Shi Xijing into 'first money on - layer _ gold ·, seed layer 18 layer 17, _ and then plated with copper (Cu) as a crystal step two: Figure 6 (9), spin coating - layer thickness photoresist ... in the oven. Have to be placed on the hot plate or step 2 · Figure 6 _ not 'into the exposure step, according to the mining (four) fine 19 form, 15 200813441 The position of the exposure is the remaining area. The development of the photoresist recessed shape 'completed photoresist recess is the shape of the upper guide plate. After completion, it is hard baked and placed in a hot plate or oven. Step 4· Six (6) shows the 'Electroforming' step, the total height must exceed the thickness of the photoresist 19, the electroforming material: Ni_Co alloy. The grinding step is performed to grind the material of the protruding photoresist 19 from the uneven surface to the design thickness. , the processing of the thickness of the upper guide plate is completed. Step 5 · Figure 6 (e) ~ (g), repeat steps 2 to 4. Step 6: Figure 6 (h), remove the photoresist 19 to get Guide plate shape. After completion, the surface is covered with an insulating layer (Teflon, ceramic material, heat-resistant material, diamond film, diamond-like carbon film, etc.). Step 7: As shown in Figure 6(i), the probe set is immersed in the plating solution to perform a reverse plating step and the probe is attached to the anode, the purpose of which is to remove the seed layer 18 (Cu) bonded to the bottom of the probe. At this time, the passivation layer under the seed layer 8 (Cr 〇r邛i 7 acts as a conductive layer). After the current is applied, the seed layer 18 metal on the passivation layer 17 is dissociated into the plating solution and the cathode begins to deposit. The step of removing the metal of the seed layer 18 is completed. Step 8: As shown in FIG. 6 , the original metal insulated guide plate is bonded to the wafer 16 through the seed layer (Cu) 18 and the passivation layer (CrorTi) 17 because the seed layer (〇1)18 has been removed by reverse plating, so the bottom of the upper guide plate becomes bare and will automatically fall off to complete the separation step. 200813441 (Method 2) Step 1: As shown in Figure 6(k), firstly apply a separation layer After soft baking, apply a thick photoresist 19, such as SU8. After soft baking, place it in a hot plate or oven. Step 2: As shown in Figure 6 (1), (m), perform the exposure step, according to the The photoresist is in the form of 19, so the position of the exposure is the remaining area. The shape of the 19-hole is the shape of the probe. After completion, it is hard-baked and placed in a hot plate or an oven. Step 3· Figure 6 (η), (〇), repeat steps 1 and 2. Step 4: Figure 6 (Ρ) shows that the removal of the pre-tree wafer 16 is a coated separation layer (Omnicoat), and the photoresist 19 structure and the germanium wafer 16 are separated separately, and then the two-part structure is aligned and then glued. ^. Horizontal guide manufacturing example The application of the lateral upper guide cover 10 is applied to the microelectromechanical technology. The manufacturing steps are as follows: Steps 1 to 8 of the above-mentioned vertical guide plate (method 1), only one layer of electroforming is needed, so that the bovine step is omitted. 5; (Method 2) steps -, 2, 4, because as long as the use of a thick light group, such as SU8, the final lateral guide cap 1〇 appearance, refer to Figure 7. Lower guide production example 'reference map The fabrication of the lower guide 7 is applied by MEMS technology, and the fabrication steps are as shown in Fig. 8. The next (method 1) fabrication steps are similar to the above-mentioned longitudinal guides (method _) cattle ~ to four' and step 17 200813441 six to eight, only There are different mask patterns, and only electroforming-layer is needed, so it is omitted. 5; - (Method 2) - The production steps are similar to the first, second and fourth steps of the above-mentioned vertical guide (method 2), as long as a thick light group is used, such as SU8. (Method 3) Step 1: Figure 8 (8) Shown as a spin-coating of a photoresist 19 as a protective cover for the implementation of the i-fossil 24 opening. Step 2 · Figure 8 (b), the exposure step, according to the form of the photoresist 19 used, is therefore not exposed The position is the remaining area. Step 3: As shown in Figure 8(c), the developed photoresist 19 has a concave shape, and the developer remaining on the surface is thoroughly washed with deionized water, and dried and baked. Dry, this step is used as a mask for performing RIE etching. φ Step 4: As shown in Fig. 8(d), the tantalum nitride 24 is etched away without the photoresist 19 protection region by RIE, and the inner germanium substrate 16 is exposed. Step 5: As shown in Figure 8 (8), the area of the nitride nitride protected by the photoresist 19 at this time will serve as a hard mask for the wet anisotropic etching of the potassium bismuth oxide. The etching depth is about 350 μm, and the main purpose is to reduce the subsequent Icp. The cost of the process, if a thickness of 25 arrays of stone substrate 16, is used, this step is not required. Step 6·· (8), the wafer 16 is reversed and the back alignment exposure method is used as a groove for performing ICP processing. 18 200813441 Step 7: Figure, Mg) The deep hole processing is performed using ICP until the breakdown forms a square hole, and the photoresist 19 is removed to complete the fabrication of the probe lower guide 7. , the finished shape of the lower guide plate 7 is completed, and the plate is inserted through a plurality of square holes. A plurality of collateral sensors are used as the paste family. The microarray force sensor 2 of the present invention is shown in FIG. The general resistance is the surface of the fascinating force, mainly because of the rudder principle of the Wheatstone bridge. Four dampers are arranged around the square film, two of which are parallel to the edge of the film and the other two are thin and straight. When the shape is thinner, the parallel piezoresistance of the two sides of the film will be subjected to the lateral pull force (equivalent to the compressive stress), causing the entire piezoresistive force to be shortened; the pressure resistance of the other two vertical film edges is It is elongated by a tensile stress. The four piezoresistives thus connected to the Wheatstone bridge will have two increases and two reductions as the power is applied. From the above equations, the change in voltage can be used to estimate the amount of change in resistance, and the magnitude of the force received can be determined. The microarray power sensor placed on the probe array is fabricated using complementary metal oxide semiconductor (CMOS) technology, achieving a large price range without the need for post-production. With the contact force feedback of the probe, it is indeed possible to monitor the contact of the probe. The embodiment is designed by TSMC 3535//m process, as shown in Figure 10 (a). The polysilicon 30 is used as a piezoresistive material, and finally the array etching hole 32 is placed in the middle of the structure, and the etching hole 32 is completed by dry etching, and the germanium substrate 16 is etched into a recess 34 to form a force feeling thereon. The film 35 is measured to facilitate the deformation space after the pressure is applied, and the gold 200813441, the contact layer 31, the bonding layer 28, etc. are filled with the dioxotomy.
加力量感測薄膜35的強度，其結構層如圖十⑹。圖十(c) /力L 感;:以陣列佈局的不意圖’可提供5 χ 5單顆感測器％ 母顆感的接線包括提供感_電_ 路的輸出鱗37'探倾小敝電路 僅為不意圖，實際上實施時則可擴充成更大的陣列，i佈局The force is applied to sense the strength of the film 35, and its structural layer is as shown in Fig. 10 (6). Figure 10 (c) / force L sense;: the intention of the array layout 'can provide 5 χ 5 single sensor % maternal sense of wiring including the supply of sense _ electricity _ road output scales 37 ' 探 敝 敝The circuit is only unintentional, in fact it can be expanded into a larger array when implemented, i layout
非侷限於树或實㈣_，可魏_觸試麵排财式對 應投計此力量娜。綱辑，細力量感測，圖 十亦可將力量感·與其相_路去除，僅保留探針與小轉大* 路板之間的連線38即可。 兒 由於微陣列力量感測器是用互補式金氧半導體(cm〇桃術事 作，口因此對於_訊號的放大電路，也可—併設計於微陣列力量 感測器之旁，财整合之功效。賴力量❹指亦不僅限於壓阻 式的感測方式’其他如電容式、場效電晶體式等，也是熟悉此技 藝者容易為之的方式。 綜上所述，本發明提出創新垂直式探針卡的設計與製作，探 針、導板都使用微機電製程和電鑄技術製造，微陣列力量感測器 使用CMOS ‘程來设計製作，組裝方式是使用微裝配技術。小轉 大電路板和印刷電路板的接合方式使用覆晶(Flip Chip)方式達 成。爰依法長1出發明專利申請。而根據以上所述的内容，所作其 他相關的改變，只要不脫離本發明之精神，均應包含於申請發明 20 200813441 專利範圍之内。 【圖式簡單說明】 圖 圖一 圖二 圖三 圖四 圖五 圖六 圖七 圖八^ 圖九 圖十It is not limited to the tree or the real (four) _, but the Wei _ touch test face is the same as the financial type. Outline, fine force sensing, Figure 10 can also remove the sense of power and its phase, only the connection between the probe and the small turn * board can be 38. Because the microarray force sensor is made of a complementary MOS device, the mouth is also used for the amplification circuit of the signal, and it is designed next to the microarray power sensor. The power is not limited to the piezoresistive sensing method 'others such as capacitive, field effect transistor, etc., is also a way that is familiar to those skilled in the art. In summary, the present invention proposes innovative vertical The design and manufacture of probe cards, probes and guides are all manufactured using MEMS process and electroforming technology. The microarray force sensor is designed and manufactured using CMOS 'process. The assembly method is micro-assembly technology. Small turn The joining method of the large circuit board and the printed circuit board is achieved by using a Flip Chip method. The invention patent application is legally long. According to the above, other related changes are made without departing from the spirit of the present invention. , should be included in the scope of the application for invention 20 200813441. [Simple diagram of the diagram] Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8 Figure 9
本發明之垂直探針卡整體組裝的剖面圖 本發明之垂直探針卡整體組裝的局部剖面放大圖 本發明之小轉大電路板及其局部放大圖 专气明之微陣列力量感測器使用覆晶(Flip Chip}封穿括 術連接到小轉大電路板 x技 f發明之製作垂直式微探針的程序 ^發明之縱向上導板製作的程序 ^發明之橫向上導板製作的程序 本發明之下導板製作的程序 本發明之探針卡裝配程序 ίϊΐίίίώί造氧半導體(CMos)技術製作之微陣OVERVIEW OF THE INTEGRATED ASSEMBLY OF THE VERTICAL PROBE CARD IN THE INVENTION The partial cross-sectional enlarged view of the vertical probe card of the present invention is enlarged and enlarged. The micro-array power board of the present invention and its partial enlarged view are used for the micro-array force sensor. Flip Chips are connected to a small-sized large circuit board. The program for manufacturing a vertical micro-probe is invented. The invention is a program for making a vertical upper guide. The program for making the guide plate The probe card assembly program of the present invention ίϊΐίίίώ The microarray made by the oxygen semiconductor (CMos) technology
【主要元件符號說明】 圖鞔 1 探針卡 ' 2 3 擋板 4 5 縱向上導板 6 7 下導板 8 9 固定螺絲 10 11 訊號線路 12 13 覆晶封裝時所用之凸塊 微陣列力量感測器 小轉大電路板 探針陣列 導板支撐殼 横向上導板 小轉大電路板之中間放大圖 21 小轉大電路板和微陣列力量感測器封裝迴銲後之錫球 垂直式探針排組 秒晶圓 17 鈍化層 晶種層 19 光阻 遮罩 21 金屬 陰極 23 電每液 氮化矽 25 1虫刻液 裝配孔 27 二氧化 連結層 29 金屬 多晶矽 31 接觸層 掏空部份(RLS)蝕刻孔 單顆力量感測器 34 凹洞 力量感測薄膜 感測器的電源與接地接線 橋式電路的輸出接線 探針與小轉大電路板之間的連線 22[Main component symbol description] Fig. 1 Probe card ' 2 3 Baffle 4 5 Longitudinal upper guide 6 7 Lower guide 8 9 Fixing screw 10 11 Signal line 12 13 Bump microarray power sense used in flip chip packaging Detector small turn large circuit board probe array guide support shell lateral upper guide small turn large circuit board middle enlargement Figure 21 small turn large circuit board and microarray power sensor package reflow solder ball vertical probe Needle row group second wafer 17 passivation layer seed layer 19 photoresist mask 21 metal cathode 23 electric liquid tantalum nitride 25 1 insect liquid assembly hole 27 dioxide oxide layer 29 metal polysilicon 31 contact layer hollow portion ( RLS) etched hole single force sensor 34 cavity power sensing film sensor power supply and ground connection bridge circuit output wiring probe and small turn large circuit board connection 22