TW200807301A - Read-only memory simulator and its method - Google Patents

Read-only memory simulator and its method Download PDF

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Publication number
TW200807301A
TW200807301A TW095126249A TW95126249A TW200807301A TW 200807301 A TW200807301 A TW 200807301A TW 095126249 A TW095126249 A TW 095126249A TW 95126249 A TW95126249 A TW 95126249A TW 200807301 A TW200807301 A TW 200807301A
Authority
TW
Taiwan
Prior art keywords
memory
read
socket
code
motherboard
Prior art date
Application number
TW095126249A
Other languages
English (en)
Chinese (zh)
Other versions
TWI316682B (https=
Inventor
jing-rong Wang
Chia-Hsing Yu
Original Assignee
Via Tech Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Via Tech Inc filed Critical Via Tech Inc
Priority to TW095126249A priority Critical patent/TW200807301A/zh
Priority to US11/826,406 priority patent/US20080021695A1/en
Publication of TW200807301A publication Critical patent/TW200807301A/zh
Application granted granted Critical
Publication of TWI316682B publication Critical patent/TWI316682B/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/26—Functional testing
    • G06F11/261—Functional testing by simulating additional hardware, e.g. fault simulation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/4401—Bootstrapping
    • G06F9/4403—Processor initialisation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/455—Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
TW095126249A 2006-07-18 2006-07-18 Read-only memory simulator and its method TW200807301A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
TW095126249A TW200807301A (en) 2006-07-18 2006-07-18 Read-only memory simulator and its method
US11/826,406 US20080021695A1 (en) 2006-07-18 2007-07-16 ROM emulator and ROM testing method using the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW095126249A TW200807301A (en) 2006-07-18 2006-07-18 Read-only memory simulator and its method

Publications (2)

Publication Number Publication Date
TW200807301A true TW200807301A (en) 2008-02-01
TWI316682B TWI316682B (https=) 2009-11-01

Family

ID=38972509

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095126249A TW200807301A (en) 2006-07-18 2006-07-18 Read-only memory simulator and its method

Country Status (2)

Country Link
US (1) US20080021695A1 (https=)
TW (1) TW200807301A (https=)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI461715B (zh) * 2012-12-06 2014-11-21 Wistron Corp 測試裝置以及電子裝置的測試方法
US8963937B2 (en) 2011-02-10 2015-02-24 Novatek Microelectronics Corp. Display controller driver and testing method thereof

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5048526B2 (ja) * 2008-01-10 2012-10-17 株式会社日立製作所 計算機システム及びその計算機システムへのレガシーブート方法
KR101026678B1 (ko) * 2009-06-26 2011-04-04 한국산업기술대학교산학협력단 에뮬레이터의 인터페이스 장치 및 그 방법
CN103365751A (zh) * 2012-04-09 2013-10-23 鸿富锦精密工业（深圳）有限公司 主板测试装置及其转接模组
US20160328306A1 (en) * 2015-05-08 2016-11-10 Hong Fu Jin Precision Industry (Shenzhen) Co., Ltd. Interface test device
TWI748328B (zh) * 2019-01-18 2021-12-01 仁寶電腦工業股份有限公司 除錯系統

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5768563A (en) * 1993-07-20 1998-06-16 Dell Usa, L.P. System and method for ROM program development
IES20000160A2 (en) * 2000-02-29 2001-10-17 Internat Test Technologies A Method and system for testing microprocessor-based boards in a manufacturing environment
US6792378B2 (en) * 2002-11-21 2004-09-14 Via Technologies, Inc. Method for testing I/O ports of a computer motherboard
US6848930B2 (en) * 2003-01-15 2005-02-01 Shimano, Inc. Electrical connector with resilient retaining ring to restrict radial expansion
TWI270803B (en) * 2004-10-08 2007-01-11 Via Tech Inc Adapter for memory simulator
TWI273494B (en) * 2005-04-01 2007-02-11 Via Tech Inc Read only memory (ROM) simulation apparatus

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8963937B2 (en) 2011-02-10 2015-02-24 Novatek Microelectronics Corp. Display controller driver and testing method thereof
TWI461715B (zh) * 2012-12-06 2014-11-21 Wistron Corp 測試裝置以及電子裝置的測試方法
US9285427B2 (en) 2012-12-06 2016-03-15 Wistron Corporation Testing apparatus and testing method of electronic device

Also Published As

Publication number Publication date
US20080021695A1 (en) 2008-01-24
TWI316682B (https=) 2009-11-01

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MM4A Annulment or lapse of patent due to non-payment of fees