TW200806114A - System and method for modular electronics design - Google Patents

System and method for modular electronics design Download PDF

Info

Publication number
TW200806114A
TW200806114A TW095139915A TW95139915A TW200806114A TW 200806114 A TW200806114 A TW 200806114A TW 095139915 A TW095139915 A TW 095139915A TW 95139915 A TW95139915 A TW 95139915A TW 200806114 A TW200806114 A TW 200806114A
Authority
TW
Taiwan
Prior art keywords
design
modules
electronic
module
electronic hardware
Prior art date
Application number
TW095139915A
Other languages
Chinese (zh)
Inventor
Richard W Devaul
Original Assignee
Aware Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Aware Technologies Inc filed Critical Aware Technologies Inc
Publication of TW200806114A publication Critical patent/TW200806114A/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

A system for designing electronic hardware devices includes a system interface accepting electronic design parameters as input, a library storing a plurality of modules where each module is an electronic subassembly and the modules have standardized common interfaces. The system retrieves compatible modules from the library in response to design parameters and joins modules in order to create a complete electronic design for an electronic component such as a printed circuit board, a microchip or a wafer-stacked device.

Description

200806114 九、發明說明: 【發明所屬之技術領域】 本發明大致有關於電子,且尤其有關於電子設計。 , 【先前技術】 , 印刷電路板(PCB),也稱為印刷線路板(PWB),且常用 於提供必要的緊密及複雜的電路連接電流電子零件。在離 I線路之下使用PCB以連接電子零件。基本的印刷電路板 • *有—層印刷線路,也稱為跡線,裝在-層絕緣材料上。 跡線-般是由銅製成而且絕緣材料大致是塑膠。時常地, =CB具有被絕緣分離的多層電路。具有多層的⑽也稱為 夕層板。以鑽孔及稱為通道的電鍍孔來連接該等層。 、印刷電路板設計是-複雜過程,不僅涉及電子考慮而且 涉及形式因子需求,許多標準(如安全,軍事及環境標準) 及材料及製造考慮。例如,電子考慮包括跡線的寬度及間 距以維持足夠的信號傳輸,及板中的電力及接地面的設 ⑩ f ’以解調諧意外天線及提供某些熱散溢。跡線布局也是 製t考慮因為太接近的跡線會被安裝零件過程中的焊料短 一 路在夕層板豐接期間,跡線布局也影響絕緣層塑膠的流 . ^緣塑膠的適當流動維持各不同層的對齊,以便能正 t地將通道鑽孔。若各層不對冑,則通道不會通過待連接 的電路點。通道數目一般會極小化以減少鑽孔成本以及使 各層上的電路面積極大。而且,通道能中斷多層上的電路 布局,其中不需要用通道來連接。 般藉由從豐積在一絕緣層的銅板蝕刻銅而形成電路。 115846.doc 200806114 大致上期望在絕緣層上儘可能地留下更多的鋼,因為移除 大量的銅會耗盡蝕刻劑及產生尚需要再處理的污染物。此 外,若待蝕刻的區域具有電路相對於非電路表面區的類似 平均比,則會更一致地蝕刻電路。與上述相比,有更多的 P C B設計考慮。 有其它類型的電子設計如超大型積體電路(vlsi),如微 晶片及二維微系統(3D微系統),其中微晶片包括多個習知 侧層,其垂直地堆疊以產生三維積體電路。vlsi電路 及3D微系統的設計涉及與上述pCB設計類似的考虞。 在上述的考慮下,習知的PCB設計及布局(及其它電子設 计)是一種要求鬲技術,耗費勞力的滿# 甘士也 力刀旧過私,其時常需要孰 練的電子工程師長時間的工作。-旦完成PCB設計,則很 難添加或修改功能,在許多情況下雲i库 |而罟墙泛的重新設計過 程,其幾乎與原始設計要求相同的勞力密集工作。這對 於’例如用於現代可攜式或可穿載式電子襄置的緊密,高 度空間最佳化設計而言,尤其為真。 山 ^ 由於上述理由,需要一種系統及方法用於更迅 設計。 【發明内容】 本發明指向一種單模電子設計之系 糸統及方法,其提供辩 加的設計過程效率及產生的設計的有 曰 π双T生加。根據 明的一種系統包括一設計模組庫。兮 x 4设汁模組庫包括多個 幾合限制的模組’其具有良好指定的 疋的功旎介面。例如 組是完整PCB設計的功能次組件,4丄* 模 1千如功率調節模組,無線 115846.doc 200806114 模組,及感應器模組。為了回應設計參數,該系統將模組 作成瓦狀以符合一特殊設計規袼。該組裝的模組形成一完 整,連續,功能性的電子設計,如PCB,其合併次組件的 功能。模組的介面設計成提供作成瓦狀過程中的彈性。大 致上,在提供完整設計時不需要額外的設計工作。200806114 IX. DESCRIPTION OF THE INVENTION: TECHNICAL FIELD OF THE INVENTION The present invention relates generally to electronics, and more particularly to electronic design. [Prior Art] A printed circuit board (PCB), also known as a printed wiring board (PWB), is commonly used to provide the necessary tight and complex circuit connections for current electronic components. Use a PCB under the I line to connect electronic parts. Basic printed circuit boards • * There is a layer of printed wiring, also known as traces, mounted on a layer of insulating material. The traces are generally made of copper and the insulating material is roughly plastic. Often, =CB has a multilayer circuit that is insulated and separated. (10) having a plurality of layers is also called a slab. The layers are joined by drill holes and plated holes called channels. Printed circuit board design is a complex process that involves not only electronic considerations but also formal factor requirements, many standards (such as safety, military and environmental standards), and materials and manufacturing considerations. For example, electronics consider including the width and spacing of the traces to maintain adequate signal transmission, and the power and ground planes in the board to de-tune the unexpected antenna and provide some thermal spillover. The trace layout is also considered to be considered because the traces that are too close will be shorted by the solder in the process of mounting the part. During the integration of the slab, the trace layout also affects the flow of the plastic in the insulating layer. The alignment of the different layers is such that the channel can be drilled positively. If the layers are not correct, the channel will not pass through the circuit points to be connected. The number of channels is typically minimized to reduce drilling costs and to maximize the circuit area on each layer. Moreover, the channel can interrupt the circuit layout on multiple layers without the need for channels to connect. The circuit is formed by etching copper from a copper plate that is accumulated in an insulating layer. 115846.doc 200806114 It is generally desirable to leave as much steel as possible on the insulating layer because removing a large amount of copper can deplete the etchant and create contaminants that still require reprocessing. In addition, if the area to be etched has a similar average ratio of circuits to non-circuit surface areas, the circuit will be etched more consistently. There are more P C B design considerations than the above. There are other types of electronic designs such as ultra-large integrated circuits (vlsi), such as microchips and two-dimensional microsystems (3D microsystems), where the microchip includes a plurality of conventional side layers that are stacked vertically to produce a three-dimensional integrated body. Circuit. The design of the vlsi circuit and the 3D microsystem involves similar considerations to the pCB design described above. Under the above considerations, the conventional PCB design and layout (and other electronic design) is a kind of technically demanding, labor-intensive Mang-Gan is also too old-fashioned, and often needs a long-time electronic engineer. work. Once the PCB design is completed, it is difficult to add or modify features. In many cases, the cloud re-engineering process is almost as labor intensive as the original design requirements. This is especially true for compact, high space optimized designs such as those used in modern portable or wearable electronic devices. Mountain ^ For the above reasons, a system and method are needed for faster design. SUMMARY OF THE INVENTION The present invention is directed to a system and method for single mode electronic design that provides an efficiencies in the design process and the resulting design. A system according to the description includes a library of design modules. The 兮 x 4 juice module library includes a plurality of modular modules that have a well-designed 旎 function interface. For example, the group is a functional sub-assembly of a complete PCB design, 4丄* mode 1 thousand power adjustment module, wireless 115846.doc 200806114 module, and sensor module. In response to design parameters, the system tiles the modules to meet a special design specification. The assembled module forms a complete, continuous, functional electronic design, such as a PCB, which incorporates the functions of the secondary components. The interface of the module is designed to provide flexibility in the process of making a tile. In general, no additional design work is required to provide a complete design.

單模電子設計的習#方法在積體電路(1C)或分離零件的 低階下操作’或是在較大系統的高階下操作,帛等較大系 統包括分開的PCB與機械互連的組合。IC或分離零件的單 模性並未提及高階魏設計㈣題,而且使用具有機械互 連的分離咖會增加大小,而且對於許多電子應用包括可 攜式或可穿載式電子裝置而纟,它會產生可靠度及封裝的 )下’在PCB設計過程中使m件的本發明系統及 法’例如提供連接分離咖與機械互連的優點且不增加 大小,不增加封裝問題,及不減少操作可靠度等。 :發明的多個實施例包括一種用以設計電子硬體裝置之 系统尚=二系統介面’其將電子設計參數視騎入。該 μ件儲存複數個模組之庫,以各模組包括一電 ^件μ。至少―模組與該複數個模 組相容。在-實施例,該系統具有一單一庫“其仏 共享相η认/ 早庫而且所有模組 相冋的低階幾合及介面相容性。 ,^ 定該在配置,由功能界 組。在另—卷t 例’由至少一特徵界定該等模 例如儲存在广貫施例’由一特徵功能組界定該等模組。 存在庫中的模組是無線模組,功率模組,及感應器 115846.doc 200806114 杈、、且°亥系統尚包括一控制器,其與該系統介面連通及與 ,亥庫連通。该控制器存取該庫以擷取多個相容模組,以回 尤收到的叹叶翏數。該等擷取的模組形成一電子硬體裝置 " P又计的至少一部分。此系統的優點是僅設計電子次組件一 , 次,且接著儲存在設計庫作為模組。可以在後續電子設計 中再使用該等模組。藉由一廣泛庫,藉由選擇及將適當模 2作成瓦狀且以少量的額外工程工作,即可產生新的電子 •,置5又计如新的PCB。此外,一旦可使用庫中的模組及接 著選擇它用於一特別PCB應用,則系統基於簡單的設計規 則而設計及布局該PCB設計。 在一配置,擷取的模組具有相容介面。在一替代實施 例,介面是電子地相容。在另一替代實施例,介面是形式 因子相容。對於那些涉及設計及布局功能,其尚未在庫的 現存杈組中提供,該等共同介面減少設計新的電子組件時 的設計工作。可獨立地在現存pcB設計中更新,修正或取 瞻 代模組。這可達成模組的平行研發,設計的簡化除錯,及 在電子設計中容易的更新功能。 ,在本發明的另一實施例,該庫儲存一組待被控制器應用 ,的設計規則以驗證一電子硬體裝置的設計。在一配置,設 計規則是設計級規則,其表示將整體地應用在該設計,及 在另一配置,該等設計規則與個別模組相關聯。 在仍又一配置,應用設計級規則及個別模組規則。 在本發明的另一實施例,該系統介面接受用於複數個電 子硬體裝置的電子設計參數,及該系統布局一單一製造組 115846.doc 200806114 件,其包括複數個電子硬體裝置。在一第一配置,該複數 個電子硬體裝置是同m第二配置,該複數個電 子硬體裝置不是同一設計。例如該單一製造組件是具有複 數個%子政置的多層印刷線路板,其於製造後將分成多個 分離的印刷電路板裝置。The single-mode electronic design of the method # operates in the low-level operation of the integrated circuit (1C) or separate parts' or operates at the higher order of a larger system, such as a larger combination of separate PCB and mechanical interconnections. The single mode of ICs or discrete parts does not mention high-order Wei design (4), and the use of separate coffee with mechanical interconnections increases the size, and for many electronic applications, including portable or wearable electronic devices, It will produce reliability and packaging. Under the 'PCB design process, the system and method of the present invention can provide the advantages of connecting separate coffee and mechanical interconnections without increasing the size, without increasing the packaging problem, and without reducing Operational reliability, etc. The various embodiments of the invention include a system for designing an electronic hardware device that has a second system interface that takes electrical design parameters into view. The μ device stores a library of a plurality of modules, and each module includes an electrical component μ. At least the module is compatible with the plurality of modules. In the embodiment, the system has a single library "there is a low-order combination and interface compatibility of the shared phase ns/early library and all modules." The configuration is determined by the functional boundary group. In the other example, the module is defined by a feature function group, such as a wireless module, a power module, and The sensor 115846.doc 200806114 杈,, and °H system further includes a controller that is in communication with the system interface and is connected to the library. The controller accesses the library to retrieve a plurality of compatible modules to The number of slaps received is particularly high. The modules that are captured form at least part of an electronic hardware device. The advantage of this system is that only the electronic sub-assembly is designed one time, and then stored in The design library is used as a module. These modules can be reused in subsequent electronic designs. By selecting an extensive library, by selecting and shaping the appropriate mold 2 into a tile shape and working with a small amount of additional engineering, new electronics can be generated. •, set 5 as a new PCB. In addition, once the library is available The module in the module and then select it for a particular PCB application, the system designs and layouts the PCB design based on simple design rules. In one configuration, the captured module has a compatible interface. In an alternate embodiment, The interface is electronically compatible. In another alternative embodiment, the interface is form factor compatible. For those involved in design and layout functions, which have not been provided in the existing set of libraries, these common interfaces reduce the design of new electronic components. The design work can be independently updated, modified or taken in the existing pcB design. This can achieve parallel development of the module, simplify the design of the debugging, and easily update the function in the electronic design. In another embodiment of the invention, the library stores a set of design rules to be applied by the controller to verify the design of an electronic hardware device. In one configuration, the design rules are design level rules, the representations of which are to be applied integrally Design, and in another configuration, the design rules are associated with individual modules. In still another configuration, application design level rules and individual module rules are applied. In another embodiment, the system interface accepts electronic design parameters for a plurality of electronic hardware devices, and the system layout is a single manufacturing group 115846.doc 200806114, which includes a plurality of electronic hardware devices. In a first configuration The plurality of electronic hardware devices are the same second configuration, and the plurality of electronic hardware devices are not the same design. For example, the single manufacturing component is a multi-layer printed circuit board having a plurality of % of sub-policies, which will be manufactured after manufacture. Divided into a plurality of separate printed circuit board devices.

在本發明的另一實施例,—種用以設計電子硬體裝置之 方法,包括提供一儲存複數個模組之庫,纟中各模組包括 :電子零件的料。該複數個模組的至少二者是互相相 容。執行該方法的系統㈣接收電子設計參數及從庫選擇 至少二模組’以回應㈣電子設計參數。❹、統接著從選 擇的模組形成-電子硬體裝置的至少—部分料。在一配 置,該系統基於-特徵而選擇模組。在一第二配置,該系 統基於模組功能而選擇模組。 本發明的標準化次組件分耸庐 人、、且忏允卉禚準化封裝,因而減少栢關 的機械設計及電子裝置的製造成本。模組式設計系統及快 速PCB製造的合併能加速原型研發,同時使工程成本減到 才虽/】、〇 本發明的上述及JL尾π丄 ^ 及,、匕優點可由以下多個本發明實施例的 詳細說明且配合附圖而完全了解,其中: 【實施方式】 一種電子設計系統,包一 匕枯—人組件政叶庫,也稱為模 組。該糸統在一稱Α於々c η 為作成瓦狀的過程中布局該等模組以形 成一完整設計組株,上< σ P刷電路板。該等模組符合提供相 容介面及信號及功垄哈 力羊而求的規袼。可應用該電子設計系統 115846.doc 200806114 在VLSI設計及3D微系統設計上,以及在PCB上。本發明的 各實施例提供電子設計的自動產生,以及在電子零件快速 原型化時的顯著優點。 圖1是根據本發明原理的單模電子設計系統的方塊圖。 該設計系統100包括一控制器1 〇5,其能與一布局及設計系 統Π0作介面。在本發明,布局及設計過程是在設計系統 1 00的外部。在一替代實施例,布局及設計系統i〗〇與設計 系統1 00是一體。例如控制器1 〇5是微處理器。例如布局及 设什系統11 0是電腦系統,其執行可利用的數個設計及布 局程式之一,該等設計及布局程式適用於本發明。例如布 局及設計系統110是由位於佛州載拉海灘(Delray Beach)的 卡軟電腦公司(CadSoft Computer,Inc·)研發的老鷹(eagle) 布局編輯器。在本發明的替代實施例,本發·明的設計系統 100併入一布局及設計系統。 設計系統100尚包括一庫115 ^庫115包括複數個模組 120 ’ 125 ’ 130 ’ 135。各模組是一電子次組件設計。例如 次組件是一具有特別功能如功率模組125的零件。次組件 的其它範例是無線模組120, 135或感應器模組13〇。基於 功能而產生本實施例中的模組12〇,125,13〇,us,惟, 定義電子次組件如藉由零件或特徵的其它方式也是可行。 本發明不限於本文所列的模組定義。模組12〇, 125, 130’ 135具有相容的實體及電子介面,以及相容的信號及 功率需求。庫出能維持多個餘其符合複數個介面及信 〜力率而求庫115尚包括設計規則14〇。使用設計規則 115846.doc 200806114 140以測試’例如相對 了於&準的糸統完整。一實施例中的 庫115包括設計目雜& Λ 、彔160。使用設計目錄1 60以設計組件, 且將詳述如下。μ -ο» α ^ 口又计目錄160包括用於組件的設計,其使 用儲存在庫11 5中的模組。In another embodiment of the present invention, a method for designing an electronic hardware device includes providing a library for storing a plurality of modules, each of which includes: an electronic component. At least two of the plurality of modules are mutually compatible. The system performing the method (4) receives electronic design parameters and selects at least two modules from the library to respond to (iv) electronic design parameters. The system then forms at least a portion of the electronic hardware device from the selected module. In one configuration, the system selects the module based on the feature. In a second configuration, the system selects modules based on module functionality. The standardized sub-assembly of the present invention is subdivided, and 忏 禚 禚 禚 禚 禚 , , , , , , , , , , , , , , , 。 。 。 。 。 。 The combination of modular design system and rapid PCB manufacturing can accelerate the development of prototypes while reducing the engineering cost. The advantages of the above and JL tails of the present invention can be implemented by the following multiple inventions. The detailed description of the examples is fully understood with reference to the accompanying drawings, wherein: [Embodiment] An electronic design system, which is a module of a human component, is also called a module. The system lays out the modules in a process of forming a tile shape in the process of forming a tile shape to form a complete design group, and the upper < σ P brush circuit board. These modules are in line with the specifications for providing a compatible interface and signal and power. The electronic design system can be applied 115846.doc 200806114 on VLSI design and 3D microsystem design, as well as on the PCB. Embodiments of the present invention provide for the automatic generation of electronic designs and significant advantages in the rapid prototyping of electronic components. 1 is a block diagram of a single mode electronic design system in accordance with the principles of the present invention. The design system 100 includes a controller 1 〇 5 that interfaces with a layout and design system. In the present invention, the layout and design process is external to the design system 100. In an alternate embodiment, the layout and design system is integrated with the design system 100. For example, controller 1 〇 5 is a microprocessor. For example, the layout and system is a computer system that performs one of several design and layout programs available, which are suitable for use in the present invention. For example, the layout and design system 110 is an eagle layout editor developed by CadSoft Computer, Inc., located in Delray Beach, Florida. In an alternate embodiment of the present invention, the design system 100 of the present invention incorporates a layout and design system. The design system 100 also includes a library 115. The library 115 includes a plurality of modules 120'' 125' 130' 135. Each module is an electronic sub-assembly design. For example, the secondary component is a component having a special function such as power module 125. Other examples of secondary components are wireless modules 120, 135 or sensor modules 13A. Modules 12, 125, 13 〇, us in this embodiment are generated based on functionality, however, it is also possible to define electronic sub-components such as by means of parts or features. The invention is not limited to the module definitions listed herein. The modules 12, 125, 130' 135 have compatible physical and electronic interfaces, as well as compatible signal and power requirements. The library can maintain multiple spares and it meets multiple interfaces and the letter-to-force rate. The library 115 also includes design rules. Use design rules 115846.doc 200806114 140 to test 'for example, relative to & The library 115 in one embodiment includes design details & Λ, 彔 160. The design catalog 1 60 is used to design the components and will be detailed below. The μ -ο» α ^ port count catalog 160 includes a design for the component that uses the modules stored in the library 115.

又十系、充100具有—系統介面145,設計系統100透過該 面可接收輸入的没計芩數丨5 〇。設計參數1 $ 〇是資料,其 才曰疋待由,又什系統設計的電子零件如pcB。例如設計參數 150包括一計算裝置。系統介面145是任一介面,而計算裝 置可透過該’I面而接收資料。例如,一使用者可透過鍵盤 而輸入設計參數150。或者,透過網路而接收設計參數 150,或疋作為電子媒體如CD—R〇M上的檔案。在多個又 一實施例,設計參數150是由電腦程式產生。 操作中’設計系統100接收設計參數15〇其指定位於系統 介面145的電子組件如pCB。控制器1〇5根據設計參數15〇 而從庫115擷取模組。控制器105提供擷取的模組至布局及 設計系統11 0用以組裝在電子設計中。控制器1 05接著應用 设计規則14 0以檢查布局及設計系統11 〇產生的設計1 5 5, 及提供關於違反規則的資訊給布局及設計系統i丨〇。必要 時系統1 00及布局及設計系統11 0會修改設計1 5 5以回應設 計規則140的應用◊系統1 〇〇輸出電子裝置或組件如PCB的 完成設計。 在多個替代實施例,上述的設計系統是用於VLSI設計及 用於三維微系統設計。在又一替代實施例,控制器1 〇5從 庫Π 5接收模組以回應設計參數1 5 0,及使用設計目錄 115846.doc -11 - 200806114 1 60。此外,在多個替代實施例,在設計過程的所有步驟 可接受使用者輸入。 與低階模組設計的單模設計系統一起工作的設計過程, 涉及考慮介面及形式因子,以及電路設計。為了產生新的 模組,設計者首先研究設計規格及設計限制,及布局用於 電子杈組如PCB的電子設計,其符合受到限制的規格。此 過程與習知的設計過程不同處在於設計限制,其一般包括 製程中施加的設計規則,包括模組系統幾合及介面規格施 加的額外限制。 上述模組只是典型。例如,除了無線模組12〇,135,感 應时模組1 30,及功率模組i 25以外,用於不同類型設備的 ”、員示模組,雙向音訊模組,及介面模組也是可行。本發明 不僅限於本文所列的那些模組類型。 圖2是儲存模組12〇,125,13〇,135及設計規則14〇的庫 115的方塊圖。各模組12〇,125,13〇,&包括設計資料 200,205,210,215其敘述模組電路的布局。各模組 120 125 ’ 130 ’ 135具有一特定信號介面240,245, 250 ’ 255其與其它模組120,125,130,135共用。在此例 的特疋L旒介面稱為信號介面β。信號介面p提供一特定信 號’其具有例如-相容電壓位準及阻抗,以便在無額外信 唬條件下第一模組,例如無線模組a 120可接到一第二 模組,例如功率模組B 125。各模組120,125,13〇,135 ^特疋貫體介面260,26S,270,275,在此例稱為實 胆;1面以。特定實體介面260,265,270,275提供用於模 115846.doc •12· 200806114 組之間共同貫體連接的標準。實體介面260,265,270, 275也包括形式因子規格。第一實施例中的實體介面, 265 270 ’ 275的基準特徵的位置相容。在第二實施例, 貫體介面260,265,270,275於通道位置相容。這些特徵 只疋fc例。在本發明的範圍中實體相容的其它特徵也是可 月b。雖然本文只敘述一類型的信號介面及一類型的實體介 面’热習此項技藝者將了解庫115能儲存具有其它介面類 型的模組。 此貫施例中的各模組120,125,130,135包括該模組特 定的一組設計規則22〇,225,23〇,235。以類似於設計規 則140應用的方式應用這些組設計規則220,225,230, 235 ’该等設計規則ι4〇儲存在與模組12〇,ι25,13〇, 無關的庫中。模組特定設計規則220,225,230,235例^ 包括與其它模組連接有關的規則。在本發明的一替代實施 例’没计系統1 00不具有設計級設計規則丨4〇,而且模組特 定設計規則220,225,230,235只應用在設計155。在另 一替代實施例,模組120,125,130,135不具有設計規則 220,225,230,235,而且設計規則14〇只應用在設計 155 〇 從庫11 5擷取的模組形成用於電子硬體裝置設計的至少 一部分。此系統的優點是只設計電子次組件一次且接著儲 存在庫中。在後續電子設計中可再使用該等模組。藉由一 廣泛庫,在無額外工程工作之下藉由選擇及將適當的模組 作成瓦狀’可產生新的電子裝置設計如新的PCB。此外, 115846.doc -13 - 200806114 一旦可使用庫中的模組及接著選擇用於一特別peg應用, 該系統即根據設計規則而設計及布局PCB設計。在本發明 的某些實施例,設計是儲存在庫中且供設計目錄16〇中的 - 後續操作使用。本發明的標準化次組件允許標準化封裝, • 因而減少相關機械設計及電子裝置的製造成本。例如在 PCB製造中,模組式設計系統與快速pcB製造的合併可加 速原型的研發,同時使工程成本減到極小。 • 圖3是典型多層印刷電路板300的一部分的剖面圖,該印 刷電路板是可由本發明實施例製造的設計所產生的那一類 型。PCB設計的簡單版本是單層板,其中所有的信號傳送 到板的頂面。更常見的是,PCB具有至少二信號層(一頂層 305及一底層310),及時常具有數個内部信號層315, 320,325,330如圖 3所示。信號層 3〇5,31〇,315,32〇, 325 3 3 0被絶緣材料層335分開且藉由電鍍通道而在特 定點連接。在此例’ PCB3〇〇具有二個表面安裝零件345。 馨 纟發明的系統及方法能迅速且有效的設計出組件如本文所 示者。 • 圖4是根據本發明原理的瓦狀模組的方塊圖。為了明晰 • 勺乂下使用單一層板及水平瓦狀設計來解釋瓦狀。圖 ’、、、員示/、有一個範例模組355,36〇,365的的一部 刀Λ範例模組包括一無線模組355,一功率模組360及一 感應裔模組365。各模組在特定位置具有複數個連接點。 〆等連接點是電力連接點37〇,接地連接點,時脈連接 點380及貝料連接點385。模組Μ〗,,gw的設計是任 115846.doc -14- 200806114 何符合模組,其能與相鄰的任何其它符合模組作成瓦狀以 導致一功能性連接設計。相鄰模組355,36〇,365的連接 點3 70 ’ 3 75,3 80,385接在一起以形成較大的pCB組件。 各模組355,360,365也具有基準記號mo ,也稱為基準, 其用以將模組互相對齊。基準39〇也可用以將多層pCB中 的層對齊。The tenth system and the charging unit 100 have a system interface 145 through which the design system 100 can receive input without counting 丨5 〇. The design parameter 1 $ 〇 is the data, and it is waiting for the system, and the electronic components such as pcB are designed. For example, design parameters 150 include a computing device. The system interface 145 is any interface through which the computing device can receive data. For example, a user can enter design parameters 150 through the keyboard. Alternatively, the design parameters 150 may be received over the network, or as an archive on an electronic medium such as a CD-R. In various embodiments, the design parameters 150 are generated by a computer program. In operation, the design system 100 receives design parameters 15 that specify electronic components such as pCB located at the system interface 145. The controller 1〇5 draws the module from the library 115 based on the design parameters 15〇. Controller 105 provides the captured module to layout and design system 110 for assembly in an electronic design. The controller 105 then applies the design rules 140 to check the layout and design system 〇 generated design 155, and to provide information about the violation rules to the layout and design system. If necessary, system 100 and layout and design system 110 will modify design 155 in response to design rules 140 application ◊ system 1 〇〇 output electronics or components such as PCB completed design. In various alternative embodiments, the above described design system is for VLSI design and for 3D microsystem design. In yet another alternative embodiment, controller 1 接收5 receives modules from library 5 in response to design parameters 150, and uses design catalog 115846.doc -11 - 200806114 1 60. Moreover, in various alternative embodiments, user input is acceptable at all steps of the design process. Design processes that work with single-mode design systems designed for low-level modules, involving interface and form factors, and circuit design. In order to create a new module, the designer first studies the design specifications and design constraints, and the layout is used for electronic design of electronic components such as PCBs, which meet the limited specifications. This process differs from the well-known design process in design constraints, which typically include design rules imposed during the process, including additional constraints on the modular system and interface specifications. The above modules are only typical. For example, in addition to the wireless module 12〇, 135, the sensing module 1 30, and the power module i 25, the "meeting module", the two-way audio module, and the interface module are also feasible for different types of devices. The invention is not limited to the types of modules listed herein. Figure 2 is a block diagram of a storage module 12〇, 125, 13〇, 135 and a library 115 of design rules 14〇. Modules 12〇, 125, 13 〇, & includes design data 200, 205, 210, 215 which describes the layout of the module circuit. Each module 120 125 ' 130 ' 135 has a specific signal interface 240, 245, 250 ' 255 and other modules 120, 125, 130, 135 are shared. The special interface in this example is called the signal interface β. The signal interface p provides a specific signal 'which has, for example, a compatible voltage level and impedance for no additional signal conditions. The first module, for example, the wireless module a 120, can be connected to a second module, such as the power module B 125. Each module 120, 125, 13 〇, 135 ^ 疋 体 interface 260, 26S, 270, 275, in this case referred to as solid bile; 1 side is provided by a specific entity interface 260, 265, 270, 275 The standard for common inter-body connections between groups 115846.doc •12· 200806114. The physical interfaces 260, 265, 270, 275 also include formal factor specifications. The physical interface in the first embodiment, the reference features of 265 270 '275 The position is compatible. In the second embodiment, the intersecting interfaces 260, 265, 270, 275 are compatible with the channel locations. These features are only examples of fc. Other features that are physically compatible within the scope of the present invention are also Although only one type of signal interface and one type of physical interface are described herein, the skilled artisan will appreciate that the library 115 can store modules having other interface types. The modules 120, 125 in this embodiment, 130, 135 includes a particular set of design rules 22, 225, 23, 235 of the module. These group design rules 220, 225, 230, 235 are applied in a manner similar to the application of the design rule 140 application. 〇 Stored in a library unrelated to modules 12〇, ι25, 13〇. Module-specific design rules 220, 225, 230, 235 ^ include rules related to other module connections. An alternative implementation of the present invention Example 1 00 does not have design-level design rules 〇 4〇, and module-specific design rules 220, 225, 230, 235 are only applied to design 155. In another alternative embodiment, modules 120, 125, 130, 135 do not have design Rules 220, 225, 230, 235, and design rules 14 apply only to the modules that are designed 155 from the library 11 to form at least a portion of the design for the electronic hardware device. The advantage of this system is that only the electronic sub-components are designed once and then stored in the library. These modules can be reused in subsequent electronic designs. With an extensive library, new electronic devices such as new PCBs can be created by selecting and tiling appropriate modules without additional engineering work. In addition, 115846.doc -13 - 200806114 Once the modules in the library can be used and then selected for a special peg application, the system designs and layouts the PCB design according to the design rules. In some embodiments of the invention, the design is stored in a library and used in subsequent design operations in the design directory. The standardized sub-assembly of the present invention allows for standardized packaging, and thus reduces associated mechanical design and manufacturing costs of electronic devices. For example, in PCB manufacturing, the combination of modular design systems and rapid pcB manufacturing accelerates the development of prototypes while minimizing engineering costs. • Figure 3 is a cross-sectional view of a portion of a typical multilayer printed circuit board 300 that is the type that can be produced by designs made in accordance with embodiments of the present invention. A simple version of the PCB design is a single layer board in which all signals are transmitted to the top surface of the board. More commonly, the PCB has at least two signal layers (a top layer 305 and a bottom layer 310), and in time has a plurality of internal signal layers 315, 320, 325, 330 as shown in FIG. The signal layers 3〇5, 31〇, 315, 32〇, 325 3 3 0 are separated by an insulating material layer 335 and connected at specific points by plating channels. In this case, the PCB 3 has two surface mount parts 345. The system and method of the invention can quickly and efficiently design components as shown herein. • Figure 4 is a block diagram of a tile module in accordance with the principles of the present invention. For clarity • Use a single laminate and a horizontal tile design to explain the tile shape under the spoon. A knives example module having a sample module 355, 36 〇, 365 includes a wireless module 355, a power module 360 and a sensory module 365. Each module has a plurality of connection points at a specific location. The connection points such as 是 are the power connection point 37〇, the ground connection point, the clock connection point 380, and the bedding connection point 385. Module Μ,, gw is designed to be 115846.doc -14- 200806114. It conforms to the module, which can be tiled with any other adjacent modules to create a functional connection design. The junctions 3 70 ' 3 75, 3 80, 385 of adjacent modules 355, 36 〇, 365 are joined together to form a larger pCB assembly. Each module 355, 360, 365 also has a reference mark mo, also referred to as a reference, for aligning the modules to each other. The reference 39〇 can also be used to align the layers in the multilayer pCB.

圖4的範例模組355,36〇,365作成單一層,水平的瓦 狀,其中杈組355,360,365本身是矩形次組件,各有一 個四信號介面。此模組設計使用單一功率執及雙線共享串 列匯流排用以跨過模組而通訊。該匯流排例如是荷蘭皇家 菲利浦电子公司(Royal Phihps Electr〇nics)生產的匯流 排。藉由將預設計模組組裝在一起以形成一電子設計,即 可省去零件設計及配置時所作的工作。 本發明的系統及方法不限於單層板或水平瓦狀。在多個 替代實施例,任何數目的板層都是可行而且支援二及三維 瓦狀。在本發明的一替代實施例,庫115尚包括待包括在 特別設計級中的模組規格。在本發明的又一替代實施例, 糸統100提供目錄160的設計規格以定義一特別設計級。在 具有設計目錄⑽的實施射,例如藉由指定使用的次組 件數目及一般類型而定義PCB設計級。例如,可指定可穿 載生物感應器的目錄為三個模組的組合,各係一特定類 型:一無線(模組類型A),電源供給(模組類型B),及感應 器系統(模組類型C)。在已知一適當設計庫之下,類型A: 類型B 類型c的任何組合將導致用於可穿載生物感應 ΐ 15846.doc -15 - 200806114 器的功能PCB設計。 在本發明的-替代實施例,以類似於上述作成瓦狀的方 式將多層板作成瓦狀。例如,在雙層板中,可 間的介面信號置於(或傳送到)板的底部及頂部。使用板的 -側用以定路線(以及用於零件)以具有允許更緊密板設計 的優點,且猎由允許信號互相在空間跨過及同時維持電絕 緣,而大致上簡化板定路線的問題。藉由使用用於介面传 號的雙層,產生的次組件會更緊密及更易於^路線。° 上述的水平瓦㈣統可延伸到具有二層以上的設計,方 法是在頂部或底部持續傳送介面信號,或是藉由將介面信 號傳送到内部層。例如’在習知四或六層pcB布局的中間 二層,如圖3的PCB所示的布局,時常保留用於供給信號 (PWR及GND)。這使得傳送供給信號更容易,且可在頂層 及底層留下空間用於零件封裝及傳送其它信號。藉由額: 的内部層’即可内部地傳送更多信號,且可在頂部及底部 留下更多空間用於零件設置。藉由使用這種系統,即可依 期望而儘可能地將更多層PCB堆疊成一功能性pcB夹層, 而各PCB層包括一群瓦狀的pCB模組。 雖2疋層狀,但大致是二維。零件一般置於 ㈣部或底部。PCB的内層一般僅用於定路線。在習知單 胃電子設計中’時常使用單一水平或垂直背面以提供平行 :板或擴充卡p C B之間的互連。本發明的多個實施例提供 二維功能以符合3-D電子設計的需求。 回疋根據本發明一貫施例的三維瓦狀模組的圖形。 115846.doc -16- 200806114 模組400包括用於水平瓦狀的連接405,410。模組4〇〇尚包 括一垂直互連介面415。該垂直互連介面415是一連接器其 符合一特定設計及位置。垂直互連介面415提供與多層的 • 連接,或是與位於本模組上方或下方的組件的連接。例如 - 垂直互連介面41 5是一板至板連接器。模組400尚包括用於 對齊的基準記號420。垂直互連介面將系統的功能擴充以 作成更複雜的瓦狀設計,如垂直瓦狀設計或水平及垂直瓦 φ 狀設計。 圖6是瓦狀PCB 450的頂視圖,該PCB 45〇具有垂直及水 平瓦狀。PCB 450包括四個模組455,460,465,470經由 水平連接器475而接在一起。各模組455,46〇,465, 包括一垂直連接器480,其可用以連接到位於pcB 45〇上方 或下方的其它組件(未顯示)。設計系統〗〇〇形成此設計的過 程涉及選擇模組以回應收到的設計參數。此例的各模組是 一複多層设計。惟,不論個別模組的内部複雜性,也能僅 _ 設置相鄰的模組,因為模組在介面及形式因子是相容的。 圖7是根據本發明一實施例的三維微系統5〇〇的側視圖, * 其中應用垂直瓦狀。三維微系統(3D微系統)500是積體電 -路(1C),其包括習知蝕刻半導體1(: 505,5 1〇的垂直堆疊, 接合層。圖7所示的3D微系統包括封裝層515,其提供… 5 05,5 10的保護以及電絕緣。二維單模設計方法,其已於 PCB設計時敘述,也適sVLSI(超大型積體電路)設計中的 功能模組。因此以類似於上述PCB的方式將各IC 5〇5,51〇 模組化。此外,各1C 505包括一垂直連接器52〇。使用二 115846.doc -17- 200806114 維模組,其具有用於VLSI設計的標準垂直互連,使得 VLSI模組能堆疊以形成一組件,其係3]〇微系統。 、 圖8是PCB 550的上視圖,其具有根據本發明一實施例的 模組化内部結構。在此繪示中,組成内部結構的各不同層 是以虛線表示,且各層有不同的填充圖案。 在習知多層設計方法中,將一特別信號傳送通過一或多 個PCB層。藉由電鍍的鑽孔,其穿過所有的層(通道)或穿 過一次組層(微通道),而實作出層之間的信號轉換。此傳 送設計提供彈性,但是製造多層PCB需要大量昂貴的特別 5又備’使得多數機構很難於室内生產出多層PCB。對比 下,蝕刻PCB的頂層及底層及將通道鑽孔的設備及處理, 是相對便宜,使得甚至小機構也能在室内生產出二層板。 因此’本發明的單模设計糸統及方法的實施例涉及提供 一板模組,如圖8所示具有模組化内部結構的pc]B 5 5 0。板 模組設置有内部電路及胚的頂部555及底部(在此圖中未顯 示),例如是未蝕刻銅的頂層及底層。PCB 550是具有有效 内部結構,電路層560,565,570,575的多層胚。特別電 路可布局在頂層550及底層。各電路層560,565,570, 575具有至少一連接點580,其中將通道鑽孔以形成與其它 層的垂直連接。可應用二層蝕刻及鑽孔過程在這些模組化 板,以容易地製造出多層板。 習知的多層板設計大致上是複雜的,其具有的複雜度隨 著加入設計的每一層而顯著的成長。因此,8層板的設計 遠比4層板的設計複雜,及14層板的設計遠比8層板的設計 115846.doc 200806114 複雜。本發明的多個實施例提供相容的預設計模組,其可 、、且衣在起以形成用於多層板的設計。使用本發明的預設 计板組可組裝多層板,設計者即可避免習知板設計中遇到 的許多複雜。 單模設計的使用允許用於一種混合方法,其中一多層板 具有預先製造的内部層,留下頂層及底層待客製化以用於 一特定設計及室内蝕刻。可以將内部層設計成系統地傳送 七、:及貝料仏號,以便這些信號可以在多層板的特定位置 或區域中使用,例如圖8的連接點580。接著以固體銅的頂 層及底層來預製造這些内層。接著藉由在特定位置鑽孔的 通道來額外地發出這些供給及資料信號。此外,在一些實 施例中用於預製造内部結構的設計,會留下開啟的空間供 鑽孔的通道從板的頂部傳送其它信號至板的底部。 使用二層(頂層及底層)以上在PCB設計中可得到顯著的 優點,因為它允許信號的内部傳送,因而更緊密的將頂層 及底層用於零件設置。習知多層設計的主要缺點是製程更 複雜而且許多機構將多層板的製造包給一特殊設施,因 為複雜會產生極嚴重的挑戰及極高的支出。對比下,使用 較便宜的設備即可於室内執行PCB板面板的頂層及底層蝕 刻’而其所需時間是數小時而不是數天。因此本發明的多 個實施例提供可修改的建築塊,其可容易且快速地組裝成 一整體裝置。 可事先大量便宜的製造出預製造的多層層,其具有胚 (未蝕刻銅)的頂層及底層。在一實施例,從一設計庫16〇選 115846.doc -19- 200806114 擇模組。選出的模I且接徂f Λ 徒供換組化内部結構用於PCB胚。雖 然這些PCB模組的中間層的姓 曰旳、、、口構疋固定,但頂層及底層, 以及通道及鑽孔的位置都可依 1 J依電子政计的特定功能而客製 化。該預製造多層板設計包括斟 T匕栝對準,己號,使其能將頂部, 底層,及通道與鑽孔對齊, 以形成與預製造内部結構的連 接。使用f知光罩及化學㈣或數值控制㈣研磨,及鑽 孔,即可快速且便宜的製造出最終設計。 鑽The example modules 355, 36A, 365 of Figure 4 are formed as a single layer, horizontal tile, wherein the turns 355, 360, 365 are themselves rectangular sub-assemblies, each having a four-signal interface. This module design uses a single power and two-wire shared serial bus to communicate across the module. The busbar is, for example, a busbar produced by Royal Phihps Electr〇nics. By assembling the pre-designed modules together to form an electronic design, the work done in part design and configuration can be eliminated. The systems and methods of the present invention are not limited to single layer panels or horizontal tiles. In a number of alternative embodiments, any number of plies are feasible and support two and three dimensional tiles. In an alternate embodiment of the present invention, library 115 also includes module specifications to be included in a particular design level. In yet another alternative embodiment of the present invention, the system 100 provides design specifications for the catalog 160 to define a particular design level. In the implementation of the design catalog (10), the PCB design level is defined, for example, by specifying the number of subassemblies used and the general type. For example, a catalog that can be loaded with a biosensor can be a combination of three modules, each of which is of a specific type: a wireless (module type A), a power supply (module type B), and a sensor system (mode) Group type C). Under a known design library, any combination of Type A: Type B Type c will result in a functional PCB design for the loadable biosensing ΐ 15846.doc -15 - 200806114. In an alternative embodiment of the invention, the multilayer board is tiled in a manner similar to that described above. For example, in a two-layer board, the intervening interface signals are placed (or transferred) to the bottom and top of the board. The use of the - side of the board for routing (and for parts) has the advantage of allowing for a tighter board design, and the problem of substantially simplifying the board routing is achieved by allowing the signals to traverse each other in space while maintaining electrical insulation. . By using a double layer for interface routing, the resulting sub-components are tighter and easier to route. ° The above horizontal tile (4) can be extended to a design with more than two layers by continuously transmitting the interface signal at the top or bottom, or by transmitting the interface signal to the internal layer. For example, in the middle two layers of the conventional four or six-layer pcB layout, the layout shown in the PCB of Fig. 3 is often reserved for supply signals (PWR and GND). This makes it easier to transfer the supply signal and leaves room for component packaging and other signals on the top and bottom layers. With the internal layer of the amount:, more signals can be transmitted internally, and more space can be left at the top and bottom for part setup. By using such a system, more layers of PCB can be stacked as much as possible into a functional pcB interlayer, and each PCB layer includes a group of tile-shaped pCB modules. Although it is layered, it is roughly two-dimensional. Parts are usually placed in the (four) or bottom. The inner layer of the PCB is generally only used for routing. In conventional monogastric electronic designs, a single horizontal or vertical back is often used to provide parallel: the interconnection between the board or expansion card p C B . Various embodiments of the present invention provide two-dimensional functionality to meet the needs of 3-D electronic design. A pattern of a three-dimensional tile-like module according to a consistent embodiment of the present invention is recalled. 115846.doc -16- 200806114 The module 400 includes connections 405, 410 for horizontal tile. Module 4 also includes a vertical interconnect interface 415. The vertical interconnect interface 415 is a connector that conforms to a particular design and location. The vertical interconnect interface 415 provides a connection to multiple layers or to components located above or below the module. For example - the vertical interconnect interface 41 5 is a board to board connector. Module 400 also includes a reference mark 420 for alignment. The vertical interconnect interface expands the functionality of the system for more complex tile designs, such as vertical tile designs or horizontal and vertical tile φ designs. Figure 6 is a top plan view of a tile-shaped PCB 450 having a vertical and horizontal tile shape. The PCB 450 includes four modules 455, 460, 465, 470 that are connected together via a horizontal connector 475. Each module 455, 46A, 465 includes a vertical connector 480 that can be used to connect to other components (not shown) located above or below the pcB 45A. Design System 〇〇 The process of forming this design involves selecting a module in response to the received design parameters. The modules in this example are a multi-layer design. However, regardless of the internal complexity of the individual modules, only adjacent modules can be set up because the modules are compatible in terms of interface and form factor. Figure 7 is a side elevational view of a three-dimensional microsystem 5〇〇, in which a vertical tile shape is applied, in accordance with an embodiment of the present invention. The three-dimensional microsystem (3D microsystem) 500 is an integrated electrical-path (1C) comprising a conventionally etched semiconductor 1 (: 505, 51 〇 vertical stack, bonding layer. The 3D microsystem shown in Figure 7 includes a package Layer 515, which provides ... 5 05, 5 10 protection and electrical insulation. Two-dimensional single-mode design method, which has been described in the PCB design, is also suitable for functional modules in sVLSI (very large integrated circuit) design. Each IC 5〇5, 51〇 is modularized in a manner similar to the above-described PCB. In addition, each 1C 505 includes a vertical connector 52. Using two 115846.doc -17-200806114 dimensional modules, which are used for The standard vertical interconnection of the VLSI design enables the VLSI modules to be stacked to form a component, which is a microsystem. Figure 8 is a top view of the PCB 550 having a modular interior in accordance with an embodiment of the present invention. Structure. In this illustration, the different layers that make up the internal structure are indicated by dashed lines, and each layer has a different fill pattern. In a conventional multilayer design method, a special signal is transmitted through one or more PCB layers. Drilled by electroplating, which passes through all layers (channels) or After a group of layers (microchannels), the signal conversion between the layers is made. This transfer design provides flexibility, but the manufacture of multilayer PCBs requires a lot of expensive specials, making it difficult for most organizations to produce multi-layer PCBs indoors. Under the etched top and bottom layers of the PCB and the equipment and processing for drilling the channels, it is relatively inexpensive, so that even a small mechanism can produce a two-layer board indoors. Therefore, the single-mode design system and method of the present invention The embodiment relates to providing a board module, as shown in FIG. 8 having a modular internal structure, pc]B 5 50. The board module is provided with an internal circuit and a top 555 and a bottom of the embryo (not shown in this figure) For example, the top and bottom layers of unetched copper. PCB 550 is a multi-layered embryo with an effective internal structure, circuit layers 560, 565, 570, 575. Special circuits can be placed on top layer 550 and bottom layer. Circuit layers 560, 565, 570 575 has at least one connection point 580 in which the channels are drilled to form a vertical connection with other layers. A two layer etching and drilling process can be applied to these modular boards to easily fabricate the multilayer board. The known multi-layer board design is roughly complex, and its complexity grows significantly with each layer of the design. Therefore, the design of the 8-layer board is far more complicated than the design of the 4-layer board, and the design of the 14-layer board. Far more complex than the design of the 8-layer board 115846.doc 200806114. Various embodiments of the present invention provide a compatible pre-designed module that can be, and is designed to form, a design for a multi-layer board. Pre-designed panels can be assembled with multi-layer panels, allowing designers to avoid many of the complexities encountered in conventional board designs. The use of single-mode designs allows for a hybrid approach where a multi-layer board has a pre-manufactured interior layer. The top and bottom layers are left to be customized for a particular design and room etch. The inner layer can be designed to systematically transmit seven: and the nickname so that these signals can be used in specific locations or areas of the multi-layer board, such as connection point 580 of FIG. These inner layers are then prefabricated with the top and bottom layers of solid copper. These supply and data signals are then additionally issued by channels that are drilled at specific locations. In addition, the design used to pre-manufacture the internal structure in some embodiments leaves open space for the drilled channels to pass other signals from the top of the board to the bottom of the board. The use of two layers (top and bottom) provides significant advantages in PCB design because it allows for internal signal transfer, thus tighter use of the top and bottom layers for part placement. The main disadvantage of the conventional multilayer design is that the process is more complicated and many organizations package the manufacture of the multi-layer board to a special facility, which is complicated and poses extremely serious challenges and high expenditure. In contrast, the less expensive equipment can be used to perform the top and bottom etch of the PCB panel indoors, and the time required is hours rather than days. Accordingly, various embodiments of the present invention provide modifiable building blocks that can be easily and quickly assembled into a unitary device. A pre-manufactured multilayer layer having a top layer and a bottom layer of an embryo (unetched copper) can be produced in large quantities in advance. In one embodiment, a module is selected from a design library 16 115846.doc -19- 200806114. The selected modulo I and the 徂f Λ are used for the replacement of the internal structure for the PCB embryo. Although the names of the middle layers of these PCB modules are fixed, the top and bottom layers, as well as the locations of the channels and drill holes, can be customized according to the specific functions of the e-policy. The pre-manufactured multi-layer board design includes a 斟 T匕栝 alignment that allows the top, bottom layer, and channel to be aligned with the bore to form a connection to the pre-fabricated internal structure. Using the f-mask and chemical (4) or numerical control (4) grinding, and drilling, the final design can be quickly and inexpensively manufactured. Drill

圖9是根據本發明一實施例的設計系統⑽方法的流程 圖。在步驟600,設計系統1〇〇提供一模組庫115。如上所 述,該等模組包括用於電子戈 电卞-人組件的設計。在一實施例, 該等單模作成水平瓦狀。在多残 π 夕1U曰代戸、鉍例,包括將該等 單模作成垂直瓦狀。在多個又一告 你夕1U又貫施例,包括將模組作成 垂直與水平合併的瓦狀。於具_告 於冉貫施例,形成PCB胚核心 的模組設置在庫11 5中。 在步驟605 ’设計系統1〇〇接收電子設計參數。當選 擇至少二模組時,設計參數⑽即指定待設計的電子组 件。如上所述’設計參數150源自數個源的-或多個,該 等源包括電腦程式的輸入及輸出。 在步驟6 H),設計系統i 〇 〇選擇至少二模組以回應收到的 設計參數,選出的模組具有相容介面,以便該等模組 能根據本發明原理而作成瓦狀。 在步驟615’該等模組布局成為—設計。可使用習知的 布局及設計系統如eagle系統,以布局該等模組。 在步驟615,將相容模組合併以產生用於電子組件如 115846.doc •20- 200806114 PCB的設計。模組的相容介面最終可簡化設置及定路線。 在γ驟620,叹计系統i⑻應用設計規則在自步驟61 $得 到的設計。在一替代實施例,系統1〇〇應用系統級設計規 β 則140。在第二替代實施例,系統100應用模組級設計規則 . 如圖2中的設計規則220, 225,230 , 235。例如該等設計 規則是電子標準。 在步私625,系統1 〇〇完成該設計。在此步驟,作出回應 • 步驟620的任何變化,且格式化該設計用於輸出。 圖10疋製造組件的方塊圖,該組件包括複數個根據本發 明一貫施例的電子裝置。在此例的製造組件650是一多層 印刷線路板(PWB)。製造組件65〇包括複數個個別多層電 子衣置、多層裝置Α65〇、多層裝置Β66〇、多層裝置 C665、多層裝置〇67〇、多層裝置£675及多層裝置μ⑼。 本發明的設計系統100為了設計出製造組件65〇而接收用於 各個不同多層裝置655,660,665,670,675,680的設計 •:數不在|板上没計一裝置,設計系統!⑽指向在單 夕層板上設計出複數個裝置。個別模組的相容度可延伸 到夕層板上的多個電子裝置。在_第一配置,多層裝置 66〇’ 665’ 67〇’ 675’ 68〇是同一設計。在一第二配 置,夕層裝置655,660,665,670,675,680是不同設 口十將夕層裝置655,660,665,670,675,680製造成一 整體以作為PWB㈣,及接著將分成個別的多層裝置。容 1的:计出此型製造組件的能力提供減少生產成本的機 曰。製造一多層板的成本遠比,例如製造6個多層板的成 115846.doc -21 - 200806114 本低。 雖然主要是以PCB來敘述上述系統及方法,但本發明也 可應用在VLSI設計及3D微系統設計。 待了解的是上述實施例只是本發明原理的敘述。熟習此 =技藝者可利用本發明原理而作出各種不同及其它改良及 變化’而且其都落在本發明的精神及範圍中。 【圖式簡單說明】 圖1是根據本發明原理的設計系統的方塊圖; 圖2是圖1庫的方塊圖,包括根據本發明原理的模組的進 一步細節; 圖3是習知六層印刷電路板的剖面圖; 圖4是根據本發明原理的瓦狀模組的方塊圖; 圖5是-模組的方塊圖’該模組用於根 三維瓦狀,· 0 “圖6疋具有模㈣水平瓦狀印刷電路板的上視圖,該等 杈組具有根據本發明原理的垂直連接器; 圖圖7是根據本發明原理的垂直瓦狀D三維微系統的側視 圖8是印刷電路板的 發明原理的模組化内部亥印刷電路板具有根據本 理岡及疋认。十糸統的#作流程圖,該系統是根據本發明原 圖1 〇是製造組件的方始岡 9 ο ^ φ ^ 鬼圖,该組件包括複數個根據本發 明原理的電子裝置。 十’天 115846.doc -22- 200806114 【主要元件符號說明】 100 105 110 115 120 、 135 、 355 125 、 3609 is a flow diagram of a method of designing a system (10) in accordance with an embodiment of the present invention. At step 600, the design system 1 provides a module library 115. As mentioned above, the modules include designs for electronic components. In one embodiment, the single molds are formed in a horizontal tile shape. In the case of multi-residue π 1 1U曰, 铋, including the single-mode as a vertical tile. In a number of occasions, the 1U method is applied again, including making the module into a tile that is vertically and horizontally combined. The module forming the core of the PCB embryo is set in the library 115. The design system 1 receives the electronic design parameters at step 605'. When at least two modules are selected, the design parameters (10) specify the electronic components to be designed. As noted above, the design parameters 150 are derived from one or more of a number of sources, including the input and output of a computer program. In step 6 H), the design system i 〇 selects at least two modules in response to the received design parameters, and the selected modules have compatible interfaces so that the modules can be tiled in accordance with the principles of the present invention. At step 615' the modules are laid out as a design. Conventional layout and design systems such as the eagle system can be used to lay out the modules. At step 615, the compatible modules are combined to produce a design for an electronic component such as 115846.doc • 20-200806114 PCB. The compatible interface of the module ultimately simplifies setup and routing. At gamma step 620, the stun system i(8) applies the design rules in the design obtained from step 61$. In an alternate embodiment, the system 1 applies a system level design specification. In a second alternative embodiment, system 100 applies module level design rules. As shown in Figure 2, design rules 220, 225, 230, 235. For example, these design rules are electronic standards. At Step 625, System 1 completes the design. At this step, respond • any changes in step 620 and format the design for output. Figure 10 is a block diagram of a manufacturing assembly including a plurality of electronic devices in accordance with a consistent embodiment of the present invention. The manufacturing assembly 650 in this example is a multilayer printed wiring board (PWB). The manufacturing assembly 65 includes a plurality of individual multilayer electronic devices, a multilayer device 65, a multilayer device 66, a multilayer device C665, a multilayer device 67, a multilayer device 675, and a multilayer device μ (9). The design system 100 of the present invention receives the design for each of the different multi-layer devices 655, 660, 665, 670, 675, 680 in order to design the manufacturing assembly 65: • The number is not on the board, the device is not counted, the design system! (10) Pointing to the design of a plurality of devices on the single-layer board. The compatibility of individual modules can be extended to multiple electronic devices on the board. In the first configuration, the multilayer device 66〇' 665' 67〇' 675' 68〇 is the same design. In a second configuration, the 695, 660, 665, 670, 675, 680 are manufactured in different ways as a PWB (four), and then Divided into individual multi-layer devices. Capacity 1: The ability to factor in this type of manufacturing component provides the opportunity to reduce production costs. The cost of manufacturing a multi-layer board is much lower than, for example, the manufacture of six multi-layer boards to 115846.doc -21 - 200806114. Although the above system and method are mainly described in terms of a PCB, the present invention is also applicable to VLSI design and 3D micro system design. It is to be understood that the above-described embodiments are merely illustrative of the principles of the invention. It is obvious to those skilled in the art that various modifications and changes can be made in the present invention without departing from the spirit and scope of the invention. BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a block diagram of a design system in accordance with the principles of the present invention; Figure 2 is a block diagram of the library of Figure 1, including further details of a module in accordance with the principles of the present invention; Figure 3 is a conventional six-layer printing Figure 4 is a block diagram of a tile-like module in accordance with the principles of the present invention; Figure 5 is a block diagram of the module - the module is used for root three-dimensional tile, · 0 "Figure 6 has a mode (d) a top view of a horizontal tile-like printed circuit board having vertical connectors in accordance with the principles of the present invention; and Figure 7 is a side view of a vertical tile-shaped D three-dimensional microsystem 8 in accordance with the principles of the present invention. The modularized internal printed circuit board of the inventive principle has a flow chart according to the present invention, which is based on the original diagram of the present invention, which is a manufacturing component of Fang Shigang 9 ο ^ φ ^ Ghost diagram, the assembly includes a plurality of electronic devices in accordance with the principles of the present invention. Ten's Day 115846.doc -22- 200806114 [Description of Main Components] 100 105 110 115 120, 135, 355 125, 360

130 、 365 140 145 150 155 160 200 、 205 、 210 、 215 220 、 225 、 230 、 235 φ 240 、 245 、 250 、 255 260 、 265 、 270 、 275 300 305 310 設計系統 控制器 布局及設計系統 庫 無線模組 功率模組 感應器模組 設計規則 系統介面 設計參數 設計 設計目錄 設計資料 設計規則 信號介面 實體介面 多層印刷電路板 頂層 底層 315 、 320 、 325 、 330 335 340 345 内部信號層 絕緣材料 通道 表面安裝零件 115846.doc -23 200806114130, 365 140 145 150 155 160 200 , 205 , 210 , 215 220 , 225 , 230 , 235 φ 240 , 245 , 250 , 255 260 , 265 , 270 , 275 300 305 310 Design System Controller Layout and Design System Library Wireless Module Power Module Sensor Module Design Rule System Interface Design Parameter Design Design Catalog Design Data Design Rule Signal Interface Physical Interface Multilayer Printed Circuit Board Top Layer 315, 320, 325, 330 335 340 345 Internal Signal Layer Insulation Material Channel Surface Mount Parts 115846.doc -23 200806114

350 、 450 、 550 PCB 370 電力連接點 375 接地連接點 380 時脈連接點 385 資料連接點 390 > 420 基準記號 400 、 455 、 460 、 465 、 470 模組 405 、 410 連接 415 垂直互連介面 480 、 520 垂直連接器 500 三維微系統 505 、 510 1C 5 15 封裝層 555 頂部 560 、 565 、 570 、 575 電路層 600 ' 605 、 610 、 615 、 620 、 625 步驟 650 製造組件 65 5 多層裝置A 660 多層裝置B 665 多層裝置C 670 多層裝置D 675 多層裝置E 680 多層裝置F 115846.doc -24-350, 450, 550 PCB 370 Power Connection Point 375 Ground Connection Point 380 Clock Connection Point 385 Data Connection Point 390 > 420 Reference Mark 400, 455, 460, 465, 470 Module 405, 410 Connection 415 Vertical Interconnect Interface 480 520 vertical connector 500 three-dimensional microsystem 505, 510 1C 5 15 encapsulation layer 555 top 560, 565, 570, 575 circuit layer 600 ' 605 , 610 , 615 , 620 , 625 step 650 manufacturing component 65 5 multi-layer device A 660 multi-layer Device B 665 Multi-layer device C 670 Multi-layer device D 675 Multi-layer device E 680 Multi-layer device F 115846.doc -24-

Claims (1)

200806114 十、申請專利範圍: 1 · 一種用以設計電子硬體裝置之系統,包括: 一系統介面,其接收多個電子設計參數作為輸入; . -庫’其儲存複數個模組,各該模組包括—電子零件 • 之一設計,其中該複數個模組 7 夕杈組與該等模組 之至乂 —其它者相容;及 。。㈣裔,#與該系統介面s通及與該庫連通,該控 • 制益存取該庫以擷取多個相容模組,以回應該等設計參 數’其中該等操取模組形成—設計之至少—部分以用於 一電子硬體裝置。 2·如凊求項2之系統,其中該等模組之至少一模組及至少 其匕者具有多個相容介面。 3 · 士明求項2之系統,其中該等相容介面係電子地相容。 4·如π求項2之系統,其中該等相容介面係形式因子相 ’ θ长項4之系統’其中該等相容介面係基準記號位置 相容。 月求項4之系統,其中該等相容介面係通道位置相 容。 7 士口今 明/項1之系統,其中該庫尚包括儲存一組設計規 及其中該控制器應用該組設計規則以驗證該電子硬 體裝置之設計。 8 士口 ^ 月二項1之系統,其中各模組尚包括一組設計規則, 中5亥控制器應用屬於該等選取模組之該組設計規 115846.doc 200806114 則,以驗證該電子硬體裝置之設計。 9·如請求項!之系統,其中藉由至少一特徵以定義各模 組。 、 1 〇_如請求項1之系統,复中拉ώ使从处M p / ,、甲耩由其功能以疋義各模組。 1 1 ·如請求J音Ί β 、 ”、、、’其中該系統介面接受用於複數個電 子更體羞置之多個電子設計參數,及該控制器擷取多個 模、且以回應该等電子設計參數,俾在一單一製造組件中 形成複數個電子硬體裝置。 ’长項11之系統,其中該單一製造組件係複數個印刷 電路裝置。 13 · 士明求項12之系統,其中該複數個電子硬體裝置係同一 14. 士明求項12之系統,其中該複數個電子硬體裝置不是同 —設計。 15. 如請求項丨之系統,其中該電子零件係一功率模組。 士 °月求項1之系統’其中該電子零件係一無線模組。 17. 如凊求項i之系統,其中該電子硬體裝置係印刷線路 板。’ 18. 如2求項i之系統,其中該電子硬體裝置係—微晶片。 裝置 19. 如請求項丨之系統,其中該電子硬體裝置係一晶圓堆疊 置内部結構 20·如巧求項1之系統,其中該模組係一電子裝 之一 1’ 士明求項2〇之系統,其中該電子裝置係一印刷電路板 115846.doc 200806114 22· —種用以設計電子硬體裝置之 戍,包括: 提供一儲存複數個模組之庫, 杜夕一抓舛,甘山 各邊模組包括一電子零 件之 °又σ十,其中該複數個模龟 組之至少一其它者相容;、、之至少-模組與該等模 接收複數姐電子設計參數; 從該庫選擇至少:模組以回應該等電子設計參數;及 從該等模組形成—電子硬體裝置之至少.一部分設計。 2 3 .如晴求項2 2之方法,复中兮 月& /、T 3、擇步驟包括基於模組功 而從該庫選擇該至少二模組。 24.如請求項22之方法,复由兮、呢t ,、中違璲擇步驟包括基於至少一特 徵而從該庫選擇該至少二模組。 該 2 5 ·如請求項22之方法,Λ a紅产 南匕括應用一組設計規則以檢查 電子硬體裝置設計之步驟。 2 6.如睛求項2 2之方法,复中兮 /、肀°亥形成步驟包括在一單一製造 組件中形成複數個電子硬體裝置。 27·如請求項26之方法,复由咕… 二 /、中5亥%成步驟尚包括在一單一製 造組件中形成多個電子硬體裝置。 28. 如明求項27之方去,其中在該單一製造組件中之該等電 子硬體裝置係同一設計。 29. 如請求項27之方法,其中該等電子硬體裝置不是同一設 計。 30. -種電腦可讀取媒體’其包括用以設計多個電子裝置之 碼,該碼可用以: 115846.doc 200806114 提供一儲存複數個模組之庫,各該模組包括一電、 件之一設計,其中該複數個模組之至少一模組與該等才= 組之至少一其它者相容; 異 接收複數個電子設計參數; 攸该庫選擇至少二模組以回應該等電子設計參數;及 從該等模組形成一電子硬體裝置之至少一部分設計。200806114 X. Patent application scope: 1 · A system for designing an electronic hardware device, comprising: a system interface that receives a plurality of electronic design parameters as inputs; a library that stores a plurality of modules, each of which The group includes a design of one of the electronic components, wherein the plurality of modules 7 are compatible with the other modules of the modules; . (4) Descendants, # communicate with the system interface and communicate with the library, the control and benefit access to the library to retrieve a plurality of compatible modules, in order to return to the design parameters, wherein the operation modules are formed - At least part of the design - for an electronic hardware device. 2. The system of claim 2, wherein at least one of the modules and at least one of the modules has a plurality of compatible interfaces. 3 · The system of Shiming 2, wherein the compatible interfaces are electronically compatible. 4. A system according to π, wherein the compatible interface is a system of factor θ θ long term 4 wherein the compatible interfaces are compatible with the reference mark positions. The system of claim 4, wherein the compatible interfaces are channel-compatible. 7 The system of Shikou Jinming/Item 1, wherein the library further comprises storing a set of design rules and wherein the controller applies the set of design rules to verify the design of the electronic hardware device. 8 士口^月二项1的系统, in which each module still includes a set of design rules, the 5H controller application belongs to the set of design rules 115846.doc 200806114 of the selected modules to verify the electronic hard The design of the body device. 9. If requested! A system in which each of the modules is defined by at least one feature. 1 〇 _ As in the system of claim 1, the 中 ώ 从 从 从 M M M M M M M M M M M M M M M M M M M M M M M M 1 1 · If request J Ί β , ”, 、, ′′, the system interface accepts multiple electronic design parameters for a plurality of electronic body more shame, and the controller takes multiple moduli and responds The electronic design parameters are used to form a plurality of electronic hardware devices in a single manufacturing component. The system of the long term 11 wherein the single manufacturing component is a plurality of printed circuit devices. 13 · The system of Shiming Item 12, wherein The plurality of electronic hardware devices are the same system of 14. The invention of the item 12, wherein the plurality of electronic hardware devices are not the same design. 15. The system of claiming the electronic device is a power module The system of the item 1 of the month 1 wherein the electronic component is a wireless module. 17. The system of claim i, wherein the electronic hardware device is a printed circuit board. ' 18. System, wherein the electronic hardware device is a microchip. The device 19. The system of claim 1, wherein the electronic hardware device is a wafer stacked internal structure 20, such as the system of claim 1, wherein the module Group one electron One of the 1's system of the present invention, wherein the electronic device is a printed circuit board 115846.doc 200806114 22 - a design for designing an electronic hardware device, comprising: providing a plurality of modules for storing The library, Du Xiyi grabs, each side of the Ganshan module includes an electronic component and σ, wherein at least one of the plurality of die turtle groups is compatible; at least - the module and the modules Receiving a plurality of electronic design parameters of the sister; selecting at least: the module to return to the electronic design parameters; and forming from the modules - at least a part of the design of the electronic hardware device. 2 3. If the solution is 2 2 The method, the resetting of the month & /, T 3, the selecting step comprises selecting the at least two modules from the library based on the module function. 24. The method of claim 22, the complexing, the t, the middle The discarding step includes selecting the at least two modules from the library based on the at least one feature. The method of claim 22, wherein the method of applying the item 22 applies a set of design rules to check the design of the electronic hardware device. Steps. 2 6. If the eye is 2 2 The method of forming, resolving, and forming a plurality of electronic hardware devices comprises forming a plurality of electronic hardware devices in a single manufacturing component. 27. The method of claim 26 is repeated by 咕... Included in the formation of a plurality of electronic hardware devices in a single fabricated component. 28. As claimed in claim 27, wherein the electronic hardware devices in the single fabricated component are of the same design. The method wherein the electronic hardware devices are not of the same design. 30. A computer readable medium comprising a code for designing a plurality of electronic devices, the code being usable by: 115846.doc 200806114 providing a plurality of storage a library of modules, each of the modules comprising a design of one of the plurality of modules, wherein at least one module of the plurality of modules is compatible with at least one of the other groups; the plurality of electronic design parameters are received differently The library selects at least two modules to return to the electronic design parameters; and forms at least a portion of the design of the electronic hardware device from the modules. 115846.doc115846.doc
TW095139915A 2005-10-27 2006-10-27 System and method for modular electronics design TW200806114A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US25983705A 2005-10-27 2005-10-27

Publications (1)

Publication Number Publication Date
TW200806114A true TW200806114A (en) 2008-01-16

Family

ID=37968609

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095139915A TW200806114A (en) 2005-10-27 2006-10-27 System and method for modular electronics design

Country Status (2)

Country Link
TW (1) TW200806114A (en)
WO (1) WO2007050989A2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9026962B2 (en) 2012-05-30 2015-05-05 Gumstix, Inc. Integrated electronic design automation system
CN105608254B (en) * 2015-12-15 2018-08-17 宁波力芯科信息科技有限公司 A kind of the Automation Design method and platform towards Intelligent hardware system development
CN110705205B (en) * 2019-09-30 2023-06-02 深圳市德晟达电子科技有限公司 Simple and practical hardware design method

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6292925B1 (en) * 1998-03-27 2001-09-18 Xilinx, Inc. Context-sensitive self implementing modules

Also Published As

Publication number Publication date
WO2007050989A2 (en) 2007-05-03
WO2007050989A3 (en) 2009-05-07

Similar Documents

Publication Publication Date Title
CN101690435B (en) Method of forming a substrate core structure using microvia laser drilling and conductive layer pre-patterning and substrate core structure formed according to the method
KR101289140B1 (en) Embedded substrate and a method for manufacturing the same
DK151680B (en) CIRCUIT PLATE WITH MULTIPLE PLAN LEADERS 'MODELS AND PROCEDURE FOR ITS MANUFACTURING
CN105764236B (en) A kind of processing method and PCB of PCB
CN101690436A (en) Method of forming a multilayer substrate core structure using sequential microvia laser drilling and substrate core structure formed according to the method
CN106385765B (en) A kind of determination method and system of signal wire reference layer
TW200806141A (en) Method of making circuitized substrate
US20170142828A1 (en) Dummy core plus plating resist restrict resin process and structure
CN105555014A (en) Printed circuit board, electronic module and method of manufacturing the same
TW200806114A (en) System and method for modular electronics design
CN103578804B (en) A kind of preparation method of rigid/flexible combined printed circuit board
US9900983B2 (en) Modular printed circuit board electrical integrity and uses
US20100270066A1 (en) Printed circuit board design system and method
EP1802187A2 (en) Printed circuit board and manufacturing method thereof
KR101023372B1 (en) Pcb manufacturing method with a plurality of differently-layered structures and pcb thereby
KR20190028638A (en) 3D wire bullock structure and method
US20130221068A1 (en) Implementing interleaved-dielectric joining of multi-layer laminates
CN104023484A (en) Manufacturing method of printed circuit board overlaid through hole structure
CN211531434U (en) Step type circuit board
CN100556245C (en) Be used to form Wiring board member, its manufacture method and the multi-layer wire substrate of multi-layer wire substrate
JP2009031832A (en) Wiring design device
JP2002076636A (en) Wiring board and its manufacturing method
EP3269215B1 (en) Printed circuit board and method manufacturing the same
US20120152595A1 (en) Multilayer printed circuit board and method of manufacturing the same
JP2012003460A (en) Analyzing process for 3d mounting boards