TW200739820A - Silicon deposition over dual surface orientation substrates to promote uniform polishing - Google Patents
Silicon deposition over dual surface orientation substrates to promote uniform polishingInfo
- Publication number
- TW200739820A TW200739820A TW096106344A TW96106344A TW200739820A TW 200739820 A TW200739820 A TW 200739820A TW 096106344 A TW096106344 A TW 096106344A TW 96106344 A TW96106344 A TW 96106344A TW 200739820 A TW200739820 A TW 200739820A
- Authority
- TW
- Taiwan
- Prior art keywords
- over
- silicon
- gate electrodes
- layer
- surface orientation
- Prior art date
Links
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title abstract 6
- 229910052710 silicon Inorganic materials 0.000 title abstract 6
- 239000010703 silicon Substances 0.000 title abstract 6
- 238000005498 polishing Methods 0.000 title abstract 2
- 239000000758 substrate Substances 0.000 title abstract 2
- 230000008021 deposition Effects 0.000 title 1
- 230000009977 dual effect Effects 0.000 title 1
- 238000000151 deposition Methods 0.000 abstract 2
- 238000000034 method Methods 0.000 abstract 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 2
- 229910021419 crystalline silicon Inorganic materials 0.000 abstract 1
- 239000000463 material Substances 0.000 abstract 1
- 239000002184 metal Substances 0.000 abstract 1
- 150000004767 nitrides Chemical class 0.000 abstract 1
- 229920005591 polysilicon Polymers 0.000 abstract 1
- 239000004065 semiconductor Substances 0.000 abstract 1
Classifications
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Ceramic Engineering (AREA)
- Materials Engineering (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Element Separation (AREA)
- Electrodes Of Semiconductors (AREA)
- Recrystallisation Techniques (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/375,796 US7754587B2 (en) | 2006-03-14 | 2006-03-14 | Silicon deposition over dual surface orientation substrates to promote uniform polishing |
Publications (1)
Publication Number | Publication Date |
---|---|
TW200739820A true TW200739820A (en) | 2007-10-16 |
Family
ID=38510132
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW096106344A TW200739820A (en) | 2006-03-14 | 2007-02-26 | Silicon deposition over dual surface orientation substrates to promote uniform polishing |
Country Status (5)
Country | Link |
---|---|
US (1) | US7754587B2 (zh) |
KR (1) | KR20080109757A (zh) |
CN (1) | CN101401297B (zh) |
TW (1) | TW200739820A (zh) |
WO (1) | WO2007106627A2 (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI508297B (zh) * | 2012-11-15 | 2015-11-11 | Globalfoundries Us Inc | 包含絕緣體上半導體區和主體區之半導體結構及其形成方法 |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7524707B2 (en) * | 2005-08-23 | 2009-04-28 | Freescale Semiconductor, Inc. | Modified hybrid orientation technology |
US7986029B2 (en) * | 2005-11-08 | 2011-07-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Dual SOI structure |
US7776679B2 (en) * | 2007-07-20 | 2010-08-17 | Stmicroelectronics Crolles 2 Sas | Method for forming silicon wells of different crystallographic orientations |
CN101828260A (zh) * | 2007-10-18 | 2010-09-08 | Nxp股份有限公司 | 在体半导体晶片中制造局域化绝缘体上半导体(soi)结构的方法 |
US9595479B2 (en) * | 2008-07-08 | 2017-03-14 | MCube Inc. | Method and structure of three dimensional CMOS transistors with hybrid crystal orientations |
US8093084B2 (en) | 2009-04-30 | 2012-01-10 | Freescale Semiconductor, Inc. | Semiconductor device with photonics |
CN101986435B (zh) * | 2010-06-25 | 2012-12-19 | 中国科学院上海微系统与信息技术研究所 | 防止浮体及自加热效应的mos器件结构的制造方法 |
US8614478B2 (en) * | 2010-07-26 | 2013-12-24 | Infineon Technologies Austria Ag | Method for protecting a semiconductor device against degradation, a semiconductor device protected against hot charge carriers and a manufacturing method therefor |
US8786012B2 (en) | 2010-07-26 | 2014-07-22 | Infineon Technologies Austria Ag | Power semiconductor device and a method for forming a semiconductor device |
US9105660B2 (en) * | 2011-08-17 | 2015-08-11 | United Microelectronics Corp. | Fin-FET and method of forming the same |
US9490161B2 (en) * | 2014-04-29 | 2016-11-08 | International Business Machines Corporation | Channel SiGe devices with multiple threshold voltages on hybrid oriented substrates, and methods of manufacturing same |
US20170018427A1 (en) * | 2015-07-15 | 2017-01-19 | Applied Materials, Inc. | Method of selective epitaxy |
US10727374B2 (en) * | 2015-09-04 | 2020-07-28 | Seoul Semiconductor Co., Ltd. | Transparent conductive structure and formation thereof |
US10438838B2 (en) * | 2016-09-01 | 2019-10-08 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor structure and related method |
US11004958B2 (en) | 2018-10-31 | 2021-05-11 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method of manufacturing a semiconductor device and a semiconductor device |
US20230024779A1 (en) * | 2021-07-22 | 2023-01-26 | Changxin Memory Technologies, Inc. | Semiconductor structure and method for manufacturing semiconductor structure |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3017860B2 (ja) * | 1991-10-01 | 2000-03-13 | 株式会社東芝 | 半導体基体およびその製造方法とその半導体基体を用いた半導体装置 |
US6159825A (en) | 1997-05-12 | 2000-12-12 | Silicon Genesis Corporation | Controlled cleavage thin film separation process using a reusable substrate |
US6214653B1 (en) | 1999-06-04 | 2001-04-10 | International Business Machines Corporation | Method for fabricating complementary metal oxide semiconductor (CMOS) devices on a mixed bulk and silicon-on-insulator (SOI) substrate |
US6617226B1 (en) * | 1999-06-30 | 2003-09-09 | Kabushiki Kaisha Toshiba | Semiconductor device and method for manufacturing the same |
US6649494B2 (en) | 2001-01-29 | 2003-11-18 | Matsushita Electric Industrial Co., Ltd. | Manufacturing method of compound semiconductor wafer |
US20020175370A1 (en) | 2001-05-22 | 2002-11-28 | Motorola, Inc. | Hybrid semiconductor field effect structures and methods |
US20030017622A1 (en) | 2001-07-20 | 2003-01-23 | Motorola, Inc. | Structure and method for fabricating semiconductor structures with coplanar surfaces |
US6815278B1 (en) | 2003-08-25 | 2004-11-09 | International Business Machines Corporation | Ultra-thin silicon-on-insulator and strained-silicon-direct-on-insulator with hybrid crystal orientations |
US7208815B2 (en) * | 2004-05-28 | 2007-04-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | CMOS logic gate fabricated on hybrid crystal orientations and method of forming thereof |
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Cited By (2)
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---|---|---|---|---|
TWI508297B (zh) * | 2012-11-15 | 2015-11-11 | Globalfoundries Us Inc | 包含絕緣體上半導體區和主體區之半導體結構及其形成方法 |
TWI552354B (zh) * | 2012-11-15 | 2016-10-01 | 格羅方德半導體公司 | 包含絕緣體上半導體區和主體區之半導體結構及其形成方法 |
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CN101401297B (zh) | 2011-09-14 |
CN101401297A (zh) | 2009-04-01 |
KR20080109757A (ko) | 2008-12-17 |
US7754587B2 (en) | 2010-07-13 |
US20070218654A1 (en) | 2007-09-20 |
WO2007106627A2 (en) | 2007-09-20 |
WO2007106627A3 (en) | 2007-12-13 |
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