TW200723991A - Laminated product in structure including glass-cloth contained resin layer and method for manufacturing the same - Google Patents

Laminated product in structure including glass-cloth contained resin layer and method for manufacturing the same

Info

Publication number
TW200723991A
TW200723991A TW095129910A TW95129910A TW200723991A TW 200723991 A TW200723991 A TW 200723991A TW 095129910 A TW095129910 A TW 095129910A TW 95129910 A TW95129910 A TW 95129910A TW 200723991 A TW200723991 A TW 200723991A
Authority
TW
Taiwan
Prior art keywords
resin layer
contained resin
cloth contained
structure including
laminated product
Prior art date
Application number
TW095129910A
Other languages
English (en)
Inventor
Yoshihiro Machida
Kosaku Harayama
Takaharu Yamano
Original Assignee
Shinko Electric Ind Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Ind Co filed Critical Shinko Electric Ind Co
Publication of TW200723991A publication Critical patent/TW200723991A/zh

Links

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B3/00—Layered products comprising a layer with external or internal discontinuities or unevennesses, or a layer of non-planar shape; Layered products comprising a layer having particular features of form
    • B32B3/26—Layered products comprising a layer with external or internal discontinuities or unevennesses, or a layer of non-planar shape; Layered products comprising a layer having particular features of form characterised by a particular shape of the outline of the cross-section of a continuous layer; characterised by a layer with cavities or internal voids ; characterised by an apertured layer
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B32—LAYERED PRODUCTS
    • B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B17/00—Layered products essentially comprising sheet glass, or glass, slag, or like fibres
    • B32B17/06—Layered products essentially comprising sheet glass, or glass, slag, or like fibres comprising glass as the main or only constituent of a layer, next to another layer of a specific material
    • B32B17/10—Layered products essentially comprising sheet glass, or glass, slag, or like fibres comprising glass as the main or only constituent of a layer, next to another layer of a specific material of synthetic resin
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0313—Organic insulating material
    • H05K1/0353—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement
    • H05K1/0366—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement reinforced, e.g. by fibres, fabrics
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
    • H05K3/0032—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
    • H05K3/0032—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
    • H05K3/0035—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material of blind holes, i.e. having a metal layer at the bottom
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4673—Application methods or materials of intermediate insulating layers not specially adapted to any one of the previous methods of adding a circuit layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0183—Dielectric layers
    • H05K2201/0195—Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Laminated Bodies (AREA)
TW095129910A 2005-08-25 2006-08-15 Laminated product in structure including glass-cloth contained resin layer and method for manufacturing the same TW200723991A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005244219A JP2007059689A (ja) 2005-08-25 2005-08-25 ガラスクロス含有樹脂層を含む構造の積層製品及びその製造方法

Publications (1)

Publication Number Publication Date
TW200723991A true TW200723991A (en) 2007-06-16

Family

ID=37606848

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095129910A TW200723991A (en) 2005-08-25 2006-08-15 Laminated product in structure including glass-cloth contained resin layer and method for manufacturing the same

Country Status (6)

Country Link
US (1) US20070045811A1 (zh)
EP (1) EP1758437A3 (zh)
JP (1) JP2007059689A (zh)
KR (1) KR20070024373A (zh)
CN (1) CN1921732A (zh)
TW (1) TW200723991A (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8247705B2 (en) 2009-12-31 2012-08-21 Unimicron Technology Corp. Circuit substrate and manufacturing method thereof

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI478810B (zh) * 2008-03-25 2015-04-01 Ajinomoto Kk An insulating resin sheet, and a multilayer printed circuit board using the same
JP2010034197A (ja) * 2008-07-28 2010-02-12 Fujitsu Ltd ビルドアップ基板
KR101056898B1 (ko) * 2008-09-11 2011-08-12 주식회사 두산 다층 인쇄회로기판 및 그 제조방법
US9941219B2 (en) 2014-09-19 2018-04-10 Intel Corporation Control of warpage using ABF GC cavity for embedded die package

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09199858A (ja) * 1996-01-19 1997-07-31 Shinko Electric Ind Co Ltd 多層配線基板の製造方法
DE19681758B4 (de) * 1996-06-14 2006-09-14 Ibiden Co., Ltd. Einseitiges Schaltkreissubstrat für mehrlagige Schaltkreisplatine, mehrlagige Schaltkreisplatine und Verfahren zur Herstellung selbiger
US6284308B2 (en) * 1998-12-25 2001-09-04 Victor Company Of Japan, Ltd. Manufacturing method of printed circuit board
JP2000255001A (ja) * 1999-03-05 2000-09-19 Ibiden Co Ltd 積層基板およびその絶縁層
US6423905B1 (en) * 2000-05-01 2002-07-23 International Business Machines Corporation Printed wiring board with improved plated through hole fatigue life
US6459046B1 (en) * 2000-08-28 2002-10-01 Matsushita Electric Industrial Co., Ltd. Printed circuit board and method for producing the same
EP1194020A3 (en) * 2000-09-27 2004-03-31 Matsushita Electric Industrial Co., Ltd. Resin board, manufacturing process for resin board, connection medium body, circuit board and manufacturing process for circuit board
JP4055474B2 (ja) * 2002-05-28 2008-03-05 株式会社トッパンＮｅｃサーキットソリューションズ 多層回路板の製造方法
JP2004356232A (ja) 2003-05-27 2004-12-16 Matsushita Electric Works Ltd 多層プリント配線板の製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8247705B2 (en) 2009-12-31 2012-08-21 Unimicron Technology Corp. Circuit substrate and manufacturing method thereof

Also Published As

Publication number Publication date
EP1758437A2 (en) 2007-02-28
KR20070024373A (ko) 2007-03-02
EP1758437A3 (en) 2007-07-25
US20070045811A1 (en) 2007-03-01
CN1921732A (zh) 2007-02-28
JP2007059689A (ja) 2007-03-08

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