TW200629543A - An anti-fuse cell and its manufacturing process - Google Patents

An anti-fuse cell and its manufacturing process

Info

Publication number
TW200629543A
TW200629543A TW094144994A TW94144994A TW200629543A TW 200629543 A TW200629543 A TW 200629543A TW 094144994 A TW094144994 A TW 094144994A TW 94144994 A TW94144994 A TW 94144994A TW 200629543 A TW200629543 A TW 200629543A
Authority
TW
Taiwan
Prior art keywords
fuse cell
manufacturing process
drain
mos transistor
metal silicide
Prior art date
Application number
TW094144994A
Other languages
English (en)
Inventor
Bertrand Borot
Roberto Maurizio Gonella
Sebastien Fabre
Original Assignee
St Microelectronics Crolles 2
Koninkl Philips Electronics Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Crolles 2, Koninkl Philips Electronics Nv filed Critical St Microelectronics Crolles 2
Publication of TW200629543A publication Critical patent/TW200629543A/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5252—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising anti-fuses, i.e. connections having their state changed from non-conductive to conductive
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
TW094144994A 2004-12-27 2005-12-19 An anti-fuse cell and its manufacturing process TW200629543A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP04107005 2004-12-27

Publications (1)

Publication Number Publication Date
TW200629543A true TW200629543A (en) 2006-08-16

Family

ID=35976599

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094144994A TW200629543A (en) 2004-12-27 2005-12-19 An anti-fuse cell and its manufacturing process

Country Status (7)

Country Link
US (1) US7989914B2 (zh)
EP (1) EP1831927B1 (zh)
JP (1) JP2008526007A (zh)
CN (1) CN100472773C (zh)
DE (1) DE602005020979D1 (zh)
TW (1) TW200629543A (zh)
WO (1) WO2006069982A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI511144B (zh) * 2014-04-03 2015-12-01 Sidense Corp 抗熔絲記憶單元

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100187638A1 (en) * 2004-12-27 2010-07-29 Koninklijke Philips Electronics N.V. Anti-fuse cell and its manufacturing process
US7820492B2 (en) * 2007-05-25 2010-10-26 Kabushiki Kaisha Toshiba Electrical fuse with metal silicide pipe under gate electrode
JP4510057B2 (ja) 2007-06-21 2010-07-21 株式会社東芝 不揮発性半導体記憶装置
US8692310B2 (en) 2009-02-09 2014-04-08 Spansion Llc Gate fringing effect based channel formation for semiconductor device
US8049299B2 (en) * 2009-02-25 2011-11-01 Freescale Semiconductor, Inc. Antifuses with curved breakdown regions
US8542517B2 (en) 2011-06-13 2013-09-24 International Business Machines Corporation Low voltage programmable mosfet antifuse with body contact for diffusion heating
CN102254846B (zh) * 2011-07-04 2016-01-27 上海华虹宏力半导体制造有限公司 半导体器件中金属硅化物层电阻的仿真方法
US8815736B2 (en) * 2011-08-25 2014-08-26 Globalfoundries Inc. Methods of forming metal silicide regions on semiconductor devices using different temperatures
CN103456710B (zh) * 2012-06-04 2016-06-01 中芯国际集成电路制造(上海)有限公司 Mos器件及其制造方法
US9455222B1 (en) * 2015-12-18 2016-09-27 Texas Instruments Incorporated IC having failsafe fuse on field dielectric

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5019878A (en) * 1989-03-31 1991-05-28 Texas Instruments Incorporated Programmable interconnect or cell using silicided MOS transistors
JP3086247B2 (ja) * 1990-11-27 2000-09-11 株式会社東芝 半導体メモリセル
JPH04294577A (ja) * 1991-03-22 1992-10-19 Ricoh Co Ltd プログラム可能な半導体装置
US5298784A (en) * 1992-03-27 1994-03-29 International Business Machines Corporation Electrically programmable antifuse using metal penetration of a junction
US6794726B2 (en) * 2002-04-17 2004-09-21 International Business Machines Corporation MOS antifuse with low post-program resistance
US20040124458A1 (en) 2002-12-31 2004-07-01 Chandrasekharan Kothandaraman Programmable fuse device
JP2004241558A (ja) * 2003-02-05 2004-08-26 Toshiba Corp 不揮発性半導体記憶装置及びその製造方法、半導体集積回路及び不揮発性半導体記憶装置システム
US7180102B2 (en) * 2003-09-30 2007-02-20 Agere Systems Inc. Method and apparatus for using cobalt silicided polycrystalline silicon for a one time programmable non-volatile semiconductor memory
US7439168B2 (en) * 2004-10-12 2008-10-21 Dcg Systems, Inc Apparatus and method of forming silicide in a localized manner

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI511144B (zh) * 2014-04-03 2015-12-01 Sidense Corp 抗熔絲記憶單元

Also Published As

Publication number Publication date
JP2008526007A (ja) 2008-07-17
DE602005020979D1 (de) 2010-06-10
EP1831927B1 (en) 2010-04-28
US7989914B2 (en) 2011-08-02
EP1831927A1 (en) 2007-09-12
CN101091249A (zh) 2007-12-19
CN100472773C (zh) 2009-03-25
US20090102014A1 (en) 2009-04-23
WO2006069982A1 (en) 2006-07-06

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