TW200619938A - System and method for canceling write back operation during simultaneous snoop push or snoop kill operation in write back caches - Google Patents

System and method for canceling write back operation during simultaneous snoop push or snoop kill operation in write back caches

Info

Publication number
TW200619938A
TW200619938A TW094118179A TW94118179A TW200619938A TW 200619938 A TW200619938 A TW 200619938A TW 094118179 A TW094118179 A TW 094118179A TW 94118179 A TW94118179 A TW 94118179A TW 200619938 A TW200619938 A TW 200619938A
Authority
TW
Taiwan
Prior art keywords
write back
snoop
cache
push
kill
Prior art date
Application number
TW094118179A
Other languages
English (en)
Inventor
Roy Moonseuk Kim
Yasukichi Okawa
Thuong Quang Truong
Original Assignee
Sony Computer Entertainment Inc
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Computer Entertainment Inc, Ibm filed Critical Sony Computer Entertainment Inc
Publication of TW200619938A publication Critical patent/TW200619938A/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12—Replacement control
    • G06F12/121—Replacement control using replacement algorithms
    • G06F12/126—Replacement control using replacement algorithms with special data handling, e.g. priority of data or instructions, handling errors or pinning
    • G06F12/127—Replacement control using replacement algorithms with special data handling, e.g. priority of data or instructions, handling errors or pinning using additional replacement algorithms
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815—Cache consistency protocols
    • G06F12/0831—Cache consistency protocols using a bus scheme, e.g. with bus monitoring or watching means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12—Replacement control
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0804—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with main memory updating

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Storage Device Security (AREA)
TW094118179A 2004-06-03 2005-06-02 System and method for canceling write back operation during simultaneous snoop push or snoop kill operation in write back caches TW200619938A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/860,426 US7353341B2 (en) 2004-06-03 2004-06-03 System and method for canceling write back operation during simultaneous snoop push or snoop kill operation in write back caches

Publications (1)

Publication Number Publication Date
TW200619938A true TW200619938A (en) 2006-06-16

Family

ID=35094384

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094118179A TW200619938A (en) 2004-06-03 2005-06-02 System and method for canceling write back operation during simultaneous snoop push or snoop kill operation in write back caches

Country Status (7)

Country Link
US (1) US7353341B2 (zh)
EP (1) EP1725938A1 (zh)
JP (1) JP4577729B2 (zh)
KR (1) KR20060102565A (zh)
CN (1) CN1910560A (zh)
TW (1) TW200619938A (zh)
WO (1) WO2005121970A1 (zh)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8214601B2 (en) * 2004-07-30 2012-07-03 Hewlett-Packard Development Company, L.P. Purging without write-back of cache lines containing spent data
US7941585B2 (en) * 2004-09-10 2011-05-10 Cavium Networks, Inc. Local scratchpad and data caching system
KR100668326B1 (ko) * 2005-02-01 2007-01-12 삼성전자주식회사 3차원 그래픽스 데이터를 랜더링하는 방법 및 장치
GB2484088B (en) * 2010-09-28 2019-08-07 Advanced Risc Mach Ltd Coherency control with writeback ordering
JP2013069139A (ja) * 2011-09-22 2013-04-18 Fujitsu Ltd 演算処理装置及び演算処理装置の制御方法
CN102902631B (zh) * 2012-09-18 2015-04-15 杭州中天微系统有限公司 一种避免读缺失时数据回写的多处理器核间传输方法
US9489305B2 (en) * 2014-12-16 2016-11-08 Qualcomm Incorporated System and method for managing bandwidth and power consumption through data filtering
US10073776B2 (en) * 2016-06-23 2018-09-11 Advanced Micro Device, Inc. Shadow tag memory to monitor state of cachelines at different cache level

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5829027A (en) * 1994-05-04 1998-10-27 Compaq Computer Corporation Removable processor board having first, second and third level cache system for use in a multiprocessor computer system
US5684977A (en) * 1995-03-31 1997-11-04 Sun Microsystems, Inc. Writeback cancellation processing system for use in a packet switched cache coherent multiprocessor system
US5655100A (en) * 1995-03-31 1997-08-05 Sun Microsystems, Inc. Transaction activation processor for controlling memory transaction execution in a packet switched cache coherent multiprocessor system
US5829033A (en) * 1996-07-01 1998-10-27 Sun Microsystems, Inc. Optimizing responses in a coherent distributed electronic system including a computer system
US6275907B1 (en) * 1998-11-02 2001-08-14 International Business Machines Corporation Reservation management in a non-uniform memory access (NUMA) data processing system
US6502171B1 (en) * 1999-08-04 2002-12-31 International Business Machines Corporation Multiprocessor system bus with combined snoop responses explicitly informing snoopers to scarf data
US6349367B1 (en) * 1999-08-04 2002-02-19 International Business Machines Corporation Method and system for communication in which a castout operation is cancelled in response to snoop responses

Also Published As

Publication number Publication date
KR20060102565A (ko) 2006-09-27
EP1725938A1 (en) 2006-11-29
US20050273563A1 (en) 2005-12-08
JP4577729B2 (ja) 2010-11-10
JP2007533014A (ja) 2007-11-15
WO2005121970A1 (en) 2005-12-22
CN1910560A (zh) 2007-02-07
US7353341B2 (en) 2008-04-01

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