TW200531298A - Back-contact solar cells and methods for fabrication - Google Patents

Abstract

Methods for fabrication of emitter wrap through (EWT) back-contact solar cells and cells made by such methods. Certain methods provide for higher concentration of dopant in conductive vias compared to the average dopant concentration on front or rear surfaces, and provided increased efficiency. Certain methods provide for selective doping to holes for forming conductive vias by use of printed dopant pastes. Other methods provide for use of spin-on glass substrates including dopant.

Description

200531298 V. Description of the invention (1) " " '[Technical field to which the invention belongs] The related application is a contact manufacturing method of contact fabrication of Emitter Wrap-Through with π-emitter full-wrap silicon solar cells on the backside Back Contact Silicon Solar Cells) n. Peter Hacke and James M.

Gee), as shown in US Utility Patent Application Attorney Docket No. 3 1 4 7 4-1 0 0 5-UT 'and the n-self-doped connection Buried-Contact Solar Cells With ^ | Self-D oping Contacts '', by James M. Gee and Pet er Hacke Patent Application Legal Agent Matter Sheet Number (US · Utility Patent

Application Attorney Docket No.) 31474-1004-UT, which is filed with the application of the present invention at the same time, and its detailed items are included herein for reference. This application claims US Patent Provisional Application Serial No. 60/5 42, 390, with the name of Fabrication of Back-Contact Silicon Solar Cells M, which was built in February 2004. 5th, and U.S. Patent Provisional Application Serial No. 0/542, 4 54 1. Process for Fabrication of Embedded Solar Cells Using Self-Doped Contacts

Buried-Contact Cells Using Self-Doping Contacts) has the right of priority, and was established on February 5, 2004. The detailed project is included here for reference.

200531298 V. Description of the invention (2)-The present invention relates to a method for manufacturing a back-contact solar cell, and in particular to a full-wrap emitter (EWT) solar cell having a conductive channel, and a solar cell made by such a method . [Prior art] Please note that the following discussion mentions some publications that indicate the author and year. The discussion of these publications here is for the purpose of providing more complete background information 'and is not to be interpreted as a prior art for the purpose of patent approval. The design of solar cells in widespread use today has a p / n junction formed near the front surface (the surface that receives light), and the cell absorbs light and generates electron current. A common battery design has a set of electrical contacts on its front side, and a second set of electrical contacts is located in the rear side of the solar cell, in a typical photovoltaic module. These individual solar cells are connected to each other in series. Make electrical connections to increase voltage. This—The connection is usually carried out by a soldering method. The rear side of the battery can be welded to the adjacent solar cell and the front side of the battery can be welded. The first advantage of solar power conversion is the high M ^ of the back contact battery, which reduces or eliminates the loss of contact shielding (the sunlight reflected by the connection panel 曙 μ back contact type The battery must be composed of electricity = replaced with electricity). The second advantage is that it is easier to shovel the electric circuit of the helmet 电路, so it is more convenient, because the two polar interfaces are on the same surface as the current photovoltaic module group. Example-, the photovoltaic module and the solar cell c, the back-contact battery can be packaged in one step, and reach

200531298

Significant cost savings. It is important to provide a more uniform appearance, such as photovoltaic roof covers. fruit. The last advantage of the back contact battery is better aesthetics. For aesthetic considerations, for example, buildings—integrated photovoltaic systems and automobiles, FIG. 1 provides a general view of a general back-contact solar cell 100. The silicon substrate 12 back to μ may be an n-conductive type or a π-conductive type. One of the '夂 densely blended projectiles in a certain recognition juice, such as p ++ compounded projectile 1, 8, or 1 ^ + compounded projectile 16, may be omitted. Or in other designs, the densely blended projectiles 16 and 18 may be directly connected to each other on the rear surface. The rear-surface passivation layer 14 helps to reduce the loss of light-producing carriers on the rear surface, and also helps to reduce the electrical loss caused by the current on the unmixed surface between the metal contacts 20. There are several ways to make backside contact-type Shixi solar cells. These methods include metal wrap (MWA), metal full wrap (MWT), projectile full wrap (EWT), and backside-to-face structure. MWA and MWT have current-collecting metal grids on their front surfaces. These grids are individually wrapped around the sides or covered with holes to the back surface to make back-contact batteries. Compared with MWT and MWA batteries, the unique part of EWT batteries is that they are not covered with metal material on the front side, which means that no light irradiated to the battery is blocked ’, which results in higher efficiency. The EWT battery covers the current-collecting junction (π emitter) from the front surface to the rear surface, while passing through the doped conductive channels in the silicon wafer. "The emitter" is related to a densely doped region in a semiconductor device. To generate such a conduction channel, for example, ‘the laser method is used to drill holes in a silicon substrate and then to the inside of the hole.

Page 7 200531298 V. Description of the invention (4) The formation of a projectile and at the same time the < Backside—The electrical current collecting interface of the interface type. Yinsi: There are negative polarity and positive polarity near the front surface. The back-side battery requires 要求 ΠγΓ 矣 so that the carrier has enough time to diffuse from the front surface to the rear surface and the current collection interface on the rear surface. In contrast, the advantages of ewt batteries that integrate current with θ 隼 efficiency are new / rigid, and it is precisely the high-current charge f / EWT battery that is published and disclosed in the US patent number; Method ethod of Making A Back Contacted Solar Cell), the patent right belongs to James M. Gee, the complete content of which is included here. The design of various back-contact batteries has also been discussed in many technologies. In addition to U.S. Patent 5,468,65 2, there are two other U.S. patents with Mr. James Gee as co-inventor. Their publications disclose module combinations and lamination methods using back-contact solar cells. ; It is US Patent No. 5,9 5 1,7 8 6, Laminated Photovoltaic Modules Using ^ Back-Contact So 1 ar Ce 1 1 s, and US Patent No. 9 7 2, 7 3 2 'Method of monolithic module assembly (μ ethodof Monolithic Module Assembly). The methods and related matters disclosed in these two patents may be used together with the present disclosure disclosed in this invention, so they are included as if they are all mentioned for reference. U.S. Patent No. 6,384,316, Solar Cells and Manufacturing Procedures (solar Cell and 200531298 V. Description of Invention (5)

Process of Manufacturing the Same), the announcement reveals another back-contact battery design, but it uses MWT, where the holes or channels are relatively far apart, and there are metal contacts on the front surface to help conduct current The surface, and the holes in it, are aligned with the metal in a straight line. In some cases, EWT cells with channels that diffuse with a gas dopant can exhibit high series resistance associated with channel conductivity. Seen in [JM Ji, M.E. Buck, WK Schubert, and PA Basso, etc., the progress of projectile-wrapped silicon solar cells, presented at the 12th European Optoelectronic Solar Symposium, Amsterdam, Netherlands, April 994 (J.M.Gee, M.E. Buck, WK Schubert, and PABasore, Process on the Emitter Wrap-ing Through Silicon Solar Cell, 12th European Photovoltaic Solar Energy Conference, Amsterdam, The Netherlands, April 1994)]; J.M.G., D.D. Smith, S.E. Jarrett, M.D.Bodi, and J.C. Gimino and others. Battery and module (G ee J Μ,

Smith DD, Garret SE, Bode MD, Jimeno JC:

Back-Contact Crystalline-Silicon Solar Cells and

Modules). NCPV Program Review Conference, Denver, Colorado, September 8-11, 1998 (NCPV Program Review Meeting, 8-11 September 1 998, Denver, CO): One way to deal with this problem is to Metal substances, such as metal-plated materials, fill the channels. However, this method adds significant complexity to the manufacturing process and is therefore more expensive. Another method is to increase the density of the channels in order to obtain

200531298 V. Description of Invention

Affected by the series resistance. A good method is a gas diffusion method that can keep the pore path simple and uniform. The diffusion effect results in less of the above, which is similar to those that can be exposed through the surface and show high conductivity of the hole. [D Gimino et al. Published a model in electrical and electronic 1 993 (1 999) years (D JC imeno, Ci However, this is also a low-cost blending part. At least, for example, the use of the expansion system within the liquid hole Because the doped surfaces are the same and consistent • D. Smith, J 'Projection Full Wrap Engineers Association • Smith, J. rcuit mode 1 i increase complexity and cost. One is more dense than the surface part, As long as some information is implied: Generally, the gas phase diffusion of common gasification filling (P0C13) is relatively inefficient or the surface surface gas penetrates through the hole is not efficient. However, other information shows that its internal doping properties and Exposed • M. Gee, M. D. Bodie, and JC Solar Cell Circuit Analog Modules Electronic Devices, Volume 4 and 6, M. Gee, MDBode, ng of the emitter-wrap-through solar cell, IEEE Trans, on

Electron Devices, Vol. 46, 1993 (1999))]. The key issue for any back-contact solar cell is the development of a low-cost f-procedure that can isolate the negative and positive grids from the interface. These technical issues include patterning of the doped layer (if any), the passivation of the surface between the negative / positive electrode contact areas, and the application of the negative and positive electrode conductive contacts. [Summary of the Invention] The invention is a method for manufacturing a full-wrap (EWT) solar cell method. The method includes the following steps: providing a semiconductor wafer having a front spear rear surface and many extending from the front surface to Holes in the rear surface;

200531298 V. Description of the invention (7) In the pattern of applying the -4th hole on the rear surface, Yu ::: diffusion source to-including such rear surface holes but not including such rear surface holes. ^ = Second doping Impurity diffusion source to dopant diffusion from the first kind of dopant = the inner species; and the source should preferably contain phosphorus in the baking method, the first _ = the element containing silicon, the first doping method is the best Yes additionally includes the package; Phosphorus: Section contains rotten. The square; the surface contains the pattern of holes on the front surface :: force expansion; the source is applied to fill the source. ν A part of the holes is preferably doped by the first method. The method preferably further includes the following steps: The semiconductor solution is etched with an acid solution; after applying the ^ step, the dielectric layer is used to at least etch the semiconductor crystal. J is a passivation-conducting type metal grid is applied to: j surface box m; at least-part of the pattern of the source pattern: at least-part of the pattern of the first pattern; the first doping Material diffusion source The present invention is also another method for making EWT solar cells, which is composed of the following steps: providing a semiconductor wafer rendering method, the square and the rear surface, and many extending from the front surface to the rear surface =, *, there are two types Diffusion barrier layer to the rear surface does not include the pattern of the back surface, the same as the “applied,” the pattern of the hole in the clothes; clean the wafer; diffuse the first dopant into the circle. The engraving becomes at least partial removal of surface oxides; and: 丄 ^ type metal grid is applied to the pattern of the rear surface containing holes on the rear surface. Page 11 200531298 5. In the description of the invention (8), there will be 苐Second Leader The electric barrier pattern and the first guide ^, moxibustion grid are applied to the rear surface to be diffused. The semiconductor wafer is best. The pattern separated by a metal grid tree contains phosphorus. The first conductive cut is silicon. The first dopant is preferably conductive type. Silver, and the second grid preferably contains an inscription. The application-type is a passivation effect. The second step: Step 'is after a step of ㈣; 7 in 1 = 2 shells to about 30 to 60 ohms / square to the surface of the ρ-type Shixi wafer. (0 ° / resistance caused by a dopant phosphorus source in a step of a large conductive type metal grid :: two ;: its ::: the first and second diffusion sources preferably include a flute: Gate pattern and baking. A kind of dopant. The first kind of dopant has the opposite conductivity type. The second layer-part of the second kind of dopant is best to shield the first kind and to be diffused at the same time :: The circular object method is an additional method of the following burdock battery, the surface and the rear surface are "allowable"; the front semiconductor wafer has the front surface of the first spin-coated glass (SOG) diffusion barrier layer surface surface application Holes for holes; apply silver to the pattern that does not include holes on the rear surface; if the species is not patterned, the spin-on glass (S0G) is not patterned. Circle removal; the first, several, and several partial circles; the wafer is etched to remove at least the remaining f = f into the crystal (_; and the first conductive type of metal 2 —In a pattern of spin-coated glass with holes on the rear surface, there is also a booklet known as Add to the Back Surface to package the second conductive type of metal. Page 12 200531298 V. Description of the invention (9) The grid is applied to the rear surface and contains corrosion Agent pattern type; body-cutting, the first type of dopant is best to use a coating glass (SOG), preferably by spin coating and "furnace densification." The first spin coating Glass (s0G) is best = the second type of dopant having the opposite conductivity type to the first type of dopant. 3 The present invention is also another method for manufacturing a solar cell. The method consists of the following steps: A semiconductor wafer whose front / side is different from the rear J-plane and many holes extending from the front surface to the rear surface; the first spin-coated glass (SOG) with the first dopant applied to the rear surface ; I use a resist to the pattern that does not contain holes on the rear surface; to remove the first-type spin-on-glass (write) unpatterned part of the anti-rust agent; round the resist Removal from wafer; application of a second spin coating containing a second dopant that is conductive and opposite to the first dopant Glass (S0-G) to the back surface; the wafer is baked to diffuse the first dopant and the first dopant into the wafer; the wafer is etched to at least the remaining first and The second type is spin-coated glass (SOG); and the first conductive type metal grid is applied to the pattern of the rear surface including the back surface holes, and the second conductive type metal grid is applied to the rear surface. Including the pattern of anti-surname agent pattern. This method also preferably includes the step of applying the first type of coated glass (S 0G) to the front surface of the wafer, the third type of spinning, glass (S0G) is best Is a second dopant that contains a lower concentration than in the second spin-on glass (s0G). In this method, baking is preferably performed by arranging a number of wafers in approximately parallel rows from the front surface. Proceed to the rear surface, so that the second spin-coated glass (sog) on the rear surface of the first wafer, page 13 200531298 5. Description of the invention (10) Dopants are diffused to the immediately adjacent first The two wafers are adjacent to the front surface. The present invention further applies to EWT solar cells manufactured by any of the foregoing methods. The essential objective of the present invention is to provide a higher efficiency emitter full-wrapped (EWT) solar cell manufactured by a simple and cost-effective process. Another object of the present invention is to provide a method for increasing the amount of dopants in the conduction channel, thereby making the series resistance lower and providing it to the EWT solar cell. Another object of the present invention is to provide a manufacturing process utilizing a diffusion barrier layer. Preferably, the diffusion barrier layer is also used as a dopant source to provide improved properties of the backside-contact interface. Yet another object of the present invention is to provide dispersive but simultaneous diffusion for two different dopants, n-dopant P-dopant. The main advantage of the present invention is that it provides an improved and simpler method of producing a solar cell at a lower cost. Another advantage of the present invention is that in the method provided by it, uploading the guide channel and the related hafnium wire and any optional doping = line on the front surface, using η +-dopants, preferably phosphorus, Blend it more densely than others. 'The other objectives, advantages, novelty matters, and scope of applicability of the present invention' will be partly proposed in the following detailed description, and combined with related accompanying illustrations; and partly will be for those It will become apparent to those familiar with the inspection techniques that came up, or may be learned by following the invention. The g standard and advantages of the present invention may be appended with 'special $, = Jiaqing

Page 14 200531298 V. The invention and the hand (a) specified in the scope of (11) [Embodiment], and / or combination to achieve and achieve the present disclosure disclosed herein The method and process of providing a manufacturing pool, In particular, the manufacturing methods and economical methods that are more economical than ^^^ %% are different and the same individual methods reveal that ^ iQ Μ ΑΈ 1 does not change to two or more methods. Here comes the trick-what may be combined or about to be learned at the same time is ## additional manufacturing methods. To manufacture other backside contacts, some of the process sequences can be used by masking layers and dopant diffusion barrier special layers. "Is that" said the use of layers and spin-on glass diffusion barrier sources. Coated glass is used as the diffusion barrier layer and dopant battery, and it can be directly applied to any back-contact solar energy technology by related fields :; M2, = J: side-junction solar cells . It's easy to make a difference. It will be easy to determine the difference in solar energy based on the battery structure. However, these methods are still generally applicable to the back contacts, and are provided to the EWT electrical surface doping in a way that is pooled within the channel body, that is, s, +, or 疋 p + + or n + +). The performance of channel j is about the side wall of the cylinder and the associated ruled line or front left, and if compared with the remaining horizontal battery surface, it is more special. = Surface or top surface, which is also doped with impurities, but compared to a ρ-type silicon wafer, the conduction channel will be larger than most of the 15th page 200531298 V. Description of the invention (12) '---- The surface is subject to specific age, greed, D 丄, f ^ a and ^ 乂, Chen Yi's Π ++-blending. Preferably, in some embodiments, the n + + -mixed squall line includes ^ ^, the swimming channel opening is formed on the front surface, and the 苴 corresponds to the rear surface 袼 line, and can be left standing ' , ^ 丄 and ”& intends to additionally provide grid lines including n + +-blending at right angles at the channel, while the remaining area of the front surface is blended lightly with Π +-. In this way, the current resistance transmitted to and through the channel is relatively small. Π is not that both surfaces and channels use single-n + emitters. This results in an increase in efficiency and allows the hole density to be reduced without the need for channel metallization. In each of the methods described hereafter, the wafer may be of a general thickness, typically +280 to 300 microns, for example, the commonly used 33 micron to find the crystal circle. Alternatively, in the process sequence of the present invention, the wafer may be greatly thinned, for example, less than about 280 microns, preferably less than about 200 microns, and even more preferably less than about 100 microns. Thin silicon wafers can be used because the process sequence does not include metal, such as aluminum alloy, that covers all or most of the entire back surface of the wafer. It is usually used to provide a back surface field (BSF). In order to reduce the recombination loss ("passivation effect") at the rear surface. Because of the inconsistency of the thermal expansion coefficient between the wafer and the backside field BSF (the thermal expansion coefficient of aluminum is more than 10 times larger than that of silicon) will cause Strain, the thickness of the wafer used is typically greater than 280 microns. In this article, there are generally U.S. patent application numbers 1 0/8 8 0, 19 0, called the emitter on a thin silicon wafer Full-wrapped back-mounted solar cells " awarded to Mr. Ji and Mr. Schmidt 'built on June 29, 2004 (entitled' 'Emitter Wrap-Through Back Contact Solar Cells On Thin

Silicon Wafers ”to Gee and Schmit, and filed on

Page 16 200531298 V. Description of the invention (13)

June 29, 2004) ’4 people know what the wafer can be of any size: this is considered as the full text. Cm x 10 cm), or ΛΓΛcm or 100 cm2 (10 cm2 or 225 cm2.), Such as 156, which is currently being used to form ^ Ϊ ^ ^ In the first step of each embodiment, the hole is 30 It is used to form a conductive channel and is introduced into the ancient master ^, as shown in Figure _ ;; Table :: rear surface ... Wafer: Lai Cheng: ϋ: laser drilling, but other knives can also be made Machining / + 歹 l etching, wet etching, mechanical drilling, or water 2. If a laser iron hole is used, it has sufficient power or intensity at the first wavelength to enable a hole; = up: ... ° .5 ms To 5ms-Nd: YAG Laser: Use :, Circle =, “: Mirror Ming Shi Quan Shi Lei is also proportionally shortened. The introduction time of the channel hole mother hole is half, and the fruit red B is like the channel hole The diameter may be from about 25 to 125 microseconds to about 30 to 60 micrometers. In the implementation of a thin wafer, the diameter of the channel hole is 100 micrometers or less, the diameter of the channel hole is ΐϊΐϊη, etc .: Wafer thickness. • Channel holes per unit surface area ^ τ ° Sadly, current is transmitted from the emitter through the holes to reach The "back-to-back" total series resistance loss ... This can be empirical or theoretical: PΘ ^^ The method described in the channel hole density may be determined by reducing the electrical π =, for example, determined by ohm / square (Ω / sq). Usually a typical ; Second; Γ1mm2 to 2mm2 pure, but it may also have a lower name, such as every 2 to about 4mm2. 200531298 V. Description of the invention (14) In the hole? After that, for example, with the typical test money engraving steps used, its part ::: ;; let = is to minimize the irregularity usually caused. Any: the introduction of sodium hydroxide or potassium hydroxide into the hole ... remove the large: More than 10% use of edge-spread material ", surface. In one embodiment of the present invention, the screen printing diffusion source is preferred, and the application of 'dip printing' diffusion source is known : m is used for doping with erbium. Although it has been transferred to the United States, it is produced in U.S. Patent No. 4,4 78,879. The same material has never been used in the EWT battery structure. < Higher concentration of n-dopants 2 4 2 7i low series resistance. Applicants have inadvertently found that This kind of transferred diffusion material source, such as dish-shaking wheel, tower, west LA i will be expanded to include the source material, and selectively applied to the hole area, debris = hole part of the Graticule ... Doping point 4 FWT laser with high concentration. Resistor. Use the transferred diffuser source to manufacture the backside connection. The typical process sequence of the EWT battery is shown below. 1 · Laser Drilling hole 2 · Inspection money transfer Fill-diffusion source on the front surface and make it dry Transfer-diffusion source on the back surface and make it dry Transfer the diffuser source on the back surface And let it dry in the south temperature furnace to diffuse the dopant into Shixian hydrogen fluoride for a while (both surfaces are afraid of hydration). Plasma-assisted chemical vapor deposition (PECVD) is performed on the front surface.

ΪＭ Page 18 200531298 V. Description of the invention (15) 9. Plasma-assisted chemical vapor deposition (pECVD) on the rear surface I 0 · Transfer silver metal paste and dry it with negative polarity II · Positive grid Transferring silver ·· aluminum metal paste and drying it 1 2 · The process sequence before baking contacts is usually described in Figures 24 to 31), which illustrates that the manufacturing sequence of this method also reveals other advantages at the same time. The cross-sectional view of FIG. 2A shows that the wafer 12 has been drilled and etched to generate a hole 30, which is the above steps 1 and 2. Figure 2B is a top view of a portion of the wafer 12, showing a number of holes 30 spaced in a sequence. FIG. 3A is a cross-sectional view of the wafer 12 after the dish-diffusion paste has been printed on the front surface and the rear surface, and is designed in a pattern such that each row of holes 30 is covered by a row of paste 32. Forming a grid region that is close to each other. So @ 3A shows the wafer formed after the above steps 3 to 5. These pastes are dried and baked at high temperatures to become diffusion source oxides. Figure 3B shows the dopant, two = circles. Boron is diffused into the stone below the scatter-diffusion oxide; Phosphorus is diffused into the stone under the phosphorus-diffused oxide, and a phosphorus-diffusion layer 36 is generated. The diffusion layer 36 is concentrated because phosphorus easily diffuses and has a higher surface than boron = · ’, | The entire region is densely blended, even if doped;: 30 ::

The full hole 30 is because of the hole 3. Inside table: 3: Soil: King J

The side doping paste 32 is full of dopants; = and J surface 36 are advantageous, because it reduces the contact resistance of the grid with :: =: and reduces the passage through the hole 3〇 Force: ^ surface 200531298 V. Description of the invention (16), and reduced the resistance loss at Lunben & Bian Su, which is also shown in Fig. 3B, when the n hole is 3G. For example, two layers are exposed on the rear surface; layer 38 is generated on the front surface. Phosphorus comes from the dopant in the paste 32 of the phosphorus diffusion layer 38 doped with the phosphorus diffusion layer. It comes out doped but its vapor pressure is low: the polyboron oxide evaporates out '. The exchange of fine ice for $ is therefore mainly rusty and diffused into the exposed. The right / fire-promoted phosphorus diffusion layer is 3g in front: :: i: ϊ ΐ: Phosphorus diffuser provides the best current collection and most

First use ,. The lightly doped phosphorus diffusion layer is 38 on the rear surface. Phosphorus: 埒 MJ is because of the passivation effect of the phosphorus on the rear surface, and it is more unlikely that the: ft: I diffusion layer is in contact with 4G = this, this process Sequential generation-the diffusion of a dopant with a high efficiency potential of $ # is followed by an etching step (hydrogen fluoride etching) usually using an f = times (HF acid) aqueous solution. Any two, five can be used 'e.g. 1 G% 1 fluoric acid. Application of coin etchants is possible, including immersing the wafer in a hydrofluoric acid solution. Application with sufficient hydrofluoric acid for a period of time to make the front and back surfaces water-phobic, which can be determined by the sheeting effect produced by hydrofluoxamine when the wafer is taken out of solution The surface of the bare original silicon produced by the hydrogen fluoride etching may need to be passivated by the deposition of a dielectric layer. Plasma-assisted chemical vapor deposition (pECVD) and deposited silicon nitride (SiN) are used to make silicon for solar cells. Surface passivation is a well-known technology. Or 200531298 with silicon dioxide (Si 〇2) layer --------- 5. Description of the invention (17) Heat, growth 'or other dielectric Materials, such as three: "【仙. 2), _), etc. of different pentoxides, etc. use different hands ") Gongdachun: such as transfer method, spray coating method, or chemical vapor deposition method, in order to completely Eight to eight properties. It has a good interface with the silicon layer and is cultured; Type II; The contact material for the low-profile or type contact can be screen-printed on the entire material; Medium use! = Melting: a certain; = in the place where the oxide is left in place, save this s: ΐ melting block # diffusion-barrier PECH) deposition step. In the afternoon, go to at least one processing step. If the silver paste is transferred on a screen using a screen printing method: Negative-Position: Grating grid method. Two possible penalties are used as polar grid thumb contacts. The paste can be made from a liquid formulation and possibly another spoon. If appropriate, the relics are known and commonly used, with = $ and pastes in this technology. It is also possible and worthwhile to decompose the nitrides (see M. Sheila's jelly recipe, which contains ingredients that can be bake-optimized in order to show the `` self-doped silver-printed silicon ''). The solar battery reaches ^ m / sq. Of the projected net of the Society of Electrical Engineers, 29th International Electronics State, May 2002, 4 ^ 豕; ^ Inch Meeting; New Orleans, Louisiana and here are provided for Reference (se p. 21 200531298 V. Description of the invention (18) al., &Quot; Optimization of self-doping Ag paste firing to achieve high fill factors on screen-printed silicon solar cells with a 100 ohm / sq · emitter ", 29th IEEE Photovoltaic Specialists Conf ·, New

Orleans, LA, May 2002, incorporated here by reference)), such as glass frits. The wafer is then baked to metalize the grid contacts. Figure 3C shows the completed solar cell. After applying silver paste as a negative-polarity grid and silver: aluminum paste as a positive-polarity grid, and after baking, $ negative-polarity grid contacts of silver are produced. 42 and silver: positive-polar 袼 grid contact 44 of aluminum. The silicon nitride layer deposited by PECVD, which can be applied optionally, is not clearly shown. Please note that all illustrations, including here and elsewhere in this application, the size of the holes and the silicon substrate, the spacing and relative sizes of the different component structures, the thickness of the different layers, and other dimensions are not to scale , But the outline way for illustration and content. As shown in FIG. 3D, in a certain embodiment, the product is screen printed by a diffuser source, especially a phosphorus-diffusion source, which is a desired circle 36 plus a channel hole 30, and additionally provided with a dopant. The y plus% of the impurity concentration calls for a corresponding reduction in resistance, for example, negative-polar gravitational force. -f case style 36 can be optionally selected and displayed with priority: on the formed front and rear surfaces. On the rear surface, the connector is partially covered by metalized grid contacts 44; however, there is no such covering action on the two sides. It is also possible, for example, in & in Zeshou 200531298 V. Description of the invention (19) i-'/ bi-axis and "axis provide a grid with increased dopant concentration, directly from the screen print ^ release source & pattern The resulting m I is given by =

The intersection of the grid line and the y-axis 袼 line Wherever you have X force. Therefore, it is also possible to use a gaseous material to transfer the M ^ t 〇 dispersion effect, for example, if the gas supply is better, for example, the gasification lin f is provided for the expansion of a doped dopant to dust it in: =: f (P0C13), and subsequent oxidation is this-the process step in the hydrofluoric acid for surface passivation. It is best to use the printed source of the diffusion source oxide in order to remove the transdiffused phosphorus chloride. In the example, the step of transferring a gaseous source onto the front surface is used in the following steps. The example of lin-diffusion in the cavity structure is caused by :::. In each such implementation Desheng Er, the amount of impurities introduced by # from the dish is still significantly higher than the average phosphorus doping amount on the front A. The similar process sequence can be used for Xiegan P ^ u-> Ik of the battery structure. In this embodiment, Dan is not required. If the diffusion-source oxygen specialization is on the rear surface, PECVD deposits ffi, AS / ortho oxide and silicon substrate. Low-recombined with r king's; | surface, and if the oxides of silver and rhenium bake points pass through the aluminum paste with low contact resistance 1% of silver paste in total and silver in frit: In another embodiment of this invention, another layer of the present invention uses a layer to prevent or limit It is concluded that the spreading shape is early = ^ (POCl 3) ^ ^ ^ ^ ^ ^ Scattering barrier layer can also provide p + doped = impurity /. The source of the transfer ㈣ y b foreign matter is preferred, such as boron. Direct transfer one

Page 23 200531298 V. Description of the invention (20) The diffusion barrier layer allows simple and direct application of the patterning step. Materials suitable for use as diffusion barriers are commercially available; for example, Ferro Corporation (Cleveland, Ohio) supplies transfer pastes for anti-reflection coatings for dioxins and buttons for diffusion barriers Oxide materials, and borosilicate glass as a source of boron diffusion. All of these materials provide good barrier function in the diffusion effect of the dish, although some materials, such as transfer borosilicate glass, have not been previously described to provide a phosphorus diffusion barrier. The composition of borosilicate glass provides the added benefit of boron diffusion under the barrier material, helps passivate the surface, and reduces contact resistance for polar contacts. The diffusion barrier material is applied in the desired pattern pattern, for example, by the screen printing method, although there are alternative methods. 2. The mask method or the stencil printing method, it is assumed that this method produces a τ pattern diffusion barrier material. In the case of t = 2 and the following examples, η + impurity exchange has the best effect. : Two; work; 化 醢 p (p0ci3) 'to perform scale diffusion or can also be used = source of action, such as solid source or spray diffusion source, to be removed, 俜 2 oxides from phosphorus diffusion Usually with hydrofluoric acid. In the process of silicon surface passivation, encapsulation of photovoltaic modules causes reliability problems. The nitrided oxide (SlN ^ Auxiliary) vapor deposition method deposited in Tai & Energy Cell Manufacturing (PECVD) is a technique that is also known as silicon dioxide (SiO2). Or 2) layers Thermal growth, or other dielectrics1 Page 24 200531298 V. Description of the invention (21) Materials, such as silicon dioxide (Si〇2), titanium dioxide (Ti0 group (Ta2G5)) materials are deposited in the same way as iM method , Spray coating method, or chemical vapor deposition method to achieve surface passivation. 3 is required to complete = = = 'diffusion-barrier oxide is not etched) t, bake and p_-type silicon substrate for low resistance contact, In a certain implementation = Π = ί use a glass frit. The diffusion-barrier = / product step may allow the least-processing step to be omitted. The rear surface represents the diffusion barrier layer used in the manufacture of the back-contact galvanic cells. The sequence is as follows. This sequence provides diffusion-barrier oxides, which are discussed above. "Dual-surface hydrogen engraving, hydrophobic oxenox fumigation / expansion barrier oxides are replaced with a 2 that applies a surface passivation layer, such as Used for surface passivation_CVD nitrogen cutting layer. However, the same as everywhere, if the diffusion-blocking oxide and the siliceous layer have a good intermediary: the generation =-blocking oxide does not have to be completely removed and replaced with calcium nitride, so one step can be omitted. 1 · Laser drilling tester 3 · Transfer diffusion barrier 4 · Dry button and supply 5 · Etch and clean the wafer 6. Use vaporized phosphoric acid (P0C13) (30 to 60 ohms) / Square) Page 25 200531298 V. Description of the invention (22) 7. Hydrogen etching (both surfaces are feared to be hydrated) 8. Rough surface, plasma-assisted chemical vapor deposition (PECVD) of nitride nitride 9 · Plasma-assisted chemical vapor deposition (PECVD) nitride nitride on the back surface 10 · Transfer silver metal paste for negative grid 1 1 · Transfer silver for positive grid: aluminum metal paste 1 2 · Baking contacts, alternative embodiments of the present invention are possible and carefully considered. In a priority = alternative embodiment, FIG. 4A depicts wafer 12 with a diffusion barrier layer 90, such as a titanium oxide paste, applied to make a pair of each other, and the space between them will be used in the next step Positive polarity grid: Steps 1 to 4 above are performed to produce the device of FIG. 4A. However, after the phosphorus diffusion step above, for example, a device using POC13 (30 to 60 ohms / square) impurity ΐ, with n + diffusion layer 92 is used. Alternatively, other "doped time gates are used here. Then use the previous etching step to etch away the phosphorous glass formed by the diffusion of POC13 / B and leave the diffusion barrier layer 90 as it is, so conventionally, it is assisted by plasma. Chemical vapor deposition systems, buoyants, or other methods and materials for passivation. After being deposited on both sides (not shown), the negative contact silver grid is replaced with positive contact silver: aluminum袼 Grid is transferred by screen printing, said to be baked. 1 钍 旲, such as 闾 ^ Γ 私-^ 0 and Japanese yen 厗 qn / ,,,,. As shown in Figure 4C, it is a battery with Diffusion barrier if! Polar screen version # printed silver: Ming or Ming grid substrate 96, and Guang Zhengmei transfer silver grid substrate 98. As shown in Figure 4c, the screen transfer r ° grid substrate 96 may And part of the diffusion barrier layer 90 as 邛 p, edge 'or may be placed on the side of the diffusion barrier layer 90 as a whole: 200531298 V. Description of the invention (23). The inscription of the transfer printing (which may be A Ming alloy, for example, silver is aluminum on the body), is applied to the existing η-type diffusion / metal, as shown in Figure 4C. However, at the time of baking, the existing η + diffusion layer is replaced by a ρ + layer at the bottom. It may be: in the silver-screened positive or negative screen grille substrate 96 of the positive electrode. The η + region under the P-type contact was successfully over-doped = 疋 'A piercing contact through the η + region is based on the p-type substrate, which is a derivative of the 绍 -dopant The metal is baked at more than seven times, which causes silicon to be added to the contact area as an alloy. This is not the case with 4D. When baking, the screen printing silver in the η + diffusion layer 92 next to the positive electrode: aluminum or aluminum Portions of the grid substrate 96 are over-matched by the aluminum in the grid substrate, and contacts 9 6 are generated. Yet b In yet another particularly preferred embodiment, the diffusion barrier layer contains a P + dopant The source is preferably boron. In this way, as shown in FIG. 4E, the diffusion barrier layer 94 of the screen printing, such as a boron compound = titanium oxide paste, such as the type of boron oxide in a certain embodiment. : The formulation of the paste of the side-enlarging barrier layer 94 allows a diffusion reed containing a small amount of butterflies to be produced, as described later. The p-type receptor may or may be used to form a diffusion barrier layer that contains a doped dielectric paste, including not limited to none, gallium, or indium, most preferably one or more of the preceding oxygen Compound. In one embodiment, the diffusion layer paste provides more than one type of p + $ impurities, with oxide being preferred. Or it is boron or other P-dopant barrier. It can be sprayed, ink-jet printed, It can be applied in a way other than screen transfer. When diphosphorus is diffused into silicon to produce n + doped regions, dielectric Nakata vp Page 27 V. Description of the invention (24) The stylistic type is best to diffuse into at the same time. Save the next step. After exposing a P-type area and the same baking, use the previous 礞 捵 transfer and boron diffusion barrier layer 94 ⑽ to 6_, and the diffusion step, such as using The co-diffusion of boron and phosphorus results from the peak produced by mi3. As shown in Figure 4 ”30-50 ohms / sq. As in the dream point of the grassroots i, and expand the power to about ^ $, ^ ιηη Γ In the example, and the P + diffusion layer 100, it is best to expand the power to about 1 00-500 ohms / square as in the same step, the phosphorous glass formed during the diffusion of poCl3 is etched away, and the boron diffusion barrier layer 94 is left in place. Silicon nitride is used as an example in the present invention. Plasma-assisted chemical vapor deposition system (PECVD) deposition, or methods and materials for passivation. After the silicon nitride is deposited on both sides (not shown), the silver negative grid of negative contact is The screen is transferred, and the positive contact silver · aluminum grid, or more preferably the aluminum grid, is transferred by the screen and the wafer is baked. As a result, as shown in FIG. 4G, A battery is provided with a forward diffusion barrier layer 94, a silver · aluminum or aluminum grid substrate 96 with a positive screen transfer, and a silver grid substrate 98 with a negative screen transfer. The screen is shown in Fig. ' The transferred positive grid substrate 96 may partially overlap with a part of the boron diffusion barrier layer g 4, or (not shown) may be placed on the entire surface. Between the side edges of the diffusion barrier layer 94. The screen-printed aluminum (which may be a type of alloy such as silver: aluminum, or may be substantially aluminum) is applied to the existing n-type On the diffusion layer, as shown in Fig. 4G. However, at the time of baking, the metallization of Lu | bottom forms a ρ + layer instead of the existing η + diffusion layer. There may be a frit contained in the positive screen. Transferred silver: aluminum or aluminum grid substrate 96. In this way, the η + area below the ρ-type contact will be five. Invention description (25) was successfully over-connected · The shike, special point is based on P-type substrates; '. Also / another one', a modified version of the piercing joint metal in the region #where in the example of the 'ming-dopant ^ belongs to the supercore 1 co-refining temperature Plus also added braided alloys. This is shown in Figure 4G = then? The domain polar screen printing silver ... each ^ 矣 β injury is over-doped by aluminum in the grid substrate, adjacent to the P + diffusion layer m A contact 96 is created, and in another preferred embodiment, an expansion 90 is applied as shown in FIG. 41, followed by a "diffusion step, such as using p〇ci3 (3〇 to 6 / = / square) phosphorus diffusion step "and yield ± η + diffusion layer 92. After the nitride stone ^, on both sides (not shown), the negative polarity contact silver grid is converted to P, and the positive polarity contact silver ·· aluminum grid, or more preferably, the aluminum grid is Screen printing. As a result, as indicated by # ㈣, ㈤ is an electrically diffused barrier layer 90, and a positive-type screen-transferred silver: aluminum or aluminum grid substrate 96, which contains a frit or other material to drive the substrate 96 through the barrier layer. 90, and the silver grid substrate 98 of negative screen printing. Screen transfer aluminum, which may be an aluminum alloy, such as silver: aluminum, or may be substantially aluminum), is directly applied to the diffusion barrier layer 90, as shown in Figure 4. However, at the time of baking, the metallization of the aluminum-bottom is driven through the barrier layer, as shown in Fig. 4K 'with the aluminum to form a P + layer underneath (not shown) 0 ^ implemented in a related priority In the example, as shown in FIG. 4L, a diffusion barrier layer 90 is applied, followed by an n + diffusion step, for example, using a phosphorus diffusion step of poCl3 (30 to 60 ohms / square), to generate a "diffusion layer 92, and then 200531298 V. Description of the invention (26): Application of the patterned anti-Na 6. After both sides of the resist 56 (not shown), the steps are used to invade and remove the exposed portion of the diffusion = masking layer 9G As shown by _4M. After the diffusion: early = the contact is removed, the anti-silver agent 56 is removed and the wafer is cleaned. A negative contact silver grid 98 is transferred by screen printing. And = positive contact silver: Ming grille 96, or more preferably Ming grille 96, is transferred by screen printing. As a result, as shown in FIG. 4N, the battery is provided with a diffusion barrier layer 90 and a positive electrode. Silver screen transfer silver: aluminum or aluminum grid substrate 96, silver screen transfer polar screen 98. Screen plate The transferred aluminum (which may be an aluminum alloy, such as silver: aluminum, or may be substantially aluminum) is applied to the patterned portion of the diffusion barrier layer 90 removed by the resist and etching steps, As shown in Figure 4M. In this way, when baking, the metallization of the aluminum bottom causes direct contact with the silicon 12, as shown in Figure 4N, and forms a P + layer with aluminum below it (not shown). In another related and alternative embodiment, the process sequence can use different transfer diffuser sources as diffusion barrier layers to produce a patterned diffusive layer. As discussed herein, different paste materials are commercially available, Lu Ru is used by Ferro Corporation to perform the diffusion system of boron or phosphorus, and can be formulated as a diffusion barrier. In this way, when the embodiment described above is used with boron doped For p-type silicon wafers with a diffusion barrier layer, other embodiments are possible and can be carefully considered. It is also possible to include one, for example, an n + diffusion paste, which preferably contains the components of the diffusion barrier layer, and uses In formation This type of higher n + + area is preferably a grid containing holes 30. The application of these pastes can be carried out using the web page 30 200531298 V. Description of the invention (27) version transfer method. After application, the pastes The material passes through the dry and volatile materials, and the organic matter is removed in the ancient, w ^ process and baked at the network temperature to diffuse the dopant into the stone. The paste usually contains the oxide of the dopant element; this This substance can be removed by etching with hydrofluoric acid after the dopant diffuses. Recording = ι can be modified arbitrarily to generate a solar cell structure. In this embodiment, the holes and the rear surface are well-covered. It is compounded in the field for low resistance, but the front surface is blended lighter, providing higher current and voltage. In the above process, Niu 6 will be replaced by a smaller amount of POC13 diffusion layer (preferably 80 to 100 ohm square). After step 9, for the second time, a dense 1 > 0 (: 13 diffusion (preferably less than about 20 ohms / square) will be performed, preferably followed by hydrofluoric acid etching to remove the phosphorus diffusion glass and some These nitrides to form an anti-reflective coating on the front surface. These two variants work best when the nitrides are deposited at most within the holes' and preferably are not present at all. In this way, the use of a non-isotropic is a priority consideration.

In another embodiment, the process sequence of the back-contact battery uses the deposition of spin-on glass (SOG) and the patterning process of the screen transfer resist. —Spin-on-glass (S0G) is used as a barrier layer to disperse the barrier layer oxide in the projectile diffusion step. ”It is written in a common and common way,“ 2J spin-coating method or spraying method, and preferably in a high-temperature furnace. Dry and densify. Preferably, the SOG is also used to deposit any of a variety of different dielectric materials. In this way, S0G may be silica (Si02), borosilicate glass (BSG), BS (J 200531298 V. Description of the invention (28) oxides mixed with other P-type dopants (Lu, Gu Lu, glass (PSO , Titanium Dioxide (Tl02), and so on. This type of SOG is known in the industry, and Filmtronics & Division (Bacon: In: State) supplies a variety of such materials. Silicon dioxide The interface formed between the gaseous stone Xi and Shi Xi wafers shows an outstanding low self-interaction source of boron or scale dopants. Each Λ helps improve battery performance and makes the surface dull. Eight additional The advantage is that it is non-toxic and easy to make. It is disclosed in U.S. Patent No. 5,053 and combined with Shi Xitong or the second job with Shi Xi appearance. Ken Yu must be professional The operation management and processing are set after the implementation. First, insert the first transfer and etching resist and add the pattern. First, I θ is etched. The transfer process is preferably printed using a screen transfer machine. Etc: Turn :: method, such as inkjet printing, stencil printing, lithography as etching resistance Surname agent :: = skin: two tasks: all kinds of different materials can be used for the anti-surrogate agent AT ,, 彳 Za as the anti-surname agent requirements are only transferable and can corrode gasification. Hydrofluoric acid aqueous solution is widely known Diffusion barrier Ϊ Ϊ: sequence: described in the following, in order to use SOG as a sequence sequence r surface contact type EWT solar cell. Similar system or back can be used for other back contact type battery structures such as MWA, MWT, shell 1 junction solar cells. Screen version of negative and positive contacts

II Page 32 200531298 V. Description of the invention (29) The silver grid for transfer is best to read i. In the related technical field, it is roasted for contact so that it can be cut. The resist is made into a pattern of SOG to form a pattern: In the manufacturing process sequence of the battery, there is a clay plate that provides a kind of p- 聚 钍 日 #. Usually the silicon substrate is typically polycrystalline or other types of stone substrates may be used, including 佴 not limited to early crystalline silicon. The first step, laser drilling and etching, is as described above. In the third-step "gate" is applied. As discussed above, sog is used as a barrier layer in the diffusion of the projectile, and can be freely selected but also a quality material. S0G is deposited by common methods, such as spin ice 11 Spraying method, or by other methods such as immersion in the material containing 〇G, and then put it into a still-temperature furnace to dry and densify. Priority G is silica (with 〇2), borosilicate glass (bsg ), Bs (j mixed with additional ρ is an oxide of raw impurities, phosphorous silicate glass (psG), or titanium dioxide (Ji02). Generally, it is typical to apply soG to the rear surface, and After the furnace is densified, a thickness of about 0.1 to 1 micron will be produced. After S0G's densification, there will be a layer of anti-synthetic agent transfer, such as the screen P method, but with the introduction of a patterned resist Alternative methods are also available. The resist pattern pattern provides at least one set of contact grid patterns, typically the contact grids that intersect within the pattern are well known in the art. For example, provided here Positive grid. Any suitable resist may be used; however, Important should be noted that materials not used 4 w 'but with a resist material that chemical resistance, and specific and clear by

Page 33 200531298

It is an acid-resistant substance, so that SOG is not removed from the patterned area when the wafer is subjected to acid etching. After the resist, transfer and drying steps, the wafer is etched to remove SOG outside the resist coverage area. Any suitable acid etching method may be used so long as the resist is not removed by the chemical etchant solution. In a preferred embodiment, an aqueous solution of hydrofluoric acid, such as 10% hydrofluoric acid, is used. Any common method of applying a last name nick may be used, including immersing the wafer in a solution containing hydrofluoric acid. S0 (; is removed from the inside of the hole during this step, and from the uncovered portions of the flat front and back surfaces. After the #etching step, the resist is removed and the wafer is removed. Clean. Use a chemical solution or other method to remove the resist depends on the anti-silver agent used. The wafer can also be further cleaned using a suitable chemical cleaning solution, such as containing hydrogen peroxide and sulfuric acid. The finished product is a patterned wafer in which SOG appears only in the area where the resist is applied. A relatively dense phosphorus diffusion layer is applied by common methods, including the priority use of Vapor phase diffusion of liquid P0C1 3 to produce a surface resistance of 40 to ^ 0 ohms / square. However, other sources or methods of diffusion may be used, including the application of common methods of liquid sources, such as coatings , Hanbu or spin coating method, or those from solid sources, such as solid source materials, such as phosphorus pentoxide, are heated to high temperature. In general, POC13 in the ordinary gas state is preferred. After the step, the wafer was again subjected to chemical etching, e.g.

Page 34 200531298 V. Description of the invention (31) " '-Using hydrogen IL acid. Application with sufficient hydrofluoric acid for a period of time to make the front surface and back surface waterphobic, which can be determined by the "overlay" effect produced by the hydrofluoric acid aqueous solution when the wafer is taken out of solution. θ After the second etching step, the bare and original silicon surfaces on the front and back sides are preferably / but optionally passivated with a dielectric layer deposition. Nitriding seconds may be deposited by conventional aPECVD methods, or other methods and materials for passivation may be used. As discussed here, if the rear surface diffusion-barrier oxide is not removed by, for example, chemical etching, it is feasible under some conditions, as discussed above, and the purification step of the rear surface can be omitted. After point 2 is applied, the negative-polar grid joint and the positive-polar grid joint t 1 are applied. Any common common application method of grid metal can be used.% Is also, for example, negative-polar grid contacts. A silver paste is transferred by screen printing. A silver foil is transferred from an f-polar grid contact. . The paste can be combined with 2 types of silver or silver: aluminum through recombination. If the formula is suitable, it may additionally contain a binder, a solvent, and a paste commonly known in the technical field of Renfeng. material.氺 Right q: two substances to make can be used as a screen version. The ingredients can be prepared. "This is a special recipe that contains a kind of broken glass. The next day H Lari published, supra), instantiated. Obtained B said the circle is baked so that the grid contacts are metal so that this method can be seen. Some steps may not be the same as the giver = as follows. Product: 冋 's long sequence to execute while still yielding

200531298 V. Description of the invention (32) 1. Laser drilling 2. Alkali etching wafer 3. Application of spin-on glass (S0G) 4. Densification of spin-on glass (S0G) 5. Transfer resist 6. Etching Spin-on glass (S0G) 7 · Remove the resist and clean the wafer 8 · Phosphorium chloride (P0C13) diffusion (40 to 60 ohms / square) 9 · After hydrogen fluoride, both surfaces may be hydrated Nitriding

10 · Plasma-assisted chemical vapor deposition (PECVD) on the front surface 11 · Plasma-assisted chemical vapor deposition (pECVD) nitride on the rear surface 1 2 · Transfer silver metal paste for negative grid Material 1 3 · For positive grid transfer silver: Ming metal paste 1 4. Bake contacts as shown in Figure 5 A. Hole 5 2 Laser drilled holes and alkaline etching is completed on the silicon substrate, A p-type silicon wafer 50 is preferred. A p-type spin-coated glass 54 is then applied to the rear surface as shown in "", such as borosilicate glass r, G :, 'Λ is an oxide of BSG or other SOG mixed with other p-type dopants Use: ^ UI: f knot. — A transfer of silver engraved anti-surname agent 5 6 is then touch-etched with a hydrofluoric acid, a two-step 'example ^ ^ 禋 type patterned spin-on glass 54 is formed As shown in the figure, the ρ-type patterned spin-on glass in the hole 52 is removed in the remaining step 200531298 V. Description of the invention (33) :: f 3 Ϊ is removed, so that the remaining structure is only The resist 56 is composed of two, ▼ "ρ-type SOGs. As shown in FIG. 5D, the resist is then removed ^ = so that only the patterned p-type SOG 54 remains on the wafer 50 t. Next, a dense and large amount of phosphorus phosphonium chloride diffusion (40 to 60 square) is performed, which produces n-type diffusion layer 62 and? -Type diffusion layer " as shown in FIG. 5E, FIG. 5F, and a hydrofluoric acid etching step, and After removing the dopant glass HI ® ° ㈣, the solar cell is displayed. After applying silver paste to the negative grid and silver paste to the positive grid, the aluminum paste is used. —Polar grid contact 72 and silver: positive pole of aluminum ”= Result. The stone nitride layer deposited with P_, which can be

Ik thinks that the applicator is selected and is not shown here. In an alternative embodiment, the SOG material is applied to the knee to be obtained, for example, by using inkjet transfer, lithographic transfer, or appropriate masking method to produce patterned s. 〇G material. By this method, 1 :: the removal of resist transfer and related etching and removal steps, and the complexity of the process steps is significantly reduced. The coated glass and the dopant clip tears in the 5 ff embodiment. The present invention provides an alternative method which uses a transferred SOG material or a spin-on or spray coating method to manufacture a back-contact EWT battery. . The process also begins with the application and patterning of a SOG to shape the range of contact areas. ί ί i This process can be started with Shi Yin acid rotten glass _ material • Yinhe ^ 咅. SOG with n-dopants (usually phosphorous silicate glass) was applied to the rear surface and overlaid on the previous figure. I㈣ High temperature furnace processing steps are the same

200531298 V. Description of the invention (34) When diffused and diffused into the desired pattern on the rear surface, as shown in FIG. 6A, the holes 52 are drilled with a laser and alkaline etching is performed on a silicon substrate, preferably p-type silicon wafer 5〇 ^ A p-type spin-on glass (S0G) 54 is then applied to the back side as shown in Figure 6β, such as borosilicate glass (BSG) or BSG and other p-type dopants Oxides, such as gallium, indium, or aluminum. Next, a transferred etching resist 56 is applied to the desired grid pattern. In an etching step, such as hydrofluoric acid etching, a patterned SOG 54 is formed as a result, as shown in FIG. 6C. The p-type in the hole 52 / is removed during this etching step, resulting in the remaining structure consisting of only the portion of the p-type SOG 54 covered by the resist 56 in the case. As shown in FIG. 6D, the resist is then removed so that only the patterned p-type is used.

Sm stays on ’. Next, an mSOG 60 is applied to the 'covered silicon wafer 50' to fill the holes 52 and cover the SOG 54. Any η-type SOG may be used and is preferably a phosphorous silicate glass (psG). After the application of n〇G 60, the wafer was baked at a high temperature = about 900 t for 60 minutes to press the dopants into it. As shown, this results in a dense n-type diffusion layer 62 and a dense p-type H layer 64. The light n-type diffusion _, which has a typical resistance value of square, is also lightly washed at the same time during the baking :: type diffusion layer 66 may be introduced by the automatic blending method, but The fine surface is exposed to the front surface of the wafer 80, 82 to the rear surface of the wafer 82, 84 coated with η :, 60, so that the light n-type is: m = n_: s〇G 6 ° Lin Or other types of dopants. In FIG. 7, the arrow represents the direction of diffusion, and the diffusion surface is generated. Page 38 200531298 V. Description of the invention (35) Type ΪΪΪ In this embodiment, the “light diffusion layer 66 contains phosphorus or other II The concentration of this kind of phosphorus in the inner wall of the hole 52 is relatively high. Mcnr # 田 见 a *, — 1%, sodium palladium, which is lower in the original text, is used for the surface (not shown) and the difference in expanding these processes at the same time will be in The following is described. In terms of efficiency, the second difference produces a more optimized diffusion profile with higher conversion. ☆ The wafer after the hydrofluoric acid etching step and the doped glass to show the moxibustion. Figure 6Η shows the completion The result of the secret paste of the solar cell grid and the positive and negative grid_silver electric grid ^ negative electrode, and the negative and polar grid contacts of silver after baking, 72 points 70 points. The selective application of the nitride layer is not shown here. The sequential list below must explain the use of η-type and p-type SOG and automatic, matching methods for back-contact EWT solar energy A 2 example of the battery manufacturing sequence, is also learning that some steps may The listed ones are ordered in a different order and still produce the desired product. I. Laser drilling in silicon wafers \ Experimental leave 丨. Applying spin coating with P-type dopants Glass (s〇G) on the rear surface • Densify the spin-on glass (S0G) 5. Transfer resist 6. Hydrofluoric acid etching 7. Remove anti-synthetic agent and clean the wafer 8. Application tape Spin-coated glass (s〇G) with η-type dopants on the rear surface 200531298

Press-in (optionally, the crystal can be carried out). The circle is arranged as 9 · The dopant in the tube-shaped south temperature furnace allows the surface of the plutonium to automatically match 1. Hydrogen fluoride etching 11 · Plasma assisted chemical vapor phase 1 2 • Plasma-assisted chemical vapor deposition (PECVD) nitride on the front surface (PECVD) nitride on the rear surface 1 3 • Negative negative grid transfer silver paste 14. Positive polarity grid transfer Silver: Aluminum paste 15 · Baking contact wire II: "呗 The sequence table illustrates the use of n-type and p-type SOG and other surface matching to manufacture smooth back-contact EWT solar cells # Alternative embodiments are also learning that some steps may be performed in a different order than listed, while still producing the desired product. 1 · Laser drilling in Shixi wafers 2. Alkaline etching 3 · Applying spin-coated glass (SOG) with P-type inclusions to the rear surface 4 · Spin-coated glass (S0G) ) Densification 5 • Transfer anti-money agent • Hydrogen acid etching 7 • Remove the resist and clean the wafer 8 • Apply spin-coated glass (s〇G) with η-type dopants On the back surface 9. Densification 10. Apply spin-coated glass (s0G) with low concentration η-type dopants to the front surface

Page 40 200531298 V. Description of the invention (37) Face 11 · Pressurization of dopants in tube-type high temperature furnace 1 2. Hydrogen fluoride etching 1 3 · Application of Denso to aid chemical Weng; I: Japanese / ^ chemical pre-porous phase deposition (PECVD) nitride on the front surface 1 4 · Application of electropolymerization assistance> [Bufeng Beishi η dagger out of phase> child nitride (PECVD) nitride on the rear surface 1 5 · for negative grid rotation Printed silver paste 1 6 · Transfer silver for positive grid: aluminum paste 17. Baking contacts are optional. Front surface diffusion can be performed in another step, which allows the use of a belt type high temperature furnace without tube Type high temperature furnace. The above method can be repeatedly implemented to achieve similar achievements, which replaces the users of the previous method with the reactants and / or operating conditions generally or specifically mentioned in the present invention. Although the present invention has been specifically described with respect to these preferred embodiments', other embodiments may achieve the same result. Variations and modifications of the present invention will appear bland to those skilled in the art, and it is intended that all such modifications and their equivalents be included in the scope of additional patent applications. All references, applications, patents, and publications mentioned by ^ > are hereby incorporated by reference.

200531298 Schematic illustrations [Schematic descriptions] These accompanying illustrations are included in the specification; they describe one or more embodiments of the invention with a diagram, and $ is used to explain the invention. The principle used. This, together with its text, is for the purpose of one or more preferred embodiments of the invention, and is intended to describe the invention. In the description of the figure: Non-interpretation is to limit this picture. Figure 1 is a general back-contact solar cell i 〇 factory, sound cut! 1) It is a profile of a Shi Xi wafer ® ′ which has been drilled and etched in the process sequence of the T bis / face contact type battery of the present invention, and the figure: = a top view of a circle. ", Fig. 2 A, Japan and Japan ^ Department of Fig. 2 #Wafer in the back-contact electrical sequence of the present invention after the phosphorus- and boron-diffusion source paste is transferred. In the process sequence of the back contact battery of the invention: = ::: cross section of the scattered J; Figure 3C is a wafer of Fig. 3A_ from this hair: The process sequence of the cook surface contact battery is used in South Korea. Sectional view ;, Figure 3D is: Top view of the second stamp. Figures 4A to 4N of Ding Zheng's expanded grid pattern are sectional views showing the steps in the manufacturing sequence of the EWT battery using the transfer to the back contact type of the present invention. 'Electrical P early masking layer I> ffl5A to 5G are cross-sectional views showing the steps in the manufacturing sequence of the EWT battery using the rotary back contact type of the present invention.) Known drawing 6A to 6 Η show the present invention uses the guest Fig. 7 of the production of a thin-sequence τ battery with a back contact made of SQG is a cross-sectional view of the crystal in another view. The figure is maintained in a vertical state for tube expansion.

200531298 Schematic illustration of an automatic blending procedure of the present invention during discrete periods. [Description of main component symbols]

Page 43 12 .... Flat chip wafer 32 .... Paste 34 ... · Boron-diffusion source paste 30 ... Hole 36____ Phosphorus-diffusion layer 38 ... Phosphorus-diffusion layer 40____ Boron-diffusion layer 42 ... Negative-polar grid connection) '44____ Positive-polar grid contact 50 ... .P-type silicon wafer 52____ hole 54... P-type spin-coated glass 56____ anti- # 60 60. ·· • η-type SOG 62____ η -Type diffusion layer 64 ··· .ρ -type diffusion layer 66____ η -type diffusion layer 70 ··· .positive grid contact 72____ negative grid contact 80, 82, 84 · ... wafer 90____ diffusion Barrier layer 92 ··· η + diffusion layer 94____ Boron diffusion barrier layer 9 6 ···. Grid substrate 98____ Silver grid peach substrate 100. .. P + diffusion layer

Claims (1)

200531298 Sixth, the scope of patent application 1. A method for making an emitter + 禀 rpw ^ r ,, a _. ^ ^, Μ King wrapped (EWT) solar cell method, the method includes the following steps: providing a semiconductor wafer, Dan has a plutonium surface and a rear surface and many holes extending from the plutonium surface to the rear surface; applying the first dopant diffusion source on the rear surface to a pattern including the holes on the rear surface; w on the rear surface Apply a second dopant diffusion source to the pattern that does not include the back surface holes; and bake the dopant from the first dopant diffusion source and the second dopant diffusion source in a baking manner Diffusion into the semiconductor wafer. 2. The method as described in item 1 of the patent application range, wherein the semiconductor wafer comprises silicon, the first dopant source comprises phosphorus and the second dopant source comprises boron. 3. The method as described in item 2 of the scope of the patent application, which further comprises applying a first dopant diffusion source containing phosphorus to the front surface pattern including the front surface holes. 4 · The method as described in item 1 of the scope of patent application, wherein at least / part of the holes in the step of applying the first dopant diffusion source are filled by the first _ dopant source. 5. The method described in item 1 of the scope of the patent application, which additionally includes the following steps: etching the conductor wafer with an acid solution after the diffusion step; applying a dielectric layer for passivation to a minimum Engraved front surface of semiconductor wafer; Page 44 The surface includes the first type of doping pattern, and the second type includes the second type of dopant. A method for manufacturing an EWT battery by the method described above, the surface and a number of front and rear surface holes containing a rear surface hole metal grid applied to the rear metal grid to separate the Γ method, wherein the semiconductor impurities include Phosphorus: Metal grid of the first electrical type 9. 200531298 VI. Application scope of the patent The metal grid of the first conductive type is applied to at least part of the pattern of the pattern of the source diffusion source. Figure 2. Metal grid of the conductive type A pattern applied to at least a part of the scattered source pattern on the rear surface ^ 6. A solar cell in accordance with the scope of the patent application. 7 · Fabrication of full-wrap (EWT) solar energy The method includes the following steps: · Providing a semiconductor wafer having a front surface and a hole extending from the rear surface to the rear surface; applying a diffusion barrier to the rear surface does not include the word | The pattern; clean the wafer; diffuse the first dopant into the wafer; leave the wafer for a while; and apply the first conductive type metal grid to the pattern on the back surface, and The surface of the second conductive type is patterned by the diffusion barrier layer pattern and the pattern of the first conductive type. 8 · As described in item 7 of the scope of the patent application; the body wafer contains P-conductive type silicon, the first conductive type doped metal grid contains silver, and the second conductive type contains Sau. The method as described in item 8 of the scope of patent application, which further includes 200531298 6. The scope of the patent application includes the following steps: After the step of engraving, at least a part of the surface of the wafer surface is applied with a dielectric layer electrical type for passivation On; where the resistance caused by applying the first dopant phosphorus source is between about 30 / square (Ω / sq); and where the steps of applying the first and second conductive type metal grids include grid patterning and baking . To the p-conductor to 60 ohms including transfer 袼, 10 · The method as described in item 7 of the patent application range, wherein the source contains a second dopant opposite to the conductivity type of the first dopant . 11. The method as described in item 10 of the scope of patent application, wherein one of the dopants contains phosphorus, and the first and the impurities constituting the diffusion barrier layer one include boron. The first doping method is still the same as described in item 11 of the scope of patent application, wherein one type of dopant and the second type of dopant diffuse into the wafer at the same time. 13. A solar cell manufactured by the method described in item 7 of the scope of patent application. Table 1 at the beginning of EWT 14 · A method and method for making an emitter-wrap (EWT) solar cell. The method includes the following steps. Π methods provide a semiconductor wafer having a front surface and a rear surface and the surface extending to Holes on the rear surface; Apply the first spin-on-glass (SOG) diffusion barrier to the rear surface; Apply T an anti-remnant to the pattern that does not include holes on the rear surface; Make a remainder on the wafer to remove the first A portion of the spin-on-glass (S0G) that is not covered by a patterned anti-residue agent; >, With 200531298 VI. The scope of the patent application will remove the resist from the wafer; diffuse the first dopant into the wafer, and the circular etching will remove at least the remaining first spin-coated glass substrate (s〇g ); Type 2 metal grid is applied to the back surface containing holes in the back surface, and there is a second conductive type metal grid applied to the pattern on the back surface including the resist pattern. The first method is described in item 14 of the scope of patent application, wherein the half silicon 3 silicon, the first dopant contains phosphorus, and the first spin: S0G) is applied by spin coating method Or spraying and high-temperature furnace densification, etc. 0 = · The method as described in item 14 of the scope of patent application, wherein the first, ', glass (S0G) contains a conductive type that is opposite to the conductive type of the first dopant. The second dopant. 1 η 丄 · · An EWT battery that is manufactured by the method described in item 14 of the scope of patent application. 18. · A method of manufacturing an emitter-wrap (EWT) solar cell, the method includes the following steps: (4) a seed semiconductor wafer having a front surface and a rear surface and a plurality of holes from the front surface to the rear surface; Use the first spin-on glass (SOG) containing the first dopant to the back surface, and ^^ a few more agents into the pattern without the holes on the back surface; An unpatterned spin-on glass (S0G) Page 47 200531298 The part covered by the resist; the resist is removed from the wafer; otherwise the second dopant is diffused and the second dopant comprises a second spin containing a conductive type and a first dopant phase Coated glass (S0G) to the back surface; bakes the wafer so that the first dopant enters the wafer; = is rounded and carved to remove at least the remaining first and second spin-on glass eaves The metal grid of the first conductive type is applied to the pattern including the back surface holes' and the metal grid of the second conductive type is applied to the pattern including the resist pattern on the rear surface. 19. The method as described in item 18 of the scope of patent application, further comprising the step of applying a third type of spin-on glass (S0G) to the front surface of the wafer. The third type of spin-on glass (S0G) includes A lower concentration of the second dopant in the second spin-on glass (SOG). 20 · The method as described in item 18 of the scope of patent application, wherein baking includes arranging a plurality of wafers in a substantially parallel manner from the front surface to the rear surface, so that the second The second dopant of spin-on-glass (SOG) is diffused to the adjacent front surface of the immediately adjacent second wafer. 21 · —A solar cell manufactured by the method described in Patent Application No. 181. Page 48