TW200527998A - Method for producing bus line with micro-bump array and method for bonding the bus line - Google Patents

Method for producing bus line with micro-bump array and method for bonding the bus line Download PDF

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TW200527998A
TW200527998A TW94107683A TW94107683A TW200527998A TW 200527998 A TW200527998 A TW 200527998A TW 94107683 A TW94107683 A TW 94107683A TW 94107683 A TW94107683 A TW 94107683A TW 200527998 A TW200527998 A TW 200527998A
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micro
metal
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TW94107683A
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TWI314030B (en
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lu-zhen Huang
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Mutual Tek Ind Co Ltd
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Abstract

The present invention provides a method for producing a bus line with a micro-bump array and a method for bonding the bus line. The disclosed method for producing a bus line comprises forming a photoresist dry film layer on the wires of a bus line, in which the photoresist dry film layer has a plurality of openings; and using an electroplating or non-electroplating process to form micro-bumps on the wires. When the micro-bumps are used to correspondingly contact an LCD glass substrate, PCB or IC component, only a non-conductive adhesive is required to bond the two together without necessary to use an anisotropic conductive adhesive/film.

Description

200527998 九、發明說明: 【發明所屬之技術領域】 本發明係一種具微凸塊陣列之排線及其接合方法,尤 .指一種毋須使用異方性導電膠/膜,藉由形成於排線上的 .微凸塊陣列與基板或Ic元件之對應接構成電連接。 【先前技術】 在導線排線和1C元件以及LCD破璃基板和PCB連結 ^ 技術中,異方性導電膠(Anis〇tr〇pic-c〇nductive Paste, ACP)或異方性導電膜(Anjs〇tr〇pic 〇〇门〜如^ f丨丨⑴,AcF) 係扮决-個結合的角色。異方性導電膜/膠的組成成分中 包含有小顆粒的金屬顆粒,並均勻分佈在膠體中。 當排線欲結合至LCD玻璃基板或PCB時,係利用異 方性導電膜/膠黏合兩者,故膠體中的金屬顆粒會介於線 路及LCD玻璃基板或⑽當中,異方性導電膜/膠受到 麼合的位置,其内部膠體中的金屬顆粒係作為導電體,藉 • ^傳遞信號。而沒被壓合到的金屬粒子則不會導通,同時 膠材也當作黏合劑,黏合線路板和基板或是線路板和1C 元件。 如第,、圖A、B所示,一排線(7 〇 )上的導電線路 (7 1 )係利用異方性導電膠/膜(8 〇 )結合於一基板 上7 2 ) ,該異方性導電膠(8 〇 )即介於其令當作黏 δ劑而包含在内部的金屬顆粒(8 i )係當作導體,該基 (72)可以疋—PCB的基板或是—的玻璃基 反’而形成於L CD玻璃基板上的導線可為透明電極㈠ 4200527998 IX. Description of the invention: [Technical field to which the invention belongs] The present invention relates to a wiring line with a microbump array and a bonding method thereof, in particular, it refers to a conductive line / film without using anisotropic conductive material, which is formed on the wiring line. The corresponding connection between the micro-bump array and the substrate or the IC component constitutes an electrical connection. [Previous Technology] In the wire routing and 1C components, and LCD broken glass substrate and PCB connection ^ technology, anisotropic conductive adhesive (Anis〇tr〇pic-c〇nductive Paste, ACP) or anisotropic conductive film (Anjs 〇tr〇pic 〇〇 gate ~ such as ^ f 丨 丨 ⑴, AcF) plays a combined role. The composition of the anisotropic conductive film / gum contains small particles of metal particles and is evenly distributed in the colloid. When the cable is to be bonded to the LCD glass substrate or PCB, the anisotropic conductive film / adhesive is used to bond the two. Therefore, the metal particles in the colloid will be between the circuit and the LCD glass substrate or glass. The anisotropic conductive film / Where the glue is subjected to the coupling, the metal particles in the internal colloid are used as electrical conductors to transmit the signal by ^. The uncompressed metal particles will not conduct, and the adhesive also acts as an adhesive, bonding the circuit board and the substrate or the circuit board and the 1C component. As shown in Figures A and B, the conductive line (7 1) on a row of wires (70) is bonded to a substrate using an anisotropic conductive adhesive / film (80), and the difference The square conductive adhesive (80) is the metal particle (8 i) contained in it as a δ adhesive, which serves as a conductor. The base (72) can be-PCB of the PCB or-glass. The lead formed on the glass substrate of the L CD may be a transparent electrode. 4

的空間,而膠體流 因而產生電性不良 200527998 T〇)或是I呂線。 如第七圖所示,為利用異方性導電膠/膜(8〇)結 合一1C ^(73)上的金屬凸塊(74)和排線(7 0 )上的線路(7 1 )相互結合,lc Α件(7 3 )上的金 屬凸塊(74)也是透過異方性導電膠々(8〇)中的 金屬顆粒(8 1 )和線路(7 1 )相互導通。 請參見第八圖所示,係、利用—種非導電性的膠/膜(8 2) (N〇n-Conductive film 〇「paste, NcF Ncp)的結 合方式,丨C元件(7 3)上之金屬凸抽rr7 <金屬凸塊(7 4 )係藉由非 導電性的膠/m(82)的黏結力量和導線(川相互 結合而導通,由於當中沒有導電的金屬顆粒作為媒介,而 是完全靠黏膠的力*’故其可靠度不佳故並未廣泛使用。 縱使如前面所述使用異方性導電膠/膜(8 〇)的方 式,仍是存在有下列缺點: 1 ·結合點四周必需有供膠體流通 通會造成内涵的金屬顆粒分佈不均勾, 問題。 2 ·導線的線寬、線距設計必須考慮金屬顆粒的尺寸 大小,否則會產生短路或是電路導通不良。 3 ·異方性導電膠/膜製程複雜。 4·由於所使用到的金屬顆粒特殊 膠/膜價格昂貴,供應來源有限。 【發明内容】 導致異方性導電 導電 鑑於上述習知使用異方性 膠/膜的衍生缺點,本 5 200527998 發明之主要目的係提出一種具微凸塊陣列之排線製法,以 该製法所彳于之排線係可直接對應接觸 、l 破璃基板戎 p c Β上之導線而毋須使用異方性導電膠/膜。土板歲 為達成前述目的,本發明之排線製法係包含·· 形成複數金屬導線於一基材表面上; 其中該光阻乾膜 塗佈一光阻乾膜層於該金屬導線上 層係形成複數光阻開孔; 層, 形成金屬微凸塊於該光阻開孔 其中該金屬微凸塊係形成於金屬 内並去除該光阻乾膜 導線上,· 電鍍一保護層於該金屬微凸塊表面。 如述複數光阻開孔可排列為矩陣形狀。 月ίι述複數光阻開孔係均勻分佈於基材表面上。 珂述金屬微凸塊係可利用電鍍或非電鍍方式形成。 以該製法所得之排線,於黏合至L c D玻璃基板或ρ C Β上之導線時,其導電微凸塊係能直接接觸在基板或ρ C Β上的導線,兩者之間僅須以非導電膠/膜黏合即可。 【實施方式】 本舍明的内容是將微凸塊陣列(mjcr〇_bL)ITIp array)製 作在排線的導線上,使得排線在接合到Lcd玻璃基板、pcb 或丨c元件可以無需使用異方性導電膜(ACF)或異方性導電 膝(ACP) ’利剞述微凸塊陣列(mjcro-bump array)取代ACF 或ACP裡面的金屬顆粒,在導線接合時只需要用到一般易 於取得的非導電膠材(例如Non-conductive paste )。 200527998 请參閱第一圖A、Rw β所不,百先在一基材,例如軟板 ,印刷電路板(PCB)上形成有多道金屬導線(1 D, 藉以構成一排線(1 Q )。 一請ί閱第二圖A'B所示,在形成有導線(11)的 一^面’復利用光罩形成右@ u 成有具矩陣排列光阻開孔(1 2 ) 案的光阻乾膜層(i 3 ) 。士认丄 丄匕J園 3 )由於光阻開孔(1 2 )係為陣 列圖形’所以均勻分佈在該 應到金屬導線(1 ;L )的對' 、,無刻意對 )的對位問喊,惟必須考量的是金屬 導線(11)的線距、線寬因素,再決定光阻開孔( :分佈密度。陣列上光阻開?“12)的排列可以和金屬 ^線(1 1 ) $成4 5度的夾角,而且確保金属導線(工 1 )上必定會有光阻開孔(1 2 )。 請參閱第三圖A、B所示,利用電鑛或無電錄方式, 於光阻開孔(1 2 )的位置上係形成導電微凸塊(丄4 ) 由於光阻開孔(12)係'平均分佈在排線(1〇)表面, 故即使在非金屬導線(Η )的位置是有光阻開孔(12) 惟電㈣程只會在金屬表面形成’所以前述導電微凸塊 4 )只會在金屬導線(! !)上形成。電鍍製程完畢後, 係去除該光阻乾膜層(1 3 ),形成的微凸塊(工4 )陣 列再於表面鍍錫、鎳或金當作一表面保護層,如此—完整 的排線(1 0 )架構係已形成’而該排線(工〇 )之接2 :二以下將以該排線(10)如何結合至一…破二 基扳或是印刷電路板舉例說明。 請參見第四圖A、B所示,前述形成有微凸塊(i4) 7 200527998 的排線(1 0 ),係可利用一般易於取得的非導電膠(2 〇)黏合至一基板(7 0 )上,該基板(7 0 )可以是一 PCB的基板或是一LCD的玻璃基板,而形成於LCD 玻璃基板上的導線可為透明電極(I T〇)或是鋁線,前 述微凸塊(1 4 )便是與基板(7 0 )的導線或接點形成 接觸。 同理,請參閱第五圖Space, and colloidal flow leads to electrical failure (200527998 T〇) or I Lu line. As shown in the seventh figure, an anisotropic conductive adhesive / film (80) is used to combine a metal bump (74) on a 1C ^ (73) and a line (7 1) on a cable (70). In combination, the metal bumps (74) on the lc A piece (7 3) are also electrically connected to each other through the metal particles (8 1) and the lines (7 1) in the anisotropic conductive rubber (80). Please refer to the eighth figure, a non-conductive adhesive / film (8 2) (Non-Conductive film 〇paste, NcF Ncp) bonding method, on the C element (7 3) The metal bump rr7 < metal bump (7 4) is connected by the non-conductive glue / m (82) bonding force and the wire (Sichuan combined with each other to conduct electricity, because there is no conductive metal particles as a medium, and It is completely relying on the force of the adhesive * ', so its reliability is not good, so it is not widely used. Even if the method of using anisotropic conductive adhesive / film (80) as described above, there are still the following disadvantages: 1 · There must be a colloid circulation around the junction, which will cause uneven distribution of the metal particles in the connotation. 2 · The design of the wire width and line spacing must consider the size of the metal particles, otherwise short circuits or poor circuit continuity may occur. 3 · Anisotropic conductive adhesive / film has a complicated manufacturing process. 4. · Due to the expensive price of special particles / films of metal particles, the supply source is limited. [Summary of the Invention] Anisotropic Conductive Conduction In view of the above-mentioned conventional use of anisotropic conductive Derivative disadvantages of glue / film, Ben 5 20 0527998 The main purpose of the invention is to propose a method of wiring with a micro-bump array. The wiring based on this method can directly correspond to the contact on the glass substrate and the PCB without using anisotropic conduction. Adhesive / film. In order to achieve the aforementioned object, the method for making wires according to the present invention includes: forming a plurality of metal wires on a substrate surface; wherein the photoresist dry film is coated with a photoresist dry film layer on the metal The upper layer of the wire forms a plurality of photoresistive openings; a layer forms metal microbumps in the photoresistive openings, wherein the metal microbumps are formed in the metal and the photoresist dry film wire is removed, and a protective layer is plated on The surface of the metal micro-bumps. For example, the plurality of photoresistive openings can be arranged in a matrix shape. The plurality of photoresistive openings are uniformly distributed on the surface of the substrate. Keshu metal micro-bumps can be electroplated or non-electroplated. When the wire obtained by this manufacturing method is bonded to the wire on the L c D glass substrate or ρ C Β, the conductive micro-bumps can directly contact the wire on the substrate or ρ C Β. Non-conductive adhesive / film [Embodiment] The content of the present invention is to make a micro bump array (mjcr0_bL) ITIp array) on the wire of the cable, so that the cable is bonded to the LCD glass substrate, pcb or 丨 c Components do not need to use anisotropic conductive film (ACF) or anisotropic conductive knee (ACP) 'Mjcro-bump array' instead of metal particles in ACF or ACP, only need to wire bonding Non-conductive paste (such as Non-conductive paste) that is generally easy to obtain is used. 200527998 Please refer to the first picture A, Rw β. First, it is formed on a substrate, such as a flexible board and a printed circuit board (PCB). There are multiple metal wires (1 D), which form a row of wires (1 Q). As shown in Figure A'B of the second figure, a photoresist is formed on the first surface of the conductive wire (11) by using a photomask to form a photoresist with a matrix array of photoresistive openings (1 2). Dry film layer (i 3). Shi Jieyuan 3) Because the photoresistive openings (1 2) are array patterns, so they are evenly distributed in the alignment of the pairs of metal wires (1; L), without intentional alignment) Shout, but the line spacing and line width of the metal wire (11) must be considered before determining the photoresistance openings (: distribution density. The arrangement of photoresistance openings on the array? "12) can be aligned with metal wires (1 1 ) $ At an angle of 45 degrees, and make sure that there will be photoresistive openings (12) in the metal wire (work 1). Please refer to the third picture A, B, using the electric ore or non-electric recording method. Conductive micro-bumps (丄 4) are formed at the positions of the photoresistive openings (12). Since the photoresistive openings (12) are 'evenly distributed on the surface of the wiring (10), even in non-metallic wires (Η ) Is the photoresistive opening (12), but the electrical process will only be formed on the metal surface, so the aforementioned conductive micro-bumps 4) will only be formed on the metal wire (!!). After the plating process is completed, it is removed The photoresist dry film layer (1 3), the formed micro-bump (work 4) array is then plated with tin, nickel or gold on the surface as a surface protection layer, so-complete The structure of the cable (10) has been formed, and the connection of the cable (work 0) is 2: the following two will be described by way of how the cable (10) is combined with a ... breaking two base plates or a printed circuit board. Please refer to the fourth diagrams A and B. The aforementioned micro-bumps (i4) 7 200527998 ribbon wires (1 0) are formed by bonding to a substrate (7) with a non-conductive adhesive (20) which is generally easily available. 0), the substrate (70) may be a PCB substrate or an LCD glass substrate, and the wires formed on the LCD glass substrate may be transparent electrodes (IT0) or aluminum wires, and the aforementioned micro bumps (1 4) is to make contact with the wires or contacts of the substrate (70). Similarly, please refer to the fifth figure

應用於結合一 1 C元件(7 3 ),排線(1 0 )上的微凸 塊(1 4 )係對應接觸於! c元件(7 3 )的金屬凸塊(7 4 ),兩者之間同樣是以非導電膠(2 〇 )加以黏合。 綜上所述,本發明利用形成有微凸塊之排線結合於L C =之玻縣板或是印刷電路板上時,只須使用到非導電 耀材即彳’毋須使用到成本昂貴的異方性導電膝/膜, :=,對於降低成本及製程複雜度均有相當明顯的進 ^故本案於符合發明專利要件前提之下,爰依法提出申 【圖式簡單說明】 第—圖A :係本發明於 剖面圖。It is used to combine a 1 C component (7 3), and the micro bumps (1 4) on the cable (1 0) are in contact with each other! The metal bump (7 4) of the c element (7 3) is also bonded with a non-conductive adhesive (20). To sum up, when the present invention utilizes a micro-bump formed wire to be bonded to a LC glass board or a printed circuit board, it is only necessary to use a non-conductive flammable material. The square conductive knee / membrane,: =, has made significant progress in reducing costs and process complexity. Therefore, under the premise of meeting the requirements of the invention patent, the application is submitted according to the law. [Schematic description] Section-Figure A: This invention is a sectional view.

一軟板或P c B 上形成導線之A conductor formed on a flexible board or P c B

第一圖B 弟一圖A 圖 係第一圖A之底面示意圖 係本發明於排線上形成光 阻乾膜層之剖面 第 200527998 圖 第三圖A : 係本發明於排線上形成導電微凸塊之剖面The first diagram B, the first diagram A, and the bottom diagram of the first diagram A are cross-sections of a photoresist dry film layer formed on a wiring line according to the present invention. 200527998 FIG. The third diagram A: The present invention forms a conductive micro-bump on a wiring line. Section

第三圖B 第四A圖 第四圖B 係第三圖A之底面示意圖。 係本發明排線結合至一基板之示意圖。 係苐四圖A之頂面示意圖。 第五圖:係本發明排線結合至一工〇元件之示意圖。 第〆、圖A .係習知利用異方性導電膜或導電膠結合排 線至一基板之剖面圖。 第六圖B :係第六圖A之頂面示意圖。 第七圖··係習知利用異方性 .τ ^ 乃庄V電膠或導電膜結合排線 至 I C 7L件之剖面圖。 第八m知㈣非導電性^膜結合排線至 C 7L件之剖面圖。 【主要元件符號說明】 (1 0 )排線 (1 2 )光阻開孔 (1 4 )微凸塊 (7 0 )排線 (7 2 )基板 (7 4 )金屬凸塊 (8 1 )金屬顆粒 (1 1 )金屬線路 (1 3 )光阻乾膜層 (2 〇 )非導電膠 (71)線路 (7 3 ) I C元件 (80)異方性導電膠/膜 (8 2 )非導電性膠〆膜 9The third picture B The fourth picture A The fourth picture B is a bottom view of the third picture A. It is a schematic diagram of the invention in which a cable is coupled to a substrate. This is the top schematic diagram of Figure 4A. Fifth figure: It is a schematic diagram of the invention in which the cable is bonded to a component. Figure IX and Figure A are cross-sectional views of conventionally using an anisotropic conductive film or conductive adhesive to bond wires to a substrate. Fig. 6B is a schematic top view of Fig. 6A. The seventh figure is a cross-section view of the conventional use of anisotropy. Τ ^ is Zhuang V electric glue or conductive film combined with wiring to IC 7L. The eighth m is a cross-sectional view of the non-conductive ^ film bonding and wiring to the C 7L component. [Description of main component symbols] (1 0) cable (1 2) photoresistance opening (1 4) micro bump (7 0) cable (7 2) substrate (7 4) metal bump (8 1) metal Particles (1 1) metal circuit (1 3) photoresist dry film layer (20) non-conductive adhesive (71) circuit (7 3) IC component (80) anisotropic conductive adhesive / film (8 2) non-conductive Plastic film 9

Claims (1)

200527998 十、申請專利範圍: 1 · 一種具微凸塊陣列之排線製法,包含·· 形成複數金屬導線於一基材表面上; 塗佈一光阻乾膜層於該金屬導線上,其中該光阻乾膜 層係形成複數光阻開孔; 形成金屬微凸塊於該光阻開孔内並去除該光阻乾膜 層’其中該金屬微凸塊係形成於金屬導線上; 電鍍一保護層於該金屬微凸塊表面。 ^ 2 ·如申請專利範圍第χ項所述具微凸塊陣列之排線 製法,前述複數光阻開孔係排列為矩陣形狀。 3 ·如申請專利範圍第1項所述具微凸塊陣列之排線 製法’前述複數光阻開孔係均勻分佈於基材表面上。 4 ·如申請專利範圍第1項所述具微凸塊陣列之排線 製法,前述金屬微凸塊係電鍍形成。 5 ·如申請專利範圍第1項所述具微凸塊陣列之排線 製法,前述金屬微凸塊係非電鍍形成。 1 6 ·如申請專利範圍第1項所述具微凸塊陣列之排線 製法’該保護層可為錫、錄或金。 7 · —種具微凸塊陣列之排線,係於一基材表面形有 複數金屬導線,各金屬導線表面係形成複數導電微凸塊。 8 · —種如申請專利範圍第7項之排線的接合方法, 係令該排線上之導電微凸塊與一待接合物上的導線構成對 應接觸,復施加一非導電性膠於排線及待接合物之間,藉 由強化該導電微凸塊與導線的對應接觸。 10 200527998 9 ·如申請專利範圍第1項所述之排線的接合方法, 該待接合物係為一 L C D玻璃基板。 1 0 ·如申請專利範圍第1項所述之排線的接合方 β 法,該待接合物係為一印刷電路板(P C Β )。 十一、圖式: 如次頁200527998 10. Scope of patent application: 1. A wiring method with micro-bump array, including: forming a plurality of metal wires on a substrate surface; coating a photoresist dry film layer on the metal wires, wherein the The photoresist dry film layer forms a plurality of photoresist openings; forming metal microbumps in the photoresist openings and removing the photoresist dry film layer; wherein the metal microbumps are formed on a metal wire; electroplating for protection Layer on the surface of the metal microbump. ^ 2 · According to the wiring method with a microbump array as described in item χ of the patent application range, the aforementioned plurality of photoresistive openings are arranged in a matrix shape. 3. The method of manufacturing a wiring with a microbump array as described in item 1 of the scope of the patent application 'The aforementioned plurality of photoresist openings are uniformly distributed on the surface of the substrate. 4 · According to the wiring method with a microbump array described in item 1 of the scope of the patent application, the aforementioned metal microbumps are formed by electroplating. 5 · According to the method of wiring with a micro-bump array described in item 1 of the scope of patent application, the aforementioned metal micro-bumps are formed by electroless plating. 16 · According to the method of wiring with a micro-bump array as described in item 1 of the scope of the patent application, the protective layer may be tin, tin or gold. 7 · — A kind of micro-bump array line is formed on the surface of a substrate with a plurality of metal wires, and the surface of each metal wire forms a plurality of conductive micro-bumps. 8 · —A method of bonding a cable such as item 7 of the scope of the patent application, in which the conductive micro-bumps on the cable are in corresponding contact with a wire on a to-be-joined object, and a non-conductive adhesive is applied to the cable And to-be-joined objects, by strengthening the corresponding contact between the conductive microbumps and the wires. 10 200527998 9 · According to the method for bonding wires as described in item 1 of the scope of patent application, the object to be bonded is an L C D glass substrate. 1 0 · According to the method β of the method for bonding wires according to item 1 of the scope of the patent application, the object to be bonded is a printed circuit board (PCB). Eleven, schema: as the next page 1111
TW94107683A 2005-03-14 2005-03-14 Method for making cable with a conductive bump array, and method for connecting the cable to a task object TWI314030B (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109273369A (en) * 2017-07-17 2019-01-25 中芯国际集成电路制造(上海)有限公司 Chip packaging method and chip-packaging structure

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109273369A (en) * 2017-07-17 2019-01-25 中芯国际集成电路制造(上海)有限公司 Chip packaging method and chip-packaging structure
CN109273369B (en) * 2017-07-17 2020-08-28 中芯国际集成电路制造(上海)有限公司 Chip packaging method and chip packaging structure

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