TW200525304A - Enhancing photoresist performance using electric fields - Google Patents

Enhancing photoresist performance using electric fields Download PDF

Info

Publication number
TW200525304A
TW200525304A TW093130021A TW93130021A TW200525304A TW 200525304 A TW200525304 A TW 200525304A TW 093130021 A TW093130021 A TW 093130021A TW 93130021 A TW93130021 A TW 93130021A TW 200525304 A TW200525304 A TW 200525304A
Authority
TW
Taiwan
Prior art keywords
photoresist
electric field
patent application
scope
exposing
Prior art date
Application number
TW093130021A
Other languages
Chinese (zh)
Other versions
TWI294562B (en
Inventor
Robert Bristol
Hei-Di Cao
Manish Chandhok
Robert Meagley
Vijayakumar Ramachandrarao
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of TW200525304A publication Critical patent/TW200525304A/en
Application granted granted Critical
Publication of TWI294562B publication Critical patent/TWI294562B/en

Links

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/22Masks or mask blanks for imaging by radiation of 100nm or shorter wavelength, e.g. X-ray masks, extreme ultraviolet [EUV] masks; Preparation thereof
    • G03F1/24Reflection masks; Preparation thereof
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y40/00Manufacture or treatment of nanostructures
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/004Photosensitive materials
    • G03F7/09Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers
    • G03F7/093Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers characterised by antistatic means, e.g. for charge depletion
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/004Photosensitive materials
    • G03F7/09Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers
    • G03F7/11Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers having cover layers or intermediate layers, e.g. subbing layers
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/16Coating processes; Apparatus therefor
    • G03F7/168Finishing the coated layer, e.g. drying, baking, soaking
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/20Exposure; Apparatus therefor
    • G03F7/2002Exposure; Apparatus therefor with visible light or UV light, through an original having an opaque pattern on a transparent support, e.g. film printing, projection printing; by reflection of visible or UV light from an original such as a printed image
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26Processing photosensitive materials; Apparatus therefor
    • G03F7/30Imagewise removal using liquid means
    • G03F7/3007Imagewise removal using liquid means combined with electrical means, e.g. force fields
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26Processing photosensitive materials; Apparatus therefor
    • G03F7/38Treatment before imagewise removal, e.g. prebaking

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Nanotechnology (AREA)
  • Structural Engineering (AREA)
  • Architecture (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Materials For Photolithography (AREA)

Abstract

Electric fields may be advantageously used in various steps of photolithographic processes. For example, prior to the pre-exposure bake, photoresists that have been spun-on the wafer may be exposed to an electric field to orient aggregates or other components within the unexposed photoresist. By aligning these aggregates or other components with the electric field, line edge roughness may be reduced, for example in connection with 193 nanometer photoresist. Likewise, during exposure, electric fields may be applied through uniquely situated electrodes or using a radio frequency coil. In addition, electric fields may be applied at virtually any point in the photolithography process by depositing a conductive electrode, which is subsequently removed during development. Finally, electric fields may be applied during the developing process to improve line edge roughness.

Description

200525304 (1) 九、發明說明 【發明所屬之技術領域】 本發明大體而言係關於光阻之圖案化。 【先前技術】 光阻可用以將一圖案以一可重複型式從一光罩轉移至 一半導體晶圓。大體而言,微影製程牽涉到整個基本步驟 。一開始,一光阻係藉由一旋塗程序而形成在晶圓的頂面 。多餘的溶劑接著會在預曝光烘烤程序中被移除。之後, 在晶圓上之特定區域會被選擇性地曝露於輻射中。接下來 ,該晶圓會在所謂的後曝光烘烤中被烘烤。然後,該晶圓 以及尤其光阻會被顯影及淸洗。受曝光之區域可能會抵抗 淸除或者更爲傾向於被淸除而使得一光罩之圖案以一種可 重複方式被轉移至該晶圓。 從光阻被轉移至底層的圖案之品質至少部分基於所謂 的線邊緣粗造度。被轉移至光阻之直線愈粗糙,則被轉移 至該半導體晶圓之圖案愈粗糙,而這接著會影響到裝置在 製造完成時的性能。 因此,吾人意欲降低光阻的直線邊緣粗糙度。 【發明內容】及【實施方式】 現請參照圖1,一半導體基板1 2,諸如一由其他材料 層(諸如介電層)所覆蓋之晶圓係由一未曝光、未顯影之 光阻1 0所覆蓋。該光阻〗〇可被旋塗在該基板1 2上。在 -5- 200525304 (2) 一實施例中,該基板1 2可被拋光且該光阻10可曝露至一 由標記爲E之電場。 在一實施例中,一電場係在一預施加烘烤之前或期間 來供應,並且可增進在光阻中之聚合物的分佈。該光阻1 0 可以爲一 193奈米或一遠紫外線(EUV )光阻,其可以爲 兩聚合物之混合物及/或一包含有極性及非極性成份兩者 之任意異量分子聚合物。該光阻1 〇可以爲水合式聚合物 或異量分子聚合物,諸如聚(甲基丙烯酸酯)基或聚羥苯 乙烯馬來脂酐及烯烴基塊狀聚合物。 該193奈米光阻可具有隨意分佈在所形成之光阻10 中之聚集體。這些聚集體在某些實施例中會造成線邊緣粗 糙度。該聚集體可正好在將該光阻10旋塗在半導體基板 1 2之後形成,而不管後續的曝光及顯影程序。再者,光阻 1 〇之粗糙度在後續蝕刻程序中會被轉移至底層的基板1 2 〇 該聚集體可比該光阻10整體還濃密。這些聚集體之 密度可藉由降低酸擴散/進入至該聚集體而防止其在曝光 之後完全顯影。由這些聚集體所造成的一個問題在於其於 橫向及垂直方向上的延伸。詳言之,在平行於基板1 2之 表面之方向上的延伸在某些情況下可能會產生線邊緣粗糙 度。 針對該等聚集體之一可能原因爲構成光阻10之聚合 物鏈之極性部分之間的水合構造。將極性聚合物鏈元件定 位在一比水平方向更爲垂直之方向上可以降低線邊緣粗糙 -6 - 200525304 (3) 度。 經由曝露於一電場,該聚集體Μ 1 (圖2 )可變得較爲 對準於垂直方向,如圖3之M2所示,並且水平地聚合。 由於在該光阻之大量聚集體、分子或元素上之此一動 作之結果,可以降低該線邊緣粗糙度。 當光阻1 0高於其玻璃轉變溫度時,電場可在曝光之 前且在預曝光烘烤之前或期間來施加。這可以藉由加熱該 光阻1 〇或藉由玻璃轉變溫度之溶劑引致的抑制來達成。 曝露至圖1所示之電場E可能牽涉到以一非極性溶劑來膨 脹該光阻1 〇。一旦該光阻1 0已由該電場所定位,便可將 該溶劑移除,例如’藉由加熱(預曝光烘烤)或其他的溶 劑移除技術。該溶劑移除可有效地”凍結”或造成永久性的 分子垂直方位。聚合物分之之方位可在預烘烤期間或在預 曝光烘烤之前產生。在一實施例中,可採用兩個預曝光烘 烤:一初始烘烤係定位該聚合物,而第二次烘烤則係移除 該溶劑。 溶劑已移除之已定位光阻10便可在傳統的微影製程 中預備進行曝光及顯影。這些技術針對具有聚集體之1 93 奈米或EUV光阻係特別有用。 用以定位構成該光阻10之該聚合物或雙團塊異量分 子聚合物的電場E的電壓在一實施例中可大約爲數十伏特 。在產生電場E之電極之間的距離在一實施例中可大約爲 一微米,而在該光阻1 0中形成長範圍級數。形成光阻;! 〇 之聚合物膜可大約爲2 0 0奈米厚,且在一實例中於聚合物 -7- 200525304 (4) 矩陣中具有大約爲1 0 7至1 0 8 V /m之高電場。針對1 9 3奈 米之線邊緣粗糙度降低,排序之程度在水平上大約例如爲 5 - 2 0奈米。用以達成此結果之電壓可大約爲小於十伏特, 但在供應電場之電極與光阻1 〇之間的距離可大約爲數毫 米,其中一 3 0 0毫米晶圓用以構成該基板1 2。視晶圓之尺 寸而定,可採用大約數十至數百伏特之更高電壓來維持一 等效電場。 在某些實施例中,在預曝光烘烤期間供應一電場之潛 存優點爲一供應振盪電位勢可更平均地分佈在光阻劑中之 光酸發生器,藉以降低線邊緣粗糙度之一來源。 在另一實施例中,一電場可在曝光期間來供應。在曝 光期間,在某些實施例中,該電場可藉由添加能量至該遠 紫外線產生之副電極來加強光子速度,其中該副電極可針 對光酸產生器(PAGs )而反應。具有固有低線邊緣粗糙度 之光阻可在被曝露至一電場的情況下被加速至可接受的快 速光子速度。在曝光期間,添加至一游離電子之能量係取 決於所供應之電場強度及由該電子在其被重新吸附或散射 之前所移動之距離。針對一 5奈米散射距離及供應於1 00 奈米厚度之100伏特電壓而言,額外之能量大約爲5eV, 這可能比次電子之原始能量還多。 依照圖4,化學強化之遠紫外線光阻可利用從一電壓 源1 6所供應之電壓來予以控制。在此例中,該基板1 2可 以藉由一光阻層]0來予以覆蓋。一電位勢在後曝光烘烤 、預曝光烘烤或在曝光期間被供應通過該光阻1 0。在一實 200525304 (5) 方也例中’ δ亥電極1 6 a之形狀可以爲環形’以避免在曝光之 前使用該電極]6 a時會阻礙到曝照輻射。在曝露於遠紫外 線R之後,便會釋放出電子e。雖然在此描述使用一直流 電位勢1 6,然而亦可以採用一交流電源。 在另一實施例中,如圖5所示,一導電材料14之薄 層可施加在該光阻1 〇上以供應電位勢。在曝露於遠紫外 線R之後,便會釋放出電子e。在一實施例中,該導電材 料1 4可藉由例如旋塗來沉積。 該導電材料1 4可包含水溶性導電有機材料,例如, 機能化聚噻吩。該導電材料1 4亦可包含一導電性聚合物 ,例如,一 _磺酸鹽光酸產生器。除了鎗磺酸鹽以外,該 導電材料14亦可以包含酸性物質,例如,銨磺酸鹽。該 旋塗的電極材料14可以與習知的光阻共同作用。在一實 施例中,該導電材料1 4具有水溶性,使其在顯影階段可 被沖洗掉。 接下來,請參考圖6,使交流電通過一射頻(或其他 )線圈I 6b可藉由增加能量至遠紫外線產生之次要電子e 來加強光子速度。該線圈1 6b可包括所需要的電場而不會 阻礙該光阻1 〇之曝光。因此,該線圈1 6b可在曝光之前 、之後或期間來使用。 請參考圖7,在後曝光烘烤期間可以施加一電場至導 電層14。若該層足夠薄,則該層14亦可在曝光之前或期 間來使用。 每一低能量射頻線圈]6b或電極16a皆可供應電位勢 -9- 200525304 (6) 至該光阻而無需使用一導電材料1 4。該線圈1 6b或電極 1 6a可簡化在後曝光烘烤或預先曝光烘烤期間的場域曝光 〇 因此,在一實施例中,該光阻可被旋塗及曝光。然後 ,便可將如圖5及7所示之導電材料旋塗於其上。晶圓之 後曝光烘烤可藉由一供應電位勢來完成,如圖6及8所示 。之後,被曝光之結構便會顯影及被淸洗。或者,可在曝 光期間供應一電位勢。在又另一方式中,電位勢可在預曝 光烘烤期間來施加。該電位勢可例如使用射頻施加場而在 曝光或預曝光期間來施加。 在另一實施例中,電場可在光阻顯影期間提供輔助。 以一顯影劑來移除已曝光之經烘烤光阻可藉助於一電化學 反應來達成。該反應可以發生於一負電荷鹼性顯影劑材料 (諸如TMAH )與構成光阻之聚合物(例如一具有可被顯 影去除之雙團塊聚合物之酚基化合物)之間。在存在有一 電場的情況下,顯影劑氫氧根離子之局部濃度由波茲曼分 佈所給定: p (z)=p 0 expfeZW (z)/KT] 其中Ρ〇爲顯影劑之頂面處的離子濃度,e爲電荷,ζ 爲離子的價數,Ψ (ζ)爲局部電位勢,Κ爲波茲曼常數 ,而Τ爲溫度。 藉由增加一外部電位勢V (作業系統),該局部密度 改變爲: ρ (ζ)= p 0 exp[eZW (z) + V(z)KT] -10- 200525304 (7) 這使得該顯影劑濃度由所施加之電場所改變。 現請參考圖8,依照本發明另一實施例,一經曝露且 未經顯影之晶圓1 〇 a被放置在接地平面1 2上,且顯影劑 散佈在顯影模組3 0中直到產生一漿團爲止。接著將一帶 電的電極2 8放置在該漿團頂部且在該帶電電極2 8與該接 地平面1 2之間施加一電場。一直流電場(來自於直流電 位勢20)可在被定位在晶圓10a上之光阻26之頂部與底 部之間產生一電位勢梯度。該光阻顯影反應速率在該光阻 26之底部處較高,造成較爲垂直的輪廓且進而加強解析度 〇 當接地處在一較爲正向電位勢時,一來自於源22之 交流電位勢會將負電荷離子及鹼性顯影劑溶液吸向較靠近 該光阻26的底部。當帶電電極28處在較爲正向之電位勢 時,該交流電位勢會將帶負電荷之離子吸向該光阻的頂部 。這造成顯影劑離子之較爲均勻的分佈,諸如帶負電荷離 子,緩和該線邊緣粗糙度。 雖然本發明已針對有限的實施例來予以說明,然而習 於此技者應瞭解亦可由該等實施例衍生出許多的修飾及變 化。後附申請專利範圍涵蓋此等落入本發明之主旨及範疇 內的修飾及變化。 【圖式簡單說明】 圖1係本發明之一實施例之槪要截面視圖; 圖2係一曝露於圖]所示之電場之聚集體的槪要示意 -11 - 200525304 (8) 圖; 圖3係電場在圖2所示之聚集體上的作用之槪要示意 圖; 圖4係本發明另一實施例之槪要示意圖; 圖5係本發明又另一實施例之槪要截面視圖; 圖6係本發明再另一實施例之截面視圖; 圖7係本發明又再另一實施例之截面視圖;及 圖8係依照本發明之一實施例之裝置之槪要截面視圖 【主要元件之符號說明】 1 〇 :光阻 12 :基板 1 4 :導電材料 ]6 :電壓源 1 6 a :電極 1 6 b :線圈 2 0 :直流電場 22 :源 2 6 :光阻 2 8 :電極 3 〇 :顯影模組 E :電場 R :輻射 -12- 200525304 (9) e :電子 m〗:聚集體 m2 :聚集體200525304 (1) IX. Description of the invention [Technical field to which the invention belongs] The present invention generally relates to the patterning of photoresist. [Prior Art] Photoresist can be used to transfer a pattern from a photomask to a semiconductor wafer in a repeatable pattern. Generally speaking, the lithography process involves the entire basic steps. Initially, a photoresist was formed on the top surface of the wafer by a spin coating process. Excess solvent is then removed during the pre-exposure baking process. After that, certain areas on the wafer are selectively exposed to radiation. Next, the wafer is baked in a so-called post-exposure bake. The wafer and especially the photoresist are then developed and cleaned. The exposed area may resist erasure or be more prone to erasure so that the pattern of a reticle is transferred to the wafer in a repeatable manner. The quality of the pattern transferred from the photoresist to the bottom layer is based at least in part on the so-called line edge roughness. The rougher the straight line transferred to the photoresist, the rougher the pattern transferred to the semiconductor wafer, which in turn will affect the performance of the device at the completion of manufacturing. Therefore, I intend to reduce the straight edge roughness of the photoresist. [Summary of the Invention] and [Embodiments] Referring now to FIG. 1, a semiconductor substrate 12, such as a wafer covered by a layer of other materials (such as a dielectric layer), is formed by an unexposed, undeveloped photoresist 1 0 is covered. The photoresist can be spin-coated on the substrate 12. In an embodiment of 2005-5-304 (2), the substrate 12 can be polished and the photoresist 10 can be exposed to an electric field labeled E. In one embodiment, an electric field is supplied before or during a pre-applied bake and can improve the distribution of the polymer in the photoresist. The photoresist 10 can be a 193 nm or an extreme ultraviolet (EUV) photoresist, which can be a mixture of two polymers and / or an arbitrary molecular polymer containing both polar and non-polar components. The photoresist 10 may be a hydrated polymer or an isomolecular polymer such as a poly (methacrylate) -based or polyhydroxystyrene maleic anhydride and an olefin-based block polymer. The 193 nm photoresist may have aggregates randomly distributed in the formed photoresist 10. These aggregates can cause line edge roughness in some embodiments. The aggregate can be formed right after the photoresist 10 is spin-coated on the semiconductor substrate 12 regardless of subsequent exposure and development procedures. In addition, the roughness of the photoresist 10 may be transferred to the underlying substrate 12 in a subsequent etching process. The aggregate may be denser than the photoresist 10 as a whole. The density of these aggregates can prevent them from fully developing after exposure by reducing acid diffusion / entry into the aggregates. One problem caused by these aggregates is their lateral and vertical extension. In detail, an extension in a direction parallel to the surface of the substrate 12 may cause line edge roughness in some cases. One possible cause for these aggregates is the hydrated structure between the polar portions of the polymer chains that make up the photoresist 10. Positioning the polar polymer chain element in a more vertical direction than the horizontal direction can reduce the line edge roughness -6-200525304 (3) degrees. By exposure to an electric field, the aggregate M 1 (Fig. 2) can become more aligned in a vertical direction, as shown in M2 of Fig. 3, and converge horizontally. As a result of this action on a large number of aggregates, molecules or elements of the photoresist, the line edge roughness can be reduced. When the photoresist 10 is above its glass transition temperature, the electric field may be applied before exposure and before or during pre-exposure baking. This can be achieved by heating the photoresistor 10 or by the solvent-induced suppression of the glass transition temperature. Exposure to the electric field E shown in FIG. 1 may involve expanding the photoresist 10 with a non-polar solvent. Once the photoresist 10 has been positioned by the electrical field, the solvent can be removed, such as by 'heating (pre-exposure baking) or other solvent removal techniques. This solvent removal can effectively "freeze" or cause permanent molecular vertical orientation. The orientation of the polymer may be generated during pre-baking or before pre-exposure baking. In one embodiment, two pre-exposure bakes may be used: an initial bake is to position the polymer, and a second bake is to remove the solvent. Positioned photoresist 10 with the solvent removed can be prepared for exposure and development in a conventional lithographic process. These techniques are particularly useful for 1 93 nm or EUV photoresist systems with aggregates. The voltage of the electric field E used to locate the polymer or bi-block heteroatomic polymer constituting the photoresist 10 may be about several tens of volts in one embodiment. The distance between the electrodes generating the electric field E may be about one micrometer in one embodiment, and a long range progression is formed in the photoresist 10. A photoresist is formed; a polymer film of about 〇 may be about 200 nanometers thick, and in one example has a polymer 7- 200525304 (4) matrix having about 107 to 108 V / m High electric field. For the reduction of the edge roughness of the 193 nanometer line, the degree of ordering is about 5-20 nanometers, for example. The voltage used to achieve this result may be approximately less than ten volts, but the distance between the electrode supplying the electric field and the photoresistor 10 may be approximately several millimeters, of which a 300 mm wafer is used to form the substrate 1 2 . Depending on the size of the wafer, higher voltages on the order of tens to hundreds of volts can be used to maintain an equivalent electric field. In some embodiments, the potential advantage of supplying an electric field during pre-exposure baking is to provide a photoacid generator that oscillates the potential more evenly in the photoresist, thereby reducing one of the line edge roughness source. In another embodiment, an electric field may be supplied during the exposure. During the exposure, in some embodiments, the electric field can enhance photon velocity by adding energy to a secondary electrode generated by the far ultraviolet rays, wherein the secondary electrode can react to photoacid generators (PAGs). Photoresists with inherently low line edge roughness can be accelerated to acceptable fast photon velocities when exposed to an electric field. During exposure, the energy added to a free electron depends on the strength of the supplied electric field and the distance traveled by the electron before it is re-adsorbed or scattered. For a 5 nanometer scattering distance and a 100 volt voltage supplied at a thickness of 100 nanometers, the extra energy is about 5 eV, which may be more than the original energy of the secondary electrons. According to Fig. 4, the chemically strengthened far-ultraviolet photoresist can be controlled using a voltage supplied from a voltage source 16. In this example, the substrate 12 may be covered by a photoresist layer] 0. A potential is supplied through the photoresist 10 during post-exposure baking, pre-exposure baking, or during exposure. In the example of Yi Shi 200525304 (5), the shape of the δ helium electrode 16 a may be ring-shaped to avoid using the electrode before exposure] 6 a will hinder the exposure radiation. After exposure to the far ultraviolet rays R, electrons e are released. Although the use of a DC potential 16 is described herein, an AC power source may be used. In another embodiment, as shown in FIG. 5, a thin layer of a conductive material 14 may be applied to the photoresist 10 to supply a potential. After exposure to the far ultraviolet rays R, electrons e are released. In one embodiment, the conductive material 14 may be deposited by, for example, spin coating. The conductive material 14 may include a water-soluble conductive organic material, for example, a functionalized polythiophene. The conductive material 14 may also include a conductive polymer, such as a sulfonate photoacid generator. In addition to the gunsulfonate, the conductive material 14 may also contain an acidic substance, such as an ammonium sulfonate. The spin-coated electrode material 14 can work with a conventional photoresist. In one embodiment, the conductive material 14 is water-soluble so that it can be washed away during the development stage. Next, referring to FIG. 6, passing the alternating current through a radio frequency (or other) coil I 6b can increase the photon speed by increasing energy to the secondary electron e generated by far ultraviolet rays. The coil 16b may include a required electric field without hindering the exposure of the photoresist 10. Therefore, the coil 16b can be used before, after or during exposure. Referring to FIG. 7, an electric field may be applied to the conductive layer 14 during post-exposure baking. If the layer is sufficiently thin, the layer 14 can also be used before or during exposure. Each low-energy RF coil] 6b or electrode 16a can supply a potential of -9-200525304 (6) to the photoresist without using a conductive material 14. The coil 16b or the electrode 16a can simplify field exposure during post-exposure baking or pre-exposure baking. Therefore, in one embodiment, the photoresist can be spin-coated and exposed. Then, a conductive material as shown in Figs. 5 and 7 can be spin-coated thereon. Post-exposure baking of the wafer can be accomplished by supplying a potential, as shown in Figures 6 and 8. After that, the exposed structure is developed and washed. Alternatively, a potential can be supplied during the exposure. In yet another approach, the potential can be applied during pre-exposure baking. This potential can be applied, for example, during exposure or pre-exposure using a radio frequency application field. In another embodiment, an electric field may assist during photoresist development. The removal of the exposed baked photoresist with a developer can be achieved by means of an electrochemical reaction. This reaction can occur between a negatively-charged alkaline developer material (such as TMAH) and a photoresist-forming polymer (e.g., a phenol-based compound with a bi-block polymer that can be removed by development). In the presence of an electric field, the local concentration of hydroxide ions of the developer is given by the Bozman distribution: p (z) = p 0 expfeZW (z) / KT] where P0 is at the top surface of the developer Ion concentration, e is the charge, ζ is the valence of the ion, 离子 (ζ) is the local potential, K is the Bozman constant, and T is the temperature. By increasing an external potential V (operating system), the local density changes to: ρ (ζ) = p 0 exp [eZW (z) + V (z) KT] -10- 200525304 (7) This makes the development The concentration of the agent is changed by the applied electric field. Now referring to FIG. 8, according to another embodiment of the present invention, once exposed and undeveloped wafer 10a is placed on the ground plane 12, and the developer is dispersed in the developing module 30 until a slurry is produced. Mission so far. A charged electrode 28 is then placed on top of the slurry mass and an electric field is applied between the charged electrode 28 and the ground plane 12. A DC electric field (from a DC potential 20) creates a potential gradient between the top and bottom of the photoresistor 26 positioned on the wafer 10a. The photoresist development reaction rate is higher at the bottom of the photoresist 26, resulting in a more vertical profile and further enhancing the resolution. When the ground is at a more positive potential, an AC potential from the source 22 It will attract negatively charged ions and alkaline developer solution closer to the bottom of the photoresist 26. When the charged electrode 28 is at a more positive potential, the AC potential will attract negatively charged ions to the top of the photoresist. This results in a more uniform distribution of developer ions, such as negatively charged ions, which eases the line edge roughness. Although the present invention has been described with respect to a limited number of embodiments, those skilled in the art will appreciate that many modifications and variations can be derived from these embodiments. The scope of the attached application patent covers such modifications and changes as fall within the spirit and scope of the present invention. [Brief description of the drawings] Fig. 1 is a schematic cross-sectional view of an embodiment of the present invention; Fig. 2 is a schematic diagram of an aggregate exposed to the electric field shown in Fig. -11-200525304 (8); 3 is a schematic diagram of the effect of the electric field on the aggregate shown in FIG. 2; FIG. 4 is a schematic diagram of another embodiment of the present invention; FIG. 5 is a schematic cross-sectional view of another embodiment of the present invention; 6 is a cross-sectional view of still another embodiment of the present invention; FIG. 7 is a cross-sectional view of still another embodiment of the present invention; and FIG. 8 is a main cross-sectional view of a device according to an embodiment of the present invention Explanation of symbols] 1 〇: photoresist 12: substrate 14 4: conductive material] 6: voltage source 16 a: electrode 16 b: coil 2 0: DC electric field 22: source 2 6: photoresist 2 8: electrode 3 〇 : Developing module E: Electric field R: Radiation-12- 200525304 (9) e: Electron m: Aggregate m2: Aggregate

-13--13-

Claims (1)

200525304 ⑴ 十、申請專利範圍 1 · 一種方法,包含: 以電場處理未經曝光之光阻。 2 ·如申請專利範圍第1項之方法,其中該處理步驟包 括使光阻曝露至電場,以降低形成在該光阻中之聚集體的 水平程度。 3 .如申請專利範圍第1項之方法,其中該處理步驟包 括藉由在將該光阻曝露至輻射之前先將光阻曝露至電場來 降低線邊緣粗糙度。 4 .如申請專利範圍第1項之方法,其中該處理光阻之 步驟包括在該光阻處於高於其玻璃轉變溫度的同時來將該 光阻曝露至電場。 5 ·如申請專利範圍第4項之方法,包括藉由加熱該光 阻來造成該光阻超過其玻璃轉變溫度。 6 .如申請專利範圍第5項之方法,包括藉由溶劑引發 下降來造成該光阻超過其玻璃轉變溫度。 7.如申請專利範圍第1項之方法,其中處理未經曝光 之光阻包括使用電極來產生該電場,且該電極具有開口, 可使該光阻被曝露於輻射。 8 ·如申請專利範圍第1項之方法,其中該處理步驟包 括在該光阻上沉積一導電層,以供應電場至該光阻。 9 ·如申請專利範圍第1項之方法,其中以電場處理未 經曝光之光阻包括藉由使交流電通過一線圈來產生該電場 -14- 200525304 (2) 1 ο ·如申請專利範圍第9項之方法,包括使用射頻線 圈。 1 1 . 一種方法,包含: 在光阻上形成導電層;及 使用該層將該光阻曝露至電場。 1 2 .如申請專利範圍第1 1項之方法,包括沉積該層以 使輻射可貫穿該層。 1 3 ·如申請專利範圍第1 1項之方法,其包括沉積導電 材料以形成該層,且在該光阻被顯影之後移除該層。 1 4 ·如申請專利範圍第1 1項之方法,包括旋塗該導電 層。 1 5 .如申請專利範圍第1 1項之方法,其中形成導電層 包括沉積水溶性導電材料以作爲該導電性電極。 16. —種方法,包含: 以藉由使交流電通過線圈而形成之電場來處理光阻。 1 7 ·如申請專利範圍第1 6項之方法,包括配置該線圈 以使該光阻可被曝露於輻射中。 1 8 ·如申請專利範圍第1 6項之方法,包括在該光阻被 曝露至輻射以轉移圖案至該光阻的同時將該光阻曝露至該 電場。 1 9 ·如申請專利範圍第1 6項之方法,包括使用一射頻 線圈。 2 0 · —種方法,包含: 曝露光阻至輻射;及 -15- 200525304 (3) 在曝露該光阻至輻射的同時將該光阻曝露至一電場。 2 1 ·如申請專利範圍第2 〇項之方法,包括使用電極來 將該光阻曝露至電場,該電極具有開口以使該輻射通過。 2 2 ·如申請專利範圍第2 0項之方法,包括經由電極使 該光阻曝露至輻射,該電極薄到足以使該輻射可以通過。 2 3 ·如申請專利範圍第2 〇項之方法,包括使用射頻線 圈來造成電場而使該光阻曝露至該電場。 24.如申請專利範圍第20項之方法,包括曝露該光阻 於極端紫外線輻射。 2 5 · —種方法,包含: 在基板上形成光阻; 在曝光之前烘烤該光阻;及 在烘烤該光阻的同時施加電場。 2 6 .如申請專利範圍第2 5項之方法,包括使用射頻線 圈來將該光阻曝露至一電場。 2 7 ·如申請專利範圍第2 5項之方法,包括使用具有開 口貫穿於其中之電極來將該光阻曝露至電場。 2 8 ·如申請專利範圍第2 7項之方法,包括使用環狀電 極。 29·如申請專利範圍第25項之方法,包括將該經烘烤 之光阻曝露於極端紫外線輻射。 3 0 . —種方法,包含: 顯影經照射之光阻;及 在顯影該經照射之光阻的同時將該光阻曝露至一電場 -16- 200525304 (4) 3 1 ·如申請專利範圍第3 0項之方法,包括造成該光阻 顯影速率在該光阻之底部高於頂部。 3 2 ·如申請專利範圍第3 0項之方法,包括施加交流電 位至該光阻。 3 3 ·如申請專利範圍第3 0項之方法,包括施加直流電 位至該光阻。 3 4 · —種半導體結構,包含: 基板,具有平面; 位在該基板上之光阻;及 散佈於該光阻中之聚集體,該聚集體實質上橫向對準 於該基板之平面。 3 5 ·如申請專利範圍第3 4項之結構,其中該光阻係氫 鍵結聚合物或異量分子聚合物。 3 6 ·如申請專利範圍第3 4項之結構,其中該基板爲一 晶圓。 3 7 . —種半導體結構,包含: 基板; 覆於該基板上之光阻;及 形成在該光阻上之水溶性導電層,該導電層可施加電 場至該光阻。 3 8 ·如申請專利範圍第3 7項之半導體結構,其中該導 電層包含機能性聚噻吩聚合物。 39·如申請專利範圍第38項之半導體結構,其中該導 -17- 200525304 (5) 電層包含一機能性聚噻吩聚合物及鏺磺酸鹽。 4 0 .如申請專利範圍第3 7項之半導體結構,其中該導 電層包含一機能性聚噻吩聚合物及一銨磺酸鹽。 -18-200525304 十 X. Scope of patent application 1 · A method including: processing an unexposed photoresist with an electric field. 2. The method of claim 1 in the patent application range, wherein the processing step includes exposing the photoresist to an electric field to reduce the level of the aggregates formed in the photoresist. 3. The method according to item 1 of the patent application scope, wherein the processing step includes reducing the line edge roughness by exposing the photoresist to an electric field before exposing the photoresist to radiation. 4. The method of claim 1, wherein the step of processing the photoresist comprises exposing the photoresist to an electric field while the photoresist is above its glass transition temperature. 5. The method according to item 4 of the patent application scope, comprising heating the photoresist to cause the photoresist to exceed its glass transition temperature. 6. The method of claim 5 including applying a solvent-induced drop to cause the photoresist to exceed its glass transition temperature. 7. The method of claim 1, wherein processing the unexposed photoresist includes using an electrode to generate the electric field, and the electrode has an opening so that the photoresist can be exposed to radiation. 8. The method of claim 1, wherein the processing step includes depositing a conductive layer on the photoresist to supply an electric field to the photoresist. 9 · The method according to item 1 of the scope of patent application, wherein treating the unexposed photoresist with an electric field includes generating the electric field by passing an alternating current through a coil -14- 200525304 (2) 1 ο The method includes using a radio frequency coil. 1 1. A method comprising: forming a conductive layer on a photoresist; and exposing the photoresist to an electric field using the layer. 12. The method of claim 11 in the scope of patent application, comprising depositing the layer so that radiation can penetrate the layer. 1 3. The method of claim 11 in the patent application scope, comprising depositing a conductive material to form the layer, and removing the layer after the photoresist is developed. 1 4 The method of claim 11 in the scope of patent application, including spin-coating the conductive layer. 15. The method according to item 11 of the scope of patent application, wherein forming a conductive layer includes depositing a water-soluble conductive material as the conductive electrode. 16. A method comprising: treating a photoresist with an electric field formed by passing alternating current through a coil. 17 · The method of claim 16 in the scope of patent application, including configuring the coil so that the photoresist can be exposed to radiation. 18 · The method of claim 16 in the patent application scope, including exposing the photoresist to the electric field while the photoresist is exposed to radiation to transfer a pattern to the photoresist. 19 · The method of claim 16 in the scope of patent application, including the use of a radio frequency coil. 2 0 · A method comprising: exposing a photoresist to radiation; and -15-200525304 (3) exposing the photoresist to an electric field while exposing the photoresist to radiation. 2 1 The method of claim 20, including using an electrode to expose the photoresist to an electric field, the electrode having an opening to allow the radiation to pass through. 2 2 · The method of claim 20, including exposing the photoresist to radiation via an electrode, the electrode being thin enough to allow the radiation to pass through. 2 3. The method of claim 20 in the scope of patent application includes using an RF coil to cause an electric field to expose the photoresist to the electric field. 24. The method of claim 20, including exposing the photoresist to extreme ultraviolet radiation. 2 5 · A method comprising: forming a photoresist on a substrate; baking the photoresist before exposure; and applying an electric field while baking the photoresist. 26. The method according to item 25 of the patent application scope, including using an RF coil to expose the photoresist to an electric field. 27. The method of claim 25, including using an electrode having an opening therethrough to expose the photoresist to an electric field. 2 8 · The method according to item 27 of the scope of patent application, including the use of a ring electrode. 29. The method of claim 25, including exposing the baked photoresist to extreme ultraviolet radiation. 3 0. A method comprising: developing the irradiated photoresist; and exposing the photoresist to an electric field while developing the irradiated photoresist -16- 200525304 (4) 3 1 The method of item 30 includes causing the photoresist development rate to be higher at the bottom of the photoresist than at the top. 3 2 · The method of claim 30, including applying an AC potential to the photoresist. 3 3 · The method of claim 30, including applying a DC potential to the photoresist. 3 4 · A semiconductor structure comprising: a substrate having a plane; a photoresist on the substrate; and aggregates interspersed in the photoresist, the aggregates being substantially laterally aligned with the plane of the substrate. 35. The structure according to item 34 of the scope of patent application, wherein the photoresist is a hydrogen-bonded polymer or a hetero-molecular polymer. 36. The structure according to item 34 of the scope of patent application, wherein the substrate is a wafer. 37. A semiconductor structure comprising: a substrate; a photoresist covering the substrate; and a water-soluble conductive layer formed on the photoresist, the conductive layer applying an electric field to the photoresist. 38. The semiconductor structure according to claim 37, wherein the conductive layer comprises a functional polythiophene polymer. 39. The semiconductor structure according to item 38 of the patent application, wherein the conductive layer comprises a functional polythiophene polymer and a sulfonate. 40. The semiconductor structure according to item 37 of the application, wherein the conductive layer includes a functional polythiophene polymer and an ammonium sulfonate. -18-
TW093130021A 2003-10-06 2004-10-04 Enhancing photoresist performance using electric fields TWI294562B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/679,816 US7374867B2 (en) 2003-10-06 2003-10-06 Enhancing photoresist performance using electric fields

Publications (2)

Publication Number Publication Date
TW200525304A true TW200525304A (en) 2005-08-01
TWI294562B TWI294562B (en) 2008-03-11

Family

ID=34394247

Family Applications (1)

Application Number Title Priority Date Filing Date
TW093130021A TWI294562B (en) 2003-10-06 2004-10-04 Enhancing photoresist performance using electric fields

Country Status (3)

Country Link
US (2) US7374867B2 (en)
TW (1) TWI294562B (en)
WO (1) WO2005038527A2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI744451B (en) * 2016-12-29 2021-11-01 美商應用材料股份有限公司 Apparatus for field guided acid profile control in a photoresist layer

Families Citing this family (59)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7463336B2 (en) * 2004-04-14 2008-12-09 Asml Netherlands B.V. Device manufacturing method and apparatus with applied electric field
US20060154152A1 (en) * 2005-01-10 2006-07-13 Intel Corporation Flare reduction in photolithography
US7541137B2 (en) * 2005-12-19 2009-06-02 Beach James V Resist resolution using anisotropic acid diffusion
ES2369583T3 (en) 2006-05-01 2011-12-02 Wake Forest University FIBROUS PHOTOVOLTAIC DEVICES AND APPLICATIONS OF THE SAME.
AU2006343396B2 (en) * 2006-05-01 2011-12-01 Wake Forest University Organic optoelectronic devices and applications thereof
US20080149178A1 (en) * 2006-06-27 2008-06-26 Marisol Reyes-Reyes Composite organic materials and applications thereof
EP2050151B1 (en) 2006-08-07 2011-10-12 Wake Forest University Method of producing composite organic materials
DE102006053074B4 (en) * 2006-11-10 2012-03-29 Qimonda Ag Structuring method using chemically amplified photoresists and exposure device
US8394483B2 (en) * 2007-01-24 2013-03-12 Micron Technology, Inc. Two-dimensional arrays of holes with sub-lithographic diameters formed by block copolymer self-assembly
US8083953B2 (en) * 2007-03-06 2011-12-27 Micron Technology, Inc. Registered structure formation via the application of directed thermal energy to diblock copolymer films
US8557128B2 (en) 2007-03-22 2013-10-15 Micron Technology, Inc. Sub-10 nm line features via rapid graphoepitaxial self-assembly of amphiphilic monolayers
US8097175B2 (en) 2008-10-28 2012-01-17 Micron Technology, Inc. Method for selectively permeating a self-assembled block copolymer, method for forming metal oxide structures, method for forming a metal oxide pattern, and method for patterning a semiconductor structure
US7959975B2 (en) 2007-04-18 2011-06-14 Micron Technology, Inc. Methods of patterning a substrate
US8294139B2 (en) 2007-06-21 2012-10-23 Micron Technology, Inc. Multilayer antireflection coatings, structures and devices including the same and methods of making the same
US8372295B2 (en) * 2007-04-20 2013-02-12 Micron Technology, Inc. Extensions of self-assembled structures to increased dimensions via a “bootstrap” self-templating method
US8404124B2 (en) * 2007-06-12 2013-03-26 Micron Technology, Inc. Alternating self-assembling morphologies of diblock copolymers controlled by variations in surfaces
US8080615B2 (en) * 2007-06-19 2011-12-20 Micron Technology, Inc. Crosslinkable graft polymer non-preferentially wetted by polystyrene and polyethylene oxide
US8283258B2 (en) 2007-08-16 2012-10-09 Micron Technology, Inc. Selective wet etching of hafnium aluminum oxide films
JP2011503849A (en) * 2007-11-01 2011-01-27 ウェイク フォレスト ユニバーシティ Lateral organic photoelectric device and use thereof
US8999492B2 (en) 2008-02-05 2015-04-07 Micron Technology, Inc. Method to produce nanometer-sized features with directed assembly of block copolymers
US8101261B2 (en) 2008-02-13 2012-01-24 Micron Technology, Inc. One-dimensional arrays of block copolymer cylinders and applications thereof
US8426313B2 (en) 2008-03-21 2013-04-23 Micron Technology, Inc. Thermal anneal of block copolymer films with top interface constrained to wet both blocks with equal preference
US8425982B2 (en) 2008-03-21 2013-04-23 Micron Technology, Inc. Methods of improving long range order in self-assembly of block copolymer films with ionic liquids
US8114300B2 (en) 2008-04-21 2012-02-14 Micron Technology, Inc. Multi-layer method for formation of registered arrays of cylindrical pores in polymer films
US8114301B2 (en) 2008-05-02 2012-02-14 Micron Technology, Inc. Graphoepitaxial self-assembly of arrays of downward facing half-cylinders
US8097402B2 (en) * 2009-03-31 2012-01-17 Tokyo Electron Limited Using electric-field directed post-exposure bake for double-patterning (D-P)
US8304493B2 (en) 2010-08-20 2012-11-06 Micron Technology, Inc. Methods of forming block copolymers
EP2627938B1 (en) 2010-10-15 2018-09-05 Swagelok Company Push to connect conduit fitting with ferrule
US8288174B1 (en) 2011-03-24 2012-10-16 Tokyo Electron Limited Electrostatic post exposure bake apparatus and method
US8900963B2 (en) 2011-11-02 2014-12-02 Micron Technology, Inc. Methods of forming semiconductor device structures, and related structures
US9087699B2 (en) 2012-10-05 2015-07-21 Micron Technology, Inc. Methods of forming an array of openings in a substrate, and related methods of forming a semiconductor device structure
US9229328B2 (en) 2013-05-02 2016-01-05 Micron Technology, Inc. Methods of forming semiconductor device structures, and related semiconductor device structures
KR102099880B1 (en) * 2013-05-06 2020-04-10 삼성전자 주식회사 Lithography apparatus having effective thermal electron enhancement unit and method of forming pattern
US9177795B2 (en) 2013-09-27 2015-11-03 Micron Technology, Inc. Methods of forming nanostructures including metal oxides
WO2015061404A1 (en) 2013-10-24 2015-04-30 Swagelok Company Single action push to connect conduit fitting
US9377692B2 (en) 2014-06-10 2016-06-28 Applied Materials, Inc. Electric/magnetic field guided acid diffusion
US9366966B2 (en) * 2014-07-10 2016-06-14 Applied Materials, Inc. Electric/magnetic field guided acid profile control in a photoresist layer
US9280070B2 (en) * 2014-07-10 2016-03-08 Applied Materials, Inc. Field guided exposure and post-exposure bake process
US9733579B2 (en) 2014-10-15 2017-08-15 Applied Materials, Inc. Tooling configuration for electric/magnetic field guided acid profile control in a photoresist layer
US10095114B2 (en) 2014-11-14 2018-10-09 Applied Materials, Inc. Process chamber for field guided exposure and method for implementing the process chamber
US9823570B2 (en) 2015-04-02 2017-11-21 Applied Materials, Inc. Field guided post exposure bake application for photoresist microbridge defects
US9864276B2 (en) 2015-04-07 2018-01-09 Applied Materials, Inc. Laser annealing and electric field
US10458582B2 (en) 2015-04-23 2019-10-29 Swagelok Company Single action push to connect conduit fitting with colleting
JP6845155B2 (en) 2015-04-23 2021-03-17 スウエイジロク・カンパニー Single-acting push-push connection of conduit fittings with collets
US9829790B2 (en) 2015-06-08 2017-11-28 Applied Materials, Inc. Immersion field guided exposure and post-exposure bake process
US9927709B2 (en) 2015-10-02 2018-03-27 Applied Materials, Inc. Resist sensitivity and profile improvement via acid anion control during field-guided post exposure bake
US10203604B2 (en) * 2015-11-30 2019-02-12 Applied Materials, Inc. Method and apparatus for post exposure processing of photoresist wafers
US9958782B2 (en) 2016-06-29 2018-05-01 Applied Materials, Inc. Apparatus for post exposure bake
US9996006B2 (en) 2016-10-14 2018-06-12 Applied Materials, Inc. Resist sensitivity and profile improvement via acid anion control during field-guided post exposure bake
US9964863B1 (en) 2016-12-20 2018-05-08 Applied Materials, Inc. Post exposure processing apparatus
US10782606B2 (en) 2018-06-29 2020-09-22 Globalfoundries Inc. Photolithography methods and structures that reduce stochastic defects
US11650506B2 (en) 2019-01-18 2023-05-16 Applied Materials Inc. Film structure for electric field guided photoresist patterning process
WO2020205690A1 (en) 2019-04-01 2020-10-08 Swagelok Company Push to connect conduit fitting assemblies and arrangements
US20210041785A1 (en) * 2019-08-09 2021-02-11 Applied Materials, Inc. Process control of electric field guided photoresist baking process
US11429026B2 (en) 2020-03-20 2022-08-30 Applied Materials, Inc. Lithography process window enhancement for photoresist patterning
CN111438944B (en) * 2020-04-02 2021-10-01 吉林大学 Method for preparing nanoscale electric jet nozzle based on SU-8 glue electrolysis method
US11894240B2 (en) 2020-04-06 2024-02-06 Tokyo Electron Limited Semiconductor processing systems with in-situ electrical bias
US11335792B2 (en) * 2020-04-06 2022-05-17 Tokyo Electron Limited Semiconductor processing system with in-situ electrical bias and methods thereof
KR20220112135A (en) * 2021-02-03 2022-08-10 에스케이하이닉스 주식회사 Methods and apparatus for forming resist pattern using EUV with electrical field

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5732632A (en) 1980-08-04 1982-02-22 Mitsubishi Electric Corp Development of resist
JPS6371842A (en) 1986-09-16 1988-04-01 Hitachi Ltd Resist pattern forming method
JPS63244622A (en) 1987-03-30 1988-10-12 Nec Corp Manufacture of semiconductor device
JPH03159114A (en) * 1989-11-16 1991-07-09 Mitsubishi Electric Corp Formation of fine pattern
US5370825A (en) * 1993-03-03 1994-12-06 International Business Machines Corporation Water-soluble electrically conducting polymers, their synthesis and use
JP3254064B2 (en) * 1993-09-27 2002-02-04 株式会社半導体エネルギー研究所 Plasma processing method
US5602486A (en) * 1994-03-14 1997-02-11 Sandia Corporation Impedance sensing of flaws in non-homogenous materials
US5631314A (en) * 1994-04-27 1997-05-20 Tokyo Ohka Kogyo Co., Ltd. Liquid coating composition for use in forming photoresist coating films and photoresist material using said composition
JPH10106930A (en) 1996-10-02 1998-04-24 Oki Electric Ind Co Ltd Resist film, its forming method and resist solution
TW432397B (en) * 1997-10-23 2001-05-01 Sumitomo Metal Mining Co Transparent electro-conductive structure, progess for its production, transparent electro-conductive layer forming coating fluid used for its production, and process for preparing the coating fluid
US6530342B1 (en) * 1998-12-30 2003-03-11 Tokyo Electron Limited Large area plasma source
US6225215B1 (en) * 1999-09-24 2001-05-01 Lsi Logic Corporation Method for enhancing anti-reflective coatings used in photolithography of electronic devices
US6830389B2 (en) * 2000-10-25 2004-12-14 Advanced Micro Devices, Inc. Parallel plate development with the application of a differential voltage
JP3696156B2 (en) * 2000-12-26 2005-09-14 株式会社東芝 Coating film heating apparatus and resist film processing method
US6686132B2 (en) * 2001-04-20 2004-02-03 The Regents Of The University Of California Method and apparatus for enhancing resist sensitivity and resolution by application of an alternating electric field during post-exposure bake
TW499706B (en) * 2001-07-26 2002-08-21 Macronix Int Co Ltd Adjustable polarization-light-reacted photoresist and photolithography process using the same
US6841342B2 (en) * 2001-08-08 2005-01-11 Tokyo Electron Limited Substrate processing apparatus and substrate processing method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI744451B (en) * 2016-12-29 2021-11-01 美商應用材料股份有限公司 Apparatus for field guided acid profile control in a photoresist layer
TWI806187B (en) * 2016-12-29 2023-06-21 美商應用材料股份有限公司 Apparatus for field guided acid profile control in a photoresist layer

Also Published As

Publication number Publication date
US20050074706A1 (en) 2005-04-07
US20080220380A1 (en) 2008-09-11
WO2005038527A2 (en) 2005-04-28
WO2005038527A3 (en) 2006-01-12
US7374867B2 (en) 2008-05-20
TWI294562B (en) 2008-03-11

Similar Documents

Publication Publication Date Title
TW200525304A (en) Enhancing photoresist performance using electric fields
TWI557518B (en) Direct current superposition freeze
US7341939B2 (en) Method for patterning micro features by using developable bottom anti-reflection coating
JP2018164076A (en) Electric field/magnetic field guided acid diffusion
TWI830683B (en) A film structure for electric field guided photoresist patterning process
US8822347B2 (en) Wet soluble lithography
US20190064669A1 (en) Semiconductor Method of Protecting Wafer from Bevel Contamination
WO2021188218A1 (en) Lithography process window enhancement for photoresist patterning
WO2022257923A1 (en) Photolithography method based on bilayer photoresist
US9891522B2 (en) Method and composition of a chemically amplified copolymer resist
TW202144915A (en) Method of forming a pattern in a photoresist layer, method of manufacturing a semiconductor device and photoresist composition
JP3903149B2 (en) Resist pattern forming method, device manufacturing method
WO2015043321A1 (en) Nanoimprint lithography device and method
CN100559272C (en) A kind of method of constructing sub-10 nano gap and array thereof
US11817293B2 (en) Photoresist layers of semiconductor components including electric fields, system, and methods of forming same
US20210041785A1 (en) Process control of electric field guided photoresist baking process
CN110737171B (en) Nano pattern and preparation method thereof, and preparation method of nano structure
TW200403538A (en) Method for manufacturing resist pattern and photomask
US20220301849A1 (en) Method for reducing charging of semiconductor wafers
Fukushima et al. Optimization of photoacid generator in photoacid generation-bonded resist
JPH0855776A (en) Pattern formation method and pattern formation device
JPH06267934A (en) Material and method for wiring pattern formation
Fan Photolithography processes in n-MOSFET fabrication
KR100676607B1 (en) Method for forming photoresist pattern of semiconductor device
JPS63165845A (en) Pattern forming method

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees