TW200516867A - Address generator for block interleaving - Google Patents
Address generator for block interleavingInfo
- Publication number
- TW200516867A TW200516867A TW092131507A TW92131507A TW200516867A TW 200516867 A TW200516867 A TW 200516867A TW 092131507 A TW092131507 A TW 092131507A TW 92131507 A TW92131507 A TW 92131507A TW 200516867 A TW200516867 A TW 200516867A
- Authority
- TW
- Taiwan
- Prior art keywords
- interleaving
- block
- encoded symbols
- address generator
- interleaver
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/276—Interleaving address generation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
- H03M13/2707—Simple row-column interleaver, i.e. pure block interleaving
Landscapes
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Error Detection And Correction (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW092131507A TWI226757B (en) | 2003-11-11 | 2003-11-11 | Address generator for block interleaving |
US10/971,619 US7299387B2 (en) | 2003-11-11 | 2004-10-21 | Address generator for block interleaving |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW092131507A TWI226757B (en) | 2003-11-11 | 2003-11-11 | Address generator for block interleaving |
Publications (2)
Publication Number | Publication Date |
---|---|
TWI226757B TWI226757B (en) | 2005-01-11 |
TW200516867A true TW200516867A (en) | 2005-05-16 |
Family
ID=34546495
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW092131507A TWI226757B (en) | 2003-11-11 | 2003-11-11 | Address generator for block interleaving |
Country Status (2)
Country | Link |
---|---|
US (1) | US7299387B2 (zh) |
TW (1) | TWI226757B (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI617190B (zh) * | 2016-09-12 | 2018-03-01 | 晨星半導體股份有限公司 | 解交錯電路與解交錯方法 |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7343530B2 (en) * | 2004-02-10 | 2008-03-11 | Samsung Electronics Co., Ltd. | Turbo decoder and turbo interleaver |
US8533530B2 (en) | 2006-11-15 | 2013-09-10 | Qualcomm Incorporated | Method and system for trusted/untrusted digital signal processor debugging operations |
US8484516B2 (en) | 2007-04-11 | 2013-07-09 | Qualcomm Incorporated | Inter-thread trace alignment method and system for a multi-threaded processor |
DE102008029623A1 (de) * | 2008-06-23 | 2009-12-24 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Interleaver |
EP2139120B1 (de) * | 2008-06-23 | 2019-01-23 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Interleaver |
US7667628B2 (en) * | 2008-06-23 | 2010-02-23 | Fraunhofer-Gesellschaft Zur Foerderung Der Angewandten Forschung E.V. | Interleaver for scrambling and information word |
DE202012103190U1 (de) | 2012-08-23 | 2012-09-17 | Joy Industrial Co., Ltd. | Elektrische Radnabe |
CN114598419B (zh) * | 2021-11-12 | 2023-08-01 | 北京智芯微电子科技有限公司 | 交织器、解交织器、及其执行的方法 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01293074A (ja) * | 1988-05-20 | 1989-11-27 | Murata Mach Ltd | ファクシミリにおける画信号制御方式 |
JP3535833B2 (ja) * | 1999-03-15 | 2004-06-07 | 松下電器産業株式会社 | ブロックインタリーブ装置,ブロックデインタリーブ装置,ブロックインタリーブ方法,およびブロックデインタリーブ方法 |
AU4207800A (en) * | 1999-04-09 | 2000-11-14 | Sony Electronics Inc. | Interleavers and de-interleavers |
US6691261B1 (en) * | 1999-10-01 | 2004-02-10 | Agere Systems Inc. | De-interleaver and method of de-interleaving |
-
2003
- 2003-11-11 TW TW092131507A patent/TWI226757B/zh not_active IP Right Cessation
-
2004
- 2004-10-21 US US10/971,619 patent/US7299387B2/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI617190B (zh) * | 2016-09-12 | 2018-03-01 | 晨星半導體股份有限公司 | 解交錯電路與解交錯方法 |
Also Published As
Publication number | Publication date |
---|---|
US7299387B2 (en) | 2007-11-20 |
US20050102599A1 (en) | 2005-05-12 |
TWI226757B (en) | 2005-01-11 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |